Lines Matching defs:LdSt

755     const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset,
759   if (LdSt.getNumOperands() != 4)
761   if (!LdSt.getOperand(1).isReg() || !LdSt.getOperand(2).isImm() ||
762       !(LdSt.getOperand(3).isImm() && LdSt.getOperand(3).getImm() == LPAC::ADD))
765   switch (LdSt.getOpcode()) {
786   BaseOp = &LdSt.getOperand(1);
787   Offset = LdSt.getOperand(2).getImm();
796     const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,
799   switch (LdSt.getOpcode()) {
813     if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, Width, TRI))