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Searched defs:Lane (Results 1 – 25 of 30) sorted by relevance

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/llvm-project/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp416 createDupLane(MachineBasicBlock & MBB,MachineBasicBlock::iterator InsertBefore,const DebugLoc & DL,unsigned Reg,unsigned Lane,bool QPR) createDupLane() argument
431 createExtractSubreg(MachineBasicBlock & MBB,MachineBasicBlock::iterator InsertBefore,const DebugLoc & DL,unsigned DReg,unsigned Lane,const TargetRegisterClass * TRC) createExtractSubreg() argument
476 createInsertSubreg(MachineBasicBlock & MBB,MachineBasicBlock::iterator InsertBefore,const DebugLoc & DL,unsigned DReg,unsigned Lane,unsigned ToInsert) createInsertSubreg() argument
541 unsigned Lane; optimizeAllLanesPattern() local
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H A DARMBaseInstrInfo.cpp5135 (Lane & 1) ? ARM::ssub_0 : ARM::ssub_1); in setExecutionDomain() local
5076 getCorrespondingDRegAndLane(const TargetRegisterInfo * TRI,unsigned SReg,unsigned & Lane) getCorrespondingDRegAndLane() argument
5107 getImplicitSPRUseForDPRUse(const TargetRegisterInfo * TRI,MachineInstr & MI,unsigned DReg,unsigned Lane,unsigned & ImplicitSReg) getImplicitSPRUseForDPRUse() argument
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H A DARMExpandPseudoInsts.cpp762 unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); in ExpandLaneOp() local
H A DARMISelLowering.cpp8850 int Lane = SVN->getSplatIndex(); LowerVECTOR_SHUFFLE() local
9066 unsigned Lane = Op.getConstantOperandVal(2); LowerINSERT_VECTOR_ELT_i1() local
9080 SDValue Lane = Op.getOperand(2); LowerINSERT_VECTOR_ELT() local
9129 unsigned Lane = Op.getConstantOperandVal(1); LowerEXTRACT_VECTOR_ELT_i1() local
9140 SDValue Lane = Op.getOperand(1); LowerEXTRACT_VECTOR_ELT() local
15552 unsigned Lane = Ext.getConstantOperandVal(1); PerformExtractEltToVMOVRRD() local
17905 SDValue Lane = N0.getOperand(1); PerformExtendCombine() local
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H A DARMISelDAGToDAG.cpp2430 unsigned Lane = N->getConstantOperandVal(Vec0Idx + NumVecs); SelectVLDSTLane() local
/llvm-project/offload/DeviceRTL/src/
H A DMapping.cpp65 uint64_t Mask = ((uint64_t)1 << Lane) - (uint64_t)1; in lanemaskLT() local
72 uint32_t Lane = mapping::getThreadIdInWarp(); lanemaskGT() local
/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2080 __anonf97953580402(size_t I, const SDValue &Lane) LowerBUILD_VECTOR() argument
2104 __anonf97953580502(const SDValue &Lane) LowerBUILD_VECTOR() argument
2145 const SDValue &Lane = Op->getOperand(I); LowerBUILD_VECTOR() local
2199 __anonf97953580a02(size_t I, const SDValue &Lane) LowerBUILD_VECTOR() argument
2228 const SDValue &Lane = Op->getOperand(I); LowerBUILD_VECTOR() local
2240 __anonf97953580b02(size_t, const SDValue &Lane) LowerBUILD_VECTOR() argument
2246 for (const SDValue &Lane : Op->op_values()) { LowerBUILD_VECTOR() local
2273 __anonf97953580c02(size_t _, const SDValue &Lane) LowerBUILD_VECTOR() argument
2279 __anonf97953580d02(size_t _, const SDValue &Lane) LowerBUILD_VECTOR() argument
2289 const SDValue &Lane = Op->getOperand(I); LowerBUILD_VECTOR() local
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/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h58 int Lane = -1; member
H A DSIRegisterInfo.cpp1215 spillVGPRtoAGPR(const GCNSubtarget & ST,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,int Index,unsigned Lane,unsigned ValueReg,bool IsKill) spillVGPRtoAGPR() argument
1572 for (int LaneS = (RegOffset + EltSize) / 4 - 1, Lane = LaneS, buildSpillLoadStore() local
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/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanRecipes.cpp192 auto Lane = VPLane::getLastLaneForVF(State.VF); fixPhi() local
313 generatePerLane(VPTransformState & State,const VPIteration & Lane) generatePerLane() argument
633 for (unsigned Lane = 0, NumLanes = State.VF.getKnownMinValue(); execute() local
1384 for (unsigned Lane = StartLane; Lane < EndLane; ++Lane) { execute() local
1781 unsigned Lane = State.Instance->Lane.getKnownLane(); execute() local
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H A DVPlanSLP.cpp313 for (unsigned Lane = 1, E = MultiNodeOps[0].second.size(); Lane < E; ++Lane) { in reorderMultiNodeOps() local
H A DVPlan.cpp248 Value *Lane = Instance.Lane.getAsRuntimeExpr(Builder, VF); get() local
347 for (unsigned Lane = 0; Lane < VF.getKnownMinValue(); ++Lane) get() local
764 for (unsigned Lane = 0, VF = State->VF.getKnownMinValue(); Lane < VF; execute() local
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H A DSLPVectorizer.cpp1014 for (unsigned Lane : seq<unsigned>(VL.size())) getAltInstrMask() local
1743 getData(unsigned OpIdx,unsigned Lane) getData() argument
1756 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; clearUsed() local
1762 swap(unsigned OpIdx1,unsigned OpIdx2,unsigned Lane) swap() argument
1775 getSplatScore(unsigned Lane,unsigned OpIdx,unsigned Idx) const getSplatScore() argument
1807 getExternalUseScore(unsigned Lane,unsigned OpIdx,unsigned Idx) const getExternalUseScore() argument
1837 getLookAheadScore(Value * LHS,Value * RHS,ArrayRef<Value * > MainAltOps,int Lane,unsigned OpIdx,unsigned Idx,bool & IsUsed) getLookAheadScore() argument
1879 getBestOperand(unsigned OpIdx,int Lane,int LastLane,ArrayRef<ReorderingMode> ReorderingModes,ArrayRef<Value * > MainAltOps) getBestOperand() argument
2002 unsigned Lane = I - 1; getBestLaneToStartReordering() local
2124 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { appendOperandsOfVL() local
2164 shouldBroadcast(Value * Op,unsigned OpIdx,unsigned Lane) shouldBroadcast() argument
2253 for (unsigned Lane = 0, Lanes = getNumLanes(); Lane != Lanes; ++Lane) getVL() local
2355 int Lane = FirstLane + Direction * Distance; reorder() local
2991 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { setOperandsInOrder() local
3353 int Lane; global() member
3721 int Lane = std::distance(TE->Scalars.begin(), schedule() local
5818 for (int Lane = 0, LE = Entry->Scalars.size(); Lane != LE; ++Lane) { buildExternalUses() local
5884 for (unsigned Lane : seq<unsigned>(0, TE->Scalars.size())) { collectUserStores() local
13816 Value *Lane = Builder.getInt32(ExternalUse.Lane); vectorizeTree() local
14171 for (int Lane = 0, LE = Entry->Scalars.size(); Lane != LE; ++Lane) { vectorizeTree() local
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H A DVectorCombine.cpp1679 lookThroughShuffles(Use * U,int Lane) lookThroughShuffles() argument
1794 for (const auto &Lane : Item) generateNewInstTree() local
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H A DVPlan.h166 VPLane(unsigned Lane,Kind LaneKind) VPLane() argument
230 VPLane Lane; global() member
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H A DLoopVectorize.cpp9294 auto Lane = VPLane::getLastLaneForVF(State.VF); execute() local
9304 for (unsigned Lane = 0; Lane < EndLane; ++Lane) execute() local
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/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp247 if (Lane != 0) in matchDupFromInsertVectorElt() argument
287 assert(Lane >= 0 && "Expected positive lane?"); in matchDupFromBuildVector() argument
309 int Lane = *MaybeLane; matchDup() local
752 auto Lane = B.buildConstant(LLT::scalar(64), MatchInfo.second); applyDupLane() local
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/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp441 for (int Lane = 0; Lane < LaneCount; Lane++) createShuffleStride() local
613 int Lane = (VectorWidth / 128 > 0) ? VectorWidth / 128 : 1; group2Shuffle() local
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H A DX86InstCombineIntrinsic.cpp493 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { simplifyX86pack() local
3315 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { simplifyDemandedVectorEltsIntrinsic() local
3330 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { simplifyDemandedVectorEltsIntrinsic() local
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H A DX86TargetTransformInfo.cpp4701 for (unsigned Lane = 0; Lane != NumLegalLanes; ++Lane) { getScalarizationOverhead() local
6090 for (int Lane : seq<int>(0, NumElements)) { isLegalAltInstr() local
H A DX86ISelLowering.cpp5180 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { createPackShuffleMask() local
5203 for (int Lane = 0; Lane != NumLanes; ++Lane) { getPackDemandedElts() local
9469 int Lane = (M % NumElts) / NumEltsPerLane; isMultiLaneShuffleMask() local
10610 for (int Lane = 0; Lane != NumLanes; ++Lane) { matchShuffleAsBlend() local
10899 for (int Lane = 0; Lane != NumElts; Lane += NumLaneElts) { lowerShuffleAsUNPCKAndPermute() local
11085 for (int Lane = 0; Lane != NumElts; Lane += NumEltsPerLane) { lowerShuffleAsByteRotateAndPermute() local
11125 for (int Lane = 0; Lane != NumElts; Lane += NumEltsPerLane) { lowerShuffleAsByteRotateAndPermute() local
15100 for (int Lane = 0; Lane != NumLanes; ++Lane) { lowerShuffleAsLanePermuteAndRepeatedMask() local
15172 for (int Lane = 0; Lane != NumLanes; ++Lane) { lowerShuffleAsLanePermuteAndRepeatedMask() local
15202 for (int Lane = 0; Lane != NumLanes; ++Lane) { lowerShuffleAsLanePermuteAndRepeatedMask() local
15219 for (int Lane = 0; Lane != NumLanes; ++Lane) { lowerShuffleAsLanePermuteAndRepeatedMask() local
15548 int Lane = (M % NumElts) / NumLaneElts; lowerShuffleAsRepeatedMaskAndLanePermute() local
15604 int Lane = SubLane / SubLaneScale; lowerShuffleAsRepeatedMaskAndLanePermute() local
48356 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { combineVectorPack() local
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/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp3170 unsigned Lane = MI.getOperand(2).getImm(); emitCOPY_FW() local
3215 unsigned Lane = MI.getOperand(2).getImm() * 2; emitCOPY_FD() local
3245 unsigned Lane = MI.getOperand(2).getImm(); emitINSERT_FW() local
3281 unsigned Lane = MI.getOperand(2).getImm(); emitINSERT_FD() local
/llvm-project/llvm/lib/Analysis/
H A DConstantFolding.cpp3259 SmallVector<Constant *, 4> Lane(Operands.size()); ConstantFoldFixedVectorCall() local
3426 Constant *Lane = Operands[0]->getAggregateElement(I); ConstantFoldStructCall() local
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp11919 unsigned Lane = V.getConstantOperandVal(1); ReconstructShuffle() local
12616 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, dl, MVT::i64); GeneratePerfectShuffle() local
12728 constructDup(SDValue V,int Lane,SDLoc dl,EVT VT,unsigned Opcode,SelectionDAG & DAG) constructDup() argument
12960 int Lane = SVN->getSplatIndex(); LowerVECTOR_SHUFFLE() local
12981 unsigned Lane = 0; LowerVECTOR_SHUFFLE() local
13644 for (SDValue Lane : Op->ops()) { NormalizeBuildVector() local
13947 SDValue Lane = Value.getOperand(1); LowerBUILD_VECTOR() local
19407 SDValue Lane = Op1.getOperand(1); tryCombineFixedPointConvert() local
22231 SDValue Lane; performPostLD1Combine() local
27986 unsigned Lane = std::max(0, SVN->getSplatIndex()); LowerFixedLengthVECTOR_SHUFFLEToSVE() local
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/llvm-project/llvm/lib/IR/
H A DInstructions.cpp2318 unsigned Lane = J * Factor + I; isInterleaveMask() local

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