Lines Matching defs:Lane

425                                       const VPLane &Lane) {
430   return Builder.CreatePtrAdd(State.get(getOperand(0), Lane),
431                               State.get(getOperand(1), Lane), Name);
728   assert(!State.Lane && "VPInstruction executing an Lane");
741     for (unsigned Lane = 0, NumLanes = State.VF.getKnownMinValue();
742          Lane != NumLanes; ++Lane) {
743       Value *GeneratedValue = generatePerLane(State, VPLane(Lane));
745       State.set(this, GeneratedValue, VPLane(Lane));
910     auto Lane = vputils::isUniformAfterVectorization(ExitValue)
919     Value *V = State.get(ExitValue, VPLane(Lane));
1738   assert(!State.Lane && "Int or FP induction being replicated.");
1922   if (State.Lane) {
1923     StartLane = State.Lane->getKnownLane();
1945   for (unsigned Lane = StartLane; Lane < EndLane; ++Lane) {
1947         AddOp, StartIdx0, getSignedIntOrFpConstant(BaseIVTy, Lane));
1955     State.set(this, Add, VPLane(Lane));
2195   assert(!State.Lane && "Reduction being replicated.");
2245   assert(!State.Lane && "Reduction being replicated.");
2445   assert(State.Lane && "Branch on Mask works only on single instance.");
2451     ConditionBit = State.get(BlockInMask, *State.Lane);
2475   assert(State.Lane && "Predicated instruction PHI works per instance.");
2477       cast<Instruction>(State.get(getOperand(0), *State.Lane));
2504     if (vputils::onlyFirstLaneUsed(this) && !State.Lane->isFirstLane())
2512     if (State.hasScalarValue(this, *State.Lane))
2513       State.reset(this, Phi, *State.Lane);
2515       State.set(this, Phi, *State.Lane);
2518     State.reset(getOperand(0), Phi, *State.Lane);
2915   assert(!State.Lane && "Interleave group being replicated.");
3314   assert(!State.Lane && "cannot be used in per-lane");