Searched defs:LMul (Results 1 – 3 of 3) sorted by relevance
| /llvm-project/llvm/lib/TargetParser/ |
| H A D | RISCVTargetParser.cpp | 168 unsigned LMul; printVType() local
190 unsigned LMul; getSEWLMULRatio() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 190 isConvertibleToVMV_V_V(const RISCVSubtarget & STI,const MachineBasicBlock & MBB,MachineBasicBlock::const_iterator MBBI,MachineBasicBlock::const_iterator & DefMBBI,RISCVII::VLMUL LMul) isConvertibleToVMV_V_V() argument
323 RISCVII::VLMUL LMul = RISCVRI::getLMul(RegClass->TSFlags); copyPhysRegVector() local
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| H A D | RISCVISelLowering.cpp | 2651 unsigned LMul = divideCeil(VT.getSizeInBits(), MinVLen); in useRVVForFixedLengthVectorVT() local
2462 getRegClassIDForLMUL(RISCVII::VLMUL LMul) getRegClassIDForLMUL() argument
2847 unsigned LMul; getLMULCost() local
8967 SDValue LMul = DAG.getTargetConstant(VLMUL, DL, XLenVT); lowerGetVectorLength() local
18478 lookupMaskedIntrinsic(uint16_t MCOpcode,RISCVII::VLMUL LMul,unsigned SEW) lookupMaskedIntrinsic() argument
18521 RISCVII::VLMUL LMul = RISCVII::getLMul(MI.getDesc().TSFlags); emitVFROUND_NOEXCEPT_MASK() local
22086 allocatePhysReg(unsigned NF,unsigned LMul,unsigned StartReg) allocatePhysReg() argument
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