Lines Matching defs:LMul

2406 unsigned RISCVTargetLowering::getRegClassIDForLMUL(RISCVII::VLMUL LMul) {
2407   switch (LMul) {
2651   unsigned LMul = divideCeil(VT.getSizeInBits(), MinVLen);
2653   if (LMul > Subtarget.getMaxLMULForFixedLengthVectors())
2834     unsigned LMul;
2836     std::tie(LMul, Fractional) =
2839       Cost = LMul <= DLenFactor ? (DLenFactor / LMul) : 1;
2841       Cost = (LMul * DLenFactor);
9635   SDValue LMul = DAG.getTargetConstant(VLMUL, DL, XLenVT);
9642       DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, XLenVT, ID, AVL, Sew, LMul);
19011       auto [LMul, Fractional] = RISCVVType::decodeVLMUL(VLMUL);
19013       MaxVL = (Fractional) ? MaxVL / LMul : MaxVL * LMul;
19623 lookupMaskedIntrinsic(uint16_t MCOpcode, RISCVII::VLMUL LMul, unsigned SEW) {
19625       RISCVVInversePseudosTable::getBaseInfo(MCOpcode, LMul, SEW);
19666   RISCVII::VLMUL LMul = RISCVII::getLMul(MI.getDesc().TSFlags);
19671       lookupMaskedIntrinsic(RISCV::VFCVT_F_X_V, LMul, 1 << Log2SEW)