| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCCState.h | 46 AIXCCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, in AIXCCState()
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| H A D | PPCFastISel.cpp | 1380 processCallArgs(SmallVectorImpl<Value * > & Args,SmallVectorImpl<unsigned> & ArgRegs,SmallVectorImpl<MVT> & ArgVTs,SmallVectorImpl<ISD::ArgFlagsTy> & ArgFlags,SmallVectorImpl<unsigned> & RegArgs,CallingConv::ID CC,unsigned & NumBytes,bool IsVarArg) processCallArgs() argument
1551 bool IsVarArg = CLI.IsVarArg; fastLowerCall() local
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| H A D | PPCISelLowering.h | 1176 const bool IsVarArg : 1; global() member
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| /llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 273 bool IsVarArg = CLI.IsVarArg; in LowerCall() local
470 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerFormalArguments() argument
485 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerCallArguments() argument
632 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
645 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
[all...] |
| /llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 197 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
298 bool IsVarArg = CLI.IsVarArg; LowerCall() local
464 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
473 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
[all...] |
| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 395 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
418 bool IsVarArg = CLI.IsVarArg; LowerCall() local
436 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument
532 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
542 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
604 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool IsVarArg,bool,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
778 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
[all...] |
| /llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 326 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
415 bool IsVarArg = CLI.IsVarArg; LowerCall() local
536 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
584 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
[all...] |
| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 168 bool IsVarArg = MF.getFunction().isVarArg(); assignCalleeSavedSpillSlots() local
239 bool IsVarArg = MF.getFunction().isVarArg(); determineCalleeSaves() local
323 bool IsVarArg = MF.getFunction().isVarArg(); spillCalleeSavedRegisters() local
853 bool IsVarArg = MF.getFunction().isVarArg(); getRegSpillOffset() local
1298 bool IsVarArg = MF.getFunction().isVarArg(); emitPrologue() local
[all...] |
| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CallLowering.h | 148 bool IsVarArg = false; member
508 canLowerReturn(MachineFunction & MF,CallingConv::ID CallConv,SmallVectorImpl<BaseArgInfo> & Outs,bool IsVarArg) canLowerReturn() argument
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| /llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 328 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerFormalArguments() argument
428 CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, in CanLowerReturn() argument
437 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
516 bool IsVarArg = CLI.IsVarArg; LowerCall() local
[all...] |
| /llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 531 bool IsVarArg = CLI.IsVarArg; in LowerCall() local
884 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
919 LowerFormalArguments(SDValue Chain,CallingConv::ID CCID,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
1063 CanLowerReturn(CallingConv::ID CCID,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
1072 LowerReturn(SDValue Chain,CallingConv::ID CCID,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
1224 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,bool IsCalleeStructRet,bool IsCallerStructRet,Type * RetTy,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
3047 isCalleePop(CallingConv::ID CC,bool IsVarArg,bool GuaranteeTCO) isCalleePop() argument
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb1FrameLowering.cpp | 957 popRegsFromStack(MachineBasicBlock & MBB,MachineBasicBlock::iterator & MI,const TargetInstrInfo & TII,const std::set<Register> & RegsToRestore,const std::set<Register> & AvailableCopyRegs,bool IsVarArg,bool HasV5Ops) popRegsFromStack() argument
1143 bool IsVarArg = AFI->getArgRegsSaveSize() > 0; restoreCalleeSavedRegisters() local
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 28 CCState::CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, in CCState() argument
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 74 bool IsVarArg : 1; member
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| H A D | CallingConvLower.h | 173 bool IsVarArg; variable
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 127 : CCState(CC, IsVarArg, MF, locs, C), in HexagonCCState() argument
186 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
202 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument
350 LowerCallResult(SDValue Chain,SDValue Glue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const SmallVectorImpl<SDValue> & OutVals,SDValue Callee) const LowerCallResult() argument
413 bool IsVarArg = CLI.IsVarArg; LowerCall() local
793 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
3731 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,bool IsCalleeStructRet,bool IsCallerStructRet,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
[all...] |
| /llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 56 if (IsVarArg) in getParamCC() argument
368 bool IsVarArg, in LowerReturn() argument
442 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerFormalArguments() argument
68 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
[all...] |
| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 246 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
257 LowerReturn_32(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn_32() argument
342 LowerReturn_64(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn_64() argument
418 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
627 LowerFormalArguments_64(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments_64() argument
[all...] |
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 113 bool IsVarArg = CB.getFunctionType()->isVarArg(); lowerCall() local
644 determineAndHandleAssignments(ValueHandler & Handler,ValueAssigner & Assigner,SmallVectorImpl<ArgInfo> & Args,MachineIRBuilder & MIRBuilder,CallingConv::ID CallConv,bool IsVarArg,ArrayRef<Register> ThisReturnRegs) const determineAndHandleAssignments() argument
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 603 bool IsVarArg = STI.isCallingConvWin64(MF.getFunction().getCallingConv()); isArgumentRegister() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3201 bool IsVarArg = CLI.IsVarArg; LowerCall() local
3530 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,TargetLowering::CallLoweringInfo & CLI) const LowerCallResult() argument
3657 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
3815 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
3845 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
[all...] |
| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 3963 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
4189 bool IsVarArg = CLI.IsVarArg; LowerCall() local
4432 CanLowerReturn(CallingConv::ID CallConv,MachineFunction & MF,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,LLVMContext & Context) const CanLowerReturn() argument
4449 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument
[all...] |
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 1671 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
2921 isCalleePop(CallingConv::ID CallingConv,bool is64Bit,bool IsVarArg,bool GuaranteeTCO) isCalleePop() argument
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| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1136 bool IsVarArg = CLI.IsVarArg; LowerCall() local
1339 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1073 CCAssignFnForCall(CallingConv::ID CC,bool IsVarArg) CCAssignFnForCall() argument
1100 CCAssignFnForReturn(CallingConv::ID CC,bool IsVarArg) CCAssignFnForReturn() argument
1288 CCAssignFnForCall(CallingConv::ID CC,bool IsVarArg) CCAssignFnForCall() argument
1293 CCAssignFnForReturn(CallingConv::ID CC,bool IsVarArg) CCAssignFnForReturn() argument
|