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Searched defs:IsKill (Results 1 – 25 of 29) sorted by relevance

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/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrBuilder.h50 bool IsKill, int Offset) { in addRegIndirectWithDisp()
H A DM68kInstrInfo.cpp780 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool IsKill,int FrameIndex,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/Mips/
H A DMips16RegisterInfo.cpp123 bool IsKill = false; eliminateFI() local
H A DMipsSERegisterInfo.cpp200 bool IsKill = false; eliminateFI() local
H A DMipsSEFrameLowering.cpp833 TII.storeRegToStackSlot(MBB, MI, Reg, IsKill, I.getFrameIdx(), RC, TRI, in spillCalleeSavedRegisters() local
/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaRegisterInfo.cpp98 bool IsKill = false; in eliminateFrameIndex() local
H A DXtensaFrameLowering.cpp213 bool IsKill = !IsA0AndRetAddrIsTaken; in spillCalleeSavedRegisters() local
/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp126 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool IsKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp275 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy()
/llvm-project/llvm/lib/CodeGen/
H A DFixupStatepointCallerSaved.cpp112 bool &IsKill, const TargetInstrInfo &TII, in performCopyPropagation() argument
418 bool IsKill = true; in spillRegisters() local
H A DScheduleDAGInstrs.cpp1118 MO.setIsKill(IsKill && !MRI.isReserved(Reg)); in toggleKills() local
412 bool IsKill = MO.getSubReg() == 0 || MO.isUndef(); addVRegDefDeps() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp335 bool IsKill = NewAddrDwords == Info->VAddrDwords; shrinkMIMG() local
558 const bool IsKill = SrcReg->isKill(); shrinkScalarLogicOp() local
H A DSIOptimizeExecMaskingPreRA.cpp247 bool IsKill = SelLI->Query(CmpIdx.getRegSlot()).isKill(); in optimizeVcndVcmpPair() local
H A DSIRegisterInfo.cpp84 bool IsKill; global() member
1216 spillVGPRtoAGPR(const GCNSubtarget & ST,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,int Index,unsigned Lane,unsigned ValueReg,bool IsKill) spillVGPRtoAGPR() argument
1331 buildSpillLoadStore(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,unsigned LoadStoreOp,int Index,Register ValueReg,bool IsKill,MCRegister ScratchOffsetReg,int64_t InstOffset,MachineMemOperand * MMO,RegScavenger * RS,LiveRegUnits * LiveUnits) const buildSpillLoadStore() argument
[all...]
H A DSIFrameLowering.cpp150 bool IsKill = !MBB.isLiveIn(SpillReg); in buildPrologSpill() local
/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.cpp393 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.cpp112 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool IsKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
H A DLoongArchFrameLowering.cpp444 bool IsKill = in spillCalleeSavedRegisters() local
/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.cpp295 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool IsKill,int FrameIndex,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp1419 bool IsKill = !HRI.isEHReturnCalleeSaveReg(Reg); insertCSRSpillsInBlock() local
1750 bool IsKill = MI->getOperand(2).isKill(); expandStoreInt() local
1813 bool IsKill = MI->getOperand(2).isKill(); expandStoreVecPred() local
1902 bool IsKill = MI->getOperand(2).isKill(); expandStoreVec2() local
1989 bool IsKill = MI->getOperand(2).isKill(); expandStoreVec() local
[all...]
H A DHexagonBlockRanges.cpp325 bool IsKill = Op.isKill(); computeInitialLiveRanges() local
/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp751 bool IsKill = I.getOperand(1).isKill(); in select() local
/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp51 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator Position,Register SourceRegister,bool IsKill,int FrameIndex,const TargetRegisterClass * RegisterClass,const TargetRegisterInfo *,Register) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/Transforms/Utils/
H A DBasicBlockUtils.cpp566 bool IsKill = DVR.isKillLocation() && IsDbgValueKind; in DbgVariableRecordsRemoveUndefDbgAssignsFromEntryBlock() local
669 bool IsKill = DVI->isKillLocation() && IsDbgValueKind; removeUndefDbgAssignsFromEntryBlock() local
/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp873 bool IsKill = MO.isKill(); MergeOpsUpdate() local

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