/llvm-project/llvm/utils/TableGen/ |
H A D | VTEmitter.cpp |
|
/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86RegisterBankInfo.cpp | 378 bool IsFP = any_of(MRI.use_nodbg_instructions(cast<GLoad>(MI).getDstReg()), getInstrMapping() local 395 bool IsFP = onlyDefinesFP(*DefMI, MRI, TRI); getInstrMapping() local
|
/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
H A D | GISelUtilsTest.cpp | 402 for (auto IsFP : BooleanChoices) { TEST_F() local
|
/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 798 bool IsFP = Opcode == TargetOpcode::G_FCMP; computeNumSignBits() local
|
H A D | Utils.cpp | 1613 bool IsFP) { in getICmpTrueVal() argument 1588 isConstTrueVal(const TargetLowering & TLI,int64_t Val,bool IsVector,bool IsFP) isConstTrueVal() argument 1601 isConstFalseVal(const TargetLowering & TLI,int64_t Val,bool IsVector,bool IsFP) isConstFalseVal() argument
|
H A D | MachineIRBuilder.cpp | 525 bool IsFP) { in buildBoolExt() argument 533 bool IsFP) { in buildBoolExtInReg() argument
|
H A D | CombinerHelper.cpp | 3388 isConstValidTrue(const TargetLowering & TLI,unsigned ScalarSizeBits,int64_t Cst,bool IsVector,bool IsFP) isConstValidTrue() argument 3415 bool IsFP = false; matchNotCmp() local
|
/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LowerMatrixIntrinsics.cpp | 836 bool IsFP = I.getType()->isFPOrFPVectorTy(); sinkTranspose() local 856 bool IsFP = I.getType()->isFPOrFPVectorTy(); sinkTranspose() local 1535 bool IsFP = Result.getElementType()->isFloatingPointTy(); emitMatrixMultiply() local
|
/llvm-project/llvm/lib/IR/ |
H A D | IntrinsicInst.cpp | 774 bool IsFP = true; getPredicate() local
|
/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 1754 bool IsFP, SDValue &LHS, SDValue &RHS, in TranslateM68kCC() argument 2198 bool IsFP = Op1.getSimpleValueType().isFloatingPoint(); in LowerSETCC() local
|
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 1583 bool IsFP = EltTy->isHalfTy() || EltTy->isFloatTy() || EltTy->isDoubleTy(); printConstant() local
|
H A D | X86ISelDAGToDAG.cpp | 6349 bool IsFP = ValueSVT.isFloatingPoint(); Select() local 6445 bool IsFP = ValueSVT.isFloatingPoint(); Select() local [all...] |
H A D | X86ISelLowering.cpp | 4829 bool IsFP = getTargetConstantBitsFromNode() local 21759 bool IsFP = Op.getSimpleValueType().isFloatingPoint(); lowerAddSubToHorizontalOp() local [all...] |
/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUInstPrinter.cpp | 639 printImmediate64(uint64_t Imm,const MCSubtargetInfo & STI,raw_ostream & O,bool IsFP) printImmediate64() argument
|
/llvm-project/llvm/lib/Bitcode/Reader/ |
H A D | BitcodeReader.cpp | 1279 bool IsFP = Ty->isFPOrFPVectorTy(); getDecodedUnaryOpcode() local 1293 bool IsFP = Ty->isFPOrFPVectorTy(); getDecodedBinaryOpcode() local 5435 bool IsFP = LHS->getType()->isFPOrFPVectorTy(); parseFunctionBody() local [all...] |
/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 1408 bool IsFP = fieldFromInstruction(insn, 26, 1); DecodeSignedLdStInstruction() local
|
/llvm-project/llvm/lib/AsmParser/ |
H A D | LLParser.cpp | 7541 parseUnaryOp(Instruction * & Inst,PerFunctionState & PFS,unsigned Opc,bool IsFP) parseUnaryOp() argument 7668 parseArithmetic(Instruction * & Inst,PerFunctionState & PFS,unsigned Opc,bool IsFP) parseArithmetic() argument 8306 bool IsFP = false; parseAtomicRMW() local [all...] |
/llvm-project/clang/lib/AST/ |
H A D | ASTContext.cpp | 2197 SVE_VECTOR_TYPE(Name,MangledName,Id,SingletonId,NumEls,ElBits,IsSigned,IsFP,IsBF) getTypeInfoImpl() argument 2220 RVV_VECTOR_TYPE(Name,Id,SingletonId,ElKind,ElBits,NF,IsSigned,IsFP,IsBF) getTypeInfoImpl() argument 4103 SVE_VECTOR_TYPE(Name,MangledName,Id,SingletonId,NumEls,ElBits,IsSigned,IsFP,IsBF) getScalableVectorType() argument 4122 RVV_VECTOR_TYPE(Name,Id,SingletonId,NumEls,ElBits,NF,IsSigned,IsFP,IsBF) getScalableVectorType() argument
|
H A D | ItaniumMangle.cpp | 3380 SVE_VECTOR_TYPE(InternalName,MangledName,Id,SingletonId,NumEls,ElBits,IsSigned,IsFP,IsBF) mangleType() argument
|
H A D | Type.cpp | 2561 RVV_VECTOR_TYPE(Name,Id,SingletonId,NumEls,ElBits,NF,IsSigned,IsFP,IsBF) isRVVVLSBuiltinType() argument
|
/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 4839 bool IsFP = Constraint[2] == 'f'; getRegForInlineAsmConstraint() local
|
/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 2542 bool IsFP = false; selectG_CONSTANT() local
|
/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 3336 bool IsFP = CmpOp0.getValueType().isFloatingPoint(); lowerVectorSETCC() local
|
/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 8451 bool IsFP = VPIntrin.getOperand(0)->getType()->isFPOrFPVectorTy(); visitVPCmp() local
|
H A D | SelectionDAG.cpp | 564 getExtForLoadExtType(bool IsFP,ISD::LoadExtType ExtType) getExtForLoadExtType() argument
|