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Searched defs:CCInfo (Results 1 – 25 of 37) sorted by relevance

12

/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kCallingConv.h41 const M68kCCState &CCInfo = static_cast<M68kCCState &>(State); in CC_M68k_Any_AssignToReg() local
H A DM68kISelLowering.cpp578 M68kCCState CCInfo(ArgTypes, CallConv, IsVarArg, MF, ArgLocs, in LowerCall() local
890 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult() local
933 M68kCCState CCInfo(ArgTypes, CCID, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments() local
1065 CCState CCInfo(CCID, IsVarArg, MF, RVLocs, Context); CanLowerReturn() local
1079 CCState CCInfo(CCID, IsVarArg, MF, RVLocs, *DAG.getContext()); LowerReturn() local
1264 CCState CCInfo(CalleeCC, IsVarArg, MF, ArgLocs, C); IsEligibleForTailCallOptimization() local
1294 CCState CCInfo(CalleeCC, IsVarArg, MF, ArgLocs, C); IsEligibleForTailCallOptimization() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp339 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() local
389 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() local
509 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall() local
563 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerCall() local
H A DMipsFastISel.cpp1135 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs() local
1276 MipsCCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall() local
1696 MipsCCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, in selectRet() local
H A DMips16ISelLowering.cpp242 const CCState &CCInfo, unsigned NextStackOffset, in isEligibleForTailCallOptimization()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp754 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn() local
1102 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult() local
663 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); CanLowerReturn() local
1468 VarArgsLoweringHelper(X86MachineFunctionInfo * FuncInfo,const SDLoc & Loc,SelectionDAG & DAG,const X86Subtarget & Subtarget,CallingConv::ID CallConv,CCState & CCInfo) VarArgsLoweringHelper() argument
1498 CCState &CCInfo; global() member in __anon7a9913630211::VarArgsLoweringHelper
1691 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); LowerFormalArguments() local
2049 CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext()); LowerCall() local
2773 CCState CCInfo(CalleeCC, isVarArg, MF, ArgLocs, C); IsEligibleForTailCallOptimization() local
2792 CCState CCInfo(CalleeCC, false, MF, RVLocs, C); IsEligibleForTailCallOptimization() local
2821 CCState CCInfo(CalleeCC, isVarArg, MF, ArgLocs, C); IsEligibleForTailCallOptimization() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp279 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall() local
495 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCallArguments() local
635 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn() local
657 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, LowerReturn() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp341 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); LowerFormalArguments() local
430 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); LowerCall() local
546 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); LowerReturn() local
590 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); LowerCallResult() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp293 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() local
456 static void allocateHSAUserSGPRs(CCState &CCInfo, in allocateHSAUserSGPRs() argument
522 CCState CCInfo( in lowerFormalArgumentsKernel() local
604 CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext()); lowerFormalArguments() local
751 passSpecialInputs(MachineIRBuilder & MIRBuilder,CCState & CCInfo,SmallVectorImpl<std::pair<MCRegister,Register>> & ArgRegs,CallLoweringInfo & Info) const passSpecialInputs() argument
1280 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); lowerTailCall() local
1460 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); lowerCall() local
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H A DSIISelLowering.cpp74 static unsigned findFirstFreeSGPR(CCState &CCInfo) { in findFirstFreeSGPR() argument
2179 allocateSpecialEntryInputVGPRs(CCState & CCInfo,MachineFunction & MF,const SIRegisterInfo & TRI,SIMachineFunctionInfo & Info) const allocateSpecialEntryInputVGPRs() argument
2229 allocateVGPR32Input(CCState & CCInfo,unsigned Mask=~0u,ArgDescriptor Arg=ArgDescriptor ()) allocateVGPR32Input() argument
2253 allocateSGPR32InputImpl(CCState & CCInfo,const TargetRegisterClass * RC,unsigned NumArgRegs) allocateSGPR32InputImpl() argument
2273 allocateFixedSGPRInputImpl(CCState & CCInfo,const TargetRegisterClass * RC,MCRegister Reg) allocateFixedSGPRInputImpl() argument
2282 allocateSGPR32Input(CCState & CCInfo,ArgDescriptor & Arg) allocateSGPR32Input() argument
2290 allocateSGPR64Input(CCState & CCInfo,ArgDescriptor & Arg) allocateSGPR64Input() argument
2301 allocateSpecialInputVGPRs(CCState & CCInfo,MachineFunction & MF,const SIRegisterInfo & TRI,SIMachineFunctionInfo & Info) const allocateSpecialInputVGPRs() argument
2322 allocateSpecialInputVGPRsFixed(CCState & CCInfo,MachineFunction & MF,const SIRegisterInfo & TRI,SIMachineFunctionInfo & Info) const allocateSpecialInputVGPRsFixed() argument
2335 allocateSpecialInputSGPRs(CCState & CCInfo,MachineFunction & MF,const SIRegisterInfo & TRI,SIMachineFunctionInfo & Info) const allocateSpecialInputSGPRs() argument
2375 allocateHSAUserSGPRs(CCState & CCInfo,MachineFunction & MF,const SIRegisterInfo & TRI,SIMachineFunctionInfo & Info) const allocateHSAUserSGPRs() argument
2435 allocatePreloadKernArgSGPRs(CCState & CCInfo,SmallVectorImpl<CCValAssign> & ArgLocs,const SmallVectorImpl<ISD::InputArg> & Ins,MachineFunction & MF,const SIRegisterInfo & TRI,SIMachineFunctionInfo & Info) const allocatePreloadKernArgSGPRs() argument
2501 allocateLDSKernelId(CCState & CCInfo,MachineFunction & MF,const SIRegisterInfo & TRI,SIMachineFunctionInfo & Info) const allocateLDSKernelId() argument
2513 allocateSystemSGPRs(CCState & CCInfo,MachineFunction & MF,SIMachineFunctionInfo & Info,CallingConv::ID CallConv,bool IsShader) const allocateSystemSGPRs() argument
2748 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, LowerFormalArguments() local
3063 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); CanLowerReturn() local
3101 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, LowerReturn() local
3181 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, LowerCallResult() local
3232 passSpecialInputs(CallLoweringInfo & CLI,CCState & CCInfo,const SIMachineFunctionInfo & Info,SmallVectorImpl<std::pair<unsigned,SDValue>> & RegsToPass,SmallVectorImpl<SDValue> & MemOpChains,SDValue Chain) const passSpecialInputs() argument
3503 CCState CCInfo(CalleeCC, IsVarArg, MF, ArgLocs, Ctx); isEligibleForTailCallOptimization() local
3621 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); LowerCall() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1244 analyzeArguments(TargetLowering::CallLoweringInfo * CLI,const Function * F,const DataLayout * TD,const SmallVectorImpl<ArgT> & Args,SmallVectorImpl<CCValAssign> & ArgLocs,CCState & CCInfo,bool Tiny) analyzeArguments() argument
1334 analyzeReturnValues(const SmallVectorImpl<ArgT> & Args,CCState & CCInfo,bool Tiny) analyzeReturnValues() argument
1393 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, LowerFormalArguments() local
1503 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, LowerCall() local
1668 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, LowerCallResult() local
1699 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); CanLowerReturn() local
1717 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, LowerReturn() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp446 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments() local
535 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); CanLowerReturn() local
550 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, LowerReturn() local
611 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, LowerCCCCallTo() local
783 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, LowerCallResult() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp629 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments() local
730 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn() local
751 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn() local
813 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo() local
941 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, LowerCallResult() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp239 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn() local
267 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_32() local
350 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_64() local
441 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_32() local
634 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, LowerFormalArguments_64() local
790 IsEligibleForTailCallOptimization(CCState & CCInfo,CallLoweringInfo & CLI,MachineFunction & MF) const IsEligibleForTailCallOptimization() argument
838 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, LowerCall_32() local
1234 CCState CCInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), ArgLocs, LowerCall_64() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp475 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, canLowerReturn() local
499 CCState CCInfo(F.getCallingConv(), /*IsVarArg=*/true, MF, ArgLocs, handleMustTailForwardedRegisters() local
703 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); lowerFormalArguments() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1382 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs() local
1502 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); finishCall() local
1588 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, *Context); fastLowerCall() local
1710 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, *Context); SelectRet() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1884 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); in ProcessCallArgs() local
2033 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context); in FinishCall() local
2102 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext()); in SelectRet() local
2216 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in ARMEmitLibcall() local
2325 CCState CCInfo(C in SelectCall() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp614 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, F.getContext()); determineAndHandleAssignments() local
693 handleAssignments(ValueHandler & Handler,SmallVectorImpl<ArgInfo> & Args,CCState & CCInfo,SmallVectorImpl<CCValAssign> & ArgLocs,MachineIRBuilder & MIRBuilder,ArrayRef<Register> ThisReturnRegs) const handleAssignments() argument
980 checkReturn(CCState & CCInfo,SmallVectorImpl<BaseArgInfo> & Outs,CCAssignFn * Fn) const checkReturn() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1025 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, LowerCCCCallTo() local
1178 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, LowerCCCArguments() local
1331 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); CanLowerReturn() local
1355 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, LowerReturn() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp347 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments() local
431 CCState CCInfo(CallConv, IsVarArg, MF, CSKYLocs, Context); in CanLowerReturn() local
445 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), CSKYLocs, in LowerReturn() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp139 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); canLowerReturn() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp3687 analyzeInputArgs(MachineFunction & MF,CCState & CCInfo,const SmallVectorImpl<ISD::InputArg> & Ins,bool IsRet,LoongArchCCAssignFn Fn) const analyzeInputArgs() argument
3710 analyzeOutputArgs(MachineFunction & MF,CCState & CCInfo,const SmallVectorImpl<ISD::OutputArg> & Outs,bool IsRet,CallLoweringInfo * CLI,LoongArchCCAssignFn Fn) const analyzeOutputArgs() argument
3879 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); LowerFormalArguments() local
4020 isEligibleForTailCallOptimization(CCState & CCInfo,CallLoweringInfo & CLI,MachineFunction & MF,const SmallVectorImpl<CCValAssign> & ArgLocs) const isEligibleForTailCallOptimization() argument
4326 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); CanLowerReturn() local
4348 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, LowerReturn() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp72 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn() local
376 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn() local
454 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments() local
598 CCState CCInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), ArgLocs, LowerCall() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp536 CCState CCInfo(CC, F.isVarArg(), MIRBuilder.getMF(), ArgLocs, F.getContext()); lowerFormalArguments() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp190 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); in CanLowerReturn() local
210 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn() local
357 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult() local
430 HexagonCCState CCInfo(CallCon in LowerCall() local
786 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, LowerFormalArguments() local
[all...]

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