| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | BitTracker.h | 287 struct BitTracker::BitMask { struct
289 BitMask(uint16_t b, uint16_t e) : B(b), E(e) {} in BitMask() argument
291 uint16_t first() const { return B; } in first()
292 uint16_t last() const { return E; } in last()
317 RegisterCell &insert(const RegisterCell &RC, const BitMask &M); argument
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| /llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | BypassSlowDivision.cpp | 341 Value *AndV = Builder.CreateAnd(OrV, BitMask); in insertOperandRuntimeCheck() local
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| H A D | SimplifyCFG.cpp | 6093 APInt BitMask = APInt::getZero(MinCaseVal->getBitWidth()); foldSwitchToSelect() local
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| /llvm-project/bolt/lib/Profile/ |
| H A D | BoltAddressTranslation.cpp | 157 APInt BitMask(alignTo(EqualElems, 8), 0); in calculateBranchEntriesBitMask() local
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| /llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopIdiomRecognize.cpp | 2202 detectShiftUntilBitTestIdiom(Loop * CurLoop,Value * & BaseX,Value * & BitMask,Value * & BitPos,Value * & CurrX,Instruction * & NextX) detectShiftUntilBitTestIdiom() argument
2357 Value *X, *BitMask, *BitPos, *XCurr; recognizeShiftUntilBitTest() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineOperand.cpp | 607 unsigned BitMask = Flags.second; in printTargetFlags() local
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| /llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | LowerTypeTests.cpp | 463 Constant *BitMask; global() member
589 Value *BitMask = B.CreateShl(ConstantInt::get(BitsType, 1), BitIndex); createMaskedBitTest() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 1530 SDValue BitMask = DAG.getConstant(~BitImm, DL, ResTy); lowerMSABitClearImm() local
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| /llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 8820 const MCExpr *BitMask; ParseDirective() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 12297 SDValue BitMask = getConstVector(Bits, VT, DAG, DL); lowerShuffleAsElementInsertion() local
29384 SDValue BitMask = DAG.getConstant(-1, dl, ExtVT); LowerShiftByScalarVariable() local
39060 SDValue BitMask = getConstVector(EltBits, UndefElts, MaskVT, DAG, DL); combineX86ShuffleChain() local
45381 SDValue BitMask = DAG.getBuildVector(VT, DL, Bits); combineToExtendBoolVectorInReg() local
46474 APInt BitMask = APInt::getSignMask(SrcVT.getScalarSizeInBits()); checkSignTestSetCCCombine() local
49937 SDValue BitMask = N1; combineAnd() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 7877 SDValue BitMask = DAG.getConstant(BW - 1, DL, ShVT); expandVPFunnelShift() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 11840 uint32_t BitMask = BitMaskOp->getZExtValue(); calculateByteProvider() local
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| /llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 16878 unsigned BitMask; EmitPPCBuiltinExpr() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7116 uint64_t BitMask = 0xff; isVMOVModifiedImm() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 18502 uint64_t BitMask = Bits == 64 ? -1ULL : ((1ULL << Bits) - 1); tryCombineToBSL() local
[all...] |