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Searched defs:Amt (Results 1 – 25 of 43) sorted by relevance

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/llvm-project/llvm/include/llvm/ADT/
H A DAPSInt.h161 APSInt relativeShr(unsigned Amt) const { in relativeShr()
217 APSInt relativeShl(unsigned Amt) const { in relativeShl()
/llvm-project/clang/lib/AST/
H A DFormatString.cpp82 const OptionalAmount &Amt = ParseAmount(I, E); in ParsePositionAmount() local
132 const OptionalAmount Amt = in ParseFieldWidth() local
151 const OptionalAmount &Amt = ParseAmount(I, E); in ParseArgPosition() local
[all...]
H A DScanfFormatString.cpp132 const OptionalAmount &Amt = clang::analyze_format_string::ParseAmount(I, E); in ParseScanfSpecifier() local
H A DPrintfFormatString.cpp44 const OptionalAmount Amt = ParsePositionAmount(H, Start, Beg, E, in ParsePrecision() local
/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DBasicValueFactory.cpp278 uint64_t Amt = V2.getZExtValue(); in evalAPSInt() local
293 uint64_t Amt = V2.getZExtValue(); in evalAPSInt() local
/llvm-project/clang/include/clang/AST/
H A DFormatString.h464 void setVectorNumElts(const OptionalAmount &Amt) { in setVectorNumElts()
472 void setFieldWidth(const OptionalAmount &Amt) { in setFieldWidth()
588 void setPrecision(const OptionalAmount &Amt) { in setPrecision()
/llvm-project/llvm/include/llvm/IR/
H A DBasicBlock.h759 AdjustBlockAddressRefCount(int Amt) AdjustBlockAddressRefCount() argument
/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp474 unsigned Amt = Old.getOperand(0).getImm(); eliminateCallFramePseudoInstr() local
/llvm-project/llvm/lib/Support/
H A DAPFixedPoint.cpp353 shl(unsigned Amt,bool * Overflow) const shl() argument
/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1365 New = BinaryOperator::CreateShl(VarX, Amt); in simplifyShrShlDemandedBits() local
1371 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) : in simplifyShrShlDemandedBits() local
H A DInstCombineCasts.cpp1076 const APInt *Amt; canEvaluateZExtd() local
1089 const APInt *Amt; canEvaluateZExtd() local
/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h2168 buildRotateRight(const DstOp & Dst,const SrcOp & Src,const SrcOp & Amt) buildRotateRight() argument
2174 buildRotateLeft(const DstOp & Dst,const SrcOp & Src,const SrcOp & Amt) buildRotateLeft() argument
/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp350 SDValue Amt = N->getOperand(1); LowerShifts() local
357 SDValue Amt = N->getOperand(1); LowerShifts() local
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/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp203 Value *Amt = II.getArgOperand(1); simplifyX86immShift() local
351 Value *Amt = II.getArgOperand(1); simplifyX86varShift() local
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H A DX86TargetTransformInfo.cpp4210 const APInt *Amt; getIntrinsicInstrCost() local
4226 const APInt *Amt; getIntrinsicInstrCost() local
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp1567 EVT AmtVT = Amt.getValueType(); in PromoteIntRes_VPFunnelShift() local
1517 SDValue Amt = N->getOperand(2); PromoteIntRes_FunnelShift() local
2947 ExpandShiftByConstant(SDNode * N,const APInt & Amt,SDValue & Lo,SDValue & Hi) ExpandShiftByConstant() argument
3045 SDValue Amt = N->getOperand(1); ExpandShiftWithKnownAmountBit() local
3132 SDValue Amt = N->getOperand(1); ExpandShiftWithUnknownAmountBit() local
[all...]
/llvm-project/llvm/unittests/CodeGen/GlobalISel/
H A DLegalizerHelperTest.cpp39 auto Amt = B.buildTrunc(S32, Copies[1]); in TEST_F() local
92 auto Amt = B.buildTrunc(S24, Copies[1]); in TEST_F() local
152 auto Amt = B.buildSplatBuildVector(V4S32, AmtTrunc); in TEST_F() local
/llvm-project/llvm/lib/IR/
H A DAutoUpgrade.cpp1734 Value *Amt = CI.getArgOperand(1); upgradeX86Rotate() local
1801 Value *Amt = CI.getArgOperand(2); upgradeX86ConcatShift() local
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/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp12136 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); EmitAArch64BuiltinExpr() local
12141 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); EmitAArch64BuiltinExpr() local
12148 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); EmitAArch64BuiltinExpr() local
12157 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); EmitAArch64BuiltinExpr() local
12165 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); EmitAArch64BuiltinExpr() local
13633 EmitX86FunnelShift(CodeGenFunction & CGF,Value * Op0,Value * Op1,Value * Amt,bool IsRight) EmitX86FunnelShift() argument
19287 llvm::Value *Amt = EmitScalarExpr(E->getArg(1)); EmitSystemZBuiltinExpr() local
19302 llvm::Value *Amt = EmitScalarExpr(E->getArg(1)); EmitSystemZBuiltinExpr() local
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/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2447 SDValue Val = Res.getOperand(0), Amt = Res.getOperand(1); LowerVECTOR_SHIFT() local
3556 auto *Amt = dyn_cast<ConstantSDNode>(Shl.getOperand(1)); PerformDAGCombine() local
H A DHexagonISelDAGToDAGHVX.cpp1293 if (isUInt<3>(Amt) || isUInt<3>(HwLen - Amt)) { in packs() argument
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp9121 SDValue Amt = Op.getOperand(2); LowerSHL_PARTS() local
9150 SDValue Amt = Op.getOperand(2); LowerSRL_PARTS() local
9178 SDValue Amt = Op.getOperand(2); LowerSRA_PARTS() local
9278 BuildVSLDOI(SDValue LHS,SDValue RHS,unsigned Amt,EVT VT,SelectionDAG & DAG,const SDLoc & dl) BuildVSLDOI() argument
9732 unsigned Amt = Subtarget.isLittleEndian() ? 15 : 1; LowerBUILD_VECTOR() local
9738 unsigned Amt = Subtarget.isLittleEndian() ? 14 : 2; LowerBUILD_VECTOR() local
9744 unsigned Amt = Subtarget.isLittleEndian() ? 13 : 3; LowerBUILD_VECTOR() local
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/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp223 if (ARM_AM::getSOImmVal(Amt) == -1) in convertToThreeAddress() local
257 unsigned Amt = ARM_AM::getAM3Offset(OffImm); convertToThreeAddress() local
/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp818 unsigned Amt = ShiftOp & 0x1f; printShiftImmOperand() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.cpp1787 MachineOperand *Amt = TII.getNamedOperand(*MI, AMDGPU::OpName::src0); fixShift64HighRegBug() local

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