| /llvm-project/compiler-rt/lib/scudo/standalone/ |
| H A D | mem_map_linux.cpp | 46 static void *mmapWrapper(uptr Addr, uptr Size, const char *Name, uptr Flags) { in mmapWrapper()
81 bool MemMapLinux::mapImpl(uptr Addr, uptr Size, const char *Name, uptr Flags) { in mapImpl()
91 void MemMapLinux::unmapImpl(uptr Addr, uptr Size) { in unmapImpl()
108 bool MemMapLinux::remapImpl(uptr Addr, uptr Size, const char *Name, in remapImpl()
116 void MemMapLinux::setMemoryPermissionImpl(uptr Addr, uptr Size, uptr Flags) { in setMemoryPermissionImpl()
123 void *Addr = reinterpret_cast<void *>(From); in releaseAndZeroPagesToOSImpl() local
129 bool ReservedMemoryLinux::createImpl(uptr Addr, uptr Size, const char *Name, in createImpl()
146 ReservedMemoryLinux::MemMapT ReservedMemoryLinux::dispatchImpl(uptr Addr, in dispatchImpl()
|
| H A D | mem_map.cpp | 15 bool MemMapDefault::mapImpl(uptr Addr, uptr Size, const char *Name, in mapImpl()
27 void MemMapDefault::unmapImpl(uptr Addr, uptr Size) { in unmapImpl()
41 bool MemMapDefault::remapImpl(uptr Addr, uptr Size, const char *Name, in remapImpl()
56 void MemMapDefault::setMemoryPermissionImpl(uptr Addr, uptr Size, uptr Flags) { in setMemoryPermissionImpl()
64 bool ReservedMemoryDefault::createImpl(uptr Addr, uptr Size, const char *Name, in createImpl()
77 ReservedMemoryDefault::MemMapT ReservedMemoryDefault::dispatchImpl(uptr Addr, in dispatchImpl()
|
| H A D | mem_map_fuchsia.cpp | 102 mapImpl(UNUSED uptr Addr,uptr Size,const char * Name,uptr Flags) mapImpl() argument
148 unmapImpl(uptr Addr,uptr Size) unmapImpl() argument
177 remapImpl(uptr Addr,uptr Size,const char * Name,uptr Flags) remapImpl() argument
218 setMemoryPermissionImpl(uptr Addr,uptr Size,uptr Flags) setMemoryPermissionImpl() argument
229 createImpl(UNUSED uptr Addr,uptr Size,UNUSED const char * Name,uptr Flags) createImpl() argument
251 dispatchImpl(uptr Addr,uptr Size) dispatchImpl() argument
[all...] |
| H A D | report_linux.cpp | 36 void NORETURN reportUnmapError(uptr Addr, uptr Size) { in reportUnmapError()
44 void NORETURN reportProtectError(uptr Addr, uptr Size, int Prot) { in reportProtectError()
|
| H A D | mem_map_base.h | 33 void unmap(uptr Addr, uptr Size) { in unmap() argument
50 setMemoryPermission(uptr Addr,uptr Size,uptr Flags) setMemoryPermission() argument
109 dispatch(uptr Addr,uptr Size) dispatch() argument
[all...] |
| H A D | linux.cpp | 48 map(void * Addr,uptr Size,UNUSED const char * Name,uptr Flags,UNUSED MapPlatformData * Data) map() argument
81 unmap(void * Addr,uptr Size,UNUSED uptr Flags,UNUSED MapPlatformData * Data) unmap() argument
88 setMemoryPermission(uptr Addr,uptr Size,uptr Flags,UNUSED MapPlatformData * Data) setMemoryPermission() argument
98 void *Addr = reinterpret_cast<void *>(BaseAddress + Offset); releasePagesToOS() local
[all...] |
| H A D | trusty.cpp | 34 void *map(void *Addr, uptr Size, const char *Name, uptr Flags, in map()
62 void unmap(UNUSED void *Addr, UNUSED uptr Size, UNUSED uptr Flags, in unmap()
68 void setMemoryPermission(UNUSED uptr Addr, UNUSED uptr Size, UNUSED uptr Flags, in setMemoryPermission()
|
| /llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 430 DecodeFPR128RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR128RegisterClass() argument
442 DecodeFPR128_loRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR128_loRegisterClass() argument
450 DecodeFPR128_0to7RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR128_0to7RegisterClass() argument
458 DecodeFPR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR64RegisterClass() argument
470 DecodeFPR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR32RegisterClass() argument
482 DecodeFPR16RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR16RegisterClass() argument
494 DecodeFPR8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeFPR8RegisterClass() argument
506 DecodeGPR64commonRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR64commonRegisterClass() argument
519 DecodeGPR64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR64RegisterClass() argument
546 DecodeGPR64spRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR64spRegisterClass() argument
558 DecodeMatrixIndexGPR32_8_11RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const void * Decoder) DecodeMatrixIndexGPR32_8_11RegisterClass() argument
571 DecodeMatrixIndexGPR32_12_15RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeMatrixIndexGPR32_12_15RegisterClass() argument
584 DecodeGPR32RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR32RegisterClass() argument
596 DecodeGPR32spRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPR32spRegisterClass() argument
748 DecodePPRorPNRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePPRorPNRRegisterClass() argument
760 DecodePPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePPRRegisterClass() argument
772 DecodePNRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePNRRegisterClass() argument
784 DecodePPR_3bRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePPR_3bRegisterClass() argument
794 DecodePNR_p8to15RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodePNR_p8to15RegisterClass() argument
827 DecodeQQRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeQQRegisterClass() argument
838 DecodeQQQRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeQQQRegisterClass() argument
849 DecodeQQQQRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeQQQQRegisterClass() argument
860 DecodeDDRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeDDRegisterClass() argument
871 DecodeDDDRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeDDDRegisterClass() argument
882 DecodeDDDDRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeDDDDRegisterClass() argument
893 DecodeFixedPointScaleImm32(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeFixedPointScaleImm32() argument
902 DecodeFixedPointScaleImm64(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeFixedPointScaleImm64() argument
909 DecodePCRelLabel16(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodePCRelLabel16() argument
924 DecodePCRelLabel19(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodePCRelLabel19() argument
1000 DecodeVecShiftR64Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR64Imm() argument
1006 DecodeVecShiftR64ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR64ImmNarrow() argument
1012 DecodeVecShiftR32Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR32Imm() argument
1018 DecodeVecShiftR32ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR32ImmNarrow() argument
1024 DecodeVecShiftR16Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR16Imm() argument
1030 DecodeVecShiftR16ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR16ImmNarrow() argument
1036 DecodeVecShiftR8Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR8Imm() argument
1042 DecodeVecShiftL64Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL64Imm() argument
1048 DecodeVecShiftL32Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL32Imm() argument
1054 DecodeVecShiftL16Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL16Imm() argument
1060 DecodeVecShiftL8Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL8Imm() argument
1066 DecodeThreeAddrSRegInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeThreeAddrSRegInstruction() argument
1128 DecodeMoveImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeMoveImmInstruction() argument
1161 DecodeUnsignedLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeUnsignedLdStInstruction() argument
1220 DecodeSignedLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSignedLdStInstruction() argument
1418 DecodeExclusiveLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeExclusiveLdStInstruction() argument
1501 DecodePairLdStInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodePairLdStInstruction() argument
1635 DecodeAuthLoadInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAuthLoadInstruction() argument
1668 DecodeAddSubERegInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAddSubERegInstruction() argument
1725 DecodeLogicalImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeLogicalImmInstruction() argument
1756 DecodeModImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeModImmInstruction() argument
1795 DecodeModImmTiedInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeModImmTiedInstruction() argument
1813 DecodeAdrInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAdrInstruction() argument
1831 DecodeAddSubImmShift(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeAddSubImmShift() argument
1866 DecodeUnconditionalBranch(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeUnconditionalBranch() argument
1887 DecodeSystemPStateImm0_15Instruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSystemPStateImm0_15Instruction() argument
1908 DecodeSystemPStateImm0_1Instruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSystemPStateImm0_1Instruction() argument
1930 DecodeTestAndBranch(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeTestAndBranch() argument
1954 DecodeGPRSeqPairsClassRegisterClass(MCInst & Inst,unsigned RegClassID,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPRSeqPairsClassRegisterClass() argument
1966 DecodeWSeqPairsClassRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeWSeqPairsClassRegisterClass() argument
1974 DecodeXSeqPairsClassRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeXSeqPairsClassRegisterClass() argument
1982 DecodeSyspXzrInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSyspXzrInstruction() argument
2002 DecodeSVELogicalImmInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSVELogicalImmInstruction() argument
2033 DecodeImm8OptLsl(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeImm8OptLsl() argument
2046 DecodeSVEIncDecImm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeSVEIncDecImm() argument
2062 DecodeCPYMemOpInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeCPYMemOpInstruction() argument
2087 DecodeSETMemOpInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodeSETMemOpInstruction() argument
2111 DecodePRFMRegInstruction(MCInst & Inst,uint32_t insn,uint64_t Addr,const MCDisassembler * Decoder) DecodePRFMRegInstruction() argument
[all...] |
| /llvm-project/lldb/unittests/TestingSupport/Host/ |
| H A D | NativeProcessTestUtils.h | 63 Status SetBreakpoint(lldb::addr_t Addr, uint32_t Size, in SetBreakpoint() argument
73 Status ReadMemory(addr_t Addr, void *Buf, size_t Size, in ReadMemory() argument
86 Status WriteMemory(addr_t Addr, const void *Buf, size_t Size, in WriteMemory() argument
105 ReadMemoryWithoutTrap(addr_t Addr,size_t Size) ReadMemoryWithoutTrap() argument
130 Read(addr_t Addr,size_t Size) Read() argument
140 Write(addr_t Addr,llvm::ArrayRef<uint8_t> Chunk) Write() argument
[all...] |
| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 79 selectAddrRegImm(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrRegImm() argument
85 selectAddrDefault(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrDefault() argument
91 selectIntAddr(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr() argument
97 selectIntAddr11MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr11MM() argument
103 selectIntAddr12MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr12MM() argument
109 selectIntAddr16MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr16MM() argument
115 selectIntAddrLSL2MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrLSL2MM() argument
121 selectIntAddrSImm10(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10() argument
127 selectIntAddrSImm10Lsl1(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl1() argument
133 selectIntAddrSImm10Lsl2(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl2() argument
139 selectIntAddrSImm10Lsl3(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl3() argument
145 selectAddr16(SDValue Addr,SDValue & Base,SDValue & Offset) selectAddr16() argument
151 selectAddr16SP(SDValue Addr,SDValue & Base,SDValue & Offset) selectAddr16SP() argument
[all...] |
| H A D | MipsSEISelDAGToDAG.cpp | 282 EVT ValTy = Addr.getValueType(); in selectAddrFrameIndexOffset() argument
268 selectAddrFrameIndex(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrFrameIndex() argument
312 selectAddrRegImm(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrRegImm() argument
362 selectAddrDefault(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrDefault() argument
369 selectIntAddr(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr() argument
375 selectAddrRegImm9(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrRegImm9() argument
387 selectAddrRegImm11(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrRegImm11() argument
399 selectAddrRegImm12(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrRegImm12() argument
410 selectAddrRegImm16(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrRegImm16() argument
421 selectIntAddr11MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr11MM() argument
427 selectIntAddr12MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr12MM() argument
433 selectIntAddr16MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr16MM() argument
439 selectIntAddrLSL2MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrLSL2MM() argument
461 selectIntAddrSImm10(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10() argument
473 selectIntAddrSImm10Lsl1(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl1() argument
484 selectIntAddrSImm10Lsl2(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl2() argument
495 selectIntAddrSImm10Lsl3(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl3() argument
[all...] |
| /llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RTDyldMemoryManager.cpp | 102 const char *P = (const char *)Addr; in deregisterEHFramesInProcess() argument
122 __deregister_frame(Addr); in deregisterEHFramesInProcess() argument
129 registerEHFramesInProcess(Addr, Siz argument
91 registerEHFramesInProcess(uint8_t * Addr,size_t Size) registerEHFramesInProcess() argument
112 registerEHFramesInProcess(uint8_t * Addr,size_t Size) registerEHFramesInProcess() argument
284 uint64_t Addr = getSymbolAddress(Name); getPointerToNamedFunction() local
[all...] |
| /llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuilder.h | 58 emitRawPointerFromAddress(Address Addr) emitRawPointerFromAddress() argument
63 createConstGEP2_32(Address Addr,unsigned Idx0,unsigned Idx1,const llvm::Twine & Name) createConstGEP2_32() argument
112 CreateLoad(Address Addr,const char * Name) CreateLoad() argument
163 CreateFlagStore(bool Value,llvm::Value * Addr) CreateFlagStore() argument
411 CreatePreserveStructAccessIndex(Address Addr,unsigned Index,unsigned FieldIndex,llvm::MDNode * DbgInfo) CreatePreserveStructAccessIndex() argument
427 CreatePreserveUnionAccessIndex(Address Addr,unsigned FieldIndex,llvm::MDNode * DbgInfo) CreatePreserveUnionAccessIndex() argument
435 CreateLaunderInvariantGroup(Address Addr) CreateLaunderInvariantGroup() argument
441 CreateStripInvariantGroup(Address Addr) CreateStripInvariantGroup() argument
[all...] |
| /llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelDAGToDAG.cpp | 127 selectADDRrii(SDValue Addr,SDValue & Base,SDValue & Index,SDValue & Offset) selectADDRrii() argument
140 selectADDRzri(SDValue Addr,SDValue & Base,SDValue & Index,SDValue & Offset) selectADDRzri() argument
146 selectADDRzii(SDValue Addr,SDValue & Base,SDValue & Index,SDValue & Offset) selectADDRzii() argument
167 selectADDRri(SDValue Addr,SDValue & Base,SDValue & Offset) selectADDRri() argument
177 selectADDRzi(SDValue Addr,SDValue & Base,SDValue & Offset) selectADDRzi() argument
197 matchADDRrr(SDValue Addr,SDValue & Base,SDValue & Index) matchADDRrr() argument
225 matchADDRri(SDValue Addr,SDValue & Base,SDValue & Offset) matchADDRri() argument
[all...] |
| /llvm-project/llvm/lib/Support/ |
| H A D | Valgrind.cpp | 26 void llvm::sys::ValgrindDiscardTranslations(const void *Addr, size_t Len) { in ValgrindDiscardTranslations()
36 void llvm::sys::ValgrindDiscardTranslations(const void *Addr, size_t Len) { in ValgrindDiscardTranslations()
|
| /llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelDAGToDAG.cpp | 38 selectMemRegAddr(SDValue Addr,SDValue & Base,SDValue & Offset,int Scale) selectMemRegAddr() argument
89 selectMemRegAddrISH1(SDValue Addr,SDValue & Base,SDValue & Offset) selectMemRegAddrISH1() argument
93 selectMemRegAddrISH2(SDValue Addr,SDValue & Base,SDValue & Offset) selectMemRegAddrISH2() argument
97 selectMemRegAddrISH4(SDValue Addr,SDValue & Base,SDValue & Offset) selectMemRegAddrISH4() argument
[all...] |
| /llvm-project/compiler-rt/test/cfi/cross-dso/util/ |
| H A D | cfi_stubs.h | 22 uint64_t Type, void *Addr) { in __cfi_slowpath()
27 __cfi_slowpath_diag(uint64_t Type, void *Addr, void *Diag) { in __cfi_slowpath_diag()
|
| /llvm-project/llvm/include/llvm/DebugInfo/GSYM/ |
| H A D | LineEntry.h | 23 uint64_t Addr; ///< Start address of this line entry. member
27 : Addr(A), File(F), Line(L) {} in Addr() function
|
| /llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelDAGToDAG.cpp | 82 bool ARCDAGToDAGISel::SelectAddrModeImm(SDValue Addr, SDValue &Base, in SelectAddrModeImm()
92 bool ARCDAGToDAGISel::SelectAddrModeS9(SDValue Addr, SDValue &Base, in SelectAddrModeS9()
134 bool ARCDAGToDAGISel::SelectAddrModeFar(SDValue Addr, SDValue &Base, in SelectAddrModeFar()
153 bool ARCDAGToDAGISel::SelectFrameADDR_ri(SDValue Addr, SDValue &Base, in SelectFrameADDR_ri()
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelDAGToDAG.cpp | 79 SelectGlobalValueConstantOffset(SDValue Addr,SDValue & IntPtr) SelectGlobalValueConstantOffset() argument
89 SelectGlobalValueVariableOffset(SDValue Addr,SDValue & BaseReg,SDValue & Offset) SelectGlobalValueVariableOffset() argument
141 SelectADDRIndirect(SDValue Addr,SDValue & Base,SDValue & Offset) SelectADDRIndirect() argument
165 SelectADDRVTX_READ(SDValue Addr,SDValue & Base,SDValue & Offset) SelectADDRVTX_READ() argument
[all...] |
| /llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 187 uint64_t Addr, int64_t Imm) { in evaluateBranchTarget() argument
416 evaluateBranch(const MCInst & Inst,uint64_t Addr,uint64_t Size,uint64_t & Target) const evaluateBranch() argument
442 evaluateMemOpAddrForAddrMode_i12(const MCInst & Inst,const MCInstrDesc & Desc,unsigned MemOpIndex,uint64_t Addr) evaluateMemOpAddrForAddrMode_i12() argument
460 evaluateMemOpAddrForAddrMode3(const MCInst & Inst,const MCInstrDesc & Desc,unsigned MemOpIndex,uint64_t Addr) evaluateMemOpAddrForAddrMode3() argument
480 evaluateMemOpAddrForAddrMode5(const MCInst & Inst,const MCInstrDesc & Desc,unsigned MemOpIndex,uint64_t Addr) evaluateMemOpAddrForAddrMode5() argument
499 evaluateMemOpAddrForAddrMode5FP16(const MCInst & Inst,const MCInstrDesc & Desc,unsigned MemOpIndex,uint64_t Addr) evaluateMemOpAddrForAddrMode5FP16() argument
519 evaluateMemOpAddrForAddrModeT2_i8s4(const MCInst & Inst,const MCInstrDesc & Desc,unsigned MemOpIndex,uint64_t Addr) evaluateMemOpAddrForAddrModeT2_i8s4() argument
540 evaluateMemOpAddrForAddrModeT2_pc(const MCInst & Inst,const MCInstrDesc & Desc,unsigned MemOpIndex,uint64_t Addr) evaluateMemOpAddrForAddrModeT2_pc() argument
556 evaluateMemOpAddrForAddrModeT1_s(const MCInst & Inst,const MCInstrDesc & Desc,unsigned MemOpIndex,uint64_t Addr) evaluateMemOpAddrForAddrModeT1_s() argument
561 evaluateMemoryOperandAddress(const MCInst & Inst,const MCSubtargetInfo * STI,uint64_t Addr,uint64_t Size) const evaluateMemoryOperandAddress() argument
[all...] |
| /llvm-project/llvm/include/llvm/Analysis/ |
| H A D | PHITransAddr.h | 37 Value *Addr; variable
52 PHITransAddr(Value *Addr, const DataLayout &DL, AssumptionCache *AC) in PHITransAddr()
|
| /llvm-project/compiler-rt/lib/gwp_asan/tests/ |
| H A D | iterate.cpp | 37 [](uintptr_t Addr, size_t Size, void *Arg) { in TEST_F()
54 [](uintptr_t Addr, size_t Size, void *Arg) { in TEST_F()
|
| /llvm-project/llvm/include/llvm/ADT/ |
| H A D | AddressRanges.h | 32 bool contains(uint64_t Addr) const { return Start <= Addr && Addr < End; } in contains()
66 bool contains(uint64_t Addr) const { in contains()
75 std::optional<T> getRangeThatContains(uint64_t Addr) const { in getRangeThatContains()
|
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 403 Register Addr, Register AddrDisc) { in buildConstantPtrAuth() argument
424 MachineIRBuilder::buildLoad(const DstOp &Dst, const SrcOp &Addr, in buildLoad() argument
439 const SrcOp &Addr, in buildLoadInstr() argument
469 const SrcOp &Addr, in buildStore() argument
482 buildStore(const SrcOp & Val,const SrcOp & Addr,MachinePointerInfo PtrInfo,Align Alignment,MachineMemOperand::Flags MMOFlags,const AAMDNodes & AAInfo) buildStore() argument
950 buildAtomicCmpXchgWithSuccess(const DstOp & OldValRes,const DstOp & SuccessRes,const SrcOp & Addr,const SrcOp & CmpVal,const SrcOp & NewVal,MachineMemOperand & MMO) buildAtomicCmpXchgWithSuccess() argument
978 buildAtomicCmpXchg(const DstOp & OldValRes,const SrcOp & Addr,const SrcOp & CmpVal,const SrcOp & NewVal,MachineMemOperand & MMO) buildAtomicCmpXchg() argument
1005 buildAtomicRMW(unsigned Opcode,const DstOp & OldValRes,const SrcOp & Addr,const SrcOp & Val,MachineMemOperand & MMO) buildAtomicRMW() argument
1027 buildAtomicRMWXchg(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWXchg() argument
1033 buildAtomicRMWAdd(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWAdd() argument
1039 buildAtomicRMWSub(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWSub() argument
1045 buildAtomicRMWAnd(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWAnd() argument
1051 buildAtomicRMWNand(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWNand() argument
1057 buildAtomicRMWOr(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWOr() argument
1064 buildAtomicRMWXor(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWXor() argument
1070 buildAtomicRMWMax(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWMax() argument
1076 buildAtomicRMWMin(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWMin() argument
1082 buildAtomicRMWUmax(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWUmax() argument
1088 buildAtomicRMWUmin(Register OldValRes,Register Addr,Register Val,MachineMemOperand & MMO) buildAtomicRMWUmin() argument
1096 buildAtomicRMWFAdd(const DstOp & OldValRes,const SrcOp & Addr,const SrcOp & Val,MachineMemOperand & MMO) buildAtomicRMWFAdd() argument
1103 buildAtomicRMWFSub(const DstOp & OldValRes,const SrcOp & Addr,const SrcOp & Val,MachineMemOperand & MMO) buildAtomicRMWFSub() argument
1110 buildAtomicRMWFMax(const DstOp & OldValRes,const SrcOp & Addr,const SrcOp & Val,MachineMemOperand & MMO) buildAtomicRMWFMax() argument
1117 buildAtomicRMWFMin(const DstOp & OldValRes,const SrcOp & Addr,const SrcOp & Val,MachineMemOperand & MMO) buildAtomicRMWFMin() argument
1130 buildPrefetch(const SrcOp & Addr,unsigned RW,unsigned Locality,unsigned CacheType,MachineMemOperand & MMO) buildPrefetch() argument
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