Lines Matching defs:Addr

187                                       uint64_t Addr, int64_t Imm) {
199     Addr &= ~0x3;
201   return Addr + Imm + Offset;
415   bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
424         Target = ARM_MC::evaluateBranchTarget(Desc, Addr, Imm);
433                                uint64_t Addr, uint64_t Size) const override;
441                                  unsigned MemOpIndex, uint64_t Addr) {
454   return Addr + OffImm;
459                               unsigned MemOpIndex, uint64_t Addr) {
473     return Addr - ImmOffs;
474   return Addr + ImmOffs;
479                               unsigned MemOpIndex, uint64_t Addr) {
492     return Addr - ImmOffs * 4;
493   return Addr + ImmOffs * 4;
498                                   unsigned MemOpIndex, uint64_t Addr) {
511     return Addr - ImmOffs * 2;
512   return Addr + ImmOffs * 2;
518                                     unsigned MemOpIndex, uint64_t Addr) {
533   return Addr + OffImm;
539                                   unsigned MemOpIndex, uint64_t Addr) {
549   return Addr + OffImm;
555                                  unsigned MemOpIndex, uint64_t Addr) {
556   return evaluateMemOpAddrForAddrModeT2_pc(Inst, Desc, MemOpIndex, Addr);
560     const MCInst &Inst, const MCSubtargetInfo *STI, uint64_t Addr,
584   Addr &= ~0x3;
590     Addr += 8;
593     Addr += 4;
598     Addr += STI->hasFeature(ARM::ModeThumb) ? 4 : 8;
608     return evaluateMemOpAddrForAddrMode_i12(Inst, Desc, OpIndex, Addr);
610     return evaluateMemOpAddrForAddrMode3(Inst, Desc, OpIndex, Addr);
612     return evaluateMemOpAddrForAddrMode5(Inst, Desc, OpIndex, Addr);
614     return evaluateMemOpAddrForAddrMode5FP16(Inst, Desc, OpIndex, Addr);
616     return evaluateMemOpAddrForAddrModeT2_i8s4(Inst, Desc, OpIndex, Addr);
618     return evaluateMemOpAddrForAddrModeT2_pc(Inst, Desc, OpIndex, Addr);
620     return evaluateMemOpAddrForAddrModeT1_s(Inst, Desc, OpIndex, Addr);