Revision tags: llvmorg-12.0.1-rc1 |
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29a50c58 |
| 13-Apr-2021 |
Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> |
[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment
vector.transfer_read and vector.transfer_write operations are converted to llvm intrinsics with specific alignment information
[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment
vector.transfer_read and vector.transfer_write operations are converted to llvm intrinsics with specific alignment information, however there doesn't seem to be a way in llvm to take information from llvm.assume intrinsics and change this alignment information. In any event, due the to the structure of the llvm.assume instrinsic, applying this information at the llvm level is more cumbersome. Instead, let's generate the masked vector load and store instrinsic with the right alignment information from MLIR in the first place. Since we're bothering to do this, lets just emit the proper alignment for loads, stores, scatter, and gather ops too.
Differential Revision: https://reviews.llvm.org/D100444
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2257e4a7 |
| 18-May-2021 |
River Riddle <riddleriver@gmail.com> |
[mlir] Allow derived rewrite patterns to define a non-virtual `initialize` hook
This is a hook that allows for providing custom initialization of the pattern, e.g. if it has bounded recursion, setti
[mlir] Allow derived rewrite patterns to define a non-virtual `initialize` hook
This is a hook that allows for providing custom initialization of the pattern, e.g. if it has bounded recursion, setting the debug name, etc., without needing to define a custom constructor. A non-virtual hook was chosen to avoid polluting the vtable with code that we really just want to be inlined when constructing the pattern. The alternative to this would be to just define a constructor for each pattern, this unfortunately creates a lot of otherwise unnecessary boiler plate for a lot of patterns and a hook provides a much simpler/cleaner interface for the very common case.
Differential Revision: https://reviews.llvm.org/D102440
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864adf39 |
| 13-May-2021 |
Matthias Springer <springerm@google.com> |
[mlir] Allow empty position in vector.insert and vector.extract
Such ops are no-ops and are folded to their respective `source`/`vector` operand.
Differential Revision: https://reviews.llvm.org/D10
[mlir] Allow empty position in vector.insert and vector.extract
Such ops are no-ops and are folded to their respective `source`/`vector` operand.
Differential Revision: https://reviews.llvm.org/D101879
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b614ada0 |
| 08-Apr-2021 |
Tobias Gysi <gysit@google.com> |
[mlir] add support for index type in vectors.
The patch enables the use of index type in vectors. It is a prerequisite to support vectorization for indexed Linalg operations. This refactoring became
[mlir] add support for index type in vectors.
The patch enables the use of index type in vectors. It is a prerequisite to support vectorization for indexed Linalg operations. This refactoring became possible due to the newly introduced data layout infrastructure. The data layout of a module defines the bitwidth of the index type needed to verify bitcasts and similar vector operations.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D99948
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65a3f289 |
| 07-Apr-2021 |
Matthias Springer <springerm@google.com> |
[mlir] Add "mask" operand to vector.transfer_read/write.
Also factors out out-of-bounds mask generation from vector.transfer_read/write into a new MaterializeTransferMask pattern.
Differential Revi
[mlir] Add "mask" operand to vector.transfer_read/write.
Also factors out out-of-bounds mask generation from vector.transfer_read/write into a new MaterializeTransferMask pattern.
Differential Revision: https://reviews.llvm.org/D100001
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4 |
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95f81350 |
| 31-Mar-2021 |
Matthias Springer <springerm@google.com> |
[mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds".
This is in preparation for adding a new "mask" operand. The existing "masked" attribute was used to specify dimensions tha
[mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds".
This is in preparation for adding a new "mask" operand. The existing "masked" attribute was used to specify dimensions that may be out-of-bounds. Such transfers can be lowered to masked load/stores. The new "in_bounds" attribute is used to specify dimensions that are guaranteed to be within bounds. (Semantics is inverted.)
Differential Revision: https://reviews.llvm.org/D99639
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dc4e913b |
| 22-Mar-2021 |
Chris Lattner <clattner@nondot.org> |
[PatternMatch] Big mechanical rename OwningRewritePatternList -> RewritePatternSet and insert -> add. NFC
This doesn't change APIs, this just cleans up the many in-tree uses of these names to use t
[PatternMatch] Big mechanical rename OwningRewritePatternList -> RewritePatternSet and insert -> add. NFC
This doesn't change APIs, this just cleans up the many in-tree uses of these names to use the new preferred names. We'll keep the old names around for a couple weeks to help transitions.
Differential Revision: https://reviews.llvm.org/D99127
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Revision tags: llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2 |
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e2310704 |
| 10-Feb-2021 |
Julian Gross <julian.gross@dfki.de> |
[MLIR] Create memref dialect and move dialect-specific ops from std.
Create the memref dialect and move dialect-specific ops from std dialect to this dialect.
Moved ops: AllocOp -> MemRef_AllocOp A
[MLIR] Create memref dialect and move dialect-specific ops from std.
Create the memref dialect and move dialect-specific ops from std dialect to this dialect.
Moved ops: AllocOp -> MemRef_AllocOp AllocaOp -> MemRef_AllocaOp AssumeAlignmentOp -> MemRef_AssumeAlignmentOp DeallocOp -> MemRef_DeallocOp DimOp -> MemRef_DimOp MemRefCastOp -> MemRef_CastOp MemRefReinterpretCastOp -> MemRef_ReinterpretCastOp GetGlobalMemRefOp -> MemRef_GetGlobalOp GlobalMemRefOp -> MemRef_GlobalOp LoadOp -> MemRef_LoadOp PrefetchOp -> MemRef_PrefetchOp ReshapeOp -> MemRef_ReshapeOp StoreOp -> MemRef_StoreOp SubViewOp -> MemRef_SubViewOp TransposeOp -> MemRef_TransposeOp TensorLoadOp -> MemRef_TensorLoadOp TensorStoreOp -> MemRef_TensorStoreOp TensorToMemRefOp -> MemRef_BufferCastOp ViewOp -> MemRef_ViewOp
The roadmap to split the memref dialect from std is discussed here: https://llvm.discourse.group/t/rfc-split-the-memref-dialect-from-std/2667
Differential Revision: https://reviews.llvm.org/D98041
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37eca08e |
| 25-Feb-2021 |
Vladislav Vinogradov <vlad.vinogradov@intel.com> |
[mlir][NFC] Rename `MemRefType::getMemorySpace` to `getMemorySpaceAsInt`
Just a pure method renaming.
It is a preparation step for replacing "memory space as raw integer" with more generic "memory
[mlir][NFC] Rename `MemRefType::getMemorySpace` to `getMemorySpaceAsInt`
Just a pure method renaming.
It is a preparation step for replacing "memory space as raw integer" with more generic "memory space as attribute", which will be done in separate commit.
The `MemRefType::getMemorySpace` method will return `Attribute` and become the main API, while `getMemorySpaceAsInt` will be declared as deprecated and will be replaced in all in-tree dialects (also in separate commits).
Reviewed By: mehdi_amini, rriddle
Differential Revision: https://reviews.llvm.org/D97476
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df5ccf5a |
| 26-Feb-2021 |
Aart Bik <ajcbik@google.com> |
[mlir][vector] add higher dimensional support to gather/scatter
Similar to mask-load/store and compress/expand, the gather and scatter operation now allow for higher dimension uses. Note that to sup
[mlir][vector] add higher dimensional support to gather/scatter
Similar to mask-load/store and compress/expand, the gather and scatter operation now allow for higher dimension uses. Note that to support the mixed-type index, the new syntax is: vector.gather %base [%i,%j] [%kvector] .... The first client of this generalization is the sparse compiler, which needs to define scatter and gathers on dense operands of higher dimensions too.
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D97422
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08c681f6 |
| 18-Feb-2021 |
Andrew Pritchard <awpr@google.com> |
Perform memory accesses in the same addrspace as the corresponding memref.
It's not necessarily the case on all architectures that all memory is addressable in addrspace 0, so casting the pointer to
Perform memory accesses in the same addrspace as the corresponding memref.
It's not necessarily the case on all architectures that all memory is addressable in addrspace 0, so casting the pointer to addrspace 0 is liable to cause problems.
Reviewed By: aartbik, ftynse, nicolasvasilache
Differential Revision: https://reviews.llvm.org/D96380
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656674a7 |
| 12-Feb-2021 |
Diego Caballero <diego.caballero@intel.com> |
[mlir][Vector] Align gather/scatter/expand/compress API
Align the vector gather/scatter/expand/compress API with the vector load/store/maskedload/maskedstore API.
Reviewed By: aartbik
Differential
[mlir][Vector] Align gather/scatter/expand/compress API
Align the vector gather/scatter/expand/compress API with the vector load/store/maskedload/maskedstore API.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D96396
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ee66e43a |
| 12-Feb-2021 |
Diego Caballero <diego.caballero@intel.com> |
[mlir][Vector] Introduce 'vector.load' and 'vector.store' ops
This patch adds the 'vector.load' and 'vector.store' ops to the Vector dialect [1]. These operations model *contiguous* vector loads and
[mlir][Vector] Introduce 'vector.load' and 'vector.store' ops
This patch adds the 'vector.load' and 'vector.store' ops to the Vector dialect [1]. These operations model *contiguous* vector loads and stores from/to memory. Their semantics are similar to the 'affine.vector_load' and 'affine.vector_store' counterparts but without the affine constraints. The most relevant feature is that these new vector operations may perform a vector load/store on memrefs with a non-vector element type, unlike 'std.load' and 'std.store' ops. This opens the representation to model more generic vector load/store scenarios: unaligned vector loads/stores, perform scalar and vector memory access on the same memref, decouple memory allocation constraints from memory accesses, etc [1]. These operations will also facilitate the progressive lowering of both Affine vector loads/stores and Vector transfer reads/writes for those that read/write contiguous slices from/to memory.
In particular, this patch adds the 'vector.load' and 'vector.store' ops to the Vector dialect, implements their lowering to the LLVM dialect, and changes the lowering of 'affine.vector_load' and 'affine.vector_store' ops to the new vector ops. The lowering of Vector transfer reads/writes will be implemented in the future, probably as an independent pass. The API of 'vector.maskedload' and 'vector.maskedstore' has also been changed slightly to align it with the transfer read/write ops and the vector new ops. This will improve reusability among all these operations. For example, the lowering of 'vector.load', 'vector.store', 'vector.maskedload' and 'vector.maskedstore' to the LLVM dialect is implemented with a single template conversion pattern.
[1] https://llvm.discourse.group/t/memref-type-and-data-layout/
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D96185
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e332c22c |
| 11-Feb-2021 |
Nicolas Vasilache <nicolas.vasilache@gmail.com> |
[mlir][LLVM] NFC - Refactor a lookupOrCreateFn to reuse common function creation.
Differential revision: https://reviews.llvm.org/D96488
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c2c83e97 |
| 08-Feb-2021 |
Tres Popp <tpopp@google.com> |
Revert "Revert "Reorder MLIRContext location in BuiltinAttributes.h""
This reverts commit 511dd4f4383b1c2873beac4dbea2df302f1f9d0c along with a couple fixes.
Original message: Now the context is th
Revert "Revert "Reorder MLIRContext location in BuiltinAttributes.h""
This reverts commit 511dd4f4383b1c2873beac4dbea2df302f1f9d0c along with a couple fixes.
Original message: Now the context is the first, rather than the last input.
This better matches the rest of the infrastructure and makes it easier to move these types to being declaratively specified.
Phabricator: https://reviews.llvm.org/D96111
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511dd4f4 |
| 08-Feb-2021 |
Tres Popp <tpopp@google.com> |
Revert "Reorder MLIRContext location in BuiltinAttributes.h"
This reverts commit 7827753f9810e846fb702f3e8dcff0bfb37344e1.
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7827753f |
| 05-Feb-2021 |
Tres Popp <tpopp@google.com> |
Reorder MLIRContext location in BuiltinAttributes.h
Now the context is the first, rather than the last input.
This better matches the rest of the infrastructure and makes it easier to move these ty
Reorder MLIRContext location in BuiltinAttributes.h
Now the context is the first, rather than the last input.
This better matches the rest of the infrastructure and makes it easier to move these types to being declaratively specified.
Differential Revision: https://reviews.llvm.org/D96111
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ba87f991 |
| 04-Feb-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] make vector to llvm conversion truly partial
Historically, the Vector to LLVM dialect conversion subsumed the Standard to LLVM dialect conversion patterns. This was necessary because the conv
[mlir] make vector to llvm conversion truly partial
Historically, the Vector to LLVM dialect conversion subsumed the Standard to LLVM dialect conversion patterns. This was necessary because the conversion infrastructure did not have sufficient support for reconciling type conversions. This support is now available. Only keep the patterns related to the Vector dialect in the Vector to LLVM conversion and require type casts operations to be inserted if necessary. These casts will be removed by following conversions if possible. Update integration tests to also run the Standard to LLVM conversion.
There is a significant amount of test churn, which is due to (a) unnecessarily strict tests in VectorToLLVM and (b) many patterns actually targeting Standard dialect ops instead of LLVM dialect ops leading to tests actually exercising a Vector->Standard->LLVM conversion. This churn is a good illustration of the reason to make the conversion partial: now the tests only check the code in the Vector to LLVM conversion and will not be randomly broken by changes in Standard to LLVM conversion.
Arguably, it may be possible to extract Vector to Standard patterns into a separate pass, but given the ongoing splitting of the Standard dialect, such pass will be short-lived and will require further refactoring.
Depends On D95626
Reviewed By: nicolasvasilache, aartbik
Differential Revision: https://reviews.llvm.org/D95685
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Revision tags: llvmorg-11.1.0, llvmorg-11.1.0-rc3 |
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cf5c517c |
| 02-Feb-2021 |
Diego Caballero <diego.caballero@intel.com> |
[mlir][Vector] Add lowering to LLVM for vector.bitcast
Add the conversion pattern for vector.bitcast to lower it to the LLVM Dialect.
Reviewed By: ThomasRaoux, aartbik
Differential Revision: https
[mlir][Vector] Add lowering to LLVM for vector.bitcast
Add the conversion pattern for vector.bitcast to lower it to the LLVM Dialect.
Reviewed By: ThomasRaoux, aartbik
Differential Revision: https://reviews.llvm.org/D95579
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Revision tags: llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1 |
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bd30a796 |
| 11-Jan-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] use built-in vector types instead of LLVM dialect types when possible
Continue the convergence between LLVM dialect and built-in types by using the built-in vector type whenever possible, tha
[mlir] use built-in vector types instead of LLVM dialect types when possible
Continue the convergence between LLVM dialect and built-in types by using the built-in vector type whenever possible, that is for fixed vectors of built-in integers and built-in floats. LLVM dialect vector type is still in use for pointers, less frequent floating point types that do not have a built-in equivalent, and scalable vectors. However, the top-level `LLVMVectorType` class has been removed in favor of free functions capable of inspecting both built-in and LLVM dialect vector types: `LLVM::getVectorElementType`, `LLVM::getNumVectorElements` and `LLVM::getFixedVectorType`. Additional work is necessary to design an implemented the extensions to built-in types so as to remove the `LLVMFixedVectorType` entirely.
Note that the default output format for the built-in vectors does not have whitespace around the `x` separator, e.g., `vector<4xf32>` as opposed to the LLVM dialect vector type format that does, e.g., `!llvm.vec<4 x fp128>`. This required changing the FileCheck patterns in several tests.
Reviewed By: mehdi_amini, silvas
Differential Revision: https://reviews.llvm.org/D94405
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a57def30 |
| 08-Jan-2021 |
Aart Bik <ajcbik@google.com> |
[mlir][vector] generalized masked l/s and compressed l/s with indices
Adding the ability to index the base address brings these operations closer to the transfer read and write semantics (with lower
[mlir][vector] generalized masked l/s and compressed l/s with indices
Adding the ability to index the base address brings these operations closer to the transfer read and write semantics (with lowering advantages), ensures more consistent use in vector MLIR code (easier to read), and reduces the amount of code duplication to lower memrefs into base addresses considerably (making codegen less error-prone).
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D94278
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dd5165a9 |
| 06-Jan-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] replace LLVM dialect float types with built-ins
Continue the convergence between LLVM dialect and built-in types by replacing the bfloat, half, float and double LLVM dialect types with their
[mlir] replace LLVM dialect float types with built-ins
Continue the convergence between LLVM dialect and built-in types by replacing the bfloat, half, float and double LLVM dialect types with their built-in counterparts. At the API level, this is a direct replacement. At the syntax level, we change the keywords to `bf16`, `f16`, `f32` and `f64`, respectively, to be compatible with the built-in type syntax. The old keywords can still be parsed but produce a deprecation warning and will be eventually removed.
Depends On D94178
Reviewed By: mehdi_amini, silvas, antiagainst
Differential Revision: https://reviews.llvm.org/D94179
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2230bf99 |
| 06-Jan-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] replace LLVMIntegerType with built-in integer type
The LLVM dialect type system has been closed until now, i.e. did not support types from other dialects inside containers. While this has had
[mlir] replace LLVMIntegerType with built-in integer type
The LLVM dialect type system has been closed until now, i.e. did not support types from other dialects inside containers. While this has had obvious benefits of deriving from a common base class, it has led to some simple types being almost identical with the built-in types, namely integer and floating point types. This in turn has led to a lot of larger-scale complexity: simple types must still be converted, numerous operations that correspond to LLVM IR intrinsics are replicated to produce versions operating on either LLVM dialect or built-in types leading to quasi-duplicate dialects, lowering to the LLVM dialect is essentially required to be one-shot because of type conversion, etc. In this light, it is reasonable to trade off some local complexity in the internal implementation of LLVM dialect types for removing larger-scale system complexity. Previous commits to the LLVM dialect type system have adapted the API to support types from other dialects.
Replace LLVMIntegerType with the built-in IntegerType plus additional checks that such types are signless (these are isolated in a utility function that replaced `isa<LLVMType>` and in the parser). Temporarily keep the possibility to parse `!llvm.i32` as a synonym for `i32`, but add a deprecation notice.
Reviewed By: mehdi_amini, silvas, antiagainst
Differential Revision: https://reviews.llvm.org/D94178
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c69c9e0f |
| 05-Jan-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] Remove LLVMType, LLVM dialect types now derive Type directly
BEGIN_PUBLIC [mlir] Remove LLVMType, LLVM dialect types now derive Type directly
This class has become a simple `isa` hook with n
[mlir] Remove LLVMType, LLVM dialect types now derive Type directly
BEGIN_PUBLIC [mlir] Remove LLVMType, LLVM dialect types now derive Type directly
This class has become a simple `isa` hook with no proper functionality. Removing will allow us to eventually make the LLVM dialect type infrastructure open, i.e., support non-LLVM types inside container types, which itself will make the type conversion more progressive.
Introduce a call `LLVM::isCompatibleType` to be used instead of `isa<LLVMType>`. For now, this is strictly equivalent. END_PUBLIC
Depends On D93681
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D93713
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9eb3e564 |
| 24-Dec-2020 |
Chris Lattner <clattner@nondot.org> |
[ODS] Make the getType() method on a OneResult instruction return a specific type.
Implement Bug 46698, making ODS synthesize a getType() method that returns a specific C++ class for OneResult metho
[ODS] Make the getType() method on a OneResult instruction return a specific type.
Implement Bug 46698, making ODS synthesize a getType() method that returns a specific C++ class for OneResult methods where we know that class. This eliminates a common source of casts in things like:
myOp.getType().cast<FIRRTLType>().getPassive()
because we know that myOp always returns a FIRRTLType. This also encourages op authors to type their results more tightly (which is also good for verification).
I chose to implement this by splitting the OneResult trait into itself plus a OneTypedResult trait, given that many things are using `hasTrait<OneResult>` to conditionalize various logic.
While this changes makes many many ops get more specific getType() results, it is generally drop-in compatible with the previous behavior because 'x.cast<T>()' is allowed when x is already known to be a T. The one exception to this is that we need declarations of the types used by ops, which is why a couple headers needed additional #includes.
I updated a few things in tree to remove the now-redundant `.cast<>`'s, but there are probably many more than can be removed.
Differential Revision: https://reviews.llvm.org/D93790
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