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36550692 |
| 08-Mar-2022 |
River Riddle <riddleriver@gmail.com> |
[mlir] Move the Builtin FuncOp to the Func dialect
This commit moves FuncOp out of the builtin dialect, and into the Func dialect. This move has been planned in some capacity from the moment we made
[mlir] Move the Builtin FuncOp to the Func dialect
This commit moves FuncOp out of the builtin dialect, and into the Func dialect. This move has been planned in some capacity from the moment we made FuncOp an operation (years ago). This commit handles the functional aspects of the move, but various aspects are left untouched to ease migration: func::FuncOp is re-exported into mlir to reduce the actual API churn, the assembly format still accepts the unqualified `func`. These temporary measures will remain for a little while to simplify migration before being removed.
Differential Revision: https://reviews.llvm.org/D121266
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5a7b9194 |
| 01-Mar-2022 |
River Riddle <riddleriver@gmail.com> |
[mlir][NFC] Rename StandardToLLVM to FuncToLLVM
The current StandardToLLVM conversion patterns only really handle the Func dialect. The pass itself adds patterns for Arithmetic/CFToLLVM, but those s
[mlir][NFC] Rename StandardToLLVM to FuncToLLVM
The current StandardToLLVM conversion patterns only really handle the Func dialect. The pass itself adds patterns for Arithmetic/CFToLLVM, but those should be/will be split out in a followup. This commit focuses solely on being an NFC rename.
Aside from the directory change, the pattern and pass creation API have been renamed: * populateStdToLLVMFuncOpConversionPattern -> populateFuncToLLVMFuncOpConversionPattern * populateStdToLLVMConversionPatterns -> populateFuncToLLVMConversionPatterns * createLowerToLLVMPass -> createConvertFuncToLLVMPass
Differential Revision: https://reviews.llvm.org/D120778
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24a1869d |
| 07-Feb-2022 |
Krzysztof Drewniak <Krzysztof.Drewniak@amd.com> |
[MLIR][GPU] Update GPUToROCDL to account for ControlFlow dialect
The conversion to the new ControlFlow dialect didn't change the GPUToROCDL pass - this commit fixes this issue.
Reviewed By: rriddle
[MLIR][GPU] Update GPUToROCDL to account for ControlFlow dialect
The conversion to the new ControlFlow dialect didn't change the GPUToROCDL pass - this commit fixes this issue.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D119188
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99ef9eeb |
| 31-Jan-2022 |
Matthias Springer <springerm@google.com> |
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://r
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://reviews.llvm.org/D118533
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e1da6291 |
| 08-Dec-2021 |
Krzysztof Drewniak <Krzysztof.Drewniak@amd.com> |
[MLIR][GPU] Define gpu.printf op and its lowerings
- Define a gpu.printf op, which can be lowered to any GPU printf() support (which is present in CUDA, HIP, and OpenCL). This op only supports const
[MLIR][GPU] Define gpu.printf op and its lowerings
- Define a gpu.printf op, which can be lowered to any GPU printf() support (which is present in CUDA, HIP, and OpenCL). This op only supports constant format strings and scalar arguments - Define the lowering of gpu.pirntf to a call to printf() (which is what is required for AMD GPUs when using OpenCL) as well as to the hostcall interface present in the AMD Open Compute device library, which is the interface present when kernels are running under HIP. - Add a "runtime" enum that allows specifying which of the possible runtimes a ROCDL kernel will be executed under or that the runtime is unknown. This enum controls how gpu.printf is lowered
This change does not enable lowering for Nvidia GPUs, but such a lowering should be possible in principle.
And: [MLIR][AMDGPU] Always set amdgpu-implicitarg-num-bytes=56 on kernels
This is something that Clang always sets on both OpenCL and HIP kernels, and failing to include it causes mysterious crashes with printf() support.
In addition, revert the max-flat-work-group-size to (1, 256) to avoid triggering bugs in the AMDGPU backend.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D110448
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be0a7e9f |
| 07-Dec-2021 |
Mehdi Amini <joker.eph@gmail.com> |
Adjust "end namespace" comment in MLIR to match new agree'd coding style
See D115115 and this mailing list discussion: https://lists.llvm.org/pipermail/llvm-dev/2021-December/154199.html
Differenti
Adjust "end namespace" comment in MLIR to match new agree'd coding style
See D115115 and this mailing list discussion: https://lists.llvm.org/pipermail/llvm-dev/2021-December/154199.html
Differential Revision: https://reviews.llvm.org/D115309
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195730a6 |
| 16-Nov-2021 |
River Riddle <riddleriver@gmail.com> |
[mlir][NFC] Replace references to Identifier with StringAttr
This is part of the replacement of Identifier with StringAttr.
Differential Revision: https://reviews.llvm.org/D113953
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a54f4eae |
| 12-Oct-2021 |
Mogball <jeffniu22@gmail.com> |
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed all instances of operations in the codebase and in tests.
Reviewed By: rriddle, jpienaar
Differential Revision: https://reviews.llvm.org/D110797
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74b88807 |
| 15-Jul-2021 |
Adrian Kuegel <akuegel@google.com> |
[mlir][rocdl] Add math::Exp2Op lowering to ROCDL
Differential Revision: https://reviews.llvm.org/D106057
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75e5f0aa |
| 08-Jul-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] factor memref-to-llvm lowering out of std-to-llvm
After the MemRef has been split out of the Standard dialect, the conversion to the LLVM dialect remained as a huge monolithic pass. This is u
[mlir] factor memref-to-llvm lowering out of std-to-llvm
After the MemRef has been split out of the Standard dialect, the conversion to the LLVM dialect remained as a huge monolithic pass. This is undesirable for the same complexity management reasons as having a huge Standard dialect itself, and is even more confusing given the existence of a separate dialect. Extract the conversion of the MemRef dialect operations to LLVM into a separate library and a separate conversion pass.
Reviewed By: herhut, silvas
Differential Revision: https://reviews.llvm.org/D105625
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b5d847b1 |
| 07-Jul-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] factor out common parts of the converstion to the LLVM dialect
"Standard-to-LLVM" conversion is one of the oldest passes in existence. It has become quite large due to the size of the Standar
[mlir] factor out common parts of the converstion to the LLVM dialect
"Standard-to-LLVM" conversion is one of the oldest passes in existence. It has become quite large due to the size of the Standard dialect itself, which is being split into multiple smaller dialects. Furthermore, several conversion features are useful for any dialect that is being converted to the LLVM dialect, which, without this refactoring, creates a dependency from those conversions to the "standard-to-llvm" one.
Put several of the reusable utilities from this conversion to a separate library, namely: - type converter from builtin to LLVM dialect types; - utility for building and accessing values of LLVM structure type; - utility for building and accessing values that represent memref in the LLVM dialect; - lowering options applicable everywhere.
Additionally, remove the type wrapping/unwrapping notion from the type converter that is no longer relevant since LLVM types has been reimplemented as first-class MLIR types.
Reviewed By: pifon2a
Differential Revision: https://reviews.llvm.org/D105534
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b3386a73 |
| 22-Mar-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] introduce data layout entry for index type
Index type is an integer type of target-specific bitwidth present in many MLIR operations (loops, memory accesses). Converting values of this type t
[mlir] introduce data layout entry for index type
Index type is an integer type of target-specific bitwidth present in many MLIR operations (loops, memory accesses). Converting values of this type to fixed-size integers has always been problematic. Introduce a data layout entry to specify the bitwidth of `index` in a given layout scope, defaulting to 64 bits, which is a commonly used assumption, e.g., in constants.
Port builtin-to-LLVM type conversion to use this data layout entry when converting `index` type and untie it from pointer size. This is particularly relevant for GPU targets. Keep a possibility to forcibly override the index type in lowerings.
Depends On D98525
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D98937
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dc4e913b |
| 22-Mar-2021 |
Chris Lattner <clattner@nondot.org> |
[PatternMatch] Big mechanical rename OwningRewritePatternList -> RewritePatternSet and insert -> add. NFC
This doesn't change APIs, this just cleans up the many in-tree uses of these names to use t
[PatternMatch] Big mechanical rename OwningRewritePatternList -> RewritePatternSet and insert -> add. NFC
This doesn't change APIs, this just cleans up the many in-tree uses of these names to use the new preferred names. We'll keep the old names around for a couple weeks to help transitions.
Differential Revision: https://reviews.llvm.org/D99127
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1d909c9a |
| 21-Mar-2021 |
Chris Lattner <clattner@nondot.org> |
Remove the extraneous MLIRContext argument from populateWithGenerated. NFC.
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3a506b31 |
| 20-Mar-2021 |
Chris Lattner <clattner@nondot.org> |
Change OwningRewritePatternList to carry an MLIRContext with it.
This updates the codebase to pass the context when creating an instance of OwningRewritePatternList, and starts removing extraneous M
Change OwningRewritePatternList to carry an MLIRContext with it.
This updates the codebase to pass the context when creating an instance of OwningRewritePatternList, and starts removing extraneous MLIRContext parameters. There are many many more to be removed.
Differential Revision: https://reviews.llvm.org/D99028
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07cc7718 |
| 16-Feb-2021 |
Adrian Kuegel <akuegel@google.com> |
Lower math.expm1 to intrinsics in the GPUToNVVM and GPUToROCDL conversions.
This adds the lowering for expm1 for GPU backends.
Differential Revision: https://reviews.llvm.org/D96756
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4c4876c3 |
| 12-Feb-2021 |
Alex Zinenko <zinenko@google.com> |
[mlir] Use target-specific GPU kernel attributes in lowering pipelines
Until now, the GPU translation to NVVM or ROCDL intrinsics relied on the presence of the generic `gpu.kernel` attribute to atta
[mlir] Use target-specific GPU kernel attributes in lowering pipelines
Until now, the GPU translation to NVVM or ROCDL intrinsics relied on the presence of the generic `gpu.kernel` attribute to attach additional LLVM IR metadata to the relevant functions. This would be problematic if each dialect were to handle the conversion of its own options, which is the intended direction for the translation infrastructure. Introduce `nvvm.kernel` and `rocdl.kernel` in addition to `gpu.kernel` and base translation on these new attributes instead.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D96591
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4348d8ab |
| 12-Feb-2021 |
Stephan Herhut <herhut@google.com> |
[mlir][math] Split off the math dialect.
This does not split transformations, yet. Those will be done as future clean ups.
Differential Revision: https://reviews.llvm.org/D96272
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e21adfa3 |
| 04-Feb-2021 |
River Riddle <riddleriver@gmail.com> |
[mlir] Mark LogicalResult as LLVM_NODISCARD
This makes ignoring a result explicit by the user, and helps to prevent accidental errors with dropped results. Marking LogicalResult as no discard was al
[mlir] Mark LogicalResult as LLVM_NODISCARD
This makes ignoring a result explicit by the user, and helps to prevent accidental errors with dropped results. Marking LogicalResult as no discard was always the intention from the beginning, but got lost along the way.
Differential Revision: https://reviews.llvm.org/D95841
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4ef38f9c |
| 21-Jan-2021 |
Frederik Gossen <frgossen@google.com> |
Add log1p lowering from standard to ROCDL intrinsics
Differential Revision: https://reviews.llvm.org/D95129
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9adc6453 |
| 15-Dec-2020 |
Tres Popp <tpopp@google.com> |
[mlir] Add std.powf to ROCDL lowering.
Differential Revision: https://reviews.llvm.org/D93313
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1c6bc2c0 |
| 11-Dec-2020 |
Frederik Gossen <frgossen@google.com> |
[MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics
Differential Revision: https://reviews.llvm.org/D93123
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91220705 |
| 10-Dec-2020 |
Adrian Kuegel <akuegel@google.com> |
[mlir] Expose target configuration for lowering to ROCDL.
Differential Revision: https://reviews.llvm.org/D93028
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ada4c7a3 |
| 10-Dec-2020 |
Adrian Kuegel <akuegel@google.com> |
Add rsqrt lowering from standard to ROCDL.
Add a lowering for rsqrt from standard dialect to ROCDL.
Differential Revision: https://reviews.llvm.org/D93011
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09f717b9 |
| 09-Dec-2020 |
Adrian Kuegel <akuegel@google.com> |
Add sqrt lowering from standard to ROCDL
Add a lowering for sqrt from standard dialect to ROCDL.
Differential Revision: https://reviews.llvm.org/D92921
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