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3e3de5e3 |
| 28-Mar-2014 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add const.
llvm-svn: 205013
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ada38ef6 |
| 27-Mar-2014 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Split the file MipsAsmBackend.cpp in Split the file MipsAsmBackend.cpp and Split the file MipsAsmBackend.h. Differential Revision: http://llvm-reviews.chandlerc.com/D3134
llvm-svn: 204921
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#
2a710d0a |
| 03-Mar-2014 |
Ed Maste <emaste@freebsd.org> |
[mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug data
This fixes invalid lengths in .debug_aranges on big-endian mips64 (lengths appear to be left-shifted by 32 bits) and in .debug_loc
[mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug data
This fixes invalid lengths in .debug_aranges on big-endian mips64 (lengths appear to be left-shifted by 32 bits) and in .debug_loc.
Differential Revision: http://llvm-reviews.chandlerc.com/D2517
llvm-svn: 202716
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8a8cd2ba |
| 07-Jan-2014 |
Chandler Carruth <chandlerc@gmail.com> |
Re-sort all of the includes with ./utils/sort_includes.py so that subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn.
Also com
Re-sort all of the includes with ./utils/sort_includes.py so that subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn.
Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc.
llvm-svn: 198685
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Revision tags: llvmorg-3.4.0 |
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69be811a |
| 19-Dec-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS TLS relocations.
llvm-svn: 197685
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8cc8b35a |
| 17-Dec-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
[mips] Fix off by one issue when applying a fixup.
The branch offset for a R_MIPS_PC16 relocation is indeed a 16-bit signed immediate.
llvm-svn: 197506
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Revision tags: llvmorg-3.4.0-rc3 |
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e0d75aac |
| 13-Dec-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
[mips] Add checks for alignment and maximum displacements for most of the branch instructions for mips and micromips instruction sets thus avoiding the situation of generating branches to undesired l
[mips] Add checks for alignment and maximum displacements for most of the branch instructions for mips and micromips instruction sets thus avoiding the situation of generating branches to undesired locations if offsets cannot be encoded.
This patch also checks if a fixup cannot be applied and returns a fatal error if that's the case.
llvm-svn: 197223
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Revision tags: llvmorg-3.4.0-rc2, llvmorg-3.4.0-rc1 |
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8a80aa76 |
| 04-Nov-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS branch instructions.
llvm-svn: 193992
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507e084a |
| 29-Oct-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS jump instructions
llvm-svn: 193623
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e7ae8af8 |
| 23-Oct-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS relocations 1.
llvm-svn: 193247
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#
58e2d3d8 |
| 09-Sep-2013 |
Bill Wendling <isanbard@gmail.com> |
Generate compact unwind encoding from CFI directives.
We used to generate the compact unwind encoding from the machine instructions. However, this had the problem that if the user used `-save-temps'
Generate compact unwind encoding from CFI directives.
We used to generate the compact unwind encoding from the machine instructions. However, this had the problem that if the user used `-save-temps' or compiled their hand-written `.s' file (with CFI directives), we wouldn't generate the compact unwind encoding.
Move the algorithm that generates the compact unwind encoding into the MCAsmBackend. This way we can generate the encoding whether the code is from a `.ll' or `.s' file.
<rdar://problem/13623355>
llvm-svn: 190290
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Revision tags: llvmorg-3.3.1-rc1, llvmorg-3.3.0, llvmorg-3.3.0-rc3, llvmorg-3.3.0-rc2, llvmorg-3.3.0-rc1 |
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#
c3dd91c4 |
| 08-Jan-2013 |
Jack Carter <jcarter@mips.com> |
This patch produces the correct addend value for an R_MIPS_GPREL16 relocation.
Contributer: Jack Carter llvm-svn: 171882
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4d9ada03 |
| 08-Jan-2013 |
Eli Bendersky <eliben@google.com> |
Renamed MCInstFragment to MCRelaxableFragment and added some comments.
No change in functionality.
llvm-svn: 171822
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Revision tags: llvmorg-3.2.0, llvmorg-3.2.0-rc3, llvmorg-3.2.0-rc2 |
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b05cb67b |
| 21-Nov-2012 |
Jack Carter <jcarter@mips.com> |
Mips direct object xgot support
This patch provides support for the MIPS relocations:
*) R_MIPS_GOT_HI16 *) R_MIPS_GOT_LO16 *) R_MIPS_CALL_HI16 *) R_MIPS_CALL_LO16
These are us
Mips direct object xgot support
This patch provides support for the MIPS relocations:
*) R_MIPS_GOT_HI16 *) R_MIPS_GOT_LO16 *) R_MIPS_CALL_HI16 *) R_MIPS_CALL_LO16
These are used for large GOT instruction sequences.
Contributer: Jack Carter llvm-svn: 168471
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Revision tags: llvmorg-3.2.0-rc1 |
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#
5dd4ccb4 |
| 18-Sep-2012 |
Roman Divacky <rdivacky@freebsd.org> |
When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend store this and use it to not emit long nops when the CPU is geode which doesnt support them.
Fixes PR11212.
llvm-svn: 164132
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5485acd4 |
| 14-Sep-2012 |
Dmitri Gribenko <gribozavr@gmail.com> |
Fix Doxygen issues: * wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param inste
Fix Doxygen issues: * wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param instead of \arg to document parameters in order to be consistent with the rest of the codebase.
llvm-svn: 163902
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881929c1 |
| 12-Sep-2012 |
Dmitri Gribenko <gribozavr@gmail.com> |
Fix a couple of Doxygen comment issues pointed out by -Wdocumentation.
llvm-svn: 163721
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4c58381c |
| 07-Aug-2012 |
Jack Carter <jcarter@mips.com> |
Mips relocation R_MIPS_64 relocates a 64 bit double word.
I hit this in a very large program (spirit.cpp), but have not figured out how to make a small make check test for it.
llvm-svn: 161366
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84491abb |
| 06-Aug-2012 |
Jack Carter <jcarter@mips.com> |
Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.
These 2 relocations gain access to the highest and the second highest 16 bits of a 64 bit object.
R_MIPS_HIGHER %higher(A+S) The %higher(x) funct
Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.
These 2 relocations gain access to the highest and the second highest 16 bits of a 64 bit object.
R_MIPS_HIGHER %higher(A+S) The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ].
R_MIPS_HIGHEST %highest(A+S) The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ].
llvm-svn: 161348
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5ddcfda8 |
| 13-Jul-2012 |
Jack Carter <jcarter@mips.com> |
The Mips specific relocation R_MIPS_GOT_DISP is used in cases where global symbols are directly represented in the GOT and we use an offset into the global offset table.
This patch adds direct ob
The Mips specific relocation R_MIPS_GOT_DISP is used in cases where global symbols are directly represented in the GOT and we use an offset into the global offset table.
This patch adds direct object support for R_MIPS_GOT_DISP.
llvm-svn: 160183
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570ae0b1 |
| 11-Jul-2012 |
Jack Carter <jcarter@mips.com> |
Patch for Mips direct object generation.
When WriteFragmentData() case FT_align called Asm.getBackend().writeNopData() is called, nothing is done since Mips implementation of writeNopData just retur
Patch for Mips direct object generation.
When WriteFragmentData() case FT_align called Asm.getBackend().writeNopData() is called, nothing is done since Mips implementation of writeNopData just returned "true".
For some reason this has not caused problems in 32 bit mode, but in 64 bit mode it caused an assert when processing multiple function units.
The test case included will assert without this patch. It runs twice with different flags to prevent false positives due to changes in code generation over time.
llvm-svn: 160084
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#
06de0fb0 |
| 02-Jul-2012 |
Jack Carter <jcarter@mips.com> |
Pass the correct ELFOSABI enumeration to the MipsELFObjectWriter constructor
Contributer: Sasa Stankovic llvm-svn: 159574
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b9f9de93 |
| 27-Jun-2012 |
Jack Carter <jcarter@mips.com> |
This allows hello world to be compiled for Mips 64 direct object.
It takes advantage of r159299 which introduces relocation support for N64. elf-dump needed to be upgraded to support N64 relocation
This allows hello world to be compiled for Mips 64 direct object.
It takes advantage of r159299 which introduces relocation support for N64. elf-dump needed to be upgraded to support N64 relocations as well.
This passes make check.
Jack
llvm-svn: 159301
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#
5fd22485 |
| 14-Jun-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Fix coding style violations. Remove white spaces and tabs.
llvm-svn: 158471
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Revision tags: llvmorg-3.1.0, llvmorg-3.1.0-rc3, llvmorg-3.1.0-rc2, llvmorg-3.1.0-rc1 |
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#
3e9d81f4 |
| 16-Apr-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Do not add offset in applyFixup. This has already been accounted for in Value.
llvm-svn: 154838
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