Fix batch of converting RegisterPass<> to INTIALIZE_PASS().

llvm-svn: 109045

Clean up scavengeRegister() a bit to prefer available regs, which allows
the simplification of frame index register scavenging to not have to check
for available registers directly and instead just l

Clean up scavengeRegister() a bit to prefer available regs, which allows
the simplification of frame index register scavenging to not have to check
for available registers directly and instead just let scavengeRegister()
handle it.

llvm-svn: 107880

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When processing frame index virtual registers, consider all available registers
(if there are any) and use the one which remains available for the longest
rather than just using the first one. This s

When processing frame index virtual registers, consider all available registers
(if there are any) and use the one which remains available for the longest
rather than just using the first one. This should help enable better re-use
of the loaded frame index values. rdar://7318760

llvm-svn: 107847

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Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.

llvm-svn: 107550

Custom inserters (e.g., conditional moves in Thumb1 can introduce
new basic blocks, and if used as a function argument, that can cause call frame
setup / destroy pairs to be split across a basic bloc

Custom inserters (e.g., conditional moves in Thumb1 can introduce
new basic blocks, and if used as a function argument, that can cause call frame
setup / destroy pairs to be split across a basic block boundary. That prevents
us from doing a simple assertion to check that the pairs match and alloc/
dealloc the same amount of space. Modify the assertion to only check the
amount allocated when there are matching pairs in the same basic block.

rdar://8022442

llvm-svn: 107517

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Propagate the AlignStack bit in InlineAsm's to the
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not. gcc consistently
does not do this for GCC-style asms; Ap

Propagate the AlignStack bit in InlineAsm's to the
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not. gcc consistently
does not do this for GCC-style asms; Apple gcc inconsistently
sometimes does it for asm blocks. There is no
convenient place to put a bit in either the SDNode or
the MachineInstr form, so I've added an extra operand
to each; unlovely, but it does allow for expansion for
more bits, should we need it. PR 5125. Some
existing testcases are affected.
The operand lists of the SDNode and MachineInstr forms
are indexed with awesome mnemonics, like "2"; I may
fix this someday, but not now. I'm not making it any
worse. If anyone is inspired I think you can find all
the right places from this patch.

llvm-svn: 107506

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Remove the TargetRegisterClass member from CalleeSavedInfo

llvm-svn: 105344

Remove uses of getCalleeSavedRegClasses from outside the
backends and removes the virtual declaration. With that out of the way
I should be able to cleanup one backend at a time.

llvm-svn: 105321

Implement @llvm.returnaddress. rdar://8015977.

llvm-svn: 104421

Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adju

Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802

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Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.

llvm-svn: 103193

Reword a comment slightly.

llvm-svn: 102966

Make naked functions work on PPC.

llvm-svn: 102657

Rename MachineFrameInfo variables to MFI, for consistency with
the rest of CodeGen.

llvm-svn: 101146

remove the MMI pointer from MachineFrameInfo.

llvm-svn: 100415

Clear up the last (famous last words) frame index value reuse issues for Thumb1.

llvm-svn: 98109

Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g.,

Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

llvm-svn: 98086

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Updated version of r96634 (which was reverted due to failing 176.gcc and
126.gcc nightly tests. These failures uncovered latent bugs that machine DCE
could remove one half of a stack adjust down/up p

Updated version of r96634 (which was reverted due to failing 176.gcc and
126.gcc nightly tests. These failures uncovered latent bugs that machine DCE
could remove one half of a stack adjust down/up pair, causing PEI to assert.
This update fixes that, and the tests now pass.

llvm-svn: 96822

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Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
the armv6 nightly tests.

llvm-svn: 96691

Radar 7636153. In the presence of large call frames, it's not sufficient
for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to el

Radar 7636153. In the presence of large call frames, it's not sufficient
for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to eliminating frame
indices. Allow targets to override the default behavior and does so for ARM
and Thumb2.

llvm-svn: 96634

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Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know wheth

Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.

llvm-svn: 96069

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move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start u

move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.

llvm-svn: 95687

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Remove dead store.

llvm-svn: 92187

Honour setHasCalls() set from isel.
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723

llvm-svn: 91144

improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!

llvm-svn: 90365