#
8a8cd2ba |
| 07-Jan-2014 |
Chandler Carruth <chandlerc@gmail.com> |
Re-sort all of the includes with ./utils/sort_includes.py so that subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn.
Also com
Re-sort all of the includes with ./utils/sort_includes.py so that subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn.
Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc.
llvm-svn: 198685
show more ...
|
Revision tags: llvmorg-3.4.0 |
|
#
22b8ba2d |
| 19-Dec-2013 |
Josh Magee <joshua_magee@playstation.sony.com> |
[stackprotector] Use analysis from the StackProtector pass for stack layout in PEI a nd LocalStackSlot passes.
This changes the MachineFrameInfo API to use the new SSPLayoutKind information produced
[stackprotector] Use analysis from the StackProtector pass for stack layout in PEI a nd LocalStackSlot passes.
This changes the MachineFrameInfo API to use the new SSPLayoutKind information produced by the StackProtector pass (instead of a boolean flag) and updates a few pass dependencies (to preserve the SSP analysis).
The stack layout follows the same approach used prior to this change - i.e., only LargeArray stack objects will be placed near the canary and everything else will be laid out normally. After this change, structures containing large arrays will also be placed near the canary - a case previously missed by the old implementation.
Out of tree targets will need to update their usage of MachineFrameInfo::CreateStackObject to remove the MayNeedSP argument.
The next patch will implement the rules for sspstrong and sspreq. The end goal is to support ssp-strong stack layout rules.
WIP.
Differential Revision: http://llvm-reviews.chandlerc.com/D2158
llvm-svn: 197653
show more ...
|
#
b4c44d23 |
| 17-Dec-2013 |
Quentin Colombet <qcolombet@apple.com> |
Add warning capabilities in LLVM. This reapplies r197438 and fixes the link-time circular dependency between IR and Support. The fix consists in moving the diagnostic support into IR.
The patch adds
Add warning capabilities in LLVM. This reapplies r197438 and fixes the link-time circular dependency between IR and Support. The fix consists in moving the diagnostic support into IR.
The patch adds a new LLVMContext::diagnose that can be used to communicate to the front-end, if any, that something of interest happened. The diagnostics are supported by a new abstraction, the DiagnosticInfo class. The base class contains the following information: - The kind of the report: What this is about. - The severity of the report: How bad this is.
This patch also adds 2 classes: - DiagnosticInfoInlineAsm: For inline asm reporting. Basically, this diagnostic will be used to switch to the new diagnostic API for LLVMContext::emitError. - DiagnosticStackSize: For stack size reporting. Comes as a replacement of the hard coded warning in PEI.
This patch also features dynamic diagnostic identifiers. In other words plugins can use this infrastructure for their own diagnostics (for more details, see getNextAvailablePluginDiagnosticKind).
This patch introduces a new DiagnosticHandlerTy and a new DiagnosticContext in the LLVMContext that should be set by the front-end to be able to map these diagnostics in its own system.
http://llvm-reviews.chandlerc.com/D2376 <rdar://problem/15515174>
llvm-svn: 197508
show more ...
|
Revision tags: llvmorg-3.4.0-rc3 |
|
#
382b135d |
| 17-Dec-2013 |
Quentin Colombet <qcolombet@apple.com> |
Revert r197438 and r197447 until we figure out how to avoid circular dependency at link time
llvm-svn: 197451
|
#
66673f40 |
| 16-Dec-2013 |
Quentin Colombet <qcolombet@apple.com> |
Add warning capabilities in LLVM.
The patch adds a new LLVMContext::diagnose that can be used to communicate to the front-end, if any, that something of interest happened. The diagnostics are suppor
Add warning capabilities in LLVM.
The patch adds a new LLVMContext::diagnose that can be used to communicate to the front-end, if any, that something of interest happened. The diagnostics are supported by a new abstraction, the DiagnosticInfo class. The base class contains the following information: - The kind of the report: What this is about. - The severity of the report: How bad this is.
This patch also adds 2 classes: - DiagnosticInfoInlineAsm: For inline asm reporting. Basically, this diagnostic will be used to switch to the new diagnostic API for LLVMContext::emitError. - DiagnosticStackSize: For stack size reporting. Comes as a replacement of the hard coded warning in PEI.
This patch also features dynamic diagnostic identifiers. In other words plugins can use this infrastructure for their own diagnostics (for more details, see getNextAvailablePluginDiagnosticKind).
This patch introduces a new DiagnosticHandlerTy and a new DiagnosticContext in the LLVMContext that should be set by the front-end to be able to map these diagnostics in its own system.
http://llvm-reviews.chandlerc.com/D2376 <rdar://problem/15515174>
llvm-svn: 197438
show more ...
|
Revision tags: llvmorg-3.4.0-rc2 |
|
#
39609996 |
| 29-Nov-2013 |
Lang Hames <lhames@gmail.com> |
Refactor a lot of patchpoint/stackmap related code to simplify and make it target independent.
Most of the x86 specific stackmap/patchpoint handling was necessitated by the use of the native address
Refactor a lot of patchpoint/stackmap related code to simplify and make it target independent.
Most of the x86 specific stackmap/patchpoint handling was necessitated by the use of the native address-mode format for frame index operands. PEI has now been modified to treat stackmap/patchpoint similarly to DEBUG_INFO, allowing us to use a simple, platform independent register/offset pair for frame indexes on stackmap/patchpoints.
Notes: - Folding is now platform independent and automatically supported. - Emiting patchpoints with direct memory references now just involves calling the TargetLoweringBase::emitPatchPoint utility method from the target's XXXTargetLowering::EmitInstrWithCustomInserter method. (See X86TargetLowering for an example). - No more ugly platform-specific operand parsers.
This patch shouldn't change the generated output for X86.
llvm-svn: 195944
show more ...
|
Revision tags: llvmorg-3.4.0-rc1 |
|
#
dbec9d9b |
| 31-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove the --shrink-wrap option.
It had no tests, was unused and was "experimental at best".
llvm-svn: 193749
|
#
62a2d14a |
| 11-Sep-2013 |
Bill Wendling <isanbard@gmail.com> |
Simplify the checking of function attributes by using the simple methods.
llvm-svn: 190499
|
#
b827123c |
| 15-Jul-2013 |
Manman Ren <mren@apple.com> |
PEI: Support for non-zero SPAdj at beginning of a basic block.
We can have a FrameSetup in one basic block and the matching FrameDestroy in a different basic block when we have struct byval. In that
PEI: Support for non-zero SPAdj at beginning of a basic block.
We can have a FrameSetup in one basic block and the matching FrameDestroy in a different basic block when we have struct byval. In that case, SPAdj is not zero at beginning of the basic block.
Modify PEI to correctly set SPAdj at beginning of each basic block using DFS traversal. We used to assume SPAdj is 0 at beginning of each basic block.
PEI had an assert SPAdjCount || SPAdj == 0. If we have a Destroy <n> followed by a Setup <m>, PEI will assert failure. We can add an extra condition to make sure the pairs are matched: The pairs start with a FrameSetup. But since we are doing a much better job in the verifier, this patch removes the check in PEI.
PR16393
llvm-svn: 186364
show more ...
|
#
30d6865a |
| 12-Jul-2013 |
Manman Ren <mren@apple.com> |
PEI: refactor replaceFrameIndices(MF) to call replaceFrameIndices(BB).
replaceFrameIndices(MF) will iterate over the BBs and call replaceFrameIndices(BB). No functionality change.
llvm-svn: 186141
|
Revision tags: llvmorg-3.3.1-rc1 |
|
#
5dd52f8c |
| 05-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Clean up register scavenging code
SystemZ wants normal register scavenging slots, as close to the stack or frame pointer as possible. The only reason it was using custom code was because
[SystemZ] Clean up register scavenging code
SystemZ wants normal register scavenging slots, as close to the stack or frame pointer as possible. The only reason it was using custom code was because PrologEpilogInserter assumed an x86-like layout, where the frame pointer is at the opposite end of the frame from the stack pointer. This meant that when frame pointer elimination was disabled, the slots ended up being as close as possible to the incoming stack pointer, which is the opposite of what we want on SystemZ.
This patch adds a new knob to say which layout is used and converts SystemZ to use target-independent scavenging slots. It's one of the pieces needed to support frame-to-frame MVCs, where two slots might be required.
The ABI requires us to allocate 160 bytes for calls, so one approach would be to use that area as temporary spill space instead. It would need some surgery to make sure that the slot isn't live across a call though.
I stuck to the "isFPCloseToIncomingSP - ..." style comment on the "do what the surrounding code does" principle. The FP case is already covered by several Systemz/frame-* tests, which fail without the PrologueEpilogueInserter change, so no new ones are needed.
No behavioural change intended.
llvm-svn: 185696
show more ...
|
#
e1c1d363 |
| 03-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Use SmallVectorImpl instead of SmallVector for iterators and references to avoid specifying the vector size unnecessarily.
llvm-svn: 185512
|
#
0252265b |
| 16-Jun-2013 |
David Blaikie <dblaikie@gmail.com> |
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in DBG_VALUEs with Frame Indicies, simply use Frame I
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This reduces the complexity of debug info handling down to two representations of values (reg+offset and frame index+offset) rather than three or four.
Ideally we could ensure that frame indicies had been eliminated by the time we reached an assembly or dwarf generation, but I haven't spent the time to figure out where the FIs are leaking through into that & whether there's a good place to convert them. Some FI+offset=>reg+offset conversion is done (see PrologEpilogInserter, for example) which is necessary for some SelectionDAG assumptions about registers, I believe, but it might be possible to make this a more thorough conversion & ensure there are no remaining FIs no matter how instruction selection is performed.
llvm-svn: 184066
show more ...
|
#
1804b579 |
| 14-Jun-2013 |
Derek Schuff <dschuff@google.com> |
Make PrologEpilogInserter save/restore all callee saved registers in functions which call __builtin_unwind_init()
__builtin_unwind_init() is an undocumented gcc intrinsic which has this effect, and
Make PrologEpilogInserter save/restore all callee saved registers in functions which call __builtin_unwind_init()
__builtin_unwind_init() is an undocumented gcc intrinsic which has this effect, and is used in libgcc_eh.
Goes part of the way toward fixing PR8541.
llvm-svn: 183984
show more ...
|
#
249cb675 |
| 08-Jun-2013 |
Quentin Colombet <qcolombet@apple.com> |
Reapply r183552. This time, use a standard type for the option to avoid template instantiation issue with non-standard type.
Add a backend option to warn on a given stack size limit. Option: -mllvm
Reapply r183552. This time, use a standard type for the option to avoid template instantiation issue with non-standard type.
Add a backend option to warn on a given stack size limit. Option: -mllvm -warn-stack-size=<limit> Output (if limit is exceeded): warning: Stack size limit exceeded (<actual size>) in <functionName>.
The longer term plan is to hook that to a clang warning. PR:4072 <rdar://problem/13987214>.
llvm-svn: 183595
show more ...
|
#
bd5a201c |
| 07-Jun-2013 |
Quentin Colombet <qcolombet@apple.com> |
Revert commits related to stack warning.
llvm-svn: 183579
|
#
6baf581b |
| 07-Jun-2013 |
Quentin Colombet <qcolombet@apple.com> |
Add a backend option to warn on a given stack size limit. Option: -mllvm -warn-stack-size=<limit> Output (if limit is exceeded): warning: Stack size limit exceeded (<actual size>) in <functionName>.
Add a backend option to warn on a given stack size limit. Option: -mllvm -warn-stack-size=<limit> Output (if limit is exceeded): warning: Stack size limit exceeded (<actual size>) in <functionName>.
The longer term plan is to hook that to a clang warning. PR:4072 <rdar://problem/13987214>
llvm-svn: 183552
show more ...
|
Revision tags: llvmorg-3.3.0, llvmorg-3.3.0-rc3, llvmorg-3.3.0-rc2, llvmorg-3.3.0-rc1 |
|
#
3005c299 |
| 05-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Reapply r178845 with fix - Fix bug in PEI's virtual-register scavenging
This fixes PEI as previously described, but correctly handles the case where the instruction defining the virtual register to
Reapply r178845 with fix - Fix bug in PEI's virtual-register scavenging
This fixes PEI as previously described, but correctly handles the case where the instruction defining the virtual register to be scavenged is the first in the block. Arnold provided me with a bugpoint-reduced test case, but even that seems too large to use as a regression test. If I'm successful in cleaning it up then I'll commit that as well.
Original commit message:
This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the virtual register needs to be moved to after the spill code. The scavenger has already processed the defining instruction so that registers killed by that instruction are available for definition in that same instruction. Unfortunately, after this, the scavenger needs to iterate through the spill code and then visit, again, the instruction that defines the now-scavenged register. In order to avoid confusion, the register scavenger needs the ability to 'back up' through the spill code so that it can again process the instructions in the appropriate order. Prior to this fix, once the scavenger reached the just-moved instruction, it would assert if it killed any registers because, having already processed the instruction, it believed they were undefined.
Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar for diagnosing the problem and testing this fix.
llvm-svn: 178919
show more ...
|
#
81c46d08 |
| 05-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Revert r178845 - Fix bug in PEI's virtual-register scavenging
Reverting because this breaks one of the LTO builders. Original commit message:
This change fixes a bug that I introduced in r17805
Revert r178845 - Fix bug in PEI's virtual-register scavenging
Reverting because this breaks one of the LTO builders. Original commit message:
This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the virtual register needs to be moved to after the spill code. The scavenger has already processed the defining instruction so that registers killed by that instruction are available for definition in that same instruction. Unfortunately, after this, the scavenger needs to iterate through the spill code and then visit, again, the instruction that defines the now-scavenged register. In order to avoid confusion, the register scavenger needs the ability to 'back up' through the spill code so that it can again process the instructions in the appropriate order. Prior to this fix, once the scavenger reached the just-moved instruction, it would assert if it killed any registers because, having already processed the instruction, it believed they were undefined.
Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar for diagnosing the problem and testing this fix.
llvm-svn: 178916
show more ...
|
#
e6f48e4e |
| 05-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix bug in PEI's virtual-register scavenging
This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the
Fix bug in PEI's virtual-register scavenging
This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the virtual register needs to be moved to after the spill code. The scavenger has already processed the defining instruction so that registers killed by that instruction are available for definition in that same instruction. Unfortunately, after this, the scavenger needs to iterate through the spill code and then visit, again, the instruction that defines the now-scavenged register. In order to avoid confusion, the register scavenger needs the ability to 'back up' through the spill code so that it can again process the instructions in the appropriate order. Prior to this fix, once the scavenger reached the just-moved instruction, it would assert if it killed any registers because, having already processed the instruction, it believed they were undefined.
Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar for diagnosing the problem and testing this fix.
llvm-svn: 178845
show more ...
|
#
4e05788c |
| 26-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings
The previous algorithm could not deal properly with scavenging multiple virtual registers because it kept onl
Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings
The previous algorithm could not deal properly with scavenging multiple virtual registers because it kept only one live virtual -> physical mapping (and iterated through operands in order). Now we don't maintain a current mapping, but rather use replaceRegWith to completely remove the virtual register as soon as the mapping is established.
In order to allow the register scavenger to return a physical register killed by an instruction for definition by that same instruction, we now call RS->forward(I) prior to eliminating virtual registers defined in I. This requires a minor update to forward to ignore virtual registers.
These new features will be tested in forthcoming commits.
llvm-svn: 178058
show more ...
|
#
9e331c2f |
| 22-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Allow the register scavenger to spill multiple registers
This patch lets the register scavenger make use of multiple spill slots in order to guarantee that it will be able to provide multiple regist
Allow the register scavenger to spill multiple registers
This patch lets the register scavenger make use of multiple spill slots in order to guarantee that it will be able to provide multiple registers simultaneously.
To support this, the RS's API has changed slightly: setScavengingFrameIndex / getScavengingFrameIndex have been replaced by addScavengingFrameIndex / isScavengingFrameIndex / getScavengingFrameIndices.
In forthcoming commits, the PowerPC backend will use this capability in order to implement the spilling of condition registers, and some special-purpose registers, without relying on r0 being reserved. In some cases, spilling these registers requires two GPRs: one for addressing and one to hold the value being transferred.
llvm-svn: 177774
show more ...
|
#
5a765fdd |
| 14-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Provide the register scavenger to processFunctionBeforeFrameFinalized
Add the current PEI register scavenger as a parameter to the processFunctionBeforeFrameFinalized callback.
This change is neces
Provide the register scavenger to processFunctionBeforeFrameFinalized
Add the current PEI register scavenger as a parameter to the processFunctionBeforeFrameFinalized callback.
This change is necessary in order to allow the PowerPC target code to set the register scavenger frame index after the save-area offset adjustments performed by processFunctionBeforeFrameFinalized. Only after these adjustments have been made is it possible to estimate the size of the stack frame.
llvm-svn: 177108
show more ...
|
#
a69d0aaa |
| 05-Mar-2013 |
Bill Wendling <isanbard@gmail.com> |
Remove unused #includes.
llvm-svn: 176467
|
#
8da87163 |
| 21-Feb-2013 |
Eli Bendersky <eliben@google.com> |
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code i
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI.
There are potentially other layering problems that can be cleaned up as a result, or in a similar manner.
The refactoring was OK'd by Anton Korobeynikov on llvmdev.
Note: this touches the target interfaces, so out-of-tree targets may be affected.
llvm-svn: 175788
show more ...
|