#
e12a0166 |
| 14-May-2024 |
Tyler Retzlaff <roretzla@linux.microsoft.com> |
drivers: use stdatomic API
Replace the use of gcc builtin __atomic_xxx intrinsics with corresponding rte_atomic_xxx optional rte stdatomic API.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microso
drivers: use stdatomic API
Replace the use of gcc builtin __atomic_xxx intrinsics with corresponding rte_atomic_xxx optional rte stdatomic API.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com> Acked-by: Stephen Hemminger <stephen@networkplumber.org> Reviewed-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
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#
f9eb7a4b |
| 02-Mar-2023 |
Tyler Retzlaff <roretzla@linux.microsoft.com> |
use atomic intrinsics closer to C11
Use __atomic_fetch_{add,and,or,sub,xor} instead of __atomic_{add,and,or,sub,xor}_fetch when we have no interest in the result of the operation.
This change reduc
use atomic intrinsics closer to C11
Use __atomic_fetch_{add,and,or,sub,xor} instead of __atomic_{add,and,or,sub,xor}_fetch when we have no interest in the result of the operation.
This change reduces unnecessary code that provided the result of the atomic operation while this result was not used.
It also brings us to a closer alignment with atomics available in C11 standard and will reduce review effort when they are integrated.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com> Acked-by: Morten Brørup <mb@smartsharesystems.com> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Chengwen Feng <fengchengwen@huawei.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
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#
1acb7f54 |
| 28-Jul-2022 |
David Marchand <david.marchand@redhat.com> |
dev: hide driver object
Make rte_driver opaque for non internal users. This will make extending this object possible without breaking the ABI.
Introduce a new driver header and move rte_driver defi
dev: hide driver object
Make rte_driver opaque for non internal users. This will make extending this object possible without breaking the ABI.
Introduce a new driver header and move rte_driver definition. Update drivers and library to use the internal header.
Some applications may have been dereferencing rte_driver objects, mark this object's accessors as stable.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Akhil Goyal <gakhil@marvell.com> Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
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#
c6db4a15 |
| 09-Jun-2022 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: fix build with optimization=1
Initialize maddr and mtype to fix following warnings when using optimization=1 compilation flag.
In file included from ../drivers/net/cxgbe/base/common.h:13
net/cxgbe: fix build with optimization=1
Initialize maddr and mtype to fix following warnings when using optimization=1 compilation flag.
In file included from ../drivers/net/cxgbe/base/common.h:13, from ../drivers/net/cxgbe/cxgbe_main.c:37: ../drivers/net/cxgbe/cxgbe_main.c: In function ‘cxgbe_probe’: ../drivers/net/cxgbe/base/t4fw_interface.h:656:7: warning: ‘maddr’ may be used uninitialized in this function [-Wmaybe-uninitialized] ((x) << S_FW_CAPS_CONFIG_CMD_MEMADDR64K_CF) ^~ ../drivers/net/cxgbe/cxgbe_main.c:1111:40: note: ‘maddr’ was declared here u32 finiver, finicsum, cfcsum, mtype, maddr, param, val; ^~~~~ In file included from ../drivers/net/cxgbe/base/common.h:13, from ../drivers/net/cxgbe/cxgbe_main.c:37: ../drivers/net/cxgbe/base/t4fw_interface.h:648:7: warning: ‘mtype’ may be used uninitialized in this function [-Wmaybe-uninitialized] ((x) << S_FW_CAPS_CONFIG_CMD_MEMTYPE_CF) ^~ ../drivers/net/cxgbe/cxgbe_main.c:1111:33: note: ‘mtype’ was declared here u32 finiver, finicsum, cfcsum, mtype, maddr, param, val; ^~~~~ Bugzilla ID: 1029 Fixes: 6d7d651bbc15 ("net/cxgbe: read firmware configuration file from filesystem")
Reported-by: Daxue Gao <daxuex.gao@intel.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
6d7d651b |
| 16-May-2022 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: read firmware configuration file from filesystem
Add support to read firmware configuration file from /lib/firmware/cxgb4/ path in the filesystem. The firmware config file is used to enab
net/cxgbe: read firmware configuration file from filesystem
Add support to read firmware configuration file from /lib/firmware/cxgb4/ path in the filesystem. The firmware config file is used to enable or disable NIC features before firmware initialization to help retrieve better debug data to analyze firmware init failures. The config file can also be used to redistribute resources, like queues, TCAMs, etc., from disabled physical functions (PFs) to main PF, before firmware init.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
745b8836 |
| 18-Apr-2022 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: simplify Rx payload buffer size posting
Match the closest supported Rx payload buffer size with the mempool data size and program it for the Rx queue. This removes unnecessary need for ha
net/cxgbe: simplify Rx payload buffer size posting
Match the closest supported Rx payload buffer size with the mempool data size and program it for the Rx queue. This removes unnecessary need for handling additional padding, packing, and alignment, when posting Rx buffers to hardware.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
06c047b6 |
| 09-Feb-2022 |
Stephen Hemminger <stephen@networkplumber.org> |
remove unnecessary null checks
Functions like free, rte_free, and rte_mempool_free already handle NULL pointer so the checks here are not necessary.
Remove redundant NULL pointer checks before free
remove unnecessary null checks
Functions like free, rte_free, and rte_mempool_free already handle NULL pointer so the checks here are not necessary.
Remove redundant NULL pointer checks before free functions found by nullfree.cocci
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
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#
295968d1 |
| 22-Oct-2021 |
Ferruh Yigit <ferruh.yigit@intel.com> |
ethdev: add namespace
Add 'RTE_ETH' namespace to all enums & macros in a backward compatible way. The macros for backward compatibility can be removed in next LTS. Also updated some struct names to
ethdev: add namespace
Add 'RTE_ETH' namespace to all enums & macros in a backward compatible way. The macros for backward compatibility can be removed in next LTS. Also updated some struct names to have 'rte_eth' prefix.
All internal components switched to using new names.
Syntax fixed on lines that this patch touches.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Acked-by: Wisam Jaddo <wisamm@nvidia.com> Acked-by: Rosen Xu <rosen.xu@intel.com> Acked-by: Chenbo Xia <chenbo.xia@intel.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com> Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>
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#
1bb4a528 |
| 18-Oct-2021 |
Ferruh Yigit <ferruh.yigit@intel.com> |
ethdev: fix max Rx packet length
There is a confusion on setting max Rx packet length, this patch aims to clarify it.
'rte_eth_dev_configure()' API accepts max Rx packet size via 'uint32_t max_rx_p
ethdev: fix max Rx packet length
There is a confusion on setting max Rx packet length, this patch aims to clarify it.
'rte_eth_dev_configure()' API accepts max Rx packet size via 'uint32_t max_rx_pkt_len' field of the config struct 'struct rte_eth_conf'.
Also 'rte_eth_dev_set_mtu()' API can be used to set the MTU, and result stored into '(struct rte_eth_dev)->data->mtu'.
These two APIs are related but they work in a disconnected way, they store the set values in different variables which makes hard to figure out which one to use, also having two different method for a related functionality is confusing for the users.
Other issues causing confusion is: * maximum transmission unit (MTU) is payload of the Ethernet frame. And 'max_rx_pkt_len' is the size of the Ethernet frame. Difference is Ethernet frame overhead, and this overhead may be different from device to device based on what device supports, like VLAN and QinQ. * 'max_rx_pkt_len' is only valid when application requested jumbo frame, which adds additional confusion and some APIs and PMDs already discards this documented behavior. * For the jumbo frame enabled case, 'max_rx_pkt_len' is an mandatory field, this adds configuration complexity for application.
As solution, both APIs gets MTU as parameter, and both saves the result in same variable '(struct rte_eth_dev)->data->mtu'. For this 'max_rx_pkt_len' updated as 'mtu', and it is always valid independent from jumbo frame.
For 'rte_eth_dev_configure()', 'dev->data->dev_conf.rxmode.mtu' is user request and it should be used only within configure function and result should be stored to '(struct rte_eth_dev)->data->mtu'. After that point both application and PMD uses MTU from this variable.
When application doesn't provide an MTU during 'rte_eth_dev_configure()' default 'RTE_ETHER_MTU' value is used.
Additional clarification done on scattered Rx configuration, in relation to MTU and Rx buffer size. MTU is used to configure the device for physical Rx/Tx size limitation, Rx buffer is where to store Rx packets, many PMDs use mbuf data buffer size as Rx buffer size. PMDs compare MTU against Rx buffer size to decide enabling scattered Rx or not. If scattered Rx is not supported by device, MTU bigger than Rx buffer size should fail.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Somnath Kotur <somnath.kotur@broadcom.com> Acked-by: Huisong Li <lihuisong@huawei.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Rosen Xu <rosen.xu@intel.com> Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
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#
422d7823 |
| 02-Jun-2021 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: add MAC match-all to track promiscuous traffic
Chelsio T6 ASIC doesn't track Rx promisc traffic dropped due to lack of Rx buffers and hence the imissed counter doesn't increment. Add supp
net/cxgbe: add MAC match-all to track promiscuous traffic
Chelsio T6 ASIC doesn't track Rx promisc traffic dropped due to lack of Rx buffers and hence the imissed counter doesn't increment. Add support for RAW MAC filter to insert a wildcard matchall rule at the end of MPS TCAM to make MPS track the promisc traffic. This rule will only be added/removed when promisc mode is turned on/off on the interface.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
a12f14bc |
| 02-Jun-2021 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: use C11-style compiler builtins for atomics
Replace rte_atomic ops with C11 atomics.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
23d5fee3 |
| 15-Mar-2021 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: disable Rx during port link down
When link goes down, disable the port's Rx path to drop the incoming traffic closer to the wire, instead of accepting them in for further Rx processing, o
net/cxgbe: disable Rx during port link down
When link goes down, disable the port's Rx path to drop the incoming traffic closer to the wire, instead of accepting them in for further Rx processing, only to eventually drop them at the port's RxQs. This prevents unnecessary congestion in the Rx path. The port's Rx path will be re-enabled once the link up event is received in the firmware event queue.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
df96fd0d |
| 29-Jan-2021 |
Bruce Richardson <bruce.richardson@intel.com> |
ethdev: make driver-only headers private
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are for drivers only and should be a private to DPDK and not installed.
Signed-off-by:
ethdev: make driver-only headers private
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are for drivers only and should be a private to DPDK and not installed.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Steven Webster <steven.webster@windriver.com>
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#
a83041b1 |
| 20-Dec-2020 |
Karra Satwik <kaara.satwik@chelsio.com> |
net/cxgbe: rework and simplify link handling
Rework and simplify link handling code. Remove redundant variables in link configuration structure and directly extract information from the 32-bit link
net/cxgbe: rework and simplify link handling
Rework and simplify link handling code. Remove redundant variables in link configuration structure and directly extract information from the 32-bit link capabilities.
Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
fbd19135 |
| 28-Sep-2020 |
Thomas Monjalon <thomas@monjalon.net> |
ethdev: remove old close behaviour
The temporary flag RTE_ETH_DEV_CLOSE_REMOVE is removed. It was introduced in DPDK 18.11 in order to give time for PMDs to migrate.
The old behaviour was to free o
ethdev: remove old close behaviour
The temporary flag RTE_ETH_DEV_CLOSE_REMOVE is removed. It was introduced in DPDK 18.11 in order to give time for PMDs to migrate.
The old behaviour was to free only queues when closing a port. The new behaviour is calling rte_eth_dev_release_port() which does three more tasks: - trigger event callback - reset state and few pointers - free all generic port resources
The private port resources must be released in the .dev_close callback.
The .remove callback should: - call .dev_close callback - call rte_eth_dev_release_port() - free multi-port device shared resources
Despite waiting two years, some drivers have not migrated, so they may hit issues with the incompatible new behaviour. After sending emails, adding logs, and announcing the deprecation, the only last solution is to declare these drivers as unmaintained: ionic, liquidio, nfp Below is a summary of what to implement in those drivers.
* The freeing of private port resources must be moved from the ".remove(device)" function to the ".dev_close(port)" function.
* If a generic resource (.mac_addrs or .hash_mac_addrs) cannot be freed, it must be set to NULL in ".dev_close" function to protect from subsequent rte_eth_dev_release_port() freeing.
* Note 1: The generic resources are freed in rte_eth_dev_release_port(), after ".dev_close" is called in rte_eth_dev_close(), but not when calling ".dev_close" directly from the ".remove" PMD function. That's why rte_eth_dev_release_port() must still be called explicitly from ".remove(device)" after calling the ".dev_close" PMD function.
* Note 2: If a device can have multiple ports, the common resources must be freed only in the ".remove(device)" function.
* Note 3: The port is supposed to be in a stopped state when it is closed. If it is not the case, it is free to the PMD implementation how to react when trying to close a non-stopped port: either try to stop it automatically or just return an error.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Reviewed-by: Liron Himi <lironh@marvell.com> Reviewed-by: Haiyue Wang <haiyue.wang@intel.com> Acked-by: Jeff Guo <jia.guo@intel.com> Acked-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Stephen Hemminger <stephen@networkplumber.org>
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#
7b3d5298 |
| 11-Sep-2020 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: rework queue allocation between ports
Firmware returns the max queues that can be allocated on the entire PF. The driver evenly distributes them across all the ports belonging to the PF.
net/cxgbe: rework queue allocation between ports
Firmware returns the max queues that can be allocated on the entire PF. The driver evenly distributes them across all the ports belonging to the PF. However, some ports may need more queues than others and this equal distribution scheme prevents accessing these other ports unused queues. So, remove the equal distribution scheme and allow the ports to allocate as many queues as they need.
Also remove the hardcoded 64 max limit on queue allocation. Instead, use the max limit given by firmware.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
11df4a68 |
| 01-Sep-2020 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: release port resources during port close
Enable RTE_ETH_DEV_CLOSE_REMOVE during PCI probe for all ports enumerated under the PF. Free up the underlying port Virtual Identifier (VI) and as
net/cxgbe: release port resources during port close
Enable RTE_ETH_DEV_CLOSE_REMOVE during PCI probe for all ports enumerated under the PF. Free up the underlying port Virtual Identifier (VI) and associated resources during port close. Once all the ports under the PF are closed, free up the PF-wide shared resources. Invoke port close function of all ports under the PF, in PCI remove too.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
2e40fdc2 |
| 12-Jun-2020 |
Karra Satwik <kaara.satwik@chelsio.com> |
net/cxgbe: always enable HASH filter support
Disable all unused firmware resources during init time to give more resources for HASH (exact-match) filter region and always request firmware to enable
net/cxgbe: always enable HASH filter support
Disable all unused firmware resources during init time to give more resources for HASH (exact-match) filter region and always request firmware to enable HASH filter support when resources are available.
Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
536db938 |
| 11-Mar-2020 |
Karra Satwik <kaara.satwik@chelsio.com> |
net/cxgbe: add devargs to control filtermode and filtermask
Apart from the 4-tuple (IP src/dst addresses and TCP/UDP src/dst port addresses), there are only 40-bits available to match other fields i
net/cxgbe: add devargs to control filtermode and filtermask
Apart from the 4-tuple (IP src/dst addresses and TCP/UDP src/dst port addresses), there are only 40-bits available to match other fields in packet headers. Not all combinations of packet header fields can fit in the 40-bit tuple.
Currently, the combination of packet header fields to match are configured via filterMode for LETCAM filters and filterMask for HASH filters in firmware config files (t5/t6-config.txt). So, add devargs to allow User to dynamically select the filterMode and filterMask combination during runtime, without having to modify the firmware config files and reflashing them onto the adapter. A table of supported combinations is maintained by the driver to internally translate the User specified devargs combination to hardware's internal format before writing the requested combination to hardware
Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
993541b2 |
| 11-Mar-2020 |
Karra Satwik <kaara.satwik@chelsio.com> |
net/cxgbe: support flow API for source MAC rewrite
Add support to rewrite Source MAC addresses. The new Source MAC address is written into a free entry in the SMT table and the corresponding SMT ind
net/cxgbe: support flow API for source MAC rewrite
Add support to rewrite Source MAC addresses. The new Source MAC address is written into a free entry in the SMT table and the corresponding SMT index is used by hardware to rewrite the Source MAC address of the packets hitting the flow.
Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
a99564c6 |
| 11-Mar-2020 |
Karra Satwik <kaara.satwik@chelsio.com> |
net/cxgbe: support Source MAC Table
Source MAC Table (SMT) is used for storing Source MAC addresses to be written in packets transmitted on the wire. Hence, the SMT table can be used for overwriting
net/cxgbe: support Source MAC Table
Source MAC Table (SMT) is used for storing Source MAC addresses to be written in packets transmitted on the wire. Hence, the SMT table can be used for overwriting Source MAC addresses in packets, hitting corresponding filter rules inserted by the rte_flow API.
Query firmware for SMT start and size information available to the underlying PF. Allocate and maintain the corresponding driver's copy of the hardware SMT table, with appropriate refcount mechanism. If SMT information is not available, then use the entire hardware SMT table.
Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
24c1d49a |
| 11-Mar-2020 |
Karra Satwik <kaara.satwik@chelsio.com> |
net/cxgbe: support flow API for matching all packets on VF
Add support to match all packets received on the underlying VF.
Use new firmware API to fetch the Virtual Interface Number (VIN) allocated
net/cxgbe: support flow API for matching all packets on VF
Add support to match all packets received on the underlying VF.
Use new firmware API to fetch the Virtual Interface Number (VIN) allocated to each VF by the firmware. The VIN is required to write filter rules to match all packets on VFs, whose identifier is beyond max 7-bit value (i.e. 127) in VIID.
If firmware doesn't support fetching the VIN information, then fallback to manually retrieving the VIN value from the 7-bit field in the VIID, which only supports in range of 0..127. In this case, packets belonging to VFs, whose identifier is beyond 127 can't be matched.
Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
00a6e154 |
| 10-Jan-2020 |
Dharmik Thakkar <dharmik.thakkar@arm.com> |
net/cxgbe: remove local bool type
Replace 'typedef int bool' with 'stdbool.h' to avoid possible multiple definitions of 'bool'.
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by:
net/cxgbe: remove local bool type
Replace 'typedef int bool' with 'stdbool.h' to avoid possible multiple definitions of 'bool'.
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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#
97e02581 |
| 04-Oct-2019 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: fix races on flow API operations
When rules are being inserted from multiple cores, there are several race conditions during rte_flow operations.
For example, when inserting rules from 2
net/cxgbe: fix races on flow API operations
When rules are being inserted from multiple cores, there are several race conditions during rte_flow operations.
For example, when inserting rules from 2 cores simultaneously, both the cores try to fetch a free available filter entry and they both end up fetching the same entry. Both of them start overwriting the same filter entry before sending to firmware, which results in wrong rule being inserted to hardware.
Fix the races by adding spinlock to serialize the rte_flow operations.
Fixes: ee61f5113b17 ("net/cxgbe: parse and validate flows") Fixes: 9eb2c9a48072 ("net/cxgbe: implement flow create operation") Fixes: da23bc9d33f4 ("net/cxgbe: implement flow destroy operation") Fixes: 8d3c12e19368 ("net/cxgbe: implement flow query operation") Fixes: 86910379d335 ("net/cxgbe: implement flow flush operation") Cc: stable@dpdk.org
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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#
ed709206 |
| 27-Sep-2019 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
net/cxgbe: support matching VLAN via flow API
Add support for matching VLAN fields via rte_flow API.
When matching VLAN pattern, the ethertype field in hardware filter specification must contain VL
net/cxgbe: support matching VLAN via flow API
Add support for matching VLAN fields via rte_flow API.
When matching VLAN pattern, the ethertype field in hardware filter specification must contain VLAN header's ethertype, and not Ethernet header's ethertype. The hardware automatically searches for ethertype 0x8100 in Ethernet header, when parsing incoming packet against VLAN pattern.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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