net/cxgbe: replace may_alias attribute

Use existing __rte_may_alias macro from rte_common.h instead of
directly using __attribute__((__may_alias__)).

Signed-off-by: Tyler Retzlaff <roretzla@linux.m

net/cxgbe: replace may_alias attribute

Use existing __rte_may_alias macro from rte_common.h instead of
directly using __attribute__((__may_alias__)).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Potnuri Bharat Teja <bharat@chelsio.com>

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net/cxgbe: track packets dropped by TP due to congestion

Transport Processor (TP) on the NIC delivers the incoming packets
from the wire to NIC's DMA engine to place the packets in Rx buffers.
TP se

net/cxgbe: track packets dropped by TP due to congestion

Transport Processor (TP) on the NIC delivers the incoming packets
from the wire to NIC's DMA engine to place the packets in Rx buffers.
TP sends signal towards the Multi-Port Switch (MPS) near the MAC when
the Rxqs run out of Rx buffers posted by driver. These MPS buffer drop
stats are already accounted for in imissed counters. However, if a
large number of Rxqs run out of Rx buffers simultaneously, then the
TP can start dropping packets by itself when there is heavy congestion
on the channel and hence could not inform to the MPS. So, track these
packets dropped by TP in imissed counters. Also add xstats for these
counters.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: simplify Rx payload buffer size posting

Match the closest supported Rx payload buffer size with the mempool
data size and program it for the Rx queue. This removes unnecessary
need for ha

net/cxgbe: simplify Rx payload buffer size posting

Match the closest supported Rx payload buffer size with the mempool
data size and program it for the Rx queue. This removes unnecessary
need for handling additional padding, packing, and alignment, when
posting Rx buffers to hardware.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: remove useless C++ include guard

Remove the incomplete cplusplus guard in internal header.

Fixes: 3bd122eef2cc ("cxgbe/base: add hardware API for Chelsio T5 series adapters")

Signed-off

net/cxgbe: remove useless C++ include guard

Remove the incomplete cplusplus guard in internal header.

Fixes: 3bd122eef2cc ("cxgbe/base: add hardware API for Chelsio T5 series adapters")

Signed-off-by: Weiguo Li <liwg06@foxmail.com>

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net/cxgbe: add MAC match-all to track promiscuous traffic

Chelsio T6 ASIC doesn't track Rx promisc traffic dropped due to lack
of Rx buffers and hence the imissed counter doesn't increment. Add
supp

net/cxgbe: add MAC match-all to track promiscuous traffic

Chelsio T6 ASIC doesn't track Rx promisc traffic dropped due to lack
of Rx buffers and hence the imissed counter doesn't increment. Add
support for RAW MAC filter to insert a wildcard matchall rule at
the end of MPS TCAM to make MPS track the promisc traffic. This
rule will only be added/removed when promisc mode is turned on/off
on the interface.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: disable Rx during port link down

When link goes down, disable the port's Rx path to drop the incoming
traffic closer to the wire, instead of accepting them in for further
Rx processing, o

net/cxgbe: disable Rx during port link down

When link goes down, disable the port's Rx path to drop the incoming
traffic closer to the wire, instead of accepting them in for further
Rx processing, only to eventually drop them at the port's RxQs. This
prevents unnecessary congestion in the Rx path. The port's Rx path
will be re-enabled once the link up event is received in the firmware
event queue.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: remove use of uint type

Improve portability by replacing non-standard 'uint' with 'unsigned int'.

This solves the build error with musl libc:

In file included from ../drivers/net/cxgbe/

net/cxgbe: remove use of uint type

Improve portability by replacing non-standard 'uint' with 'unsigned int'.

This solves the build error with musl libc:

In file included from ../drivers/net/cxgbe/cxgbe.h:9,
from ../drivers/net/cxgbe/cxgbe_ethdev.c:37:
../drivers/net/cxgbe/base/common.h:201:4: error: unknown type name 'uint'
201 | uint synmapen:1; /* SYN Map Enable */
| ^~~~

Fixes: bfcb257d3014 ("net/cxgbe: enable RSS for VF")
Cc: stable@dpdk.org

Signed-off-by: Natanael Copa <ncopa@alpinelinux.org>
Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>

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net/cxgbe: support configuring link FEC

Add ethdev ops to query and configure link FEC.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chel

net/cxgbe: support configuring link FEC

Add ethdev ops to query and configure link FEC.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: rework and simplify link handling

Rework and simplify link handling code. Remove redundant
variables in link configuration structure and directly
extract information from the 32-bit link

net/cxgbe: rework and simplify link handling

Rework and simplify link handling code. Remove redundant
variables in link configuration structure and directly
extract information from the 32-bit link capabilities.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: remove legacy 16-bit link capabilities

Remove legacy 16-bit link capabilities and always request for the
32-bit link capabilities from firmware.

Signed-off-by: Karra Satwik <kaara.satwik

net/cxgbe: remove legacy 16-bit link capabilities

Remove legacy 16-bit link capabilities and always request for the
32-bit link capabilities from firmware.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: improve Rx congestion control

Chelsio T6 NIC can support up to 8 priority channels to manage
congestion. So, increase to 8 congestion channels for T6. Also,
add Rxq state to avoid unneces

net/cxgbe: improve Rx congestion control

Chelsio T6 NIC can support up to 8 priority channels to manage
congestion. So, increase to 8 congestion channels for T6. Also,
add Rxq state to avoid unnecessarily ringing doorbell and polling
the hardware for more traffic when the Rxq is stopped.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: rework queue allocation between ports

Firmware returns the max queues that can be allocated on the entire
PF. The driver evenly distributes them across all the ports belonging
to the PF.

net/cxgbe: rework queue allocation between ports

Firmware returns the max queues that can be allocated on the entire
PF. The driver evenly distributes them across all the ports belonging
to the PF. However, some ports may need more queues than others and
this equal distribution scheme prevents accessing these other ports
unused queues. So, remove the equal distribution scheme and allow the
ports to allocate as many queues as they need.

Also remove the hardcoded 64 max limit on queue allocation. Instead,
use the max limit given by firmware.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: use firmware API for validating filter spec

Add new firmware API FW_PARAM_DEV_FILTER_MODE_MASK to fetch
the filtermode and filtermask values configured in hardware,
which are used to vali

net/cxgbe: use firmware API for validating filter spec

Add new firmware API FW_PARAM_DEV_FILTER_MODE_MASK to fetch
the filtermode and filtermask values configured in hardware,
which are used to validate the match combinations in the filter
spec before offloading the filter rules to hardware. For older
firmware that doesn't support the new API, fallback to older way
of directly reading from indirect registers

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: support flow API for matching all packets on VF

Add support to match all packets received on the underlying VF.

Use new firmware API to fetch the Virtual Interface Number (VIN)
allocated

net/cxgbe: support flow API for matching all packets on VF

Add support to match all packets received on the underlying VF.

Use new firmware API to fetch the Virtual Interface Number (VIN)
allocated to each VF by the firmware. The VIN is required to
write filter rules to match all packets on VFs, whose identifier
is beyond max 7-bit value (i.e. 127) in VIID.

If firmware doesn't support fetching the VIN information, then
fallback to manually retrieving the VIN value from the 7-bit field
in the VIID, which only supports in range of 0..127. In this case,
packets belonging to VFs, whose identifier is beyond 127 can't be
matched.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: support flow API for matching IP TOS

Add support to match Type of Service (TOS) field in
IPv4/IPv6 header

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakk

net/cxgbe: support flow API for matching IP TOS

Add support to match Type of Service (TOS) field in
IPv4/IPv6 header

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: fetch max Tx coalesce limit from firmware

Query firmware for max number of packets that can be coalesced by
Tx.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

net/cxgbe: fix other misc build issues for Windows

Fix following build errors reported by Intel C++ compiler in Windows
build.

C:\> t4_hw.c(5105): warning #147: declaration is incompatible with
"in

net/cxgbe: fix other misc build issues for Windows

Fix following build errors reported by Intel C++ compiler in Windows
build.

C:\> t4_hw.c(5105): warning #147: declaration is incompatible with
"int t4_bar2_sge_qregs(struct adapter *, unsigned int, unsigned int,
u64={uint64_t={unsigned __int64}} *, unsigned int *)"
(declared at line 524 of "..\..\..\..\drivers\net\cxgbe\base\common.h")
int t4_bar2_sge_qregs(struct adapter *adapter, unsigned int qid,
^

C:\> cxgbe_filter.c(42): error : expected an expression
n_user_filters = mult_frac(adap->tids.nftids,
^

C:\> sge.c(400): error : expression must be a pointer to a complete
object type
(uint16_t)(RTE_PTR_ALIGN((char *)mbuf->buf_addr +
^

Build Environment:
1. Target OS: Microsoft Windows Server 2016
2. Compiler: Intel C++ Compiler from Intel Parallel Studio XE 2019 [1]
3. Development Tools:
3.1 Microsoft Visual Studio 2017 Professional
3.2 Windows Software Development Kit (SDK) v10.0.17763
3.3 Windows Driver Kit (WDK) v10.0.17763

[1] https://software.intel.com/en-us/parallel-studio-xe

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: use relative paths for includes

The Intel C++ compiler is not able to locate the header files without
relative paths in Windows build. Following errors are seen for these
header files.

C

net/cxgbe: use relative paths for includes

The Intel C++ compiler is not able to locate the header files without
relative paths in Windows build. Following errors are seen for these
header files.

C:\> base\common.h(9): error : cannot open source file "cxgbe_compat.h"
#include "cxgbe_compat.h"
^
[...]

Fix by explicitly stating header file location using relative paths.
Also, remove automatically including header files for Linux, to keep
it consistent across both OS.

Build Environment:
1. Target OS: Microsoft Windows Server 2016
2. Compiler: Intel C++ Compiler from Intel Parallel Studio XE 2019 [1]
3. Development Tools:
3.1 Microsoft Visual Studio 2017 Professional
3.2 Windows Software Development Kit (SDK) v10.0.17763
3.3 Windows Driver Kit (WDK) v10.0.17763

[1] https://software.intel.com/en-us/parallel-studio-xe

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: add flow actions to modify IP and TCP/UDP port

Query firmware for the new filter work request to offload flows with
actions to modify IP and TCP/UDP port addresses. When available,
transl

net/cxgbe: add flow actions to modify IP and TCP/UDP port

Query firmware for the new filter work request to offload flows with
actions to modify IP and TCP/UDP port addresses. When available,
translate IP and TCP/UDP port address modify actions to internal
hardware specification and offload the flow to hardware.

Original work by Shagun Agrawal

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: add flow ops to match based on dest MAC

Add flow operations to match packets based on destination MAC address.
Allocate and program hardware MPS table with the destination MAC
address to

net/cxgbe: add flow ops to match based on dest MAC

Add flow operations to match packets based on destination MAC address.
Allocate and program hardware MPS table with the destination MAC
address to be matched against. The returned MPS index is then used while
offloading flows to LETCAM (maskfull) and HASH (maskless) filter regions.

Also update existing mac_addr_set() to use the new MPS table API.

Signed-off-by: Shagun Agrawal <shaguna@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: add API to program hardware MPS table

Add API to program and manage hardware Multi Port Switch table. MPS
holds destination MAC addresses to be matched against incoming packets
for furthe

net/cxgbe: add API to program hardware MPS table

Add API to program and manage hardware Multi Port Switch table. MPS
holds destination MAC addresses to be matched against incoming packets
for further rule processing. Packets not matching any entry in MPS table
will be dropped by default, unless the underlying port is in promiscuous
mode.

Signed-off-by: Shagun Agrawal <shaguna@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: query firmware for max queues available

Query firmware for max Tx and Rx queues that can be allocated.
Move the code to determine max queues to common place for both
PF and VF.

Signed-of

net/cxgbe: query firmware for max queues available

Query firmware for max Tx and Rx queues that can be allocated.
Move the code to determine max queues to common place for both
PF and VF.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: validate flows offloaded to HASH region

Fetch supported match items in HASH region. Ensure the mask
is all set for all the supported match items to be offloaded
to HASH region. Otherwise,

net/cxgbe: validate flows offloaded to HASH region

Fetch supported match items in HASH region. Ensure the mask
is all set for all the supported match items to be offloaded
to HASH region. Otherwise, offload them to LE-TCAM region.

Signed-off-by: Shagun Agrawal <shaguna@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: query firmware for HASH filter resources

Fetch available HASH filter resources and allocate table for managing
them. Currently only supported on Chelsio T6 family of NICs.

Signed-off-by:

net/cxgbe: query firmware for HASH filter resources

Fetch available HASH filter resources and allocate table for managing
them. Currently only supported on Chelsio T6 family of NICs.

Signed-off-by: Shagun Agrawal <shaguna@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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net/cxgbe: implement flow query operation

Add API to query filter hit and byte counts from hardware.

Signed-off-by: Shagun Agrawal <shaguna@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsi

net/cxgbe: implement flow query operation

Add API to query filter hit and byte counts from hardware.

Signed-off-by: Shagun Agrawal <shaguna@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>

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