#
847d78fb |
| 02-Jul-2024 |
Zerun Fu <zerun.fu@corigine.com> |
bus/pci: fix FD in secondary process
In the previous logic the 'fd' was only saved in the primary process, but for some devices this value is also used in the secondary logic.
For example, the call
bus/pci: fix FD in secondary process
In the previous logic the 'fd' was only saved in the primary process, but for some devices this value is also used in the secondary logic.
For example, the call of 'rte_pci_find_ext_capability()' will fail in the secondary process.
Fix this problem by getting and saving the value of 'fd' also in the secondary process logic.
Fixes: 9b957f378abf ("pci: merge uio functions for linux and bsd") Cc: stable@dpdk.org
Signed-off-by: Zerun Fu <zerun.fu@corigine.com> Reviewed-by: Chaoyong He <chaoyong.he@corigine.com> Reviewed-by: Long Wu <long.wu@corigine.com> Reviewed-by: Peng Zhang <peng.zhang@corigine.com> Acked-by: Anatoly Burakov <anatoly.burakov@intel.com> Reviewed-by: Chenbo Xia <chenbox@nvidia.com>
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#
849f773b |
| 25-Jun-2024 |
David Marchand <david.marchand@redhat.com> |
bus/pci: use a dynamic logtype
Register a logtype for this bus driver and stop logging as EAL.
Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Chenbo Xia <chenbox@nvidia.com>
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b3d590a0 |
| 14-Sep-2023 |
David Marchand <david.marchand@redhat.com> |
drivers: remove duplicated PCI master control
Use existing API to cleanup duplicated code.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@int
drivers: remove duplicated PCI master control
Use existing API to cleanup duplicated code.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Chenbo Xia <chenbo.xia@intel.com> Acked-by: Stephen Hemminger <stephen@networkplumber.org>
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#
095cf6e6 |
| 31-May-2023 |
Chenbo Xia <chenbo.xia@intel.com> |
bus/pci: introduce MMIO read/write
The MMIO regions may not be mmap-able for VFIO-PCI devices. In this case, the driver should explicitly do read and write to access these regions.
Signed-off-by: C
bus/pci: introduce MMIO read/write
The MMIO regions may not be mmap-able for VFIO-PCI devices. In this case, the driver should explicitly do read and write to access these regions.
Signed-off-by: Chenbo Xia <chenbo.xia@intel.com> Acked-by: Sunil Kumar Kori <skori@marvell.com> Acked-by: Yahui Cao <yahui.cao@intel.com>
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#
aedd054c |
| 01-Nov-2021 |
Harman Kalra <hkalra@marvell.com> |
drivers: check interrupt file descriptor validity
This patch fixes coverity issue by adding a check for negative value to avoid bad bit shift operation and other invalid use of file descriptors.
Co
drivers: check interrupt file descriptor validity
This patch fixes coverity issue by adding a check for negative value to avoid bad bit shift operation and other invalid use of file descriptors.
Coverity issue: 373717, 373697, 373685 Coverity issue: 373723, 373720, 373719, 373718, 373715, 373714, 373713 Coverity issue: 373710, 373707, 373706, 373705, 373704, 373701, 373700 Coverity issue: 373698, 373695, 373692, 373690, 373689 Coverity issue: 373722, 373721, 373709, 373702, 373696 Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")
Signed-off-by: Harman Kalra <hkalra@marvell.com> Acked-by: Haiyue Wang <haiyue.wang@intel.com> Acked-by: David Marchand <david.marchand@redhat.com>
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#
d61138d4 |
| 22-Oct-2021 |
Harman Kalra <hkalra@marvell.com> |
drivers: remove direct access to interrupt handle
Removing direct access to interrupt handle structure fields, rather use respective get set APIs for the same. Making changes to all the drivers acce
drivers: remove direct access to interrupt handle
Removing direct access to interrupt handle structure fields, rather use respective get set APIs for the same. Making changes to all the drivers access the interrupt handle fields.
Signed-off-by: Harman Kalra <hkalra@marvell.com> Acked-by: Hyong Youb Kim <hyonkim@cisco.com> Signed-off-by: David Marchand <david.marchand@redhat.com> Tested-by: Raslan Darawsheh <rasland@nvidia.com>
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#
204a7f44 |
| 05-Nov-2020 |
Thomas Monjalon <thomas@monjalon.net> |
bus/pci: support I/O port operations with musl
Add a fallback for non-GNU libc systems like musl libc for the non-standard functions outl_p, outw_p and outb_p.
It solves the following errors when b
bus/pci: support I/O port operations with musl
Add a fallback for non-GNU libc systems like musl libc for the non-standard functions outl_p, outw_p and outb_p.
It solves the following errors when building with musl libc: pci_uio.c: undefined reference to 'outw_p' pci_uio.c: undefined reference to 'outl_p' pci_uio.c: undefined reference to 'outb_p'
Bugzilla ID: 35 Fixes: 756ce64b1ecd ("eal: introduce PCI ioport API") Cc: stable@dpdk.org
Reported-by: Natanael Copa <ncopa@alpinelinux.org> Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: David Marchand <david.marchand@redhat.com>
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#
df58e45e |
| 10-Mar-2021 |
Huawei Xie <huawei.xhw@alibaba-inc.com> |
bus/pci: support MMIO for ioport
With I/O BAR, we get PIO (port-mapped I/O) address. With MMIO (memory-mapped I/O) BAR, we get mapped virtual address. We distinguish PIO and MMIO by their address ra
bus/pci: support MMIO for ioport
With I/O BAR, we get PIO (port-mapped I/O) address. With MMIO (memory-mapped I/O) BAR, we get mapped virtual address. We distinguish PIO and MMIO by their address range like how kernel does, i.e, address below 64K is PIO. ioread/write8/16/32 is provided to access PIO/MMIO. By the way, for virtio on arch other than x86, BAR flag indicates PIO but is mapped.
Signed-off-by: Huawei Xie <huawei.xhw@alibaba-inc.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Tested-by: Yinan Wang <yinan.wang@intel.com>
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#
46dcbccd |
| 10-Mar-2021 |
Huawei Xie <huawei.xhw@alibaba-inc.com> |
bus/pci: use Linux PCI sysfs to get PIO address
Currently virtio PMD assumes legacy device uses PIO bar. There are three ways to get PIO (port-mapped I/O) address for virtio legacy device. 1) under
bus/pci: use Linux PCI sysfs to get PIO address
Currently virtio PMD assumes legacy device uses PIO bar. There are three ways to get PIO (port-mapped I/O) address for virtio legacy device. 1) under igb_uio - get PIO address from uio/uio# sysfs attribute, for instance: /sys/bus/pci/devices/0000:00:09.0/uio/uio0/portio/port0/start 2) under uio_pci_generic - for X86, get PIO address from /proc/ioport - for other ARCH, get PIO address from standard PCI sysfs attribute, for instance: /sys/bus/pci/devices/0000:00:09.0/resource
Actually, "port0/start" in igb_uio and "resource" point to exactly the same thing, i.e, pci_dev->resource[0] in kernel source code.
This patch refactors these messy things, and uses standard PCI sysfs attribute "resource".
Signed-off-by: Huawei Xie <huawei.xhw@alibaba-inc.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Tested-by: Yinan Wang <yinan.wang@intel.com>
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#
e200535c |
| 17-Sep-2020 |
David Marchand <david.marchand@redhat.com> |
mem: drop mapping API workaround
Now that the pci_map_resource API is private to the PCI bus, we can drop the compatibility workaround we had implemented in 20.08.
Signed-off-by: David Marchand <da
mem: drop mapping API workaround
Now that the pci_map_resource API is private to the PCI bus, we can drop the compatibility workaround we had implemented in 20.08.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
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#
e1ece609 |
| 17-Sep-2020 |
David Marchand <david.marchand@redhat.com> |
pci: move resource mapping to the PCI bus
As reported during 20.08 work for Windows, the pci_map_resource API was built with the assumption that its flags would be passed to mmap().
This introduced
pci: move resource mapping to the PCI bus
As reported during 20.08 work for Windows, the pci_map_resource API was built with the assumption that its flags would be passed to mmap().
This introduced a regression when adding the rte_mem_map API as reported in the workaround commit 9d2b24593724 ("pci: keep API compatibility with mmap values").
This API was only used in the PCI bus code, so move it there.
There is no code change happening during the move. The only change is in the pci_map_resource description where the additional flags are now documented as rte_mem_map API flags: - * The additional flags for the mapping range. + * The additional rte_mem_map() flags for the mapping range.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Andrew Rybchenko <arybchenko@solarflare.com> Acked-by: Ray Kinsella <mdr@ashroe.eu>
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7c0d798a |
| 17-Sep-2020 |
David Marchand <david.marchand@redhat.com> |
bus/pci: switch to private kernel driver enum
The rte_kernel_driver enum actually only pointed at PCI drivers and is only used in the PCI subsystem. Remove it from the generic device API and use a p
bus/pci: switch to private kernel driver enum
The rte_kernel_driver enum actually only pointed at PCI drivers and is only used in the PCI subsystem. Remove it from the generic device API and use a private enum in the PCI code.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
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#
9d2b2459 |
| 10-Jul-2020 |
Thomas Monjalon <thomas@monjalon.net> |
pci: keep API compatibility with mmap values
The function pci_map_resource() returns MAP_FAILED in case of error. When replacing the call to mmap() by rte_mem_map(), the error code became NULL, brea
pci: keep API compatibility with mmap values
The function pci_map_resource() returns MAP_FAILED in case of error. When replacing the call to mmap() by rte_mem_map(), the error code became NULL, breaking the API. This function is probably not used outside of DPDK, but it is still a problem for two reasons: - the deprecation process was not followed - the Linux function pci_vfio_mmap_bar() is broken for i40e
The error code is reverted to the Unix value MAP_FAILED. Windows needs to define this special value (-1 as in Unix). After proper deprecation process, the API could be changed again if really needed.
Because of the switch from mmap() to rte_mem_map(), another part of the API was changed: "int additional_flags" are defined as "additional flags for the mapping range" without mentioning it was directly used in mmap(). Currently it is directly used in rte_mem_map(), that's why the values rte_map_flags must be mapped (sic) on the mmap ones in case of Unix OS.
These are side effects of a badly defined API using Unix values.
Bugzilla ID: 503 Fixes: 2fd3567e5425 ("pci: use OS generic memory mapping functions")
Reported-by: David Marchand <david.marchand@redhat.com> Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com> Tested-by: Lihong Ma <lihongx.ma@intel.com>
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#
2fd3567e |
| 29-Jun-2020 |
Tal Shnaiderman <talshn@mellanox.com> |
pci: use OS generic memory mapping functions
Changing all of PCIs Unix memory mapping to the new memory allocation API wrapper.
Change all of PCI mapping function usage in bus/pci to support the ne
pci: use OS generic memory mapping functions
Changing all of PCIs Unix memory mapping to the new memory allocation API wrapper.
Change all of PCI mapping function usage in bus/pci to support the new API.
Signed-off-by: Tal Shnaiderman <talshn@mellanox.com>
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#
d25ab4b7 |
| 13-Nov-2019 |
Wangyu (Eric) <seven.wangyu@huawei.com> |
bus/pci: align next mapping address on page boundary
Currently, the next address picked by PCI mapping infrastructure may be page-unaligned due to BAR length being smaller than page size. This leads
bus/pci: align next mapping address on page boundary
Currently, the next address picked by PCI mapping infrastructure may be page-unaligned due to BAR length being smaller than page size. This leads to a situation where the requested map address is invalid, resulting in mmap() call returning an arbitrary address, which will later interfere with device BAR mapping in secondary processes.
Fix it by always aligning the next requested address on page boundary.
Fixes: c752998b5e2e ("pci: introduce library and driver") Cc: stable@dpdk.org
Signed-off-by: Xiaofeng Deng <dengxiaofeng@huawei.com> Signed-off-by: Wangyu (Eric) <seven.wangyu@huawei.com> Acked-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Acked-by: Min Hu (Connor) <humin29@huawei.com> Acked-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Gavin Hu <gavin.hu@arm.com>
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#
e02b661b |
| 22-Oct-2019 |
David Marchand <david.marchand@redhat.com> |
bus/pci: check IO permissions for UIO only
On x86, calling inb/outb special instructions (used in UIO ioport read/write parts) is only possible if the right IO permissions has been granted.
The onl
bus/pci: check IO permissions for UIO only
On x86, calling inb/outb special instructions (used in UIO ioport read/write parts) is only possible if the right IO permissions has been granted.
The only user of this API (the net/virtio pmd) checks this unconditionnaly but this should be hidden by the rte_pci_ioport API itself and only checked when the device is bound to a UIO driver.
Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
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#
8ac35916 |
| 12-Aug-2019 |
David Marchand <david.marchand@redhat.com> |
remove useless include of EAL memory config header
Restrict this header inclusion to its real users.
Fixes: 028669bc9f0d ("eal: hide shared memory config") Cc: stable@dpdk.org
Signed-off-by: David
remove useless include of EAL memory config header
Restrict this header inclusion to its real users.
Fixes: 028669bc9f0d ("eal: hide shared memory config") Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
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#
c530aa78 |
| 02-Apr-2019 |
Stephen Hemminger <stephen@networkplumber.org> |
bus/pci: fix TOCTOU for sysfs access
Using access followed by open causes a static analysis warning about Time of check versus Time of use. Also, access() and open() have different UID permission ch
bus/pci: fix TOCTOU for sysfs access
Using access followed by open causes a static analysis warning about Time of check versus Time of use. Also, access() and open() have different UID permission checks.
This is not a serious problem; but easy to fix by using errno instead.
Coverity issue: 300870 Fixes: 4a928ef9f611 ("bus/pci: enable write combining during mapping") Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Reviewed-by: David Marchand <david.marchand@redhat.com>
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#
6723c0fc |
| 03-Apr-2019 |
Bruce Richardson <bruce.richardson@intel.com> |
replace snprintf with strlcpy
Do a global replace of snprintf(..."%s",...) with strlcpy, adding in the rte_string_fns.h header if needed. The function changes in this patch were auto-generated via
replace snprintf with strlcpy
Do a global replace of snprintf(..."%s",...) with strlcpy, adding in the rte_string_fns.h header if needed. The function changes in this patch were auto-generated via command:
spatch --sp-file devtools/cocci/strlcpy.cocci --dir . --in-place
and then the files edited using awk to add in the missing header:
gawk -i inplace '/include <rte_/ && ! seen { \ print "#include <rte_string_fns.h>"; seen=1} {print}'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
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#
d3110b12 |
| 23-Nov-2018 |
Ferruh Yigit <ferruh.yigit@intel.com> |
bus/pci: fix allocation of device path
The pci_resource_by_index called strlen() on uninitialized memory which would lead to the wrong size of memory allocated for the path portion of the resource m
bus/pci: fix allocation of device path
The pci_resource_by_index called strlen() on uninitialized memory which would lead to the wrong size of memory allocated for the path portion of the resource map. This would either cause excessively large allocation, or worse memory corruption.
Coverity issue: 300868 Fixes: ea9d56226e72 ("pci: introduce function to map uio resource by index") Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
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#
4a928ef9 |
| 29-Jun-2018 |
Rafal Kozik <rk@semihalf.com> |
bus/pci: enable write combining during mapping
Write combining (WC) increases NIC performance by making better utilization of PCI bus, but cannot be used by all PMDs.
It will be enabled only if RTE
bus/pci: enable write combining during mapping
Write combining (WC) increases NIC performance by making better utilization of PCI bus, but cannot be used by all PMDs.
It will be enabled only if RTE_PCI_DRV_WC_ACTIVATE will be set in drivers flags. For proper work also igb_uio driver must be loaded with wc_activate set to 1.
When mapping PCI resources, firstly check if it support WC and then try to use it. In case of failure, it will fallback to normal mode.
Signed-off-by: Rafal Kozik <rk@semihalf.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
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#
5566a3e3 |
| 19-Dec-2017 |
Bruce Richardson <bruce.richardson@intel.com> |
drivers: use SPDX tag for Intel copyright files
Replace the BSD license header with the SPDX tag for files with only an Intel copyright on them.
Signed-off-by: Bruce Richardson <bruce.richardson@in
drivers: use SPDX tag for Intel copyright files
Replace the BSD license header with the SPDX tag for files with only an Intel copyright on them.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
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#
c52dd394 |
| 06-Nov-2017 |
Thomas Monjalon <thomas@monjalon.net> |
bus/pci: fix namespace of sysfs path function
The function pci_get_sysfs_path was moved from EAL to the PCI driver.
The namespace is now fixed by adding "rte_" prefix. The map files are fixed by re
bus/pci: fix namespace of sysfs path function
The function pci_get_sysfs_path was moved from EAL to the PCI driver.
The namespace is now fixed by adding "rte_" prefix. The map files are fixed by removing the symbol from EAL and adding it to the PCI driver.
It is an API break but it is probably not used by applications. Anyway this API is already broken by the move in a new header file.
Fixes: c752998b5e2e ("pci: introduce library and driver")
Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Gaetan Rivet <gaetan.rivet@6wind.com>
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#
c752998b |
| 26-Oct-2017 |
Gaetan Rivet <gaetan.rivet@6wind.com> |
pci: introduce library and driver
The PCI lib defines the types and methods allowing to use PCI elements.
The PCI bus implements a bus driver for PCI devices by constructing rte_bus elements using
pci: introduce library and driver
The PCI lib defines the types and methods allowing to use PCI elements.
The PCI bus implements a bus driver for PCI devices by constructing rte_bus elements using the PCI lib.
Move the relevant code out of the EAL to its expected place.
Libraries, drivers, unit tests and applications are updated to use the new rte_bus_pci.h header when necessary.
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
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