1 /*
2 * USB Open Host Controller Interface (Ohci) driver
3 *
4 * BUGS:
5 * - Missing isochronous input streams.
6 * - Too many delays and ilocks.
7 * - bandwidth admission control must be done per-frame.
8 * - Buffering could be handled like in uhci, to avoid
9 * needed block allocation and avoid allocs for small Tds.
10 * - must warn of power overruns.
11 */
12
13 #include "u.h"
14 #include "../port/lib.h"
15 #include "mem.h"
16 #include "dat.h"
17 #include "fns.h"
18 #include "io.h"
19 #include "../port/error.h"
20
21 #include "../port/usb.h"
22
23 typedef struct Ctlio Ctlio;
24 typedef struct Ctlr Ctlr;
25 typedef struct Ed Ed;
26 typedef struct Edpool Edpool;
27 typedef struct Epx Epx;
28 typedef struct Hcca Hcca;
29 typedef struct Isoio Isoio;
30 typedef struct Ohci Ohci;
31 typedef struct Qio Qio;
32 typedef struct Qtree Qtree;
33 typedef struct Td Td;
34 typedef struct Tdpool Tdpool;
35
36 enum
37 {
38 Incr = 64, /* for Td and Ed pools */
39
40 Align = 0x20, /* OHCI only requires 0x10 */
41 /* use always a power of 2 */
42
43 Abortdelay = 1, /* delay after cancelling Tds (ms) */
44 Tdatomic = 8, /* max nb. of Tds per bulk I/O op. */
45 Enabledelay = 100, /* waiting for a port to enable */
46
47
48 /* Queue states (software) */
49 Qidle = 0,
50 Qinstall,
51 Qrun,
52 Qdone,
53 Qclose,
54 Qfree,
55
56 /* Ed control bits */
57 Edmpsmask = 0x7ff, /* max packet size */
58 Edmpsshift = 16,
59 Edlow = 1 << 13, /* low speed */
60 Edskip = 1 << 14, /* skip this ed */
61 Ediso = 1 << 15, /* iso Tds used */
62 Edtddir = 0, /* get dir from td */
63 Edin = 2 << 11, /* direction in */
64 Edout = 1 << 11, /* direction out */
65 Eddirmask = 3 << 11, /* direction bits */
66 Edhalt = 1, /* halted (in head ptr) */
67 Edtoggle = 2, /* toggle (in head ptr) 1 == data1 */
68
69 /* Td control bits */
70 Tdround = 1<<18, /* (rounding) short packets ok */
71 Tdtoksetup = 0<<19, /* setup packet */
72 Tdtokin = 2<<19, /* in packet */
73 Tdtokout = 1<<19, /* out packet */
74 Tdtokmask = 3<<19, /* in/out/setup bits */
75 Tdnoioc = 7<<21, /* intr. cnt. value for no interrupt */
76 Tdusetog = 1<<25, /* use toggle from Td (1) or Ed (0) */
77 Tddata1 = 1<<24, /* data toggle (1 == data1) */
78 Tddata0 = 0<<24,
79 Tdfcmask = 7, /* frame count (iso) */
80 Tdfcshift = 24,
81 Tdsfmask = 0xFFFF, /* starting frame (iso) */
82 Tderrmask = 3, /* error counter */
83 Tderrshift = 26,
84 Tdccmask = 0xf, /* condition code (status) */
85 Tdccshift = 28,
86 Tdiccmask = 0xf, /* condition code (iso, offsets) */
87 Tdiccshift = 12,
88
89 Ntdframes = 0x10000, /* # of different iso frame numbers */
90
91 /* Td errors (condition code) */
92 Tdok = 0,
93 Tdcrc = 1,
94 Tdbitstuff = 2,
95 Tdbadtog = 3,
96 Tdstalled = 4,
97 Tdtmout = 5,
98 Tdpidchk = 6,
99 Tdbadpid = 7,
100 Tddataovr = 8,
101 Tddataund = 9,
102 Tdbufovr = 0xC,
103 Tdbufund = 0xD,
104 Tdnotacc = 0xE,
105
106 /* control register */
107 Cple = 0x04, /* periodic list enable */
108 Cie = 0x08, /* iso. list enable */
109 Ccle = 0x10, /* ctl list enable */
110 Cble = 0x20, /* bulk list enable */
111 Cfsmask = 3 << 6, /* functional state... */
112 Cfsreset = 0 << 6,
113 Cfsresume = 1 << 6,
114 Cfsoper = 2 << 6,
115 Cfssuspend = 3 << 6,
116
117 /* command status */
118 Sblf = 1 << 2, /* bulk list (load) flag */
119 Sclf = 1 << 1, /* control list (load) flag */
120 Shcr = 1 << 0, /* host controller reset */
121
122 /* intr enable */
123 Mie = 1 << 31,
124 Oc = 1 << 30,
125 Rhsc = 1 << 6,
126 Fno = 1 << 5,
127 Ue = 1 << 4,
128 Rd = 1 << 3,
129 Sf = 1 << 2,
130 Wdh = 1 << 1,
131 So = 1 << 0,
132
133 Fmaxpktmask = 0x7fff,
134 Fmaxpktshift = 16,
135 HcRhDescA_POTPGT_MASK = 0xff << 24,
136 HcRhDescA_POTPGT_SHIFT = 24,
137
138 /* Rh status */
139 Lps = 1 << 0,
140 Cgp = 1 << 0,
141 Oci = 1 << 1,
142 Psm = 1 << 8,
143 Nps = 1 << 9,
144 Drwe = 1 << 15,
145 Srwe = 1 << 15,
146 Lpsc = 1 << 16,
147 Ccic = 1 << 17,
148 Crwe = 1 << 31,
149
150 /* port status */
151 Ccs = 0x00001, /* current connect status */
152 Pes = 0x00002, /* port enable status */
153 Pss = 0x00004, /* port suspend status */
154 Poci = 0x00008, /* over current indicator */
155 Prs = 0x00010, /* port reset status */
156 Pps = 0x00100, /* port power status */
157 Lsda = 0x00200, /* low speed device attached */
158 Csc = 0x10000, /* connect status change */
159 Pesc = 0x20000, /* enable status change */
160 Pssc = 0x40000, /* suspend status change */
161 Ocic = 0x80000, /* over current ind. change */
162 Prsc = 0x100000, /* reset status change */
163
164 /* port status write bits */
165 Cpe = 0x001, /* clear port enable */
166 Spe = 0x002, /* set port enable */
167 Spr = 0x010, /* set port reset */
168 Spp = 0x100, /* set port power */
169 Cpp = 0x200, /* clear port power */
170
171 };
172
173 /*
174 * Endpoint descriptor. (first 4 words used by hardware)
175 */
176 struct Ed {
177 ulong ctrl;
178 ulong tail; /* transfer descriptor */
179 ulong head;
180 ulong nexted;
181
182 Ed* next; /* sw; in free list or next in list */
183 Td* tds; /* in use by current xfer; all for iso */
184 Ep* ep; /* debug/align */
185 Ed* inext; /* debug/align (dump interrupt eds). */
186 };
187
188 /*
189 * Endpoint I/O state (software), per direction.
190 */
191 struct Qio
192 {
193 QLock; /* for the entire I/O process */
194 Rendez; /* wait for completion */
195 Ed* ed; /* to place Tds on it */
196 int sched; /* queue number (intr/iso) */
197 int toggle; /* Tddata0/Tddata1 */
198 ulong usbid; /* device/endpoint address */
199 int tok; /* Tdsetup, Tdtokin, Tdtokout */
200 long iotime; /* last I/O time; to hold interrupt polls */
201 int debug; /* for the endpoint */
202 char* err; /* error status */
203 int state; /* Qidle -> Qinstall -> Qrun -> Qdone | Qclose */
204 long bw; /* load (intr/iso) */
205 };
206
207 struct Ctlio
208 {
209 Qio; /* single Ed for all transfers */
210 uchar* data; /* read from last ctl req. */
211 int ndata; /* number of bytes read */
212 };
213
214 struct Isoio
215 {
216 Qio;
217 int nframes; /* number of frames for a full second */
218 Td* atds; /* Tds avail for further I/O */
219 int navail; /* number of avail Tds */
220 ulong frno; /* next frame number avail for I/O */
221 ulong left; /* remainder after rounding Hz to samples/ms */
222 int nerrs; /* consecutive errors on iso I/O */
223 };
224
225 /*
226 * Transfer descriptor. Size must be multiple of 32
227 * First block is used by hardware (aligned to 32).
228 */
229 struct Td
230 {
231 ulong ctrl;
232 ulong cbp; /* current buffer pointer */
233 ulong nexttd;
234 ulong be;
235 ushort offsets[8]; /* used by Iso Tds only */
236
237 Td* next; /* in free or Ed tds list */
238 Td* anext; /* in avail td list (iso) */
239 Ep* ep; /* using this Td for I/O */
240 Qio* io; /* using this Td for I/O */
241 Block* bp; /* data for this Td */
242 ulong nbytes; /* bytes in this Td */
243 ulong cbp0; /* initial value for cbp */
244 ulong last; /* true for last Td in Qio */
245 };
246
247 /*
248 * Host controller communication area (hardware)
249 */
250 struct Hcca
251 {
252 ulong intrtable[32];
253 ushort framenumber;
254 ushort pad1;
255 ulong donehead;
256 uchar reserved[116];
257 };
258
259 /*
260 * I/O registers
261 */
262 struct Ohci
263 {
264 /* control and status group */
265 ulong revision; /*00*/
266 ulong control; /*04*/
267 ulong cmdsts; /*08*/
268 ulong intrsts; /*0c*/
269 ulong intrenable; /*10*/
270 ulong intrdisable; /*14*/
271
272 /* memory pointer group */
273 ulong hcca; /*18*/
274 ulong periodcurred; /*1c*/
275 ulong ctlheaded; /*20*/
276 ulong ctlcurred; /*24*/
277 ulong bulkheaded; /*28*/
278 ulong bulkcurred; /*2c*/
279 ulong donehead; /*30*/
280
281 /* frame counter group */
282 ulong fminterval; /*34*/
283 ulong fmremaining; /*38*/
284 ulong fmnumber; /*3c*/
285 ulong periodicstart; /*40*/
286 ulong lsthreshold; /*44*/
287
288 /* root hub group */
289 ulong rhdesca; /*48*/
290 ulong rhdescb; /*4c*/
291 ulong rhsts; /*50*/
292 ulong rhportsts[15]; /*54*/
293 ulong pad25[20]; /*90*/
294
295 /* unknown */
296 ulong hostueaddr; /*e0*/
297 ulong hostuests; /*e4*/
298 ulong hosttimeoutctrl; /*e8*/
299 ulong pad59; /*ec*/
300 ulong pad60; /*f0*/
301 ulong hostrevision; /*f4*/
302 ulong pad62[2];
303 /*100*/
304 };
305
306 /*
307 * Endpoint tree (software)
308 */
309 struct Qtree
310 {
311 int nel;
312 int depth;
313 ulong* bw;
314 Ed** root;
315 };
316
317 struct Tdpool
318 {
319 Lock;
320 Td* free;
321 int nalloc;
322 int ninuse;
323 int nfree;
324 };
325
326 struct Edpool
327 {
328 Lock;
329 Ed* free;
330 int nalloc;
331 int ninuse;
332 int nfree;
333 };
334
335 struct Ctlr
336 {
337 Lock; /* for ilock; lists and basic ctlr I/O */
338 QLock resetl; /* lock controller during USB reset */
339 int active;
340 Ctlr* next;
341 int nports;
342
343 Ohci* ohci; /* base I/O address */
344 Hcca* hcca; /* intr/done Td lists (used by hardware) */
345 int overrun; /* sched. overrun */
346 Ed* intrhd; /* list of intr. eds in tree */
347 Qtree* tree; /* tree for t Ep i/o */
348 int ntree; /* number of dummy Eds in tree */
349 Pcidev* pcidev;
350 };
351
352 #define dqprint if(debug || io && io->debug)print
353 #define ddqprint if(debug>1 || (io && io->debug>1))print
354 #define diprint if(debug || iso && iso->debug)print
355 #define ddiprint if(debug>1 || (iso && iso->debug>1))print
356 #define TRUNC(x, sz) ((x) & ((sz)-1))
357
358 static int ohciinterrupts[Nttypes];
359 static char* iosname[] = { "idle", "install", "run", "done", "close", "FREE" };
360
361 static int debug;
362 static Edpool edpool;
363 static Tdpool tdpool;
364 static Ctlr* ctlrs[Nhcis];
365
366 static QLock usbhstate; /* protects name space state */
367
368 static int schedendpt(Ctlr *ub, Ep *ep);
369 static void unschedendpt(Ctlr *ub, Ep *ep);
370 static long qtd(Ctlr*, Ep*, int, Block*, uchar*, uchar*, int, ulong);
371
372 static char* errmsgs[] =
373 {
374 [Tdcrc] "crc error",
375 [Tdbitstuff] "bit stuffing error",
376 [Tdbadtog] "bad toggle",
377 [Tdstalled] Estalled,
378 [Tdtmout] "timeout error",
379 [Tdpidchk] "pid check error",
380 [Tdbadpid] "bad pid",
381 [Tddataovr] "data overrun",
382 [Tddataund] "data underrun",
383 [Tdbufovr] "buffer overrun",
384 [Tdbufund] "buffer underrun",
385 [Tdnotacc] "not accessed"
386 };
387
388 static void*
pa2ptr(ulong pa)389 pa2ptr(ulong pa)
390 {
391 if(pa == 0)
392 return nil;
393 else
394 return KADDR(pa);
395 }
396
397 static ulong
ptr2pa(void * p)398 ptr2pa(void *p)
399 {
400 if(p == nil)
401 return 0;
402 else
403 return PADDR(p);
404 }
405
406 static void
waitSOF(Ctlr * ub)407 waitSOF(Ctlr *ub)
408 {
409 int frame = ub->hcca->framenumber & 0x3f;
410
411 do {
412 delay(2);
413 } while(frame == (ub->hcca->framenumber & 0x3f));
414 }
415
416 static char*
errmsg(int err)417 errmsg(int err)
418 {
419
420 if(err < nelem(errmsgs))
421 return errmsgs[err];
422 return nil;
423 }
424
425 static Ed*
ctlhd(Ctlr * ctlr)426 ctlhd(Ctlr *ctlr)
427 {
428 return pa2ptr(ctlr->ohci->ctlheaded);
429 }
430
431 static Ed*
bulkhd(Ctlr * ctlr)432 bulkhd(Ctlr *ctlr)
433 {
434 return pa2ptr(ctlr->ohci->bulkheaded);
435 }
436
437 static void
edlinked(Ed * ed,Ed * next)438 edlinked(Ed *ed, Ed *next)
439 {
440 if(ed == nil)
441 print("edlinked: nil ed: pc %#p\n", getcallerpc(&ed));
442 ed->nexted = ptr2pa(next);
443 ed->next = next;
444 }
445
446 static void
setctlhd(Ctlr * ctlr,Ed * ed)447 setctlhd(Ctlr *ctlr, Ed *ed)
448 {
449 ctlr->ohci->ctlheaded = ptr2pa(ed);
450 if(ed != nil)
451 ctlr->ohci->cmdsts |= Sclf; /* reload it on next pass */
452 }
453
454 static void
setbulkhd(Ctlr * ctlr,Ed * ed)455 setbulkhd(Ctlr *ctlr, Ed *ed)
456 {
457 ctlr->ohci->bulkheaded = ptr2pa(ed);
458 if(ed != nil)
459 ctlr->ohci->cmdsts |= Sblf; /* reload it on next pass */
460 }
461
462 static void
unlinkctl(Ctlr * ctlr,Ed * ed)463 unlinkctl(Ctlr *ctlr, Ed *ed)
464 {
465 Ed *this, *prev, *next;
466
467 ctlr->ohci->control &= ~Ccle;
468 waitSOF(ctlr);
469 this = ctlhd(ctlr);
470 ctlr->ohci->ctlcurred = 0;
471 prev = nil;
472 while(this != nil && this != ed){
473 prev = this;
474 this = this->next;
475 }
476 if(this == nil){
477 print("unlinkctl: not found\n");
478 return;
479 }
480 next = this->next;
481 if(prev == nil)
482 setctlhd(ctlr, next);
483 else
484 edlinked(prev, next);
485 ctlr->ohci->control |= Ccle;
486 edlinked(ed, nil); /* wipe out next field */
487 }
488
489 static void
unlinkbulk(Ctlr * ctlr,Ed * ed)490 unlinkbulk(Ctlr *ctlr, Ed *ed)
491 {
492 Ed *this, *prev, *next;
493
494 ctlr->ohci->control &= ~Cble;
495 waitSOF(ctlr);
496 this = bulkhd(ctlr);
497 ctlr->ohci->bulkcurred = 0;
498 prev = nil;
499 while(this != nil && this != ed){
500 prev = this;
501 this = this->next;
502 }
503 if(this == nil){
504 print("unlinkbulk: not found\n");
505 return;
506 }
507 next = this->next;
508 if(prev == nil)
509 setbulkhd(ctlr, next);
510 else
511 edlinked(prev, next);
512 ctlr->ohci->control |= Cble;
513 edlinked(ed, nil); /* wipe out next field */
514 }
515
516 static void
edsetaddr(Ed * ed,ulong addr)517 edsetaddr(Ed *ed, ulong addr)
518 {
519 ulong ctrl;
520
521 ctrl = ed->ctrl & ~((Epmax<<7)|Devmax);
522 ctrl |= (addr & ((Epmax<<7)|Devmax));
523 ed->ctrl = ctrl;
524 }
525
526 static void
edsettog(Ed * ed,int c)527 edsettog(Ed *ed, int c)
528 {
529 if(c != 0)
530 ed->head |= Edtoggle;
531 else
532 ed->head &= ~Edtoggle;
533 }
534
535 static int
edtoggle(Ed * ed)536 edtoggle(Ed *ed)
537 {
538 return ed->head & Edtoggle;
539 }
540
541 static int
edhalted(Ed * ed)542 edhalted(Ed *ed)
543 {
544 return ed->head & Edhalt;
545 }
546
547 static int
edmaxpkt(Ed * ed)548 edmaxpkt(Ed *ed)
549 {
550 return (ed->ctrl >> Edmpsshift) & Edmpsmask;
551 }
552
553 static void
edsetmaxpkt(Ed * ed,int m)554 edsetmaxpkt(Ed *ed, int m)
555 {
556 ulong c;
557
558 c = ed->ctrl & ~(Edmpsmask << Edmpsshift);
559 ed->ctrl = c | ((m&Edmpsmask) << Edmpsshift);
560 }
561
562 static int
tderrs(Td * td)563 tderrs(Td *td)
564 {
565 return (td->ctrl >> Tdccshift) & Tdccmask;
566 }
567
568 static int
tdtok(Td * td)569 tdtok(Td *td)
570 {
571 return (td->ctrl & Tdtokmask);
572 }
573
574 static Td*
tdalloc(void)575 tdalloc(void)
576 {
577 Td *td;
578 Td *pool;
579 int i;
580
581 lock(&tdpool);
582 if(tdpool.free == nil){
583 ddprint("ohci: tdalloc %d Tds\n", Incr);
584 pool = xspanalloc(Incr*sizeof(Td), Align, 0);
585 if(pool == nil)
586 panic("tdalloc");
587 for(i=Incr; --i>=0;){
588 pool[i].next = tdpool.free;
589 tdpool.free = &pool[i];
590 }
591 tdpool.nalloc += Incr;
592 tdpool.nfree += Incr;
593 }
594 tdpool.ninuse++;
595 tdpool.nfree--;
596 td = tdpool.free;
597 tdpool.free = td->next;
598 memset(td, 0, sizeof(Td));
599 unlock(&tdpool);
600
601 assert(((uintptr)td & 0xF) == 0);
602 return td;
603 }
604
605 static void
tdfree(Td * td)606 tdfree(Td *td)
607 {
608 if(td == 0)
609 return;
610 freeb(td->bp);
611 td->bp = nil;
612 lock(&tdpool);
613 if(td->nexttd == 0x77777777)
614 panic("ohci: tdfree: double free");
615 memset(td, 7, sizeof(Td)); /* poison */
616 td->next = tdpool.free;
617 tdpool.free = td;
618 tdpool.ninuse--;
619 tdpool.nfree++;
620 unlock(&tdpool);
621 }
622
623 static Ed*
edalloc(void)624 edalloc(void)
625 {
626 Ed *ed, *pool;
627 int i;
628
629 lock(&edpool);
630 if(edpool.free == nil){
631 ddprint("ohci: edalloc %d Eds\n", Incr);
632 pool = xspanalloc(Incr*sizeof(Ed), Align, 0);
633 if(pool == nil)
634 panic("edalloc");
635 for(i=Incr; --i>=0;){
636 pool[i].next = edpool.free;
637 edpool.free = &pool[i];
638 }
639 edpool.nalloc += Incr;
640 edpool.nfree += Incr;
641 }
642 edpool.ninuse++;
643 edpool.nfree--;
644 ed = edpool.free;
645 edpool.free = ed->next;
646 memset(ed, 0, sizeof(Ed));
647 unlock(&edpool);
648
649 return ed;
650 }
651
652 static void
edfree(Ed * ed)653 edfree(Ed *ed)
654 {
655 Td *td, *next;
656 int i;
657
658 if(ed == 0)
659 return;
660 i = 0;
661 for(td = ed->tds; td != nil; td = next){
662 next = td->next;
663 tdfree(td);
664 if(i++ > 2000){
665 print("ohci: bug: ed with more than 2000 tds\n");
666 break;
667 }
668 }
669 lock(&edpool);
670 if(ed->nexted == 0x99999999)
671 panic("ohci: edfree: double free");
672 memset(ed, 9, sizeof(Ed)); /* poison */
673 ed->next = edpool.free;
674 edpool.free = ed;
675 edpool.ninuse--;
676 edpool.nfree++;
677 unlock(&edpool);
678 ddprint("edfree: ed %#p\n", ed);
679 }
680
681 /*
682 * return smallest power of 2 >= n
683 */
684 static int
flog2(int n)685 flog2(int n)
686 {
687 int i;
688
689 for(i = 0; (1 << i) < n; i++)
690 ;
691 return i;
692 }
693
694 /*
695 * return smallest power of 2 <= n
696 */
697 static int
flog2lower(int n)698 flog2lower(int n)
699 {
700 int i;
701
702 for(i = 0; (1 << (i + 1)) <= n; i++)
703 ;
704 return i;
705 }
706
707 static int
pickschedq(Qtree * qt,int pollival,ulong bw,ulong limit)708 pickschedq(Qtree *qt, int pollival, ulong bw, ulong limit)
709 {
710 int i, j, d, upperb, q;
711 ulong best, worst, total;
712
713 d = flog2lower(pollival);
714 if(d > qt->depth)
715 d = qt->depth;
716 q = -1;
717 worst = 0;
718 best = ~0;
719 upperb = (1 << (d+1)) - 1;
720 for(i = (1 << d) - 1; i < upperb; i++){
721 total = qt->bw[0];
722 for(j = i; j > 0; j = (j - 1) / 2)
723 total += qt->bw[j];
724 if(total < best){
725 best = total;
726 q = i;
727 }
728 if(total > worst)
729 worst = total;
730 }
731 if(worst + bw >= limit)
732 return -1;
733 return q;
734 }
735
736 static int
schedq(Ctlr * ctlr,Qio * io,int pollival)737 schedq(Ctlr *ctlr, Qio *io, int pollival)
738 {
739 int q;
740 Ed *ted;
741
742 q = pickschedq(ctlr->tree, pollival, io->bw, ~0);
743 ddqprint("ohci: sched %#p q %d, ival %d, bw %ld\n", io, q, pollival, io->bw);
744 if(q < 0){
745 print("ohci: no room for ed\n");
746 return -1;
747 }
748 ctlr->tree->bw[q] += io->bw;
749 ted = ctlr->tree->root[q];
750 io->sched = q;
751 edlinked(io->ed, ted->next);
752 edlinked(ted, io->ed);
753 io->ed->inext = ctlr->intrhd;
754 ctlr->intrhd = io->ed;
755 return 0;
756 }
757
758 static void
unschedq(Ctlr * ctlr,Qio * qio)759 unschedq(Ctlr *ctlr, Qio *qio)
760 {
761 int q;
762 Ed *prev, *this, *next;
763 Ed **l;
764
765 q = qio->sched;
766 if(q < 0)
767 return;
768 ctlr->tree->bw[q] -= qio->bw;
769
770 prev = ctlr->tree->root[q];
771 this = prev->next;
772 while(this != nil && this != qio->ed){
773 prev = this;
774 this = this->next;
775 }
776 if(this == nil)
777 print("ohci: unschedq %d: not found\n", q);
778 else{
779 next = this->next;
780 edlinked(prev, next);
781 }
782 waitSOF(ctlr);
783 for(l = &ctlr->intrhd; *l != nil; l = &(*l)->inext)
784 if(*l == qio->ed){
785 *l = (*l)->inext;
786 return;
787 }
788 print("ohci: unschedq: ed %#p not found\n", qio->ed);
789 }
790
791 static char*
seprinttdtok(char * s,char * e,int tok)792 seprinttdtok(char *s, char *e, int tok)
793 {
794 switch(tok){
795 case Tdtoksetup:
796 s = seprint(s, e, " setup");
797 break;
798 case Tdtokin:
799 s = seprint(s, e, " in");
800 break;
801 case Tdtokout:
802 s = seprint(s, e, " out");
803 break;
804 }
805 return s;
806 }
807
808
809 static char*
seprinttd(char * s,char * e,Td * td,int iso)810 seprinttd(char *s, char *e, Td *td, int iso)
811 {
812 int i;
813 Block *bp;
814
815 if(td == nil)
816 return seprint(s, e, "<nil td>\n");
817 s = seprint(s, e, "%#p ep %#p ctrl %#p", td, td->ep, td->ctrl);
818 s = seprint(s, e, " cc=%#ulx", (td->ctrl >> Tdccshift) & Tdccmask);
819 if(iso == 0){
820 if((td->ctrl & Tdround) != 0)
821 s = seprint(s, e, " rnd");
822 s = seprinttdtok(s, e, td->ctrl & Tdtokmask);
823 if((td->ctrl & Tdusetog) != 0)
824 s = seprint(s, e, " d%d", (td->ctrl & Tddata1) ? 1 : 0);
825 else
826 s = seprint(s, e, " d-");
827 s = seprint(s, e, " ec=%uld", (td->ctrl >> Tderrshift) & Tderrmask);
828 }else{
829 s = seprint(s, e, " fc=%uld", (td->ctrl >> Tdfcshift) & Tdfcmask);
830 s = seprint(s, e, " sf=%uld", td->ctrl & Tdsfmask);
831 }
832 s = seprint(s, e, " cbp0 %#p cbp %#p next %#p be %#p %s",
833 td->cbp0, td->cbp, td->nexttd, td->be, td->last ? "last" : "");
834 s = seprint(s, e, "\n\t\t%ld bytes", td->nbytes);
835 if((bp = td->bp) != nil){
836 s = seprint(s, e, " rp %#p wp %#p ", bp->rp, bp->wp);
837 if(BLEN(bp) > 0)
838 s = seprintdata(s, e, bp->rp, bp->wp - bp->rp);
839 }
840 if(iso == 0)
841 return seprint(s, e, "\n");
842 s = seprint(s, e, "\n\t\t");
843 /* we use only offsets[0] */
844 i = 0;
845 s = seprint(s, e, "[%d] %#ux cc=%#ux sz=%ud\n", i, td->offsets[i],
846 (td->offsets[i] >> Tdiccshift) & Tdiccmask,
847 td->offsets[i] & 0x7FF);
848 return s;
849 }
850
851 static void
dumptd(Td * td,char * p,int iso)852 dumptd(Td *td, char *p, int iso)
853 {
854 static char buf[512]; /* Too much */
855 char *s;
856
857 s = seprint(buf, buf+sizeof(buf), "%s: ", p);
858 s = seprinttd(s, buf+sizeof(buf), td, iso);
859 if(s > buf && s[-1] != '\n')
860 s[-1] = '\n';
861 print("\t%s", buf);
862 }
863
864 static void
dumptds(Td * td,char * p,int iso)865 dumptds(Td *td, char *p, int iso)
866 {
867 int i;
868
869 for(i = 0; td != nil; td = td->next){
870 dumptd(td, p, iso);
871 if(td->last)
872 break;
873 if(tdtok(td) == Tdtokin && ++i > 2){
874 print("\t\t...\n");
875 break;
876 }
877 }
878 }
879
880 static void
dumped(Ed * ed)881 dumped(Ed *ed)
882 {
883 char *buf, *s, *e;
884
885 if(ed == nil){
886 print("<null ed>\n");
887 return;
888 }
889 buf = malloc(512);
890 /* no waserror; may want to use from interrupt context */
891 if(buf == nil)
892 return;
893 e = buf+512;
894 s = seprint(buf, e, "\ted %#p: ctrl %#p", ed, ed->ctrl);
895 if((ed->ctrl & Edskip) != 0)
896 s = seprint(s, e, " skip");
897 if((ed->ctrl & Ediso) != 0)
898 s = seprint(s, e, " iso");
899 if((ed->ctrl & Edlow) != 0)
900 s = seprint(s, e, " low");
901 s = seprint(s, e, " d%d", (ed->head & Edtoggle) ? 1 : 0);
902 if((ed->ctrl & Eddirmask) == Edin)
903 s = seprint(s, e, " in");
904 if((ed->ctrl & Eddirmask) == Edout)
905 s = seprint(s, e, " out");
906 if(edhalted(ed))
907 s = seprint(s, e, " hlt");
908 s = seprint(s, e, " ep%uld.%uld", (ed->ctrl>>7)&Epmax, ed->ctrl&0x7f);
909 s = seprint(s, e, " maxpkt %uld", (ed->ctrl>>Edmpsshift)&Edmpsmask);
910 seprint(s, e, " tail %#p head %#p next %#p\n",ed->tail,ed->head,ed->nexted);
911 print("%s", buf);
912 free(buf);
913 if(ed->tds != nil && (ed->ctrl & Ediso) == 0)
914 dumptds(ed->tds, "td", 0);
915 }
916
917 static char*
seprintio(char * s,char * e,Qio * io,char * pref)918 seprintio(char *s, char *e, Qio *io, char *pref)
919 {
920 s = seprint(s, e, "%s qio %#p ed %#p", pref, io, io->ed);
921 s = seprint(s, e, " tog %d iot %ld err %s id %#ulx",
922 io->toggle, io->iotime, io->err, io->usbid);
923 s = seprinttdtok(s, e, io->tok);
924 s = seprint(s, e, " %s\n", iosname[io->state]);
925 return s;
926 }
927
928 static char*
seprintep(char * s,char * e,Ep * ep)929 seprintep(char* s, char* e, Ep *ep)
930 {
931 Isoio *iso;
932 Qio *io;
933 Ctlio *cio;
934
935 if(ep == nil)
936 return seprint(s, e, "<nil ep>\n");
937 if(ep->aux == nil)
938 return seprint(s, e, "no mdep\n");
939 switch(ep->ttype){
940 case Tctl:
941 cio = ep->aux;
942 s = seprintio(s, e, cio, "c");
943 s = seprint(s, e, "\trepl %d ndata %d\n", ep->rhrepl, cio->ndata);
944 break;
945 case Tbulk:
946 case Tintr:
947 io = ep->aux;
948 if(ep->mode != OWRITE)
949 s = seprintio(s, e, &io[OREAD], "r");
950 if(ep->mode != OREAD)
951 s = seprintio(s, e, &io[OWRITE], "w");
952 break;
953 case Tiso:
954 iso = ep->aux;
955 s = seprintio(s, e, iso, "w");
956 s = seprint(s, e, "\tntds %d avail %d frno %uld left %uld next avail %#p\n",
957 iso->nframes, iso->navail, iso->frno, iso->left, iso->atds);
958 break;
959 }
960 return s;
961 }
962
963 static char*
seprintctl(char * s,char * se,ulong ctl)964 seprintctl(char *s, char *se, ulong ctl)
965 {
966 s = seprint(s, se, "en=");
967 if((ctl&Cple) != 0)
968 s = seprint(s, se, "p");
969 if((ctl&Cie) != 0)
970 s = seprint(s, se, "i");
971 if((ctl&Ccle) != 0)
972 s = seprint(s, se, "c");
973 if((ctl&Cble) != 0)
974 s = seprint(s, se, "b");
975 switch(ctl & Cfsmask){
976 case Cfsreset:
977 return seprint(s, se, " reset");
978 case Cfsresume:
979 return seprint(s, se, " resume");
980 case Cfsoper:
981 return seprint(s, se, " run");
982 case Cfssuspend:
983 return seprint(s, se, " suspend");
984 default:
985 return seprint(s, se, " ???");
986 }
987 }
988
989 static void
dump(Hci * hp)990 dump(Hci *hp)
991 {
992 Ctlr *ctlr;
993 Ed *ed;
994 char cs[20];
995
996 ctlr = hp->aux;
997 ilock(ctlr);
998 seprintctl(cs, cs+sizeof(cs), ctlr->ohci->control);
999 print("ohci ctlr %#p: frno %#ux ctl %#lux %s sts %#lux intr %#lux\n",
1000 ctlr, ctlr->hcca->framenumber, ctlr->ohci->control, cs,
1001 ctlr->ohci->cmdsts, ctlr->ohci->intrsts);
1002 print("ctlhd %#ulx cur %#ulx bulkhd %#ulx cur %#ulx done %#ulx\n",
1003 ctlr->ohci->ctlheaded, ctlr->ohci->ctlcurred,
1004 ctlr->ohci->bulkheaded, ctlr->ohci->bulkcurred,
1005 ctlr->ohci->donehead);
1006 if(ctlhd(ctlr) != nil)
1007 print("[ctl]\n");
1008 for(ed = ctlhd(ctlr); ed != nil; ed = ed->next)
1009 dumped(ed);
1010 if(bulkhd(ctlr) != nil)
1011 print("[bulk]\n");
1012 for(ed = bulkhd(ctlr); ed != nil; ed = ed->next)
1013 dumped(ed);
1014 if(ctlr->intrhd != nil)
1015 print("[intr]\n");
1016 for(ed = ctlr->intrhd; ed != nil; ed = ed->inext)
1017 dumped(ed);
1018 if(ctlr->tree->root[0]->next != nil)
1019 print("[iso]");
1020 for(ed = ctlr->tree->root[0]->next; ed != nil; ed = ed->next)
1021 dumped(ed);
1022 print("%d eds in tree\n", ctlr->ntree);
1023 iunlock(ctlr);
1024 lock(&tdpool);
1025 print("%d tds allocated = %d in use + %d free\n",
1026 tdpool.nalloc, tdpool.ninuse, tdpool.nfree);
1027 unlock(&tdpool);
1028 lock(&edpool);
1029 print("%d eds allocated = %d in use + %d free\n",
1030 edpool.nalloc, edpool.ninuse, edpool.nfree);
1031 unlock(&edpool);
1032 }
1033
1034 /*
1035 * Compute size for the next iso Td and setup its
1036 * descriptor for I/O according to the buffer size.
1037 */
1038 static void
isodtdinit(Ep * ep,Isoio * iso,Td * td)1039 isodtdinit(Ep *ep, Isoio *iso, Td *td)
1040 {
1041 Block *bp;
1042 long size;
1043 int i;
1044
1045 bp = td->bp;
1046 assert(bp != nil && BLEN(bp) == 0);
1047 size = (ep->hz+iso->left) * ep->pollival / 1000;
1048 iso->left = (ep->hz+iso->left) * ep->pollival % 1000;
1049 size *= ep->samplesz;
1050 if(size > ep->maxpkt){
1051 print("ohci: ep%d.%d: size > maxpkt\n",
1052 ep->dev->nb, ep->nb);
1053 print("size = %uld max = %ld\n", size, ep->maxpkt);
1054 size = ep->maxpkt;
1055 }
1056 td->nbytes = size;
1057 memset(bp->wp, 0, size); /* in case we don't fill it on time */
1058 td->cbp0 = td->cbp = ptr2pa(bp->rp) & ~0xFFF;
1059 td->ctrl = TRUNC(iso->frno, Ntdframes);
1060 td->offsets[0] = (ptr2pa(bp->rp) & 0xFFF);
1061 td->offsets[0] |= (Tdnotacc << Tdiccshift);
1062 /* in case the controller checks out the offests... */
1063 for(i = 1; i < nelem(td->offsets); i++)
1064 td->offsets[i] = td->offsets[0];
1065 td->be = ptr2pa(bp->rp + size - 1);
1066 td->ctrl |= (0 << Tdfcshift); /* frame count is 1 */
1067
1068 iso->frno = TRUNC(iso->frno + ep->pollival, Ntdframes);
1069 }
1070
1071 /*
1072 * start I/O on the dummy td and setup a new dummy to fill up.
1073 */
1074 static void
isoadvance(Ep * ep,Isoio * iso,Td * td)1075 isoadvance(Ep *ep, Isoio *iso, Td *td)
1076 {
1077 Td *dtd;
1078
1079 dtd = iso->atds;
1080 iso->atds = dtd->anext;
1081 iso->navail--;
1082 dtd->anext = nil;
1083 dtd->bp->wp = dtd->bp->rp;
1084 dtd->nexttd = 0;
1085 td->nexttd = ptr2pa(dtd);
1086 isodtdinit(ep, iso, dtd);
1087 iso->ed->tail = ptr2pa(dtd);
1088 }
1089
1090 static int
isocanwrite(void * a)1091 isocanwrite(void *a)
1092 {
1093 Isoio *iso;
1094
1095 iso = a;
1096 return iso->state == Qclose || iso->err != nil ||
1097 iso->navail > iso->nframes / 2;
1098 }
1099
1100 /*
1101 * Service a completed/failed Td from the done queue.
1102 * It may be of any transfer type.
1103 * The queue is not in completion order.
1104 * (It's actually in reverse completion order).
1105 *
1106 * When an error, a short packet, or a last Td is found
1107 * we awake the process waiting for the transfer.
1108 * Although later we will process other Tds completed
1109 * before, epio won't be able to touch the current Td
1110 * until interrupt returns and releases the lock on the
1111 * controller.
1112 */
1113 static void
qhinterrupt(Ctlr *,Ep * ep,Qio * io,Td * td,int)1114 qhinterrupt(Ctlr *, Ep *ep, Qio *io, Td *td, int)
1115 {
1116 Block *bp;
1117 int mode, err;
1118 Ed *ed;
1119
1120 ed = io->ed;
1121 if(io->state != Qrun)
1122 return;
1123 if(tdtok(td) == Tdtokin)
1124 mode = OREAD;
1125 else
1126 mode = OWRITE;
1127 bp = td->bp;
1128 err = tderrs(td);
1129
1130 switch(err){
1131 case Tddataovr: /* Overrun is not an error */
1132 break;
1133 case Tdok:
1134 /* virtualbox doesn't always report underflow on short packets */
1135 if(td->cbp == 0)
1136 break;
1137 /* fall through */
1138 case Tddataund:
1139 /* short input packets are ok */
1140 if(mode == OREAD){
1141 if(td->cbp == 0)
1142 panic("ohci: short packet but cbp == 0");
1143 /*
1144 * td->cbp and td->cbp0 are the real addresses
1145 * corresponding to virtual addresses bp->wp and
1146 * bp->rp respectively.
1147 */
1148 bp->wp = bp->rp + (td->cbp - td->cbp0);
1149 if(bp->wp < bp->rp)
1150 panic("ohci: wp < rp");
1151 /*
1152 * It's ok. clear error and flag as last in xfer.
1153 * epio must ignore following Tds.
1154 */
1155 td->last = 1;
1156 td->ctrl &= ~(Tdccmask << Tdccshift);
1157 break;
1158 }
1159 /* else fall; it's an error */
1160 case Tdcrc:
1161 case Tdbitstuff:
1162 case Tdbadtog:
1163 case Tdstalled:
1164 case Tdtmout:
1165 case Tdpidchk:
1166 case Tdbadpid:
1167 bp->wp = bp->rp; /* no bytes in xfer. */
1168 io->err = errmsg(err);
1169 if(debug || ep->debug){
1170 print("tdinterrupt: failed err %d (%s)\n", err, io->err);
1171 dumptd(td, "failed", ed->ctrl & Ediso);
1172 }
1173 td->last = 1;
1174 break;
1175 default:
1176 panic("ohci: td cc %ud unknown", err);
1177 }
1178
1179 if(td->last != 0){
1180 /*
1181 * clear td list and halt flag.
1182 */
1183 ed->head = (ed->head & Edtoggle) | ed->tail;
1184 ed->tds = pa2ptr(ed->tail);
1185 io->state = Qdone;
1186 wakeup(io);
1187 }
1188 }
1189
1190 /*
1191 * BUG: Iso input streams are not implemented.
1192 */
1193 static void
isointerrupt(Ctlr * ctlr,Ep * ep,Qio * io,Td * td,int)1194 isointerrupt(Ctlr *ctlr, Ep *ep, Qio *io, Td *td, int)
1195 {
1196 Isoio *iso;
1197 Block *bp;
1198 Ed *ed;
1199 int err, isoerr;
1200
1201 iso = ep->aux;
1202 ed = io->ed;
1203 if(io->state == Qclose)
1204 return;
1205 bp = td->bp;
1206 /*
1207 * When we get more than half the frames consecutive errors
1208 * we signal an actual error. Errors in the entire Td are
1209 * more serious and are always singaled.
1210 * Errors like overrun are not really errors. In fact, for
1211 * output, errors cannot be really detected. The driver will
1212 * hopefully notice I/O errors on input endpoints and detach the device.
1213 */
1214 err = tderrs(td);
1215 isoerr = (td->offsets[0] >> Tdiccshift) & Tdiccmask;
1216 if(isoerr == Tdok || isoerr == Tdnotacc)
1217 iso->nerrs = 0;
1218 else if(iso->nerrs++ > iso->nframes/2)
1219 err = Tdstalled;
1220 if(err != Tdok && err != Tddataovr){
1221 bp->wp = bp->rp;
1222 io->err = errmsg(err);
1223 if(debug || ep->debug){
1224 print("ohci: isointerrupt: ep%d.%d: err %d (%s) frnum 0x%lux\n",
1225 ep->dev->nb, ep->nb,
1226 err, errmsg(err), ctlr->ohci->fmnumber);
1227 dumptd(td, "failed", ed->ctrl & Ediso);
1228 }
1229 }
1230 td->bp->wp = td->bp->rp;
1231 td->nbytes = 0;
1232 td->anext = iso->atds;
1233 iso->atds = td;
1234 iso->navail++;
1235 /*
1236 * If almost all Tds are avail the user is not doing I/O at the
1237 * required rate. We put another Td in place to keep the polling rate.
1238 */
1239 if(iso->err == nil && iso->navail > iso->nframes - 10)
1240 isoadvance(ep, iso, pa2ptr(iso->ed->tail));
1241 /*
1242 * If there's enough buffering futher I/O can be done.
1243 */
1244 if(isocanwrite(iso))
1245 wakeup(iso);
1246 }
1247
1248 static void
interrupt(Ureg *,void * arg)1249 interrupt(Ureg *, void *arg)
1250 {
1251 Td *td, *ntd;
1252 Hci *hp;
1253 Ctlr *ctlr;
1254 ulong status, curred;
1255 int i, frno;
1256
1257 hp = arg;
1258 ctlr = hp->aux;
1259 ilock(ctlr);
1260 ctlr->ohci->intrdisable = Mie;
1261 coherence();
1262 status = ctlr->ohci->intrsts & ctlr->ohci->intrenable;
1263 status &= Oc|Rhsc|Fno|Ue|Rd|Sf|Wdh|So;
1264 frno = TRUNC(ctlr->ohci->fmnumber, Ntdframes);
1265 if(status & Wdh){
1266 /* lsb of donehead has bit to flag other intrs. */
1267 td = pa2ptr(ctlr->hcca->donehead & ~0xF);
1268
1269 for(i = 0; td != nil && i < 1024; i++){
1270 if(0)ddprint("ohci tdinterrupt: td %#p\n", td);
1271 ntd = pa2ptr(td->nexttd & ~0xF);
1272 td->nexttd = 0;
1273 if(td->ep == nil || td->io == nil)
1274 panic("ohci: interrupt: ep %#p io %#p",
1275 td->ep, td->io);
1276 ohciinterrupts[td->ep->ttype]++;
1277 if(td->ep->ttype == Tiso)
1278 isointerrupt(ctlr, td->ep, td->io, td, frno);
1279 else
1280 qhinterrupt(ctlr, td->ep, td->io, td, frno);
1281 td = ntd;
1282 }
1283 if(i >= 1024)
1284 print("ohci: bug: more than 1024 done Tds?\n");
1285 ctlr->hcca->donehead = 0;
1286 }
1287
1288 ctlr->ohci->intrsts = status;
1289 status &= ~Wdh;
1290 status &= ~Sf;
1291 if(status & So){
1292 print("ohci: sched overrun: too much load\n");
1293 ctlr->overrun++;
1294 status &= ~So;
1295 }
1296 if((status & Ue) != 0){
1297 curred = ctlr->ohci->periodcurred;
1298 print("ohci: unrecoverable error frame 0x%.8lux ed 0x%.8lux, "
1299 "ints %d %d %d %d\n",
1300 ctlr->ohci->fmnumber, curred,
1301 ohciinterrupts[Tctl], ohciinterrupts[Tintr],
1302 ohciinterrupts[Tbulk], ohciinterrupts[Tiso]);
1303 if(curred != 0)
1304 dumped(pa2ptr(curred));
1305 status &= ~Ue;
1306 }
1307 if(status != 0)
1308 print("ohci interrupt: unhandled sts 0x%.8lux\n", status);
1309 ctlr->ohci->intrenable = Mie | Wdh | Ue;
1310 iunlock(ctlr);
1311 }
1312
1313 /*
1314 * The old dummy Td is used to implement the new Td.
1315 * A new dummy is linked at the end of the old one and
1316 * returned, to link further Tds if needed.
1317 */
1318 static Td*
epgettd(Ep * ep,Qio * io,Td ** dtdp,int flags,void * a,int count)1319 epgettd(Ep *ep, Qio *io, Td **dtdp, int flags, void *a, int count)
1320 {
1321 Td *td, *dtd;
1322 Block *bp;
1323
1324 if(count <= BY2PG)
1325 bp = allocb(count);
1326 else{
1327 if(count > 2*BY2PG)
1328 panic("ohci: transfer > two pages");
1329 /* maximum of one physical page crossing allowed */
1330 bp = allocb(count+BY2PG);
1331 bp->rp = (uchar*)PGROUND((uintptr)bp->rp);
1332 bp->wp = bp->rp;
1333 }
1334 dtd = *dtdp;
1335 td = dtd;
1336 td->bp = bp;
1337 if(count > 0){
1338 td->cbp0 = td->cbp = ptr2pa(bp->wp);
1339 td->be = ptr2pa(bp->wp + count - 1);
1340 if(a != nil){
1341 /* validaddr((uintptr)a, count, 0); DEBUG */
1342 memmove(bp->wp, a, count);
1343 }
1344 bp->wp += count;
1345 }
1346 td->nbytes = count;
1347 td->ctrl = io->tok|Tdusetog|io->toggle|flags;
1348 if(io->toggle == Tddata0)
1349 io->toggle = Tddata1;
1350 else
1351 io->toggle = Tddata0;
1352 assert(td->ep == ep);
1353 td->io = io;
1354 dtd = tdalloc(); /* new dummy */
1355 dtd->ep = ep;
1356 td->nexttd = ptr2pa(dtd);
1357 td->next = dtd;
1358 *dtdp = dtd;
1359 return td;
1360 }
1361
1362 /*
1363 * Try to get them idle
1364 */
1365 static void
aborttds(Qio * io)1366 aborttds(Qio *io)
1367 {
1368 Ed *ed;
1369 Td *td;
1370
1371 ed = io->ed;
1372 if(ed == nil)
1373 return;
1374 ed->ctrl |= Edskip;
1375 for(td = ed->tds; td != nil; td = td->next)
1376 if(td->bp != nil)
1377 td->bp->wp = td->bp->rp;
1378 ed->head = (ed->head&0xF) | ed->tail;
1379 if((ed->ctrl & Ediso) == 0)
1380 ed->tds = pa2ptr(ed->tail);
1381 }
1382
1383 static int
epiodone(void * a)1384 epiodone(void *a)
1385 {
1386 Qio *io;
1387
1388 io = a;
1389 return io->state != Qrun;
1390 }
1391
1392 static void
epiowait(Ctlr * ctlr,Qio * io,int tmout,ulong)1393 epiowait(Ctlr *ctlr, Qio *io, int tmout, ulong)
1394 {
1395 Ed *ed;
1396 int timedout;
1397
1398 ed = io->ed;
1399 if(0)ddqprint("ohci io %#p sleep on ed %#p state %s\n",
1400 io, ed, iosname[io->state]);
1401 timedout = 0;
1402 if(waserror()){
1403 dqprint("ohci io %#p ed %#p timed out\n", io, ed);
1404 timedout++;
1405 }else{
1406 if(tmout == 0)
1407 sleep(io, epiodone, io);
1408 else
1409 tsleep(io, epiodone, io, tmout);
1410 poperror();
1411 }
1412 ilock(ctlr);
1413 if(io->state == Qrun)
1414 timedout = 1;
1415 else if(io->state != Qdone && io->state != Qclose)
1416 panic("epio: ed not done and not closed");
1417 if(timedout){
1418 aborttds(io);
1419 io->err = "request timed out";
1420 iunlock(ctlr);
1421 if(!waserror()){
1422 tsleep(&up->sleep, return0, 0, Abortdelay);
1423 poperror();
1424 }
1425 ilock(ctlr);
1426 }
1427 if(io->state != Qclose)
1428 io->state = Qidle;
1429 iunlock(ctlr);
1430 }
1431
1432 /*
1433 * Non iso I/O.
1434 * To make it work for control transfers, the caller may
1435 * lock the Qio for the entire control transfer.
1436 */
1437 static long
epio(Ep * ep,Qio * io,void * a,long count,int mustlock)1438 epio(Ep *ep, Qio *io, void *a, long count, int mustlock)
1439 {
1440 Ed *ed;
1441 Ctlr *ctlr;
1442 char buf[80];
1443 char *err;
1444 uchar *c;
1445 Td *td, *ltd, *ntd, *td0;
1446 int last, ntds, tmout;
1447 long tot, n;
1448 ulong load;
1449
1450 ed = io->ed;
1451 ctlr = ep->hp->aux;
1452 io->debug = ep->debug;
1453 tmout = ep->tmout;
1454 ddeprint("ohci: %s ep%d.%d io %#p count %ld\n",
1455 io->tok == Tdtokin ? "in" : "out",
1456 ep->dev->nb, ep->nb, io, count);
1457 if((debug > 1 || ep->debug > 1) && io->tok != Tdtokin){
1458 seprintdata(buf, buf+sizeof(buf), a, count);
1459 print("\t%s\n", buf);
1460 }
1461 if(mustlock){
1462 qlock(io);
1463 if(waserror()){
1464 qunlock(io);
1465 nexterror();
1466 }
1467 }
1468 io->err = nil;
1469 ilock(ctlr);
1470 if(io->state == Qclose){ /* Tds released by cancelio */
1471 iunlock(ctlr);
1472 error(io->err ? io->err : Eio);
1473 }
1474 if(io->state != Qidle)
1475 panic("epio: qio not idle");
1476 io->state = Qinstall;
1477
1478 c = a;
1479 ltd = td0 = ed->tds;
1480 load = tot = 0;
1481 do{
1482 n = 2*BY2PG;
1483 if(count-tot < n)
1484 n = count-tot;
1485 if(c != nil && io->tok != Tdtokin)
1486 td = epgettd(ep, io, <d, 0, c+tot, n);
1487 else
1488 td = epgettd(ep, io, <d, 0, nil, n);
1489 tot += n;
1490 load += ep->load;
1491 }while(tot < count);
1492 if(td0 == nil || ltd == nil || td0 == ltd)
1493 panic("epio: no td");
1494 td->last = 1;
1495 if(debug > 2 || ep->debug > 2)
1496 dumptds(td0, "put td", ep->ttype == Tiso);
1497 iunlock(ctlr);
1498
1499 ilock(ctlr);
1500 if(io->state != Qclose){
1501 io->iotime = TK2MS(MACHP(0)->ticks);
1502 io->state = Qrun;
1503 ed->tail = ptr2pa(ltd);
1504 if(ep->ttype == Tctl)
1505 ctlr->ohci->cmdsts |= Sclf;
1506 else if(ep->ttype == Tbulk)
1507 ctlr->ohci->cmdsts |= Sblf;
1508 }
1509 iunlock(ctlr);
1510
1511 epiowait(ctlr, io, tmout, load);
1512 ilock(ctlr);
1513 if(debug > 1 || ep->debug > 1)
1514 dumptds(td0, "got td", 0);
1515 iunlock(ctlr);
1516
1517 tot = 0;
1518 c = a;
1519 ntds = last = 0;
1520 for(td = td0; td != ltd; td = ntd){
1521 ntds++;
1522 /*
1523 * If the Td is flagged as last we must
1524 * ignore any following Td. The block may
1525 * seem to have bytes but interrupt has not seen
1526 * those Tds through the done queue, and they are void.
1527 */
1528 if(last == 0 && tderrs(td) == Tdok){
1529 n = BLEN(td->bp);
1530 tot += n;
1531 if(c != nil && tdtok(td) == Tdtokin && n > 0){
1532 memmove(c, td->bp->rp, n);
1533 c += n;
1534 }
1535 }
1536 last |= td->last;
1537 ntd = td->next;
1538 tdfree(td);
1539 }
1540 if(edtoggle(ed) == 0)
1541 io->toggle = Tddata0;
1542 else
1543 io->toggle = Tddata1;
1544
1545 err = io->err;
1546 if(mustlock){
1547 qunlock(io);
1548 poperror();
1549 }
1550 ddeprint("ohci: io %#p: %d tds: return %ld err '%s'\n\n",
1551 io, ntds, tot, err);
1552 if(err != nil)
1553 error(err);
1554 if(tot < 0)
1555 error(Eio);
1556 return tot;
1557 }
1558
1559 /*
1560 * halt condition was cleared on the endpoint. update our toggles.
1561 */
1562 static void
clrhalt(Ep * ep)1563 clrhalt(Ep *ep)
1564 {
1565 Qio *io;
1566
1567 ep->clrhalt = 0;
1568 switch(ep->ttype){
1569 case Tbulk:
1570 case Tintr:
1571 io = ep->aux;
1572 if(ep->mode != OREAD){
1573 qlock(&io[OWRITE]);
1574 io[OWRITE].toggle = Tddata0;
1575 deprint("ep clrhalt for io %#p\n", io+OWRITE);
1576 qunlock(&io[OWRITE]);
1577 }
1578 if(ep->mode != OWRITE){
1579 qlock(&io[OREAD]);
1580 io[OREAD].toggle = Tddata0;
1581 deprint("ep clrhalt for io %#p\n", io+OREAD);
1582 qunlock(&io[OREAD]);
1583 }
1584 break;
1585 }
1586 }
1587
1588 static long
epread(Ep * ep,void * a,long count)1589 epread(Ep *ep, void *a, long count)
1590 {
1591 Ctlio *cio;
1592 Qio *io;
1593 char buf[80];
1594 ulong delta;
1595
1596 if(ep->aux == nil)
1597 panic("epread: not open");
1598
1599 switch(ep->ttype){
1600 case Tctl:
1601 cio = ep->aux;
1602 qlock(cio);
1603 if(waserror()){
1604 qunlock(cio);
1605 nexterror();
1606 }
1607 ddeprint("epread ctl ndata %d\n", cio->ndata);
1608 if(cio->ndata < 0)
1609 error("request expected");
1610 else if(cio->ndata == 0){
1611 cio->ndata = -1;
1612 count = 0;
1613 }else{
1614 if(count > cio->ndata)
1615 count = cio->ndata;
1616 if(count > 0)
1617 memmove(a, cio->data, count);
1618 /* BUG for big transfers */
1619 free(cio->data);
1620 cio->data = nil;
1621 cio->ndata = 0; /* signal EOF next time */
1622 }
1623 qunlock(cio);
1624 poperror();
1625 if(debug>1 || ep->debug){
1626 seprintdata(buf, buf+sizeof(buf), a, count);
1627 print("epread: %s\n", buf);
1628 }
1629 return count;
1630 case Tbulk:
1631 io = ep->aux;
1632 if(ep->clrhalt)
1633 clrhalt(ep);
1634 return epio(ep, &io[OREAD], a, count, 1);
1635 case Tintr:
1636 io = ep->aux;
1637 delta = TK2MS(MACHP(0)->ticks) - io[OREAD].iotime + 1;
1638 if(delta < ep->pollival / 2)
1639 tsleep(&up->sleep, return0, 0, ep->pollival/2 - delta);
1640 if(ep->clrhalt)
1641 clrhalt(ep);
1642 return epio(ep, &io[OREAD], a, count, 1);
1643 case Tiso:
1644 panic("ohci: iso read not implemented");
1645 break;
1646 default:
1647 panic("epread: bad ep ttype %d", ep->ttype);
1648 }
1649 return -1;
1650 }
1651
1652 /*
1653 * Control transfers are one setup write (data0)
1654 * plus zero or more reads/writes (data1, data0, ...)
1655 * plus a final write/read with data1 to ack.
1656 * For both host to device and device to host we perform
1657 * the entire transfer when the user writes the request,
1658 * and keep any data read from the device for a later read.
1659 * We call epio three times instead of placing all Tds at
1660 * the same time because doing so leads to crc/tmout errors
1661 * for some devices.
1662 * Upon errors on the data phase we must still run the status
1663 * phase or the device may cease responding in the future.
1664 */
1665 static long
epctlio(Ep * ep,Ctlio * cio,void * a,long count)1666 epctlio(Ep *ep, Ctlio *cio, void *a, long count)
1667 {
1668 uchar *c;
1669 long len;
1670
1671 ddeprint("epctlio: cio %#p ep%d.%d count %ld\n",
1672 cio, ep->dev->nb, ep->nb, count);
1673 if(count < Rsetuplen)
1674 error("short usb command");
1675 qlock(cio);
1676 free(cio->data);
1677 cio->data = nil;
1678 cio->ndata = 0;
1679 if(waserror()){
1680 qunlock(cio);
1681 free(cio->data);
1682 cio->data = nil;
1683 cio->ndata = 0;
1684 nexterror();
1685 }
1686
1687 /* set the address if unset and out of configuration state */
1688 if(ep->dev->state != Dconfig && ep->dev->state != Dreset)
1689 if(cio->usbid == 0){
1690 cio->usbid = (ep->nb<<7)|(ep->dev->nb & Devmax);
1691 edsetaddr(cio->ed, cio->usbid);
1692 }
1693 /* adjust maxpkt if the user has learned a different one */
1694 if(edmaxpkt(cio->ed) != ep->maxpkt)
1695 edsetmaxpkt(cio->ed, ep->maxpkt);
1696 c = a;
1697 cio->tok = Tdtoksetup;
1698 cio->toggle = Tddata0;
1699 if(epio(ep, cio, a, Rsetuplen, 0) < Rsetuplen)
1700 error(Eio);
1701
1702 a = c + Rsetuplen;
1703 count -= Rsetuplen;
1704
1705 cio->toggle = Tddata1;
1706 if(c[Rtype] & Rd2h){
1707 cio->tok = Tdtokin;
1708 len = GET2(c+Rcount);
1709 if(len <= 0)
1710 error("bad length in d2h request");
1711 if(len > Maxctllen)
1712 error("d2h data too large to fit in ohci");
1713 a = cio->data = smalloc(len+1);
1714 }else{
1715 cio->tok = Tdtokout;
1716 len = count;
1717 }
1718 if(len > 0)
1719 if(waserror())
1720 len = -1;
1721 else{
1722 len = epio(ep, cio, a, len, 0);
1723 poperror();
1724 }
1725 if(c[Rtype] & Rd2h){
1726 count = Rsetuplen;
1727 cio->ndata = len;
1728 cio->tok = Tdtokout;
1729 }else{
1730 if(len < 0)
1731 count = -1;
1732 else
1733 count = Rsetuplen + len;
1734 cio->tok = Tdtokin;
1735 }
1736 cio->toggle = Tddata1;
1737 epio(ep, cio, nil, 0, 0);
1738 qunlock(cio);
1739 poperror();
1740 ddeprint("epctlio cio %#p return %ld\n", cio, count);
1741 return count;
1742 }
1743
1744 /*
1745 * Put new samples in the dummy Td.
1746 * BUG: This does only a transfer per Td. We could do up to 8.
1747 */
1748 static long
putsamples(Ctlr * ctlr,Ep * ep,Isoio * iso,uchar * b,long count)1749 putsamples(Ctlr *ctlr, Ep *ep, Isoio *iso, uchar *b, long count)
1750 {
1751 Td *td;
1752 ulong n;
1753
1754 td = pa2ptr(iso->ed->tail);
1755 n = count;
1756 if(n > td->nbytes - BLEN(td->bp))
1757 n = td->nbytes - BLEN(td->bp);
1758 assert(td->bp->wp + n <= td->bp->lim);
1759 memmove(td->bp->wp, b, n);
1760 td->bp->wp += n;
1761 if(BLEN(td->bp) == td->nbytes){ /* full Td: activate it */
1762 ilock(ctlr);
1763 isoadvance(ep, iso, td);
1764 iunlock(ctlr);
1765 }
1766 return n;
1767 }
1768
1769 static long
episowrite(Ep * ep,void * a,long count)1770 episowrite(Ep *ep, void *a, long count)
1771 {
1772 long tot, nw;
1773 char *err;
1774 uchar *b;
1775 Ctlr *ctlr;
1776 Isoio *iso;
1777
1778 ctlr = ep->hp->aux;
1779 iso = ep->aux;
1780 iso->debug = ep->debug;
1781
1782 qlock(iso);
1783 if(waserror()){
1784 qunlock(iso);
1785 nexterror();
1786 }
1787 diprint("ohci: episowrite: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
1788 ilock(ctlr);
1789 if(iso->state == Qclose){
1790 iunlock(ctlr);
1791 error(iso->err ? iso->err : Eio);
1792 }
1793 iso->state = Qrun;
1794 b = a;
1795 for(tot = 0; tot < count; tot += nw){
1796 while(isocanwrite(iso) == 0){
1797 iunlock(ctlr);
1798 diprint("ohci: episowrite: %#p sleep\n", iso);
1799 if(waserror()){
1800 if(iso->err == nil)
1801 iso->err = "I/O timed out";
1802 ilock(ctlr);
1803 break;
1804 }
1805 tsleep(iso, isocanwrite, iso, ep->tmout);
1806 poperror();
1807 ilock(ctlr);
1808 }
1809 err = iso->err;
1810 iso->err = nil;
1811 if(iso->state == Qclose || err != nil){
1812 iunlock(ctlr);
1813 error(err ? err : Eio);
1814 }
1815 if(iso->state != Qrun)
1816 panic("episowrite: iso not running");
1817 iunlock(ctlr); /* We could page fault here */
1818 nw = putsamples(ctlr, ep, iso, b+tot, count-tot);
1819 ilock(ctlr);
1820 }
1821 if(iso->state != Qclose)
1822 iso->state = Qdone;
1823 iunlock(ctlr);
1824 err = iso->err; /* in case it failed early */
1825 iso->err = nil;
1826 qunlock(iso);
1827 poperror();
1828 if(err != nil)
1829 error(err);
1830 diprint("ohci: episowrite: %#p %ld bytes\n", iso, tot);
1831 return tot;
1832 }
1833
1834 static long
epwrite(Ep * ep,void * a,long count)1835 epwrite(Ep *ep, void *a, long count)
1836 {
1837 Qio *io;
1838 Ctlio *cio;
1839 ulong delta;
1840 uchar *b;
1841 long tot, nw;
1842
1843 if(ep->aux == nil)
1844 panic("ohci: epwrite: not open");
1845 switch(ep->ttype){
1846 case Tctl:
1847 cio = ep->aux;
1848 return epctlio(ep, cio, a, count);
1849 case Tbulk:
1850 io = ep->aux;
1851 if(ep->clrhalt)
1852 clrhalt(ep);
1853 /*
1854 * Put at most Tdatomic Tds (512 bytes) at a time.
1855 * Otherwise some devices produce babble errors.
1856 */
1857 b = a;
1858 assert(a != nil);
1859 for(tot = 0; tot < count ; tot += nw){
1860 nw = count - tot;
1861 if(nw > Tdatomic * ep->maxpkt)
1862 nw = Tdatomic * ep->maxpkt;
1863 nw = epio(ep, &io[OWRITE], b+tot, nw, 1);
1864 }
1865 return tot;
1866 case Tintr:
1867 io = ep->aux;
1868 delta = TK2MS(MACHP(0)->ticks) - io[OWRITE].iotime + 1;
1869 if(delta < ep->pollival)
1870 tsleep(&up->sleep, return0, 0, ep->pollival - delta);
1871 if(ep->clrhalt)
1872 clrhalt(ep);
1873 return epio(ep, &io[OWRITE], a, count, 1);
1874 case Tiso:
1875 return episowrite(ep, a, count);
1876 default:
1877 panic("ohci: epwrite: bad ep ttype %d", ep->ttype);
1878 }
1879 return -1;
1880 }
1881
1882 static Ed*
newed(Ctlr * ctlr,Ep * ep,Qio * io,char *)1883 newed(Ctlr *ctlr, Ep *ep, Qio *io, char *)
1884 {
1885 Ed *ed;
1886 Td *td;
1887
1888 ed = io->ed = edalloc(); /* no errors raised here, really */
1889 td = tdalloc();
1890 td->ep = ep;
1891 td->io = io;
1892 ed->tail = ptr2pa(td);
1893 ed->head = ptr2pa(td);
1894 ed->tds = td;
1895 ed->ep = ep;
1896 ed->ctrl = (ep->maxpkt & Edmpsmask) << Edmpsshift;
1897 if(ep->ttype == Tiso)
1898 ed->ctrl |= Ediso;
1899 if(waserror()){
1900 edfree(ed);
1901 io->ed = nil;
1902 nexterror();
1903 }
1904 /* For setup endpoints we start with the config address */
1905 if(ep->ttype != Tctl)
1906 edsetaddr(io->ed, io->usbid);
1907 if(ep->dev->speed == Lowspeed)
1908 ed->ctrl |= Edlow;
1909 switch(io->tok){
1910 case Tdtokin:
1911 ed->ctrl |= Edin;
1912 break;
1913 case Tdtokout:
1914 ed->ctrl |= Edout;
1915 break;
1916 default:
1917 ed->ctrl |= Edtddir; /* Td will say */
1918 break;
1919 }
1920
1921 switch(ep->ttype){
1922 case Tctl:
1923 ilock(ctlr);
1924 edlinked(ed, ctlhd(ctlr));
1925 setctlhd(ctlr, ed);
1926 iunlock(ctlr);
1927 break;
1928 case Tbulk:
1929 ilock(ctlr);
1930 edlinked(ed, bulkhd(ctlr));
1931 setbulkhd(ctlr, ed);
1932 iunlock(ctlr);
1933 break;
1934 case Tintr:
1935 case Tiso:
1936 ilock(ctlr);
1937 schedq(ctlr, io, ep->pollival);
1938 iunlock(ctlr);
1939 break;
1940 default:
1941 panic("ohci: newed: bad ttype");
1942 }
1943 poperror();
1944 return ed;
1945 }
1946
1947 static void
isoopen(Ctlr * ctlr,Ep * ep)1948 isoopen(Ctlr *ctlr, Ep *ep)
1949 {
1950 Td *td, *edtds;
1951 Isoio *iso;
1952 int i;
1953
1954 iso = ep->aux;
1955 iso->usbid = (ep->nb<<7)|(ep->dev->nb & Devmax);
1956 iso->bw = ep->hz * ep->samplesz; /* bytes/sec */
1957 if(ep->mode != OWRITE){
1958 print("ohci: bug: iso input streams not implemented\n");
1959 error("ohci iso input streams not implemented");
1960 }else
1961 iso->tok = Tdtokout;
1962
1963 iso->left = 0;
1964 iso->nerrs = 0;
1965 iso->frno = TRUNC(ctlr->ohci->fmnumber + 10, Ntdframes);
1966 iso->nframes = 1000 / ep->pollival;
1967 if(iso->nframes < 10){
1968 print("ohci: isoopen: less than 10 frames; using 10.\n");
1969 iso->nframes = 10;
1970 }
1971 iso->navail = iso->nframes;
1972 iso->atds = edtds = nil;
1973 for(i = 0; i < iso->nframes-1; i++){ /* -1 for dummy */
1974 td = tdalloc();
1975 td->ep = ep;
1976 td->io = iso;
1977 td->bp = allocb(ep->maxpkt);
1978 td->anext = iso->atds; /* link as avail */
1979 iso->atds = td;
1980 td->next = edtds;
1981 edtds = td;
1982 }
1983 newed(ctlr, ep, iso, "iso"); /* allocates a dummy td */
1984 iso->ed->tds->bp = allocb(ep->maxpkt); /* but not its block */
1985 iso->ed->tds->next = edtds;
1986 isodtdinit(ep, iso, iso->ed->tds);
1987 }
1988
1989 /*
1990 * Allocate the endpoint and set it up for I/O
1991 * in the controller. This must follow what's said
1992 * in Ep regarding configuration, including perhaps
1993 * the saved toggles (saved on a previous close of
1994 * the endpoint data file by epclose).
1995 */
1996 static void
epopen(Ep * ep)1997 epopen(Ep *ep)
1998 {
1999 Ctlr *ctlr;
2000 Qio *io;
2001 Ctlio *cio;
2002 ulong usbid;
2003
2004 ctlr = ep->hp->aux;
2005 deprint("ohci: epopen ep%d.%d\n", ep->dev->nb, ep->nb);
2006 if(ep->aux != nil)
2007 panic("ohci: epopen called with open ep");
2008 if(waserror()){
2009 free(ep->aux);
2010 ep->aux = nil;
2011 nexterror();
2012 }
2013 switch(ep->ttype){
2014 case Tnone:
2015 error("endpoint not configured");
2016 case Tiso:
2017 ep->aux = smalloc(sizeof(Isoio));
2018 isoopen(ctlr, ep);
2019 break;
2020 case Tctl:
2021 cio = ep->aux = smalloc(sizeof(Ctlio));
2022 cio->debug = ep->debug;
2023 cio->ndata = -1;
2024 cio->data = nil;
2025 cio->tok = -1; /* invalid; Tds will say */
2026 if(ep->dev->isroot != 0 && ep->nb == 0) /* root hub */
2027 break;
2028 newed(ctlr, ep, cio, "epc");
2029 break;
2030 case Tbulk:
2031 ep->pollival = 1; /* assume this; doesn't really matter */
2032 /* and fall... */
2033 case Tintr:
2034 io = ep->aux = smalloc(sizeof(Qio)*2);
2035 io[OREAD].debug = io[OWRITE].debug = ep->debug;
2036 usbid = (ep->nb<<7)|(ep->dev->nb & Devmax);
2037 if(ep->mode != OREAD){
2038 if(ep->toggle[OWRITE] != 0)
2039 io[OWRITE].toggle = Tddata1;
2040 else
2041 io[OWRITE].toggle = Tddata0;
2042 io[OWRITE].tok = Tdtokout;
2043 io[OWRITE].usbid = usbid;
2044 io[OWRITE].bw = ep->maxpkt*1000/ep->pollival; /* bytes/s */
2045 newed(ctlr, ep, io+OWRITE, "epw");
2046 }
2047 if(ep->mode != OWRITE){
2048 if(ep->toggle[OREAD] != 0)
2049 io[OREAD].toggle = Tddata1;
2050 else
2051 io[OREAD].toggle = Tddata0;
2052 io[OREAD].tok = Tdtokin;
2053 io[OREAD].usbid = usbid;
2054 io[OREAD].bw = ep->maxpkt*1000/ep->pollival; /* bytes/s */
2055 newed(ctlr, ep, io+OREAD, "epr");
2056 }
2057 break;
2058 }
2059 deprint("ohci: epopen done:\n");
2060 if(debug || ep->debug)
2061 dump(ep->hp);
2062 poperror();
2063 }
2064
2065 static void
cancelio(Ep * ep,Qio * io)2066 cancelio(Ep *ep, Qio *io)
2067 {
2068 Ed *ed;
2069 Ctlr *ctlr;
2070
2071 ctlr = ep->hp->aux;
2072
2073 ilock(ctlr);
2074 if(io == nil || io->state == Qclose){
2075 assert(io == nil || io->ed == nil);
2076 iunlock(ctlr);
2077 return;
2078 }
2079 ed = io->ed;
2080 io->state = Qclose;
2081 io->err = Eio;
2082 aborttds(io);
2083 iunlock(ctlr);
2084 if(!waserror()){
2085 tsleep(&up->sleep, return0, 0, Abortdelay);
2086 poperror();
2087 }
2088
2089 wakeup(io);
2090 qlock(io);
2091 /* wait for epio if running */
2092 qunlock(io);
2093
2094 ilock(ctlr);
2095 switch(ep->ttype){
2096 case Tctl:
2097 unlinkctl(ctlr, ed);
2098 break;
2099 case Tbulk:
2100 unlinkbulk(ctlr, ed);
2101 break;
2102 case Tintr:
2103 case Tiso:
2104 unschedq(ctlr, io);
2105 break;
2106 default:
2107 panic("ohci cancelio: bad ttype");
2108 }
2109 iunlock(ctlr);
2110 edfree(io->ed);
2111 io->ed = nil;
2112 }
2113
2114 static void
epclose(Ep * ep)2115 epclose(Ep *ep)
2116 {
2117 Ctlio *cio;
2118 Isoio *iso;
2119 Qio *io;
2120
2121 deprint("ohci: epclose ep%d.%d\n", ep->dev->nb, ep->nb);
2122 if(ep->aux == nil)
2123 panic("ohci: epclose called with closed ep");
2124 switch(ep->ttype){
2125 case Tctl:
2126 cio = ep->aux;
2127 cancelio(ep, cio);
2128 free(cio->data);
2129 cio->data = nil;
2130 break;
2131 case Tbulk:
2132 case Tintr:
2133 io = ep->aux;
2134 if(ep->mode != OWRITE){
2135 cancelio(ep, &io[OREAD]);
2136 if(io[OREAD].toggle == Tddata1)
2137 ep->toggle[OREAD] = 1;
2138 }
2139 if(ep->mode != OREAD){
2140 cancelio(ep, &io[OWRITE]);
2141 if(io[OWRITE].toggle == Tddata1)
2142 ep->toggle[OWRITE] = 1;
2143 }
2144 break;
2145 case Tiso:
2146 iso = ep->aux;
2147 cancelio(ep, iso);
2148 break;
2149 default:
2150 panic("epclose: bad ttype %d", ep->ttype);
2151 }
2152
2153 deprint("ohci: epclose ep%d.%d: done\n", ep->dev->nb, ep->nb);
2154 free(ep->aux);
2155 ep->aux = nil;
2156 }
2157
2158 static int
portreset(Hci * hp,int port,int on)2159 portreset(Hci *hp, int port, int on)
2160 {
2161 Ctlr *ctlr;
2162 Ohci *ohci;
2163
2164 if(on == 0)
2165 return 0;
2166
2167 ctlr = hp->aux;
2168 qlock(&ctlr->resetl);
2169 if(waserror()){
2170 qunlock(&ctlr->resetl);
2171 nexterror();
2172 }
2173 ilock(ctlr);
2174 ohci = ctlr->ohci;
2175 ohci->rhportsts[port - 1] = Spp;
2176 if((ohci->rhportsts[port - 1] & Ccs) == 0){
2177 iunlock(ctlr);
2178 error("port not connected");
2179 }
2180 ohci->rhportsts[port - 1] = Spr;
2181 while((ohci->rhportsts[port - 1] & Prsc) == 0){
2182 iunlock(ctlr);
2183 dprint("ohci: portreset, wait for reset complete\n");
2184 ilock(ctlr);
2185 }
2186 ohci->rhportsts[port - 1] = Prsc;
2187 iunlock(ctlr);
2188 poperror();
2189 qunlock(&ctlr->resetl);
2190 return 0;
2191 }
2192
2193 static int
portenable(Hci * hp,int port,int on)2194 portenable(Hci *hp, int port, int on)
2195 {
2196 Ctlr *ctlr;
2197
2198 ctlr = hp->aux;
2199 dprint("ohci: %#p port %d enable=%d\n", ctlr->ohci, port, on);
2200 qlock(&ctlr->resetl);
2201 if(waserror()){
2202 qunlock(&ctlr->resetl);
2203 nexterror();
2204 }
2205 ilock(ctlr);
2206 if(on)
2207 ctlr->ohci->rhportsts[port - 1] = Spe | Spp;
2208 else
2209 ctlr->ohci->rhportsts[port - 1] = Cpe;
2210 iunlock(ctlr);
2211 tsleep(&up->sleep, return0, 0, Enabledelay);
2212 poperror();
2213 qunlock(&ctlr->resetl);
2214 return 0;
2215 }
2216
2217 static int
portstatus(Hci * hp,int port)2218 portstatus(Hci *hp, int port)
2219 {
2220 int v;
2221 Ctlr *ub;
2222 ulong ohcistatus;
2223
2224 /*
2225 * We must return status bits as a
2226 * get port status hub request would do.
2227 */
2228 ub = hp->aux;
2229 ohcistatus = ub->ohci->rhportsts[port - 1];
2230 v = 0;
2231 if(ohcistatus & Ccs)
2232 v |= HPpresent;
2233 if(ohcistatus & Pes)
2234 v |= HPenable;
2235 if(ohcistatus & Pss)
2236 v |= HPsuspend;
2237 if(ohcistatus & Prs)
2238 v |= HPreset;
2239 else {
2240 /* port is not in reset; these potential writes are ok */
2241 if(ohcistatus & Csc){
2242 v |= HPstatuschg;
2243 ub->ohci->rhportsts[port - 1] = Csc;
2244 }
2245 if(ohcistatus & Pesc){
2246 v |= HPchange;
2247 ub->ohci->rhportsts[port - 1] = Pesc;
2248 }
2249 }
2250 if(ohcistatus & Lsda)
2251 v |= HPslow;
2252 if(v & (HPstatuschg|HPchange))
2253 ddprint("ohci port %d sts %#ulx hub sts %#x\n", port, ohcistatus, v);
2254 return v;
2255 }
2256
2257 static void
dumpohci(Ctlr * ctlr)2258 dumpohci(Ctlr *ctlr)
2259 {
2260 int i;
2261 ulong *ohci;
2262
2263 ohci = &ctlr->ohci->revision;
2264 print("ohci registers: \n");
2265 for(i = 0; i < sizeof(Ohci)/sizeof(ulong); i++)
2266 if(i < 3 || ohci[i] != 0)
2267 print("\t[%#2.2x]\t%#8.8ulx\n", i * 4, ohci[i]);
2268 print("\n");
2269 }
2270
2271 static void
init(Hci * hp)2272 init(Hci *hp)
2273 {
2274 Ctlr *ctlr;
2275 Ohci *ohci;
2276 int i;
2277 ulong ival, ctrl, fmi;
2278
2279 ctlr = hp->aux;
2280 dprint("ohci %#p init\n", ctlr->ohci);
2281 ohci = ctlr->ohci;
2282
2283 fmi = ctlr->ohci->fminterval;
2284 ctlr->ohci->cmdsts = Shcr; /* reset the block */
2285 while(ctlr->ohci->cmdsts & Shcr)
2286 delay(1); /* wait till reset complete, Ohci says 10us max. */
2287 ctlr->ohci->fminterval = fmi;
2288
2289 /*
2290 * now that soft reset is done we are in suspend state.
2291 * Setup registers which take in suspend state
2292 * (will only be here for 2ms).
2293 */
2294
2295 ctlr->ohci->hcca = ptr2pa(ctlr->hcca);
2296 setctlhd(ctlr, nil);
2297 ctlr->ohci->ctlcurred = 0;
2298 setbulkhd(ctlr, nil);
2299 ctlr->ohci->bulkcurred = 0;
2300
2301 ohci->intrenable = Mie | Wdh | Ue;
2302 ohci->control |= Ccle | Cble | Cple | Cie | Cfsoper;
2303
2304 /* set frame after operational */
2305 ohci->rhdesca = Nps; /* no power switching */
2306 if(ohci->rhdesca & Nps){
2307 dprint("ohci: ports are not power switched\n");
2308 }else{
2309 dprint("ohci: ports are power switched\n");
2310 ohci->rhdesca &= ~Psm;
2311 ohci->rhsts &= ~Lpsc;
2312 }
2313 for(i = 0; i < ctlr->nports; i++) /* paranoia */
2314 ohci->rhportsts[i] = 0; /* this has no effect */
2315 delay(50);
2316
2317 for(i = 0; i < ctlr->nports; i++){
2318 ohci->rhportsts[i] = Spp;
2319 if((ohci->rhportsts[i] & Ccs) != 0)
2320 ohci->rhportsts[i] |= Spr;
2321 }
2322 delay(100);
2323
2324 ctrl = ohci->control;
2325 if((ctrl & Cfsmask) != Cfsoper){
2326 ctrl = (ctrl & ~Cfsmask) | Cfsoper;
2327 ohci->control = ctrl;
2328 ohci->rhsts = Lpsc;
2329 }
2330 ival = ohci->fminterval & ~(Fmaxpktmask << Fmaxpktshift);
2331 ohci->fminterval = ival | (5120 << Fmaxpktshift);
2332
2333 if(debug > 1)
2334 dumpohci(ctlr);
2335 }
2336
2337 static void
scanpci(void)2338 scanpci(void)
2339 {
2340 ulong mem;
2341 Ctlr *ctlr;
2342 Pcidev *p;
2343 int i;
2344 static int already = 0;
2345
2346 if(already)
2347 return;
2348 already = 1;
2349 p = nil;
2350 while(p = pcimatch(p, 0, 0)) {
2351 /*
2352 * Find Ohci controllers (Programming Interface = 0x10).
2353 */
2354 if(p->ccrb != Pcibcserial || p->ccru != Pciscusb ||
2355 p->ccrp != 0x10)
2356 continue;
2357 mem = p->mem[0].bar & ~0x0F;
2358 dprint("ohci: %x/%x port 0x%lux size 0x%x irq %d\n",
2359 p->vid, p->did, mem, p->mem[0].size, p->intl);
2360 if(mem == 0){
2361 print("ohci: failed to map registers\n");
2362 continue;
2363 }
2364 if(p->intl == 0xFF || p->intl == 0) {
2365 print("ohci: no irq assigned for port %#lux\n", mem);
2366 continue;
2367 }
2368
2369 ctlr = malloc(sizeof(Ctlr));
2370 if (ctlr == nil)
2371 panic("ohci: out of memory");
2372 ctlr->pcidev = p;
2373 ctlr->ohci = vmap(mem, p->mem[0].size);
2374 dprint("scanpci: ctlr %#p, ohci %#p\n", ctlr, ctlr->ohci);
2375 pcisetbme(p);
2376 pcisetpms(p, 0);
2377 for(i = 0; i < Nhcis; i++)
2378 if(ctlrs[i] == nil){
2379 ctlrs[i] = ctlr;
2380 break;
2381 }
2382 if(i == Nhcis)
2383 print("ohci: bug: no more controllers\n");
2384 }
2385 }
2386
2387 static void
usbdebug(Hci *,int d)2388 usbdebug(Hci*, int d)
2389 {
2390 debug = d;
2391 }
2392
2393 /*
2394 * build the periodic scheduling tree:
2395 * framesize must be a multiple of the tree size
2396 */
2397 static void
mkqhtree(Ctlr * ctlr)2398 mkqhtree(Ctlr *ctlr)
2399 {
2400 int i, n, d, o, leaf0, depth;
2401 Ed **tree;
2402 Qtree *qt;
2403
2404 depth = flog2(32);
2405 n = (1 << (depth+1)) - 1;
2406 qt = mallocz(sizeof(*qt), 1);
2407 if(qt == nil)
2408 panic("usb: can't allocate scheduling tree");
2409 qt->nel = n;
2410 qt->depth = depth;
2411 qt->bw = mallocz(n * sizeof(qt->bw), 1);
2412 qt->root = tree = mallocz(n * sizeof(Ed *), 1);
2413 if(qt->bw == nil || qt->root == nil)
2414 panic("usb: can't allocate scheduling tree");
2415 for(i = 0; i < n; i++){
2416 if((tree[i] = edalloc()) == nil)
2417 panic("mkqhtree");
2418 tree[i]->ctrl = (8 << Edmpsshift); /* not needed */
2419 tree[i]->ctrl |= Edskip;
2420
2421 if(i > 0)
2422 edlinked(tree[i], tree[(i-1)/2]);
2423 else
2424 edlinked(tree[i], nil);
2425 }
2426 ctlr->ntree = i;
2427 dprint("ohci: tree: %d endpoints allocated\n", i);
2428
2429 /* distribute leaves evenly round the frame list */
2430 leaf0 = n / 2;
2431 for(i = 0; i < 32; i++){
2432 o = 0;
2433 for(d = 0; d < depth; d++){
2434 o <<= 1;
2435 if(i & (1 << d))
2436 o |= 1;
2437 }
2438 if(leaf0 + o >= n){
2439 print("leaf0=%d o=%d i=%d n=%d\n", leaf0, o, i, n);
2440 break;
2441 }
2442 ctlr->hcca->intrtable[i] = ptr2pa(tree[leaf0 + o]);
2443 }
2444 ctlr->tree = qt;
2445 }
2446
2447 static void
ohcimeminit(Ctlr * ctlr)2448 ohcimeminit(Ctlr *ctlr)
2449 {
2450 Hcca *hcca;
2451
2452 edfree(edalloc()); /* allocate pools now */
2453 tdfree(tdalloc());
2454
2455 hcca = xspanalloc(sizeof(Hcca), 256, 0);
2456 if(hcca == nil)
2457 panic("usbhreset: no memory for Hcca");
2458 memset(hcca, 0, sizeof(*hcca));
2459 ctlr->hcca = hcca;
2460
2461 mkqhtree(ctlr);
2462 }
2463
2464 static void
ohcireset(Ctlr * ctlr)2465 ohcireset(Ctlr *ctlr)
2466 {
2467 ilock(ctlr);
2468 dprint("ohci %#p reset\n", ctlr->ohci);
2469
2470 /*
2471 * usually enter here in reset, wait till its through,
2472 * then do our own so we are on known timing conditions.
2473 * Is this needed?
2474 */
2475 delay(100);
2476 ctlr->ohci->control = 0;
2477 delay(100);
2478
2479 /* legacy support register: turn off lunacy mode */
2480 pcicfgw16(ctlr->pcidev, 0xc0, 0x2000);
2481
2482 iunlock(ctlr);
2483 }
2484
2485 static void
shutdown(Hci * hp)2486 shutdown(Hci *hp)
2487 {
2488 Ctlr *ctlr;
2489
2490 ctlr = hp->aux;
2491
2492 ilock(ctlr);
2493 ctlr->ohci->intrdisable = Mie;
2494 ctlr->ohci->control = 0;
2495 coherence();
2496 delay(100);
2497 iunlock(ctlr);
2498 }
2499
2500 static int
reset(Hci * hp)2501 reset(Hci *hp)
2502 {
2503 int i;
2504 Ctlr *ctlr;
2505 Pcidev *p;
2506 static Lock resetlck;
2507
2508 if(getconf("*nousbohci"))
2509 return -1;
2510 ilock(&resetlck);
2511 scanpci();
2512
2513 /*
2514 * Any adapter matches if no hp->port is supplied,
2515 * otherwise the ports must match.
2516 */
2517 ctlr = nil;
2518 for(i = 0; i < Nhcis && ctlrs[i] != nil; i++){
2519 ctlr = ctlrs[i];
2520 if(ctlr->active == 0)
2521 if(hp->port == 0 || hp->port == (uintptr)ctlr->ohci){
2522 ctlr->active = 1;
2523 break;
2524 }
2525 }
2526 iunlock(&resetlck);
2527 if(ctlrs[i] == nil || i == Nhcis)
2528 return -1;
2529 if(ctlr->ohci->control == ~0)
2530 return -1;
2531
2532
2533 p = ctlr->pcidev;
2534 hp->aux = ctlr;
2535 hp->port = (uintptr)ctlr->ohci;
2536 hp->irq = p->intl;
2537 hp->tbdf = p->tbdf;
2538 ctlr->nports = hp->nports = ctlr->ohci->rhdesca & 0xff;
2539
2540 ohcireset(ctlr);
2541 ohcimeminit(ctlr);
2542
2543 /*
2544 * Linkage to the generic HCI driver.
2545 */
2546 hp->init = init;
2547 hp->dump = dump;
2548 hp->interrupt = interrupt;
2549 hp->epopen = epopen;
2550 hp->epclose = epclose;
2551 hp->epread = epread;
2552 hp->epwrite = epwrite;
2553 hp->seprintep = seprintep;
2554 hp->portenable = portenable;
2555 hp->portreset = portreset;
2556 hp->portstatus = portstatus;
2557 hp->shutdown = shutdown;
2558 hp->debug = usbdebug;
2559 hp->type = "ohci";
2560 return 0;
2561 }
2562
2563 void
usbohcilink(void)2564 usbohcilink(void)
2565 {
2566 addhcitype("ohci", reset);
2567 }
2568