1 /* 2 * Time. 3 * 4 * HZ should divide 1000 evenly, ideally. 5 * 100, 125, 200, 250 and 333 are okay. 6 */ 7 #define HZ 100 /* clock frequency */ 8 #define MS2HZ (1000/HZ) /* millisec per clock tick */ 9 #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */ 10 11 enum { 12 Mhz = 1000 * 1000, 13 }; 14 15 typedef struct Conf Conf; 16 typedef struct Confmem Confmem; 17 typedef struct FPsave FPsave; 18 typedef struct ISAConf ISAConf; 19 typedef struct Label Label; 20 typedef struct Lock Lock; 21 typedef struct Memcache Memcache; 22 typedef struct MMMU MMMU; 23 typedef struct Mach Mach; 24 typedef struct Notsave Notsave; 25 typedef struct Page Page; 26 typedef struct PhysUart PhysUart; 27 typedef struct PMMU PMMU; 28 typedef struct Proc Proc; 29 typedef u32int PTE; 30 typedef struct Uart Uart; 31 typedef struct Ureg Ureg; 32 typedef uvlong Tval; 33 34 #pragma incomplete Ureg 35 36 #define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */ 37 38 /* 39 * parameters for sysproc.c 40 */ 41 #define AOUT_MAGIC (E_MAGIC) 42 43 struct Lock 44 { 45 ulong key; 46 u32int sr; 47 uintptr pc; 48 Proc* p; 49 Mach* m; 50 int isilock; 51 }; 52 53 struct Label 54 { 55 uintptr sp; 56 uintptr pc; 57 }; 58 59 enum { 60 Maxfpregs = 32, /* could be 16 or 32, see Mach.fpnregs */ 61 Nfpctlregs = 16, 62 }; 63 64 /* 65 * emulated or vfp3 floating point 66 */ 67 struct FPsave 68 { 69 ulong status; 70 ulong control; 71 /* 72 * vfp3 with ieee fp regs; uvlong is sufficient for hardware but 73 * each must be able to hold an Internal from fpi.h for sw emulation. 74 */ 75 ulong regs[Maxfpregs][3]; 76 77 int fpstate; 78 uintptr pc; /* of failed fp instr. */ 79 }; 80 81 /* 82 * FPsave.fpstate 83 */ 84 enum 85 { 86 FPinit, 87 FPactive, 88 FPinactive, 89 FPemu, 90 91 /* bits or'd with the state */ 92 FPillegal= 0x100, 93 }; 94 95 struct Confmem 96 { 97 uintptr base; 98 usize npage; 99 uintptr limit; 100 uintptr kbase; 101 uintptr klimit; 102 }; 103 104 struct Conf 105 { 106 ulong nmach; /* processors */ 107 ulong nproc; /* processes */ 108 Confmem mem[1]; /* physical memory */ 109 ulong npage; /* total physical pages of memory */ 110 usize upages; /* user page pool */ 111 ulong copymode; /* 0 is copy on write, 1 is copy on reference */ 112 ulong ialloc; /* max interrupt time allocation in bytes */ 113 ulong pipeqsize; /* size in bytes of pipe queues */ 114 ulong nimage; /* number of page cache image headers */ 115 ulong nswap; /* number of swap pages */ 116 int nswppo; /* max # of pageouts per segment pass */ 117 ulong hz; /* processor cycle freq */ 118 ulong mhz; 119 int monitor; /* flag */ 120 }; 121 122 /* 123 * things saved in the Proc structure during a notify 124 */ 125 struct Notsave { 126 int emptiness; 127 }; 128 129 /* 130 * MMU stuff in Mach. 131 */ 132 struct MMMU 133 { 134 PTE* mmul1; /* l1 for this processor */ 135 int mmul1lo; 136 int mmul1hi; 137 int mmupid; 138 }; 139 140 /* 141 * MMU stuff in proc 142 */ 143 #define NCOLOR 1 /* 1 level cache, don't worry about VCE's */ 144 struct PMMU 145 { 146 Page* mmul2; 147 Page* mmul2cache; /* free mmu pages */ 148 }; 149 150 #include "../port/portdat.h" 151 152 struct Mach 153 { 154 int machno; /* physical id of processor */ 155 uintptr splpc; /* pc of last caller to splhi */ 156 157 Proc* proc; /* current process */ 158 159 MMMU; 160 int flushmmu; /* flush current proc mmu state */ 161 162 ulong ticks; /* of the clock since boot time */ 163 Label sched; /* scheduler wakeup */ 164 Lock alarmlock; /* access to alarm list */ 165 void* alarm; /* alarms bound to this clock */ 166 167 Proc* readied; /* for runproc */ 168 ulong schedticks; /* next forced context switch */ 169 170 int cputype; 171 ulong delayloop; 172 173 /* stats */ 174 int tlbfault; 175 int tlbpurge; 176 int pfault; 177 int cs; 178 int syscall; 179 int load; 180 int intr; 181 uvlong fastclock; /* last sampled value */ 182 ulong spuriousintr; 183 int lastintr; 184 int ilockdepth; 185 Perf perf; /* performance counters */ 186 187 188 int cpumhz; 189 uvlong cpuhz; /* speed of cpu */ 190 uvlong cyclefreq; /* Frequency of user readable cycle counter */ 191 192 /* vfp2 or vfp3 fpu */ 193 int havefp; 194 int havefpvalid; 195 int fpon; 196 int fpconfiged; 197 int fpnregs; 198 ulong fpscr; /* sw copy */ 199 int fppid; /* pid of last fault */ 200 uintptr fppc; /* addr of last fault */ 201 int fpcnt; /* how many consecutive at that addr */ 202 203 /* save areas for exceptions, hold R0-R4 */ 204 u32int sfiq[5]; 205 u32int sirq[5]; 206 u32int sund[5]; 207 u32int sabt[5]; 208 u32int smon[5]; /* probably not needed */ 209 u32int ssys[5]; 210 211 int stack[1]; 212 }; 213 214 /* 215 * Fake kmap. 216 */ 217 typedef void KMap; 218 #define VA(k) ((uintptr)(k)) 219 #define kmap(p) (KMap*)((p)->pa|kseg0) 220 #define kunmap(k) 221 222 struct 223 { 224 Lock; 225 int machs; /* bitmap of active CPUs */ 226 int exiting; /* shutdown */ 227 int ispanic; /* shutdown in response to a panic */ 228 }active; 229 230 extern register Mach* m; /* R10 */ 231 extern register Proc* up; /* R9 */ 232 extern uintptr kseg0; 233 extern Mach* machaddr[MAXMACH]; 234 extern ulong memsize; 235 extern int normalprint; 236 237 /* 238 * a parsed plan9.ini line 239 */ 240 #define NISAOPT 8 241 242 struct ISAConf { 243 char *type; 244 ulong port; 245 int irq; 246 ulong dma; 247 ulong mem; 248 ulong size; 249 ulong freq; 250 251 int nopt; 252 char *opt[NISAOPT]; 253 }; 254 255 #define MACHP(n) (machaddr[n]) 256 257 /* 258 * Horrid. But the alternative is 'defined'. 259 */ 260 #ifdef _DBGC_ 261 #define DBGFLG (dbgflg[_DBGC_]) 262 #else 263 #define DBGFLG (0) 264 #endif /* _DBGC_ */ 265 266 int vflag; 267 extern char dbgflg[256]; 268 269 #define dbgprint print /* for now */ 270 271 /* 272 * hardware info about a device 273 */ 274 typedef struct { 275 ulong port; 276 int size; 277 } Devport; 278 279 struct DevConf 280 { 281 ulong intnum; /* interrupt number */ 282 char *type; /* card type, malloced */ 283 int nports; /* Number of ports */ 284 Devport *ports; /* The ports themselves */ 285 }; 286 287