xref: /plan9/sys/src/9/bcm/arm.s (revision 5d9de2d38d2503efca29e12e0e32036368a7a75f)
1/*
2 * armv6 machine assist, definitions
3 *
4 * loader uses R11 as scratch.
5 */
6
7#include "mem.h"
8#include "arm.h"
9
10#define PADDR(va)	(PHYSDRAM | ((va) & ~KSEGM))
11
12#define L1X(va)		(((((va))>>20) & 0x0fff)<<2)
13
14#define PTEDRAM		(Dom0|L1AP(Krw)|Section|Cached|Buffered)
15
16/*
17 * new instructions
18 */
19
20#define ISB	\
21	MOVW	$0, R0; \
22	MCR	CpSC, 0, R0, C(CpCACHE), C(CpCACHEinvi), CpCACHEwait
23
24#define DSB \
25	MOVW	$0, R0; \
26	MCR	CpSC, 0, R0, C(CpCACHE), C(CpCACHEwb), CpCACHEwait
27
28#define	BARRIERS	ISB; DSB
29
30#define MCRR(coproc, op, rd, rn, crm) \
31	WORD $(0xec400000|(rn)<<16|(rd)<<12|(coproc)<<8|(op)<<4|(crm))
32
33#define OKAY \
34	MOVW	$0x7E200028,R2; \
35	MOVW	$0x10000,R3; \
36	MOVW	R3,(R2)
37