1 /* 2 * RISC-V definition 3 */ 4 #include <u.h> 5 #include <libc.h> 6 #include <bio.h> 7 #include "/riscv/include/ureg.h" 8 #include <mach.h> 9 10 #define REGOFF(x) (ulong)(&((struct Ureg *) 0)->x) 11 #define REGSIZE sizeof(struct Ureg) 12 13 Reglist riscvreglist[] = { 14 {"PC", REGOFF(pc), RINT, 'X'}, 15 {"SP", REGOFF(r27), RINT, 'X'}, 16 {"R31", REGOFF(r31), RINT, 'X'}, 17 {"R30", REGOFF(r30), RINT, 'X'}, 18 {"R28", REGOFF(r28), RINT, 'X'}, 19 {"R27", REGOFF(r27), RINT, 'X'}, 20 {"R26", REGOFF(r26), RINT, 'X'}, 21 {"R25", REGOFF(r25), RINT, 'X'}, 22 {"R24", REGOFF(r24), RINT, 'X'}, 23 {"R23", REGOFF(r23), RINT, 'X'}, 24 {"R22", REGOFF(r22), RINT, 'X'}, 25 {"R21", REGOFF(r21), RINT, 'X'}, 26 {"R20", REGOFF(r20), RINT, 'X'}, 27 {"R19", REGOFF(r19), RINT, 'X'}, 28 {"R18", REGOFF(r18), RINT, 'X'}, 29 {"R17", REGOFF(r17), RINT, 'X'}, 30 {"R16", REGOFF(r16), RINT, 'X'}, 31 {"R15", REGOFF(r15), RINT, 'X'}, 32 {"R14", REGOFF(r14), RINT, 'X'}, 33 {"R13", REGOFF(r13), RINT, 'X'}, 34 {"R12", REGOFF(r12), RINT, 'X'}, 35 {"R11", REGOFF(r11), RINT, 'X'}, 36 {"R10", REGOFF(r10), RINT, 'X'}, 37 {"R9", REGOFF(r9), RINT, 'X'}, 38 {"R8", REGOFF(r8), RINT, 'X'}, 39 {"R7", REGOFF(r7), RINT, 'X'}, 40 {"R6", REGOFF(r6), RINT, 'X'}, 41 {"R5", REGOFF(r5), RINT, 'X'}, 42 {"R4", REGOFF(r4), RINT, 'X'}, 43 {"R3", REGOFF(r3), RINT, 'X'}, 44 {"R2", REGOFF(r2), RINT, 'X'}, 45 {"R1", REGOFF(r1), RINT, 'X'}, 46 { 0 } 47 }; 48 49 /* the machine description */ 50 Mach mriscv = 51 { 52 "riscv", 53 MRISCV, /* machine type */ 54 riscvreglist, /* register set */ 55 REGSIZE, /* register set size */ 56 0, /* fp register set size */ 57 "PC", /* name of PC */ 58 "SP", /* name of SP */ 59 "R1", /* name of link register */ 60 "setSB", /* static base register name */ 61 0, /* static base register value */ 62 0x1000, /* page size */ 63 0x80000000ULL, /* kernel base */ 64 0xC0000000ULL, /* kernel text mask */ 65 0x3FFFFFFFULL, /* user stack top */ 66 2, /* quantization of pc */ 67 4, /* szaddr */ 68 4, /* szreg */ 69 4, /* szfloat */ 70 8, /* szdouble */ 71 }; 72