1 #include "l.h" 2 3 Optab optab[] = 4 { 5 /* add */ AADD, C_REG, C_REG, 0,1, 4, OOP, 0, 0, 6 /* sub */ ASUB, C_REG, C_REG, 0,5, 4, OOP, 0, 0x20, 7 /* sll */ ASLL, C_REG, C_REG, 0,0, 4, OOP, 1, 0, 8 /* slt */ ASLT, C_REG, C_REG, 0,0, 4, OOP, 2, 0, 9 /* sltu */ ASLTU, C_REG, C_REG, 0,0, 4, OOP, 3, 0, 10 /* xor */ AXOR, C_REG, C_REG, 0,5, 4, OOP, 4, 0, 11 /* srl */ ASRL, C_REG, C_REG, 0,0, 4, OOP, 5, 0, 12 /* sra */ ASRA, C_REG, C_REG, 0,0, 4, OOP, 5, 0x20, 13 /* or */ AOR, C_REG, C_REG, 0,5, 4, OOP, 6, 0, 14 /* and */ AAND, C_REG, C_REG, 0,5, 4, OOP, 7, 0, 15 /* mul */ AMUL, C_REG, C_REG, 0,0, 4, OOP, 0, 0x01, 16 /* mulh */ AMULH, C_REG, C_REG, 0,0, 4, OOP, 1, 0x01, 17 /* mulhsu */ AMULHSU, C_REG, C_REG, 0,0, 4, OOP, 2, 0x01, 18 /* mulhu */ AMULHU, C_REG, C_REG, 0,0, 4, OOP, 3, 0x01, 19 /* div */ ADIV, C_REG, C_REG, 0,0, 4, OOP, 4, 0x01, 20 /* divu */ ADIVU, C_REG, C_REG, 0,0, 4, OOP, 5, 0x01, 21 /* rem */ AREM, C_REG, C_REG, 0,0, 4, OOP, 6, 0x01, 22 /* remu */ AREMU, C_REG, C_REG, 0,0, 4, OOP, 7, 0x01, 23 24 /* addw */ AADDW, C_REG, C_REG, 0,22, 4, OOP_32, 0, 0, 25 /* subw */ ASUBW, C_REG, C_REG, 0,22, 4, OOP_32, 0, 0x20, 26 /* sllw */ ASLLW, C_REG, C_REG, 0,0, 4, OOP_32, 1, 0, 27 /* srlw */ ASRLW, C_REG, C_REG, 0,0, 4, OOP_32, 5, 0, 28 /* sraw */ ASRAW, C_REG, C_REG, 0,0, 4, OOP_32, 5, 0x20, 29 30 /* mulw */ AMULW, C_REG, C_REG, 0,0, 4, OOP_32, 0, 0x01, 31 /* divw */ ADIVW, C_REG, C_REG, 0,0, 4, OOP_32, 4, 0x01, 32 /* divuw */ ADIVUW, C_REG, C_REG, 0,0, 4, OOP_32, 5, 0x01, 33 /* remw */ AREMW, C_REG, C_REG, 0,0, 4, OOP_32, 6, 0x01, 34 /* remuw */ AREMUW, C_REG, C_REG, 0,0, 4, OOP_32, 7, 0x01, 35 36 /* slli */ ASLL, C_SCON, C_REG, 1,8, 4, OOP_IMM, 1, 0, 37 /* srli */ ASRL, C_SCON, C_REG, 1,9, 4, OOP_IMM, 5, 0, 38 /* srai */ ASRA, C_SCON, C_REG, 1,9, 4, OOP_IMM, 5, 0x20, 39 40 /* addi */ AADD, C_SCON, C_REG, 2,10, 4, OOP_IMM, 0, 0, 41 /* slti */ ASLT, C_SCON, C_REG, 2,0, 4, OOP_IMM, 2, 0, 42 /* sltiu */ ASLTU, C_SCON, C_REG, 2,0, 4, OOP_IMM, 3, 0, 43 /* xori */ AXOR, C_SCON, C_REG, 2,0, 4, OOP_IMM, 4, 0, 44 /* ori */ AOR, C_SCON, C_REG, 2,0, 4, OOP_IMM, 6, 0, 45 /* andi */ AAND, C_SCON, C_REG, 2,13, 4, OOP_IMM, 7, 0, 46 47 /* addiw */ AADDW, C_SCON, C_REG, 2,23, 4, OOP_IMM_32, 0, 0, 48 /* slliw */ ASLLW, C_SCON, C_REG, 2,0, 4, OOP_IMM_32, 1, 0, 49 /* srliw */ ASRLW, C_SCON, C_REG, 2,0, 4, OOP_IMM_32, 5, 0, 50 /* sraiw */ ASRAW, C_SCON, C_REG, 2,0, 4, OOP_IMM_32, 5, 0x20, 51 52 /* beq */ ABEQ, C_REG, C_SBRA, 3,14, 4, OBRANCH, 0, 0, 53 /* bne */ ABNE, C_REG, C_SBRA, 3,15, 4, OBRANCH, 1, 0, 54 /* blt */ ABLT, C_REG, C_SBRA, 3,0, 4, OBRANCH, 4, 0, 55 /* bge */ ABGE, C_REG, C_SBRA, 3,0, 4, OBRANCH, 5, 0, 56 /* bltu */ ABLTU, C_REG, C_SBRA, 3,0, 4, OBRANCH, 6, 0, 57 /* bgeu */ ABGEU, C_REG, C_SBRA, 3,0, 4, OBRANCH, 7, 0, 58 59 /* jal */ AJAL, C_NONE, C_SBRA, 4,11, 4, OJAL, 0, REGLINK, 60 /* jal */ AJMP, C_NONE, C_SBRA, 4,12, 4, OJAL, 0, REGZERO, 61 /* jal */ AJAL, C_NONE, C_LBRA, 18,0, 8, OJALR, 0, REGLINK, 62 /* jal */ AJMP, C_NONE, C_LBRA, 18,0, 8, OJALR, 0, REGZERO, 63 /* jalr */ AJAL, C_NONE, C_SOREG, 5,3, 4, OJALR, 0, REGLINK, 64 /* jalr */ AJMP, C_NONE, C_SOREG, 5,4, 4, OJALR, 0, REGZERO, 65 66 /* sb */ AMOVB, C_ZREG, C_SOREG, 6,0, 4, OSTORE, 0, 0, 67 /* sb */ AMOVBU, C_ZREG, C_SOREG, 6,0, 4, OSTORE, 0, 0, 68 /* sh */ AMOVH, C_ZREG, C_SOREG, 6,0, 4, OSTORE, 1, 0, 69 /* sw */ AMOVW, C_ZREG, C_SOREG, 6,19, 4, OSTORE, 2, 0, 70 /* sd */ AMOV, C_ZREG, C_SOREG, 6,25, 4, OSTORE, 3, 0, 71 /* fsw */ AMOVF, C_FREG, C_SOREG, 6,20, 4, OSTORE_FP, 2, 0, 72 /* fsd */ AMOVD, C_FREG, C_SOREG, 6,21, 4, OSTORE_FP, 3, 0, 73 74 /* sb */ AMOVB, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 0, 0, 75 /* sb */ AMOVBU, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 0, 0, 76 /* sh */ AMOVH, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 1, 0, 77 /* sw */ AMOVW, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 2, 0, 78 /* sd */ AMOV, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 3, 0, 79 /* fsw */ AMOVF, C_FREG, C_LEXT, 12,0, 8, OSTORE_FP, 2, 0, 80 /* fsd */ AMOVD, C_FREG, C_LEXT, 12,0, 8, OSTORE_FP, 3, 0, 81 82 /* sb */ AMOVB, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 0, 0, 83 /* sb */ AMOVBU, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 0, 0, 84 /* sh */ AMOVH, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 1, 0, 85 /* sw */ AMOVW, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 2, 0, 86 /* sd */ AMOV, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 3, 0, 87 /* fsw */ AMOVF, C_FREG, C_LOREG, 15,0, 12, OSTORE_FP, 2, 0, 88 /* fsd */ AMOVD, C_FREG, C_LOREG, 15,0, 12, OSTORE_FP, 3, 0, 89 90 /* lb */ AMOVB, C_SOREG, C_REG, 7,0, 4, OLOAD, 0, 0, 91 /* lh */ AMOVH, C_SOREG, C_REG, 7,0, 4, OLOAD, 1, 0, 92 /* lw */ AMOVW, C_SOREG, C_REG, 7,16, 4, OLOAD, 2, 0, 93 /* ld */ AMOV, C_SOREG, C_REG, 7,24, 4, OLOAD, 3, 0, 94 /* lbu */ AMOVBU, C_SOREG, C_REG, 7,0, 4, OLOAD, 4, 0, 95 /* lhu */ AMOVHU, C_SOREG, C_REG, 7,0, 4, OLOAD, 5, 0, 96 /* lwu */ AMOVWU, C_SOREG, C_REG, 7,0, 4, OLOAD, 6, 0, 97 /* flw */ AMOVF, C_SOREG, C_FREG, 7,17, 4, OLOAD_FP, 2, 0, 98 /* fld */ AMOVD, C_SOREG, C_FREG, 7,18, 4, OLOAD_FP, 3, 0, 99 100 /* lui */ AMOV, C_UCON, C_REG, 8,7, 4, OLUI, 0, 0, 101 102 /* lb */ AMOVB, C_LEXT, C_REG, 13,0, 8, OLOAD, 0, 0, 103 /* lh */ AMOVH, C_LEXT, C_REG, 13,0, 8, OLOAD, 1, 0, 104 /* lw */ AMOVW, C_LEXT, C_REG, 13,0, 8, OLOAD, 2, 0, 105 /* ld */ AMOV, C_LEXT, C_REG, 13,0, 8, OLOAD, 3, 0, 106 /* lbu */ AMOVBU, C_LEXT, C_REG, 13,0, 8, OLOAD, 4, 0, 107 /* lhu */ AMOVHU, C_LEXT, C_REG, 13,0, 8, OLOAD, 5, 0, 108 /* lwu */ AMOVWU, C_LEXT, C_REG, 13,0, 8, OLOAD, 6, 0, 109 /* flw */ AMOVF, C_LEXT, C_FREG, 13,0, 8, OLOAD_FP, 2, 0, 110 /* fld */ AMOVD, C_LEXT, C_FREG, 13,0, 8, OLOAD_FP, 3, 0, 111 112 /* lb */ AMOVB, C_LOREG, C_REG, 16,0, 12, OLOAD, 0, 0, 113 /* lh */ AMOVH, C_LOREG, C_REG, 16,0, 12, OLOAD, 1, 0, 114 /* lw */ AMOVW, C_LOREG, C_REG, 16,0, 12, OLOAD, 2, 0, 115 /* ld */ AMOV, C_LOREG, C_REG, 16,0, 12, OLOAD, 3, 0, 116 /* lbu */ AMOVBU, C_LOREG, C_REG, 16,0, 12, OLOAD, 4, 0, 117 /* lhu */ AMOVHU, C_LOREG, C_REG, 16,0, 12, OLOAD, 5, 0, 118 /* lwu */ AMOVWU, C_LOREG, C_REG, 16,0, 12, OLOAD, 6, 0, 119 /* flw */ AMOVF, C_LOREG, C_FREG, 16,0, 12, OLOAD_FP, 2, 0, 120 /* fld */ AMOVD, C_LOREG, C_FREG, 16,0, 12, OLOAD_FP, 3, 0, 121 122 /* addi */ AMOVW, C_SCON, C_REG, 11,6, 4, OOP_IMM, 0, 0, 123 /* addi */ AMOVW, C_SECON, C_REG, 11,0, 4, OOP_IMM, 0, 0, 124 /* addi */ AMOVW, C_SACON, C_REG, 11,0, 4, OOP_IMM, 0, 0, 125 /* lui,addi */ AMOVW, C_LCON, C_REG, 9,0, 8, OOP_IMM, 0, 0, 126 /* lui,addi */ AMOVW, C_LECON, C_REG, 9,0, 8, OOP_IMM, 0, 0, 127 /* ",",add */ AMOVW, C_LACON, C_REG, 14,0, 12, OOP_IMM, 0, 0, 128 129 /* add */ AMOV, C_REG, C_REG, 0,2, 4, OOP, 0, 0, 130 /* addi */ AMOV, C_SCON, C_REG, 11,6, 4, OOP_IMM, 0, 0, 131 /* addi */ AMOV, C_SECON, C_REG, 11,0, 4, OOP_IMM, 0, 0, 132 /* addi */ AMOV, C_SACON, C_REG, 11,0, 4, OOP_IMM, 0, 0, 133 /* lui,addi */ AMOV, C_LCON, C_REG, 9,0, 8, OOP_IMM, 0, 0, 134 /* lui,addi */ AMOV, C_LECON, C_REG, 20,0, 8, OOP_IMM, 0, 0, 135 /* lui,s[rl]ai */ AMOV, C_VCON, C_REG, 21,0, 8, OOP_IMM, 5, 0x20, 136 /* ",",add */ AMOV, C_LACON, C_REG, 14,0, 12, OOP_IMM, 0, 0, 137 /* ",",add */ AADD, C_LCON, C_REG, 14,0, 12, OOP_IMM, 0, 0, 138 /* ",",and */ AAND, C_LCON, C_REG, 14,0, 12, OOP_IMM, 7, 0, 139 /* ",",or */ AOR, C_LCON, C_REG, 14,0, 12, OOP_IMM, 6, 0, 140 /* ",",xor */ AXOR, C_LCON, C_REG, 14,0, 12, OOP_IMM, 4, 0, 141 142 /* addiw */ AMOVW, C_REG, C_REG, 19,23, 4, OOP_IMM_32, 0, 0, 143 /* andi */ AMOVBU, C_ZREG, C_REG, 10,0, 4, OOP_IMM, 7, 0xFF, 144 /* slli,srli */ AMOVHU, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 16, 145 /* slli,srli */ AMOVWU, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 0, 146 /* slli,srai */ AMOVB, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 24+(0x20<<5), 147 /* slli,srai */ AMOVH, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 16+(0x20<<5), 148 149 ASYS, C_NONE, C_SCON, 24,0, 4, OSYSTEM, 0, 0, 150 ACSRRW, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 1, 0, 151 ACSRRS, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 2, 0, 152 ACSRRC, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 3, 0, 153 ACSRRWI, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 5, 0, 154 ACSRRSI, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 6, 0, 155 ACSRRCI, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 7, 0, 156 157 AADDF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x00, 158 ASUBF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x04, 159 AMULF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x08, 160 ADIVF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x0c, 161 AADDD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x01, 162 ASUBD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x05, 163 AMULD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x09, 164 ADIVD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x0d, 165 166 ACMPEQF, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x2, 0x50, 167 ACMPLEF, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x0, 0x50, 168 ACMPLTF, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x1, 0x50, 169 ACMPEQD, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x2, 0x51, 170 ACMPLED, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x0, 0x51, 171 ACMPLTD, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x1, 0x51, 172 173 /* float move */ AMOVF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x0, 0x10, 174 /* dbl move */ AMOVD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x0, 0x11, 175 176 /* float->dbl */ AMOVFD, C_FREG, C_FREG, 17,0, 4, OOP_FP, 0x0, 0x21, 177 /* dbl->float */ AMOVDF, C_FREG, C_FREG, 17,0, 4, OOP_FP, 0x1, 0x20, 178 /* float->int */ AMOVFW, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x0, 0x60, 179 /* dbl->int */ AMOVDW, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x0, 0x61, 180 /* int->float */ AMOVWF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x0, 0x68, 181 /* uint->float */ AMOVUF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x1, 0x68, 182 /* int->dbl */ AMOVWD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x0, 0x69, 183 /* uint->dbl */ AMOVUD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x1, 0x69, 184 /* float->vlong*/ AMOVFV, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x2, 0x60, 185 /* dbl->vlong */ AMOVDV, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x2, 0x61, 186 /* vlong->float*/ AMOVVF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x2, 0x68, 187 /* uvlong->float*/ AMOVUVF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x3, 0x68, 188 /* vlong->dbl */ AMOVVD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x2, 0x69, 189 /* uvlong->dbl */ AMOVUVD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x3, 0x69, 190 191 /* - */ AWORD, C_NONE, C_LCON, 25,0, 4, 0, 0, 0, 192 /* - */ ATEXT, C_LEXT, C_LCON, 26,0, 0, 0, 0, 0, 193 /* - */ AXXX, C_NONE, C_NONE, 0,0, 0, 0, 0, 0, 194 }; 195