1 /* 2 * Time. 3 * 4 * HZ should divide 1000 evenly, ideally. 5 * 100, 125, 200, 250 and 333 are okay. 6 */ 7 #define HZ 100 /* clock frequency */ 8 #define MS2HZ (1000/HZ) /* millisec per clock tick */ 9 #define TK2SEC(t) ((t)/HZ) /* ticks to seconds */ 10 11 enum { 12 Mhz = 1000 * 1000, 13 }; 14 15 typedef struct Conf Conf; 16 typedef struct Confmem Confmem; 17 typedef struct FPsave FPsave; 18 typedef struct I2Cdev I2Cdev; 19 typedef struct ISAConf ISAConf; 20 typedef struct Label Label; 21 typedef struct Lock Lock; 22 typedef struct Memcache Memcache; 23 typedef struct MMMU MMMU; 24 typedef struct Mach Mach; 25 typedef struct Page Page; 26 typedef struct PhysUart PhysUart; 27 typedef struct PMMU PMMU; 28 typedef struct Proc Proc; 29 typedef u32int PTE; 30 typedef struct Soc Soc; 31 typedef struct Uart Uart; 32 typedef struct Ureg Ureg; 33 typedef uvlong Tval; 34 35 #pragma incomplete Ureg 36 37 #define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */ 38 39 /* 40 * parameters for sysproc.c 41 */ 42 #define AOUT_MAGIC (E_MAGIC) 43 44 struct Lock 45 { 46 ulong key; 47 u32int sr; 48 uintptr pc; 49 Proc* p; 50 Mach* m; 51 int isilock; 52 }; 53 54 struct Label 55 { 56 uintptr sp; 57 uintptr pc; 58 }; 59 60 enum { 61 Maxfpregs = 32, /* could be 16 or 32, see Mach.fpnregs */ 62 Nfpctlregs = 16, 63 }; 64 65 /* 66 * emulated or vfp3 floating point 67 */ 68 struct FPsave 69 { 70 ulong status; 71 ulong control; 72 /* 73 * vfp3 with ieee fp regs; uvlong is sufficient for hardware but 74 * each must be able to hold an Internal from fpi.h for sw emulation. 75 */ 76 ulong regs[Maxfpregs][3]; 77 78 int fpstate; 79 uintptr pc; /* of failed fp instr. */ 80 }; 81 82 /* 83 * FPsave.fpstate 84 */ 85 enum 86 { 87 FPinit, 88 FPactive, 89 FPinactive, 90 FPemu, 91 92 /* bits or'd with the state */ 93 FPillegal= 0x100, 94 }; 95 96 struct Confmem 97 { 98 uintptr base; 99 usize npage; 100 uintptr limit; 101 uintptr kbase; 102 uintptr klimit; 103 }; 104 105 struct Conf 106 { 107 ulong nmach; /* processors */ 108 ulong nproc; /* processes */ 109 Confmem mem[2]; /* physical memory */ 110 ulong npage; /* total physical pages of memory */ 111 usize upages; /* user page pool */ 112 ulong copymode; /* 0 is copy on write, 1 is copy on reference */ 113 ulong ialloc; /* max interrupt time allocation in bytes */ 114 ulong pipeqsize; /* size in bytes of pipe queues */ 115 ulong nimage; /* number of page cache image headers */ 116 ulong nswap; /* number of swap pages */ 117 int nswppo; /* max # of pageouts per segment pass */ 118 ulong hz; /* processor cycle freq */ 119 ulong mhz; 120 int monitor; /* flag */ 121 }; 122 123 struct I2Cdev { 124 int salen; 125 int addr; 126 int tenbit; 127 }; 128 129 /* 130 * GPIO 131 */ 132 enum { 133 Input = 0x0, 134 Output = 0x1, 135 Alt0 = 0x4, 136 Alt1 = 0x5, 137 Alt2 = 0x6, 138 Alt3 = 0x7, 139 Alt4 = 0x3, 140 Alt5 = 0x2, 141 }; 142 143 /* 144 * MMU stuff in Mach. 145 */ 146 struct MMMU 147 { 148 PTE* mmul1; /* l1 for this processor */ 149 int mmul1lo; 150 int mmul1hi; 151 int mmupid; 152 PTE* kmapl2; /* l2 for section containing kmap area and vectors */ 153 }; 154 155 /* 156 * MMU stuff in proc 157 */ 158 #define NCOLOR 1 /* 1 level cache, don't worry about VCE's */ 159 #define NKMAPS 4 160 struct PMMU 161 { 162 Page* mmul2; 163 Page* mmul2cache; /* free mmu pages */ 164 int nkmap; 165 PTE kmaptab[NKMAPS]; 166 }; 167 168 #include "../port/portdat.h" 169 170 struct Mach 171 { 172 int machno; /* physical id of processor */ 173 uintptr splpc; /* pc of last caller to splhi */ 174 175 Proc* proc; /* current process */ 176 177 MMMU; 178 int flushmmu; /* flush current proc mmu state */ 179 180 ulong ticks; /* of the clock since boot time */ 181 Label sched; /* scheduler wakeup */ 182 Lock alarmlock; /* access to alarm list */ 183 void* alarm; /* alarms bound to this clock */ 184 185 Proc* readied; /* for runproc */ 186 ulong schedticks; /* next forced context switch */ 187 188 int cputype; 189 ulong delayloop; 190 191 /* stats */ 192 int tlbfault; 193 int tlbpurge; 194 int pfault; 195 int cs; 196 int syscall; 197 int load; 198 int intr; 199 uvlong fastclock; /* last sampled value */ 200 ulong spuriousintr; 201 int lastintr; 202 int ilockdepth; 203 Perf perf; /* performance counters */ 204 205 206 int cpumhz; 207 uvlong cpuhz; /* speed of cpu */ 208 uvlong cyclefreq; /* Frequency of user readable cycle counter */ 209 210 /* vfp2 or vfp3 fpu */ 211 int havefp; 212 int havefpvalid; 213 int fpon; 214 int fpconfiged; 215 int fpnregs; 216 ulong fpscr; /* sw copy */ 217 int fppid; /* pid of last fault */ 218 uintptr fppc; /* addr of last fault */ 219 int fpcnt; /* how many consecutive at that addr */ 220 221 /* save areas for exceptions, hold R0-R4 */ 222 u32int sfiq[5]; 223 u32int sirq[5]; 224 u32int sund[5]; 225 u32int sabt[5]; 226 u32int smon[5]; /* probably not needed */ 227 u32int ssys[5]; 228 229 int stack[1]; 230 }; 231 232 /* 233 * Fake kmap. 234 */ 235 typedef void KMap; 236 #define VA(k) ((uintptr)(k)) 237 //#define kmap(p) (KMap*)((p)->pa|kseg0) 238 extern KMap* kmap(Page*); 239 extern void kunmap(KMap*); 240 241 struct 242 { 243 Lock; 244 int machs; /* bitmap of active CPUs */ 245 int exiting; /* shutdown */ 246 int ispanic; /* shutdown in response to a panic */ 247 }active; 248 249 extern register Mach* m; /* R10 */ 250 extern register Proc* up; /* R9 */ 251 extern uintptr kseg0; 252 extern Mach* machaddr[MAXMACH]; 253 extern ulong memsize; 254 extern int normalprint; 255 256 /* 257 * a parsed plan9.ini line 258 */ 259 #define NISAOPT 8 260 261 struct ISAConf { 262 char *type; 263 ulong port; 264 int irq; 265 ulong dma; 266 ulong mem; 267 ulong size; 268 ulong freq; 269 270 int nopt; 271 char *opt[NISAOPT]; 272 }; 273 274 #define MACHP(n) (machaddr[n]) 275 276 /* 277 * Horrid. But the alternative is 'defined'. 278 */ 279 #ifdef _DBGC_ 280 #define DBGFLG (dbgflg[_DBGC_]) 281 #else 282 #define DBGFLG (0) 283 #endif /* _DBGC_ */ 284 285 int vflag; 286 extern char dbgflg[256]; 287 288 #define dbgprint print /* for now */ 289 290 /* 291 * hardware info about a device 292 */ 293 typedef struct { 294 ulong port; 295 int size; 296 } Devport; 297 298 struct DevConf 299 { 300 ulong intnum; /* interrupt number */ 301 char *type; /* card type, malloced */ 302 int nports; /* Number of ports */ 303 Devport *ports; /* The ports themselves */ 304 }; 305 306 struct Soc { /* SoC dependent configuration */ 307 ulong dramsize; 308 uintptr physio; 309 uintptr busdram; 310 uintptr busio; 311 uintptr armlocal; 312 uint oscfreq; 313 u32int l1ptedramattrs; 314 u32int l2ptedramattrs; 315 }; 316 extern Soc soc; 317