1 /* $OpenBSD: radeon_agp.c,v 1.5 2015/04/12 12:14:30 jsg Exp $ */ 2 /* 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Dave Airlie 26 * Jerome Glisse <glisse@freedesktop.org> 27 */ 28 #include <dev/pci/drm/drmP.h> 29 #include "radeon.h" 30 #include <dev/pci/drm/radeon_drm.h> 31 32 #if __OS_HAS_AGP 33 34 struct radeon_agpmode_quirk { 35 u32 hostbridge_vendor; 36 u32 hostbridge_device; 37 u32 chip_vendor; 38 u32 chip_device; 39 u32 subsys_vendor; 40 u32 subsys_device; 41 u32 default_mode; 42 }; 43 44 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = { 45 /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */ 46 { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4}, 47 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */ 48 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4}, 49 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */ 50 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964, 51 0x148c, 0x2073, 4}, 52 /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */ 53 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59, 54 PCI_VENDOR_ID_IBM, 0x052f, 1}, 55 /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */ 56 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50, 57 PCI_VENDOR_ID_IBM, 0x0550, 1}, 58 /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */ 59 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57, 60 PCI_VENDOR_ID_IBM, 0x0530, 1}, 61 /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */ 62 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54, 63 PCI_VENDOR_ID_IBM, 0x054f, 2}, 64 /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */ 65 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 66 PCI_VENDOR_ID_SONY, 0x816b, 2}, 67 /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */ 68 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 69 PCI_VENDOR_ID_SONY, 0x8195, 8}, 70 /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/ 71 { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59, 72 PCI_VENDOR_ID_DELL, 0x00e3, 2}, 73 /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */ 74 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66, 75 PCI_VENDOR_ID_DELL, 0x0149, 1}, 76 /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */ 77 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 78 PCI_VENDOR_ID_IBM, 0x0531, 1}, 79 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */ 80 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 81 0x1025, 0x0061, 1}, 82 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */ 83 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 84 0x1025, 0x0064, 1}, 85 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */ 86 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 87 PCI_VENDOR_ID_ASUSTEK, 0x1942, 1}, 88 /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */ 89 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 90 0x10cf, 0x127f, 1}, 91 /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */ 92 { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 93 0x1787, 0x5960, 4}, 94 /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */ 95 { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960, 96 0x17af, 0x2020, 4}, 97 /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */ 98 { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153, 99 PCI_VENDOR_ID_ASUSTEK, 0x003c, 4}, 100 /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */ 101 { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c, 102 PCI_VENDOR_ID_ATI, 0x013a, 2}, 103 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */ 104 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 105 PCI_VENDOR_ID_ASUSTEK, 0x004c, 2}, 106 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */ 107 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 108 PCI_VENDOR_ID_ASUSTEK, 0x0054, 2}, 109 /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */ 110 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d, 111 0x174b, 0x7149, 4}, 112 /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */ 113 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 114 0x1462, 0x0380, 4}, 115 /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */ 116 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964, 117 0x148c, 0x2073, 4}, 118 /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */ 119 { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61, 120 PCI_VENDOR_ID_SONY, 0x8175, 1}, 121 /* HP Host Bridge / R300 [FireGL X1] Needs AGPMode 2 (fdo #7770) */ 122 { PCI_VENDOR_ID_HP, 0x122e, PCI_VENDOR_ID_ATI, 0x4e47, 123 PCI_VENDOR_ID_ATI, 0x0152, 2}, 124 { 0, 0, 0, 0, 0, 0, 0 }, 125 }; 126 #endif 127 128 int radeon_agp_init(struct radeon_device *rdev) 129 { 130 #if __OS_HAS_AGP 131 struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; 132 struct drm_agp_mode mode; 133 struct drm_agp_info info; 134 paddr_t start, end; 135 uint32_t agp_status; 136 int default_mode; 137 bool is_v3; 138 int ret; 139 140 /* Acquire AGP. */ 141 ret = drm_agp_acquire(rdev->ddev); 142 if (ret) { 143 DRM_ERROR("Unable to acquire AGP: %d\n", ret); 144 return ret; 145 } 146 147 ret = drm_agp_info(rdev->ddev, &info); 148 if (ret) { 149 drm_agp_release(rdev->ddev); 150 DRM_ERROR("Unable to get AGP info: %d\n", ret); 151 return ret; 152 } 153 154 if ((rdev->ddev->agp->info.ai_aperture_size >> 20) < 32) { 155 drm_agp_release(rdev->ddev); 156 dev_warn(rdev->dev, "AGP aperture too small (%zuM) " 157 "need at least 32M, disabling AGP\n", 158 rdev->ddev->agp->info.ai_aperture_size >> 20); 159 return -EINVAL; 160 } 161 162 mode.mode = info.mode; 163 /* chips with the agp to pcie bridge don't have the AGP_STATUS register 164 * Just use the whatever mode the host sets up. 165 */ 166 if (rdev->family <= CHIP_RV350) 167 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 168 else 169 agp_status = mode.mode; 170 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 171 172 if (is_v3) { 173 default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4; 174 } else { 175 if (agp_status & RADEON_AGP_4X_MODE) { 176 default_mode = 4; 177 } else if (agp_status & RADEON_AGP_2X_MODE) { 178 default_mode = 2; 179 } else { 180 default_mode = 1; 181 } 182 } 183 184 /* Apply AGPMode Quirks */ 185 while (p && p->chip_device != 0) { 186 if (info.id_vendor == p->hostbridge_vendor && 187 info.id_device == p->hostbridge_device && 188 rdev->pdev->vendor == p->chip_vendor && 189 rdev->pdev->device == p->chip_device && 190 rdev->pdev->subsystem_vendor == p->subsys_vendor && 191 rdev->pdev->subsystem_device == p->subsys_device) { 192 default_mode = p->default_mode; 193 } 194 ++p; 195 } 196 197 if (radeon_agpmode > 0) { 198 if ((radeon_agpmode < (is_v3 ? 4 : 1)) || 199 (radeon_agpmode > (is_v3 ? 8 : 4)) || 200 (radeon_agpmode & (radeon_agpmode - 1))) { 201 DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n", 202 radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4", 203 default_mode); 204 radeon_agpmode = default_mode; 205 } else { 206 DRM_INFO("AGP mode requested: %d\n", radeon_agpmode); 207 } 208 } else { 209 radeon_agpmode = default_mode; 210 } 211 212 mode.mode &= ~RADEON_AGP_MODE_MASK; 213 if (is_v3) { 214 switch (radeon_agpmode) { 215 case 8: 216 mode.mode |= RADEON_AGPv3_8X_MODE; 217 break; 218 case 4: 219 default: 220 mode.mode |= RADEON_AGPv3_4X_MODE; 221 break; 222 } 223 } else { 224 switch (radeon_agpmode) { 225 case 4: 226 mode.mode |= RADEON_AGP_4X_MODE; 227 break; 228 case 2: 229 mode.mode |= RADEON_AGP_2X_MODE; 230 break; 231 case 1: 232 default: 233 mode.mode |= RADEON_AGP_1X_MODE; 234 break; 235 } 236 } 237 238 mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ 239 ret = drm_agp_enable(rdev->ddev, mode); 240 if (ret) { 241 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); 242 drm_agp_release(rdev->ddev); 243 return ret; 244 } 245 246 rdev->mc.agp_base = rdev->ddev->agp->info.ai_aperture_base; 247 rdev->mc.gtt_size = rdev->ddev->agp->info.ai_aperture_size; 248 rdev->mc.gtt_start = rdev->mc.agp_base; 249 rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; 250 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", 251 rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); 252 253 if (!rdev->ddev->agp->cant_use_aperture) { 254 start = atop(bus_space_mmap(rdev->memt, rdev->mc.gtt_start, 0, 0, 0)); 255 end = start + atop(rdev->mc.gtt_size); 256 uvm_page_physload(start, end, start, end, PHYSLOAD_DEVICE); 257 } 258 259 /* workaround some hw issues */ 260 if (rdev->family < CHIP_R200) { 261 WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000); 262 } 263 return 0; 264 #else 265 return 0; 266 #endif 267 } 268 269 void radeon_agp_resume(struct radeon_device *rdev) 270 { 271 #if __OS_HAS_AGP 272 int r; 273 if (rdev->flags & RADEON_IS_AGP) { 274 r = radeon_agp_init(rdev); 275 if (r) 276 dev_warn(rdev->dev, "radeon AGP reinit failed\n"); 277 } 278 #endif 279 } 280 281 void radeon_agp_fini(struct radeon_device *rdev) 282 { 283 #if __OS_HAS_AGP 284 if (rdev->ddev->agp && rdev->ddev->agp->acquired) { 285 drm_agp_release(rdev->ddev); 286 } 287 #endif 288 } 289 290 void radeon_agp_suspend(struct radeon_device *rdev) 291 { 292 radeon_agp_fini(rdev); 293 } 294