1 /* 2 * Copyright 2008 Red Hat Inc. 3 * Copyright 2009 Jerome Glisse. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Dave Airlie 25 * Jerome Glisse <glisse@freedesktop.org> 26 */ 27 28 #include <linux/pci.h> 29 30 #include <drm/drm_device.h> 31 #include <drm/radeon_drm.h> 32 33 #include "radeon.h" 34 35 #if IS_ENABLED(CONFIG_AGP) 36 37 struct radeon_agpmode_quirk { 38 u32 hostbridge_vendor; 39 u32 hostbridge_device; 40 u32 chip_vendor; 41 u32 chip_device; 42 u32 subsys_vendor; 43 u32 subsys_device; 44 u32 default_mode; 45 }; 46 47 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = { 48 /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */ 49 { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4}, 50 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */ 51 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4}, 52 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */ 53 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964, 54 0x148c, 0x2073, 4}, 55 /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */ 56 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59, 57 PCI_VENDOR_ID_IBM, 0x052f, 1}, 58 /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */ 59 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50, 60 PCI_VENDOR_ID_IBM, 0x0550, 1}, 61 /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */ 62 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 63 PCI_VENDOR_ID_IBM, 0x054d, 1}, 64 /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */ 65 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57, 66 PCI_VENDOR_ID_IBM, 0x0530, 1}, 67 /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */ 68 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54, 69 PCI_VENDOR_ID_IBM, 0x054f, 2}, 70 /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */ 71 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 72 PCI_VENDOR_ID_SONY, 0x816b, 2}, 73 /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */ 74 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 75 PCI_VENDOR_ID_SONY, 0x8195, 8}, 76 /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/ 77 { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59, 78 PCI_VENDOR_ID_DELL, 0x00e3, 2}, 79 /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */ 80 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66, 81 PCI_VENDOR_ID_DELL, 0x0149, 1}, 82 /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */ 83 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 84 PCI_VENDOR_ID_IBM, 0x0531, 1}, 85 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */ 86 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 87 0x1025, 0x0061, 1}, 88 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */ 89 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 90 0x1025, 0x0064, 1}, 91 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */ 92 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 93 PCI_VENDOR_ID_ASUSTEK, 0x1942, 1}, 94 /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */ 95 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 96 0x10cf, 0x127f, 1}, 97 /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */ 98 { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 99 0x1787, 0x5960, 4}, 100 /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */ 101 { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960, 102 0x17af, 0x2020, 4}, 103 /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */ 104 { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153, 105 PCI_VENDOR_ID_ASUSTEK, 0x003c, 4}, 106 /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */ 107 { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c, 108 PCI_VENDOR_ID_ATI, 0x013a, 2}, 109 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */ 110 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 111 PCI_VENDOR_ID_ASUSTEK, 0x004c, 2}, 112 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */ 113 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 114 PCI_VENDOR_ID_ASUSTEK, 0x0054, 2}, 115 /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */ 116 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d, 117 0x174b, 0x7149, 4}, 118 /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */ 119 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 120 0x1462, 0x0380, 4}, 121 /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */ 122 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964, 123 0x148c, 0x2073, 4}, 124 /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */ 125 { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61, 126 PCI_VENDOR_ID_SONY, 0x8175, 1}, 127 { 0, 0, 0, 0, 0, 0, 0 }, 128 }; 129 130 struct radeon_agp_head *radeon_agp_head_init(struct drm_device *dev) 131 { 132 STUB(); 133 return NULL; 134 #ifdef notyet 135 struct pci_dev *pdev = to_pci_dev(dev->dev); 136 struct radeon_agp_head *head; 137 138 head = kzalloc(sizeof(*head), GFP_KERNEL); 139 if (!head) 140 return NULL; 141 head->bridge = agp_find_bridge(pdev); 142 if (!head->bridge) { 143 head->bridge = agp_backend_acquire(pdev); 144 if (!head->bridge) { 145 kfree(head); 146 return NULL; 147 } 148 agp_copy_info(head->bridge, &head->agp_info); 149 agp_backend_release(head->bridge); 150 } else { 151 agp_copy_info(head->bridge, &head->agp_info); 152 } 153 if (head->agp_info.chipset == NOT_SUPPORTED) { 154 kfree(head); 155 return NULL; 156 } 157 INIT_LIST_HEAD(&head->memory); 158 head->cant_use_aperture = head->agp_info.cant_use_aperture; 159 head->page_mask = head->agp_info.page_mask; 160 head->base = head->agp_info.aper_base; 161 162 return head; 163 #endif 164 } 165 166 static int radeon_agp_head_acquire(struct radeon_device *rdev) 167 { 168 STUB(); 169 return -ENOSYS; 170 #ifdef notyet 171 struct drm_device *dev = rdev_to_drm(rdev); 172 struct pci_dev *pdev = dev->pdev; 173 174 if (!rdev->agp) 175 return -ENODEV; 176 if (rdev->agp->acquired) 177 return -EBUSY; 178 rdev->agp->bridge = agp_backend_acquire(pdev); 179 if (!rdev->agp->bridge) 180 return -ENODEV; 181 rdev->agp->acquired = 1; 182 return 0; 183 #endif 184 } 185 186 static int radeon_agp_head_release(struct radeon_device *rdev) 187 { 188 STUB(); 189 return -ENOSYS; 190 #ifdef notyet 191 if (!rdev->agp || !rdev->agp->acquired) 192 return -EINVAL; 193 agp_backend_release(rdev->agp->bridge); 194 rdev->agp->acquired = 0; 195 return 0; 196 #endif 197 } 198 199 static int radeon_agp_head_enable(struct radeon_device *rdev, struct radeon_agp_mode mode) 200 { 201 if (!rdev->agp || !rdev->agp->acquired) 202 return -EINVAL; 203 204 rdev->agp->mode = mode.mode; 205 agp_enable(rdev->agp->bridge, mode.mode); 206 rdev->agp->enabled = 1; 207 return 0; 208 } 209 210 static int radeon_agp_head_info(struct radeon_device *rdev, struct radeon_agp_info *info) 211 { 212 STUB(); 213 return -ENOSYS; 214 #ifdef notyet 215 struct agp_kern_info *kern; 216 217 if (!rdev->agp || !rdev->agp->acquired) 218 return -EINVAL; 219 220 kern = &rdev->agp->agp_info; 221 info->agp_version_major = kern->version.major; 222 info->agp_version_minor = kern->version.minor; 223 info->mode = kern->mode; 224 info->aperture_base = kern->aper_base; 225 info->aperture_size = kern->aper_size * 1024 * 1024; 226 info->memory_allowed = kern->max_memory << PAGE_SHIFT; 227 info->memory_used = kern->current_memory << PAGE_SHIFT; 228 info->id_vendor = kern->device->vendor; 229 info->id_device = kern->device->device; 230 231 return 0; 232 #endif 233 } 234 #endif 235 236 int radeon_agp_init(struct radeon_device *rdev) 237 { 238 STUB(); 239 return -ENOSYS; 240 #ifdef notyet 241 #if IS_ENABLED(CONFIG_AGP) 242 struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; 243 struct radeon_agp_mode mode; 244 struct radeon_agp_info info; 245 paddr_t start, end; 246 uint32_t agp_status; 247 int default_mode; 248 bool is_v3; 249 int ret; 250 251 /* Acquire AGP. */ 252 ret = radeon_agp_head_acquire(rdev); 253 if (ret) { 254 #ifdef __linux__ 255 DRM_ERROR("Unable to acquire AGP: %d\n", ret); 256 #endif 257 return ret; 258 } 259 260 ret = radeon_agp_head_info(rdev, &info); 261 if (ret) { 262 radeon_agp_head_release(rdev); 263 DRM_ERROR("Unable to get AGP info: %d\n", ret); 264 return ret; 265 } 266 267 if ((rdev->ddev->agp->info.ai_aperture_size >> 20) < 32) { 268 radeon_agp_head_release(rdev); 269 dev_warn(rdev->dev, "AGP aperture too small (%zuM) " 270 "need at least 32M, disabling AGP\n", 271 rdev->ddev->agp->info.ai_aperture_size >> 20); 272 return -EINVAL; 273 } 274 275 mode.mode = info.mode; 276 /* chips with the agp to pcie bridge don't have the AGP_STATUS register 277 * Just use the whatever mode the host sets up. 278 */ 279 if (rdev->family <= CHIP_RV350) 280 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 281 else 282 agp_status = mode.mode; 283 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 284 285 if (is_v3) { 286 default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4; 287 } else { 288 if (agp_status & RADEON_AGP_4X_MODE) { 289 default_mode = 4; 290 } else if (agp_status & RADEON_AGP_2X_MODE) { 291 default_mode = 2; 292 } else { 293 default_mode = 1; 294 } 295 } 296 297 /* Apply AGPMode Quirks */ 298 while (p && p->chip_device != 0) { 299 if (info.id_vendor == p->hostbridge_vendor && 300 info.id_device == p->hostbridge_device && 301 rdev->pdev->vendor == p->chip_vendor && 302 rdev->pdev->device == p->chip_device && 303 rdev->pdev->subsystem_vendor == p->subsys_vendor && 304 rdev->pdev->subsystem_device == p->subsys_device) { 305 default_mode = p->default_mode; 306 } 307 ++p; 308 } 309 310 if (radeon_agpmode > 0) { 311 if ((radeon_agpmode < (is_v3 ? 4 : 1)) || 312 (radeon_agpmode > (is_v3 ? 8 : 4)) || 313 (radeon_agpmode & (radeon_agpmode - 1))) { 314 DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n", 315 radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4", 316 default_mode); 317 radeon_agpmode = default_mode; 318 } else { 319 DRM_INFO("AGP mode requested: %d\n", radeon_agpmode); 320 } 321 } else { 322 radeon_agpmode = default_mode; 323 } 324 325 mode.mode &= ~RADEON_AGP_MODE_MASK; 326 if (is_v3) { 327 switch (radeon_agpmode) { 328 case 8: 329 mode.mode |= RADEON_AGPv3_8X_MODE; 330 break; 331 case 4: 332 default: 333 mode.mode |= RADEON_AGPv3_4X_MODE; 334 break; 335 } 336 } else { 337 switch (radeon_agpmode) { 338 case 4: 339 mode.mode |= RADEON_AGP_4X_MODE; 340 break; 341 case 2: 342 mode.mode |= RADEON_AGP_2X_MODE; 343 break; 344 case 1: 345 default: 346 mode.mode |= RADEON_AGP_1X_MODE; 347 break; 348 } 349 } 350 351 mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ 352 ret = radeon_agp_head_enable(rdev, mode); 353 if (ret) { 354 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); 355 radeon_agp_head_release(rdev); 356 return ret; 357 } 358 359 rdev->mc.agp_base = rdev->ddev->agp->info.ai_aperture_base; 360 rdev->mc.gtt_size = rdev->ddev->agp->info.ai_aperture_size; 361 rdev->mc.gtt_start = rdev->mc.agp_base; 362 rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; 363 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", 364 rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); 365 366 if (!rdev->ddev->agp->cant_use_aperture) { 367 start = atop(bus_space_mmap(rdev->memt, rdev->mc.gtt_start, 0, 0, 0)); 368 end = start + atop(rdev->mc.gtt_size); 369 uvm_page_physload(start, end, start, end, PHYSLOAD_DEVICE); 370 } 371 372 /* workaround some hw issues */ 373 if (rdev->family < CHIP_R200) { 374 WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000); 375 } 376 return 0; 377 #else 378 return 0; 379 #endif 380 #endif 381 } 382 383 void radeon_agp_resume(struct radeon_device *rdev) 384 { 385 #if IS_ENABLED(CONFIG_AGP) 386 int r; 387 if (rdev->flags & RADEON_IS_AGP) { 388 r = radeon_agp_init(rdev); 389 if (r) 390 dev_warn(rdev->dev, "radeon AGP reinit failed\n"); 391 } 392 #endif 393 } 394 395 void radeon_agp_fini(struct radeon_device *rdev) 396 { 397 #if IS_ENABLED(CONFIG_AGP) 398 if (rdev->agp && rdev->agp->acquired) { 399 radeon_agp_head_release(rdev); 400 } 401 #endif 402 } 403 404 void radeon_agp_suspend(struct radeon_device *rdev) 405 { 406 radeon_agp_fini(rdev); 407 } 408