1 /* $OpenBSD: fpu_div.c,v 1.6 2024/03/29 21:08:10 miod Exp $ */
2 /* $NetBSD: fpu_div.c,v 1.2 1994/11/20 20:52:38 deraadt Exp $ */
3
4 /*
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This software was developed by the Computer Systems Engineering group
9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 * contributed to Berkeley.
11 *
12 * All advertising materials mentioning features or use of this software
13 * must display the following acknowledgement:
14 * This product includes software developed by the University of
15 * California, Lawrence Berkeley Laboratory.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. Neither the name of the University nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 * @(#)fpu_div.c 8.1 (Berkeley) 6/11/93
42 */
43
44 /*
45 * Perform an FPU divide (return x / y).
46 */
47
48 #include <sys/types.h>
49
50 #include <machine/fsr.h>
51 #include <machine/reg.h>
52
53 #include <sparc64/fpu/fpu_arith.h>
54 #include <sparc64/fpu/fpu_emu.h>
55
56 /*
57 * Division of normal numbers is done as follows:
58 *
59 * x and y are floating point numbers, i.e., in the form 1.bbbb * 2^e.
60 * If X and Y are the mantissas (1.bbbb's), the quotient is then:
61 *
62 * q = (X / Y) * 2^((x exponent) - (y exponent))
63 *
64 * Since X and Y are both in [1.0,2.0), the quotient's mantissa (X / Y)
65 * will be in [0.5,2.0). Moreover, it will be less than 1.0 if and only
66 * if X < Y. In that case, it will have to be shifted left one bit to
67 * become a normal number, and the exponent decremented. Thus, the
68 * desired exponent is:
69 *
70 * left_shift = x->fp_mant < y->fp_mant;
71 * result_exp = x->fp_exp - y->fp_exp - left_shift;
72 *
73 * The quotient mantissa X/Y can then be computed one bit at a time
74 * using the following algorithm:
75 *
76 * Q = 0; -- Initial quotient.
77 * R = X; -- Initial remainder,
78 * if (left_shift) -- but fixed up in advance.
79 * R *= 2;
80 * for (bit = FP_NMANT; --bit >= 0; R *= 2) {
81 * if (R >= Y) {
82 * Q |= 1 << bit;
83 * R -= Y;
84 * }
85 * }
86 *
87 * The subtraction R -= Y always removes the uppermost bit from R (and
88 * can sometimes remove additional lower-order 1 bits); this proof is
89 * left to the reader.
90 *
91 * This loop correctly calculates the guard and round bits since they are
92 * included in the expanded internal representation. The sticky bit
93 * is to be set if and only if any other bits beyond guard and round
94 * would be set. From the above it is obvious that this is true if and
95 * only if the remainder R is nonzero when the loop terminates.
96 *
97 * Examining the loop above, we can see that the quotient Q is built
98 * one bit at a time ``from the top down''. This means that we can
99 * dispense with the multi-word arithmetic and just build it one word
100 * at a time, writing each result word when it is done.
101 *
102 * Furthermore, since X and Y are both in [1.0,2.0), we know that,
103 * initially, R >= Y. (Recall that, if X < Y, R is set to X * 2 and
104 * is therefore at in [2.0,4.0).) Thus Q is sure to have bit FP_NMANT-1
105 * set, and R can be set initially to either X - Y (when X >= Y) or
106 * 2X - Y (when X < Y). In addition, comparing R and Y is difficult,
107 * so we will simply calculate R - Y and see if that underflows.
108 * This leads to the following revised version of the algorithm:
109 *
110 * R = X;
111 * bit = FP_1;
112 * D = R - Y;
113 * if (D >= 0) {
114 * result_exp = x->fp_exp - y->fp_exp;
115 * R = D;
116 * q = bit;
117 * bit >>= 1;
118 * } else {
119 * result_exp = x->fp_exp - y->fp_exp - 1;
120 * q = 0;
121 * }
122 * R <<= 1;
123 * do {
124 * D = R - Y;
125 * if (D >= 0) {
126 * q |= bit;
127 * R = D;
128 * }
129 * R <<= 1;
130 * } while ((bit >>= 1) != 0);
131 * Q[0] = q;
132 * for (i = 1; i < 4; i++) {
133 * q = 0, bit = 1U << 31;
134 * do {
135 * D = R - Y;
136 * if (D >= 0) {
137 * q |= bit;
138 * R = D;
139 * }
140 * R <<= 1;
141 * } while ((bit >>= 1) != 0);
142 * Q[i] = q;
143 * }
144 *
145 * This can be refined just a bit further by moving the `R <<= 1'
146 * calculations to the front of the do-loops and eliding the first one.
147 * The process can be terminated immediately whenever R becomes 0, but
148 * this is relatively rare, and we do not bother.
149 */
150
151 struct fpn *
fpu_div(struct fpemu * fe)152 fpu_div(struct fpemu *fe)
153 {
154 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
155 u_int q, bit;
156 u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
157 FPU_DECL_CARRY
158
159 /*
160 * Since divide is not commutative, we cannot just use ORDER.
161 * Check either operand for NaN first; if there is at least one,
162 * order the signalling one (if only one) onto the right, then
163 * return it. Otherwise we have the following cases:
164 *
165 * Inf / Inf = NaN, plus NV exception
166 * Inf / num = Inf [i.e., return x]
167 * Inf / 0 = Inf [i.e., return x]
168 * 0 / Inf = 0 [i.e., return x]
169 * 0 / num = 0 [i.e., return x]
170 * 0 / 0 = NaN, plus NV exception
171 * num / Inf = 0
172 * num / num = num (do the divide)
173 * num / 0 = Inf, plus DZ exception
174 */
175 if (ISNAN(x) || ISNAN(y)) {
176 ORDER(x, y);
177 return (y);
178 }
179 if (ISINF(x) || ISZERO(x)) {
180 if (x->fp_class == y->fp_class)
181 return (fpu_newnan(fe));
182 return (x);
183 }
184
185 /* all results at this point use XOR of operand signs */
186 x->fp_sign ^= y->fp_sign;
187 if (ISINF(y)) {
188 x->fp_class = FPC_ZERO;
189 return (x);
190 }
191 if (ISZERO(y)) {
192 fe->fe_cx = FSR_DZ;
193 x->fp_class = FPC_INF;
194 return (x);
195 }
196
197 /*
198 * Macros for the divide. See comments at top for algorithm.
199 * Note that we expand R, D, and Y here.
200 */
201
202 #define SUBTRACT /* D = R - Y */ \
203 FPU_SUBS(d3, r3, y3); FPU_SUBCS(d2, r2, y2); \
204 FPU_SUBCS(d1, r1, y1); FPU_SUBC(d0, r0, y0)
205
206 #define NONNEGATIVE /* D >= 0 */ \
207 ((int)d0 >= 0)
208
209 #ifdef FPU_SHL1_BY_ADD
210 #define SHL1 /* R <<= 1 */ \
211 FPU_ADDS(r3, r3, r3); FPU_ADDCS(r2, r2, r2); \
212 FPU_ADDCS(r1, r1, r1); FPU_ADDC(r0, r0, r0)
213 #else
214 #define SHL1 \
215 r0 = (r0 << 1) | (r1 >> 31), r1 = (r1 << 1) | (r2 >> 31), \
216 r2 = (r2 << 1) | (r3 >> 31), r3 <<= 1
217 #endif
218
219 #define LOOP /* do ... while (bit >>= 1) */ \
220 do { \
221 SHL1; \
222 SUBTRACT; \
223 if (NONNEGATIVE) { \
224 q |= bit; \
225 r0 = d0, r1 = d1, r2 = d2, r3 = d3; \
226 } \
227 } while ((bit >>= 1) != 0)
228
229 #define WORD(r, i) /* calculate r->fp_mant[i] */ \
230 q = 0; \
231 bit = 1U << 31; \
232 LOOP; \
233 (x)->fp_mant[i] = q
234
235 /* Setup. Note that we put our result in x. */
236 r0 = x->fp_mant[0];
237 r1 = x->fp_mant[1];
238 r2 = x->fp_mant[2];
239 r3 = x->fp_mant[3];
240 y0 = y->fp_mant[0];
241 y1 = y->fp_mant[1];
242 y2 = y->fp_mant[2];
243 y3 = y->fp_mant[3];
244
245 bit = FP_1;
246 SUBTRACT;
247 if (NONNEGATIVE) {
248 x->fp_exp -= y->fp_exp;
249 r0 = d0, r1 = d1, r2 = d2, r3 = d3;
250 q = bit;
251 bit >>= 1;
252 } else {
253 x->fp_exp -= y->fp_exp + 1;
254 q = 0;
255 }
256 LOOP;
257 x->fp_mant[0] = q;
258 WORD(x, 1);
259 WORD(x, 2);
260 WORD(x, 3);
261 x->fp_sticky = r0 | r1 | r2 | r3;
262
263 return (x);
264 }
265