1 /* $OpenBSD: fpu_add.c,v 1.5 2024/03/29 21:08:10 miod Exp $ */
2 /* $NetBSD: fpu_add.c,v 1.3 1996/03/14 19:41:52 christos Exp $ */
3
4 /*
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This software was developed by the Computer Systems Engineering group
9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 * contributed to Berkeley.
11 *
12 * All advertising materials mentioning features or use of this software
13 * must display the following acknowledgement:
14 * This product includes software developed by the University of
15 * California, Lawrence Berkeley Laboratory.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. Neither the name of the University nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 * @(#)fpu_add.c 8.1 (Berkeley) 6/11/93
42 */
43
44 /*
45 * Perform an FPU add (return x + y).
46 *
47 * To subtract, negate y and call add.
48 */
49
50 #include <sys/types.h>
51 #ifdef DIAGNOSTIC
52 #include <sys/systm.h>
53 #endif
54
55 #include <machine/fsr.h>
56 #include <machine/reg.h>
57 #include <machine/instr.h>
58
59 #include <sparc64/fpu/fpu_arith.h>
60 #include <sparc64/fpu/fpu_emu.h>
61 #include <sparc64/fpu/fpu_extern.h>
62
63 struct fpn *
fpu_add(struct fpemu * fe)64 fpu_add(struct fpemu *fe)
65 {
66 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
67 u_int r0, r1, r2, r3;
68 int rd;
69
70 /*
71 * Put the `heavier' operand on the right (see fpu_emu.h).
72 * Then we will have one of the following cases, taken in the
73 * following order:
74 *
75 * - y = NaN. Implied: if only one is a signalling NaN, y is.
76 * The result is y.
77 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN
78 * case was taken care of earlier).
79 * If x = -y, the result is NaN. Otherwise the result
80 * is y (an Inf of whichever sign).
81 * - y is 0. Implied: x = 0.
82 * If x and y differ in sign (one positive, one negative),
83 * the result is +0 except when rounding to -Inf. If same:
84 * +0 + +0 = +0; -0 + -0 = -0.
85 * - x is 0. Implied: y != 0.
86 * Result is y.
87 * - other. Implied: both x and y are numbers.
88 * Do addition a la Hennessey & Patterson.
89 */
90 ORDER(x, y);
91 if (ISNAN(y))
92 return (y);
93 if (ISINF(y)) {
94 if (ISINF(x) && x->fp_sign != y->fp_sign)
95 return (fpu_newnan(fe));
96 return (y);
97 }
98 rd = ((fe->fe_fsr >> FSR_RD_SHIFT) & FSR_RD_MASK);
99 if (ISZERO(y)) {
100 if (rd != FSR_RD_RM) /* only -0 + -0 gives -0 */
101 y->fp_sign &= x->fp_sign;
102 else /* any -0 operand gives -0 */
103 y->fp_sign |= x->fp_sign;
104 return (y);
105 }
106 if (ISZERO(x))
107 return (y);
108 /*
109 * We really have two numbers to add, although their signs may
110 * differ. Make the exponents match, by shifting the smaller
111 * number right (e.g., 1.011 => 0.1011) and increasing its
112 * exponent (2^3 => 2^4). Note that we do not alter the exponents
113 * of x and y here.
114 */
115 r = &fe->fe_f3;
116 r->fp_class = FPC_NUM;
117 if (x->fp_exp == y->fp_exp) {
118 r->fp_exp = x->fp_exp;
119 r->fp_sticky = 0;
120 } else {
121 if (x->fp_exp < y->fp_exp) {
122 /*
123 * Try to avoid subtract case iii (see below).
124 * This also guarantees that x->fp_sticky = 0.
125 */
126 SWAP(x, y);
127 }
128 /* now x->fp_exp > y->fp_exp */
129 r->fp_exp = x->fp_exp;
130 r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp);
131 }
132 r->fp_sign = x->fp_sign;
133 if (x->fp_sign == y->fp_sign) {
134 FPU_DECL_CARRY
135
136 /*
137 * The signs match, so we simply add the numbers. The result
138 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
139 * 11.111...0). If so, a single bit shift-right will fix it
140 * (but remember to adjust the exponent).
141 */
142 /* r->fp_mant = x->fp_mant + y->fp_mant */
143 FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
144 FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
145 FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
146 FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
147 if ((r->fp_mant[0] = r0) >= FP_2) {
148 (void) fpu_shr(r, 1);
149 r->fp_exp++;
150 }
151 } else {
152 FPU_DECL_CARRY
153
154 /*
155 * The signs differ, so things are rather more difficult.
156 * H&P would have us negate the negative operand and add;
157 * this is the same as subtracting the negative operand.
158 * This is quite a headache. Instead, we will subtract
159 * y from x, regardless of whether y itself is the negative
160 * operand. When this is done one of three conditions will
161 * hold, depending on the magnitudes of x and y:
162 * case i) |x| > |y|. The result is just x - y,
163 * with x's sign, but it may need to be normalized.
164 * case ii) |x| = |y|. The result is 0 (maybe -0)
165 * so must be fixed up.
166 * case iii) |x| < |y|. We goofed; the result should
167 * be (y - x), with the same sign as y.
168 * We could compare |x| and |y| here and avoid case iii,
169 * but that would take just as much work as the subtract.
170 * We can tell case iii has occurred by an overflow.
171 *
172 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
173 */
174 /* r->fp_mant = x->fp_mant - y->fp_mant */
175 FPU_SET_CARRY(y->fp_sticky);
176 FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
177 FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
178 FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
179 FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
180 if (r0 < FP_2) {
181 /* cases i and ii */
182 if ((r0 | r1 | r2 | r3) == 0) {
183 /* case ii */
184 r->fp_class = FPC_ZERO;
185 r->fp_sign = rd == FSR_RD_RM;
186 return (r);
187 }
188 } else {
189 /*
190 * Oops, case iii. This can only occur when the
191 * exponents were equal, in which case neither
192 * x nor y have sticky bits set. Flip the sign
193 * (to y's sign) and negate the result to get y - x.
194 */
195 #ifdef DIAGNOSTIC
196 if (x->fp_exp != y->fp_exp || r->fp_sticky)
197 panic("fpu_add");
198 #endif
199 r->fp_sign = y->fp_sign;
200 FPU_SUBS(r3, 0, r3);
201 FPU_SUBCS(r2, 0, r2);
202 FPU_SUBCS(r1, 0, r1);
203 FPU_SUBC(r0, 0, r0);
204 }
205 r->fp_mant[3] = r3;
206 r->fp_mant[2] = r2;
207 r->fp_mant[1] = r1;
208 r->fp_mant[0] = r0;
209 if (r0 < FP_1)
210 fpu_norm(r);
211 }
212 return (r);
213 }
214