1 /* $OpenBSD: cn30xxasx.c,v 1.8 2022/12/28 01:39:21 yasuoka Exp $ */
2
3 /*
4 * Copyright (c) 2007 Internet Initiative Japan, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/malloc.h>
32
33 #include <machine/octeonvar.h>
34
35 #include <octeon/dev/cn30xxasxreg.h>
36 #include <octeon/dev/cn30xxasxvar.h>
37
38 void
cn30xxasx_init(struct cn30xxasx_attach_args * aa,struct cn30xxasx_softc ** rsc)39 cn30xxasx_init(struct cn30xxasx_attach_args *aa,
40 struct cn30xxasx_softc **rsc)
41 {
42 struct cn30xxasx_softc *sc;
43 int status;
44
45 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
46 if (sc == NULL)
47 panic("can't allocate memory: %s", __func__);
48
49 sc->sc_port = aa->aa_port;
50 sc->sc_regt = aa->aa_regt;
51
52 status = bus_space_map(sc->sc_regt, ASX0_BASE, ASX0_SIZE, 0,
53 &sc->sc_regh);
54 if (status != 0)
55 panic("can't map %s space", "asx register");
56
57 *rsc = sc;
58 }
59
60 #define _ASX_RD8(sc, off) \
61 bus_space_read_8((sc)->sc_regt, (sc)->sc_regh, (off))
62 #define _ASX_WR8(sc, off, v) \
63 bus_space_write_8((sc)->sc_regt, (sc)->sc_regh, (off), (v))
64
65 int cn30xxasx_enable_tx(struct cn30xxasx_softc *, int);
66 int cn30xxasx_enable_rx(struct cn30xxasx_softc *, int);
67
68 int
cn30xxasx_enable(struct cn30xxasx_softc * sc,int enable)69 cn30xxasx_enable(struct cn30xxasx_softc *sc, int enable)
70 {
71 cn30xxasx_enable_tx(sc, enable);
72 cn30xxasx_enable_rx(sc, enable);
73 return 0;
74 }
75
76 int
cn30xxasx_enable_tx(struct cn30xxasx_softc * sc,int enable)77 cn30xxasx_enable_tx(struct cn30xxasx_softc *sc, int enable)
78 {
79 uint64_t asx_tx_port;
80
81 asx_tx_port = _ASX_RD8(sc, ASX0_TX_PRT_EN_OFFSET);
82 if (enable)
83 SET(asx_tx_port, 1 << sc->sc_port);
84 else
85 CLR(asx_tx_port, 1 << sc->sc_port);
86 _ASX_WR8(sc, ASX0_TX_PRT_EN_OFFSET, asx_tx_port);
87 return 0;
88 }
89
90 int
cn30xxasx_enable_rx(struct cn30xxasx_softc * sc,int enable)91 cn30xxasx_enable_rx(struct cn30xxasx_softc *sc, int enable)
92 {
93 uint64_t asx_rx_port;
94
95 asx_rx_port = _ASX_RD8(sc, ASX0_RX_PRT_EN_OFFSET);
96 if (enable)
97 SET(asx_rx_port, 1 << sc->sc_port);
98 else
99 CLR(asx_rx_port, 1 << sc->sc_port);
100 _ASX_WR8(sc, ASX0_RX_PRT_EN_OFFSET, asx_rx_port);
101 return 0;
102 }
103
104 int
cn30xxasx_clk_set(struct cn30xxasx_softc * sc,int tx_setting,int rx_setting)105 cn30xxasx_clk_set(struct cn30xxasx_softc *sc, int tx_setting, int rx_setting)
106 {
107 _ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, tx_setting);
108 _ASX_WR8(sc, ASX0_RX_CLK_SET0_OFFSET + 8 * sc->sc_port, rx_setting);
109 return 0;
110 }
111