1 /* $OpenBSD: via82c586.c,v 1.12 2023/01/30 10:49:05 jsg Exp $ */
2 /* $NetBSD: via82c586.c,v 1.2 2000/07/18 11:24:09 soda Exp $ */
3
4 /*-
5 * Copyright (c) 1999 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * Copyright (c) 1999, by UCHIYAMA Yasushi
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. The name of the developer may NOT be used to endorse or promote products
44 * derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * SUCH DAMAGE.
57 */
58
59 /*
60 * Support for the VIA 82c586 PCI-ISA bridge interrupt controller.
61 */
62
63 #include <sys/param.h>
64 #include <sys/systm.h>
65
66 #include <machine/intr.h>
67 #include <machine/bus.h>
68
69 #include <dev/pci/pcivar.h>
70
71 #include <i386/pci/pcibiosvar.h>
72 #include <i386/pci/via82c586reg.h>
73 #include <i386/pci/piixvar.h>
74
75 int via82c586_getclink(pciintr_icu_handle_t, int, int *);
76 int via82c586_get_intr(pciintr_icu_handle_t, int, int *);
77 int via82c586_set_intr(pciintr_icu_handle_t, int, int);
78 int via82c586_get_trigger(pciintr_icu_handle_t, int, int *);
79 int via82c586_set_trigger(pciintr_icu_handle_t, int, int);
80
81 const struct pciintr_icu via82c586_pci_icu = {
82 via82c586_getclink,
83 via82c586_get_intr,
84 via82c586_set_intr,
85 via82c586_get_trigger,
86 via82c586_set_trigger,
87 };
88
89 const int vp3_cfg_trigger_shift[] = {
90 VP3_CFG_TRIGGER_SHIFT_PIRQA,
91 VP3_CFG_TRIGGER_SHIFT_PIRQB,
92 VP3_CFG_TRIGGER_SHIFT_PIRQC,
93 VP3_CFG_TRIGGER_SHIFT_PIRQD,
94 };
95
96 #define VP3_TRIGGER(reg, pirq) (((reg) >> vp3_cfg_trigger_shift[(pirq)]) & \
97 VP3_CFG_TRIGGER_MASK)
98
99 const int vp3_cfg_intr_shift[] = {
100 VP3_CFG_INTR_SHIFT_PIRQA,
101 VP3_CFG_INTR_SHIFT_PIRQB,
102 VP3_CFG_INTR_SHIFT_PIRQC,
103 VP3_CFG_INTR_SHIFT_PIRQD,
104 VP3_CFG_INTR_SHIFT_PIRQ0,
105 VP3_CFG_INTR_SHIFT_PIRQ1,
106 VP3_CFG_INTR_SHIFT_PIRQ2,
107 };
108
109 #define VP3_PIRQ(reg, pirq) (((reg) >> vp3_cfg_intr_shift[(pirq)]) & \
110 VP3_CFG_INTR_MASK)
111
112 int
via82c586_init(pci_chipset_tag_t pc,bus_space_tag_t iot,pcitag_t tag,pciintr_icu_tag_t * ptagp,pciintr_icu_handle_t * phandp)113 via82c586_init(pci_chipset_tag_t pc, bus_space_tag_t iot, pcitag_t tag,
114 pciintr_icu_tag_t *ptagp, pciintr_icu_handle_t *phandp)
115 {
116 pcireg_t reg;
117
118 if (piix_init(pc, iot, tag, ptagp, phandp) == 0) {
119 *ptagp = &via82c586_pci_icu;
120
121 /*
122 * Enable EISA ELCR.
123 */
124 reg = pci_conf_read(pc, tag, VP3_CFG_KBDMISCCTRL12_REG);
125 reg |= VP3_CFG_MISCCTRL2_EISA4D04D1PORT_ENABLE <<
126 VP3_CFG_MISCCTRL2_SHIFT;
127 pci_conf_write(pc, tag, VP3_CFG_KBDMISCCTRL12_REG, reg);
128
129 return (0);
130 }
131
132 return (1);
133 }
134
135 int
via82c586_getclink(pciintr_icu_handle_t v,int link,int * clinkp)136 via82c586_getclink(pciintr_icu_handle_t v, int link, int *clinkp)
137 {
138
139 if (VP3_LEGAL_LINK(link - 1)) {
140 *clinkp = link - 1;
141 return (0);
142 }
143
144 return (1);
145 }
146
147 int
via82c586_get_intr(pciintr_icu_handle_t v,int clink,int * irqp)148 via82c586_get_intr(pciintr_icu_handle_t v, int clink, int *irqp)
149 {
150 struct piix_handle *ph = v;
151 pcireg_t reg;
152 int val;
153
154 if (VP3_LEGAL_LINK(clink) == 0)
155 return (1);
156
157 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG);
158 val = VP3_PIRQ(reg, clink);
159 *irqp = (val == VP3_PIRQ_NONE)?
160 I386_PCI_INTERRUPT_LINE_NO_CONNECTION : val;
161
162 return (0);
163 }
164
165 int
via82c586_set_intr(pciintr_icu_handle_t v,int clink,int irq)166 via82c586_set_intr(pciintr_icu_handle_t v, int clink, int irq)
167 {
168 struct piix_handle *ph = v;
169 int shift, val;
170 pcireg_t reg;
171
172 if (VP3_LEGAL_LINK(clink) == 0 || VP3_LEGAL_IRQ(irq) == 0)
173 return (1);
174
175 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG);
176 via82c586_get_intr(v, clink, &val);
177 shift = vp3_cfg_intr_shift[clink];
178 reg &= ~(VP3_CFG_INTR_MASK << shift);
179 reg |= (irq << shift);
180 pci_conf_write(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG, reg);
181 if (via82c586_get_intr(v, clink, &val) != 0 ||
182 val != irq)
183 return (1);
184
185 return (0);
186 }
187
188 int
via82c586_get_trigger(pciintr_icu_handle_t v,int irq,int * triggerp)189 via82c586_get_trigger(pciintr_icu_handle_t v, int irq, int *triggerp)
190 {
191 struct piix_handle *ph = v;
192 int i, error, check_consistency, pciirq, pcitrigger = IST_NONE;
193 pcireg_t reg;
194
195 if (VP3_LEGAL_IRQ(irq) == 0)
196 return (1);
197
198 check_consistency = 0;
199 for (i = 0; i <= 3; i++) {
200 via82c586_get_intr(v, i, &pciirq);
201 if (pciirq == irq) {
202 reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
203 VP3_CFG_PIRQ_REG);
204 if (VP3_TRIGGER(reg, i) == VP3_CFG_TRIGGER_EDGE)
205 pcitrigger = IST_EDGE;
206 else
207 pcitrigger = IST_LEVEL;
208 check_consistency = 1;
209 break;
210 }
211 }
212
213 error = piix_get_trigger(v, irq, triggerp);
214 if (error == 0 && check_consistency && pcitrigger != *triggerp)
215 return (1);
216 return (error);
217 }
218
219 int
via82c586_set_trigger(pciintr_icu_handle_t v,int irq,int trigger)220 via82c586_set_trigger(pciintr_icu_handle_t v, int irq, int trigger)
221 {
222 struct piix_handle *ph = v;
223 int i, pciirq, shift, testtrig;
224 pcireg_t reg;
225
226 if (VP3_LEGAL_IRQ(irq) == 0)
227 return (1);
228
229 for (i = 0; i <= 3; i++) {
230 via82c586_get_intr(v, i, &pciirq);
231 if (pciirq == irq) {
232 reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
233 VP3_CFG_PIRQ_REG);
234 shift = vp3_cfg_trigger_shift[i];
235 /* XXX we only upgrade the trigger here */
236 if (trigger == IST_LEVEL)
237 reg &= ~(VP3_CFG_TRIGGER_MASK << shift);
238 pci_conf_write(ph->ph_pc, ph->ph_tag,
239 VP3_CFG_PIRQ_REG, reg);
240 break;
241 }
242 }
243
244 if (piix_set_trigger(v, irq, trigger) != 0 ||
245 via82c586_get_trigger(v, irq, &testtrig) != 0 ||
246 testtrig != trigger)
247 return (1);
248
249 return (0);
250 }
251