xref: /openbsd-src/sys/arch/i386/include/pio.h (revision e39f036fc2ff0785d0b742d3bf3fea5b36d3eb45)
1 /*	$OpenBSD: pio.h,v 1.12 2015/04/25 21:31:24 guenther Exp $	*/
2 /*	$NetBSD: pio.h,v 1.13 1996/03/08 20:15:23 cgd Exp $	*/
3 
4 /*
5  * Copyright (c) 1993, 1995 Charles M. Hannum.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *      This product includes software developed by Charles M. Hannum.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _MACHINE_PIO_H_
34 #define _MACHINE_PIO_H_
35 
36 /*
37  * Functions to provide access to i386 programmed I/O instructions.
38  *
39  * The in[bwl]() and out[bwl]() functions are split into two varieties: one to
40  * use a small, constant, 8-bit port number, and another to use a large or
41  * variable port number.  The former can be compiled as a smaller instruction.
42  */
43 
44 
45 #ifdef __OPTIMIZE__
46 
47 #define	__use_immediate_port(port) \
48 	(__builtin_constant_p((port)) && (port) < 0x100)
49 
50 #else
51 
52 #define	__use_immediate_port(port)	0
53 
54 #endif
55 
56 
57 #define	inb(port) \
58 	(__use_immediate_port(port) ? __inbc(port) : __inb(port))
59 
60 static __inline u_int8_t
__inbc(int port)61 __inbc(int port)
62 {
63 	u_int8_t data;
64 	__asm volatile("inb %w1,%0" : "=a" (data) : "id" (port));
65 	return data;
66 }
67 
68 static __inline u_int8_t
__inb(int port)69 __inb(int port)
70 {
71 	u_int8_t data;
72 	__asm volatile("inb %w1,%0" : "=a" (data) : "d" (port));
73 	return data;
74 }
75 
76 static __inline void
insb(int port,void * addr,int cnt)77 insb(int port, void *addr, int cnt)
78 {
79 	__asm volatile("repne\n\tinsb"
80 	    : "+D" (addr), "+c" (cnt) : "d" (port) : "memory", "cc");
81 }
82 
83 #define	inw(port) \
84 	(__use_immediate_port(port) ? __inwc(port) : __inw(port))
85 
86 static __inline u_int16_t
__inwc(int port)87 __inwc(int port)
88 {
89 	u_int16_t data;
90 	__asm volatile("inw %w1,%0" : "=a" (data) : "id" (port));
91 	return data;
92 }
93 
94 static __inline u_int16_t
__inw(int port)95 __inw(int port)
96 {
97 	u_int16_t data;
98 	__asm volatile("inw %w1,%0" : "=a" (data) : "d" (port));
99 	return data;
100 }
101 
102 static __inline void
insw(int port,void * addr,int cnt)103 insw(int port, void *addr, int cnt)
104 {
105 	__asm volatile("repne\n\tinsw"
106 	    : "+D" (addr), "+c" (cnt) : "d" (port) : "memory", "cc");
107 }
108 
109 #define	inl(port) \
110 	(__use_immediate_port(port) ? __inlc(port) : __inl(port))
111 
112 static __inline u_int32_t
__inlc(int port)113 __inlc(int port)
114 {
115 	u_int32_t data;
116 	__asm volatile("inl %w1,%0" : "=a" (data) : "id" (port));
117 	return data;
118 }
119 
120 static __inline u_int32_t
__inl(int port)121 __inl(int port)
122 {
123 	u_int32_t data;
124 	__asm volatile("inl %w1,%0" : "=a" (data) : "d" (port));
125 	return data;
126 }
127 
128 static __inline void
insl(int port,void * addr,int cnt)129 insl(int port, void *addr, int cnt)
130 {
131 	__asm volatile("repne\n\tinsl"
132 	    : "+D" (addr), "+c" (cnt) : "d" (port) : "memory", "cc");
133 }
134 
135 #define	outb(port, data) \
136 	(__use_immediate_port(port) ? __outbc(port, data) : __outb(port, data))
137 
138 static __inline void
__outbc(int port,u_int8_t data)139 __outbc(int port, u_int8_t data)
140 {
141 	__asm volatile("outb %0,%w1" : : "a" (data), "id" (port));
142 }
143 
144 static __inline void
__outb(int port,u_int8_t data)145 __outb(int port, u_int8_t data)
146 {
147 	__asm volatile("outb %0,%w1" : : "a" (data), "d" (port));
148 }
149 
150 static __inline void
outsb(int port,const void * addr,int cnt)151 outsb(int port, const void *addr, int cnt)
152 {
153 	__asm volatile("repne\n\toutsb"
154 	    : "+S" (addr), "+c" (cnt) : "d" (port) : "cc");
155 }
156 
157 #define	outw(port, data) \
158 	(__use_immediate_port(port) ? __outwc(port, data) : __outw(port, data))
159 
160 static __inline void
__outwc(int port,u_int16_t data)161 __outwc(int port, u_int16_t data)
162 {
163 	__asm volatile("outw %0,%w1" : : "a" (data), "id" (port));
164 }
165 
166 static __inline void
__outw(int port,u_int16_t data)167 __outw(int port, u_int16_t data)
168 {
169 	__asm volatile("outw %0,%w1" : : "a" (data), "d" (port));
170 }
171 
172 static __inline void
outsw(int port,const void * addr,int cnt)173 outsw(int port, const void *addr, int cnt)
174 {
175 	__asm volatile("repne\n\toutsw"
176 	    : "+S" (addr), "+c" (cnt) : "d" (port) : "cc");
177 }
178 
179 #define	outl(port, data) \
180 	(__use_immediate_port(port) ? __outlc(port, data) : __outl(port, data))
181 
182 static __inline void
__outlc(int port,u_int32_t data)183 __outlc(int port, u_int32_t data)
184 {
185 	__asm volatile("outl %0,%w1" : : "a" (data), "id" (port));
186 }
187 
188 static __inline void
__outl(int port,u_int32_t data)189 __outl(int port, u_int32_t data)
190 {
191 	__asm volatile("outl %0,%w1" : : "a" (data), "d" (port));
192 }
193 
194 static __inline void
outsl(int port,const void * addr,int cnt)195 outsl(int port, const void *addr, int cnt)
196 {
197 	__asm volatile("repne\n\toutsl"
198 	    : "+S" (addr), "+c" (cnt) : "d" (port) : "cc");
199 }
200 
201 #endif /* _MACHINE_PIO_H_ */
202