1 /* $OpenBSD: k1x-pstate.c,v 1.8 2015/09/08 07:12:56 deraadt Exp $ */ 2 /* 3 * Copyright (c) 2011 Bryan Steele <brynet@gmail.com> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 /* AMD K10/K11 pstate driver */ 26 27 #include <sys/types.h> 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/malloc.h> 31 #include <sys/sysctl.h> 32 33 #include <machine/cpu.h> 34 #include <machine/cpufunc.h> 35 #include <machine/bus.h> 36 37 #include "acpicpu.h" 38 39 #if NACPICPU > 0 40 #include <dev/acpi/acpidev.h> 41 #include <dev/acpi/acpivar.h> 42 #endif 43 44 extern int setperf_prio; 45 46 #define MSR_K1X_LIMIT 0xc0010061 47 #define MSR_K1X_CONTROL 0xc0010062 48 #define MSR_K1X_STATUS 0xc0010063 49 #define MSR_K1X_CONFIG 0xc0010064 50 51 /* MSR_K1X_LIMIT */ 52 #define K1X_PSTATE_MAX_VAL(x) (((x) >> 4) & 0x7) 53 #define K1X_PSTATE_LIMIT(x) (((x)) & 0x7) 54 55 /* MSR_K1X_CONFIG */ 56 #define K1X_FID(x) ((x) & 0x3f) 57 #define K1X_DID(x) (((x) >> 6) & 0x07) 58 59 /* Maximum pstates */ 60 #define K1X_MAX_STATES 16 61 62 struct k1x_state { 63 int freq; 64 u_int8_t fid; 65 }; 66 67 struct k1x_cpu_state { 68 struct k1x_state state_table[K1X_MAX_STATES]; 69 u_int n_states; 70 }; 71 72 struct k1x_cpu_state *k1x_current_state; 73 74 void k1x_transition(struct k1x_cpu_state *, int); 75 76 #if NACPICPU > 0 77 void k1x_acpi_init(struct k1x_cpu_state *); 78 void k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int); 79 #endif 80 81 void 82 k1x_setperf(int level) 83 { 84 u_int i = 0; 85 struct k1x_cpu_state *cstate; 86 87 cstate = k1x_current_state; 88 89 i = ((level * cstate->n_states) + 1) / 101; 90 if (i >= cstate->n_states) 91 i = cstate->n_states - 1; 92 93 k1x_transition(cstate, i); 94 } 95 96 void 97 k1x_transition(struct k1x_cpu_state *cstate, int level) 98 { 99 u_int64_t msr; 100 int i, cfid, fid = cstate->state_table[level].fid; 101 102 msr = rdmsr(MSR_K1X_STATUS); 103 cfid = K1X_FID(msr); 104 105 if (fid == cfid) 106 return; 107 108 if (cfid != fid) { 109 wrmsr(MSR_K1X_CONTROL, fid); 110 for (i = 0; i < 100; i++) { 111 msr = rdmsr(MSR_K1X_STATUS); 112 if (K1X_FID(msr) == fid) 113 break; 114 DELAY(100); 115 } 116 cfid = K1X_FID(msr); 117 } 118 if (cfid == fid) { 119 cpuspeed = cstate->state_table[level].freq; 120 #if 0 121 (void)printf("Target: %d Current: %d Pstate: %d\n", 122 cstate->state_table[level].freq, 123 cpuspeed, cfid); 124 #endif 125 } 126 } 127 128 #if NACPICPU > 0 129 130 void 131 k1x_acpi_states(struct k1x_cpu_state *cstate, struct acpicpu_pss *pss, 132 int nstates) 133 { 134 struct k1x_state state; 135 int j, n; 136 u_int32_t ctrl; 137 138 for (n = 0; n < cstate->n_states; n++) { 139 ctrl = pss[n].pss_ctrl; 140 state.fid = K1X_FID(ctrl); 141 state.freq = pss[n].pss_core_freq; 142 j = n; 143 while (j > 0 && cstate->state_table[j - 1].freq > state.freq) { 144 memcpy(&cstate->state_table[j], 145 &cstate->state_table[j - 1], 146 sizeof(struct k1x_state)); 147 --j; 148 } 149 memcpy(&cstate->state_table[j], &state, 150 sizeof(struct k1x_state)); 151 } 152 } 153 154 void 155 k1x_acpi_init(struct k1x_cpu_state *cstate) 156 { 157 struct acpicpu_pss *pss; 158 159 cstate->n_states = acpicpu_fetch_pss(&pss); 160 if (cstate->n_states == 0) 161 return; 162 163 k1x_acpi_states(cstate, pss, cstate->n_states); 164 165 return; 166 } 167 168 #endif /* NACPICPU */ 169 170 void 171 k1x_init(struct cpu_info *ci) 172 { 173 struct k1x_cpu_state *cstate; 174 struct k1x_state *state; 175 u_int i; 176 177 if (setperf_prio > 1) 178 return; 179 180 cstate = malloc(sizeof(struct k1x_cpu_state), M_DEVBUF, M_NOWAIT); 181 if (!cstate) 182 return; 183 184 cstate->n_states = 0; 185 186 #if NACPICPU > 0 187 k1x_acpi_init(cstate); 188 #endif 189 if (cstate->n_states) { 190 printf("%s: %d MHz: speeds:", 191 ci->ci_dev.dv_xname, cpuspeed); 192 for (i = cstate->n_states; i > 0; i--) { 193 state = &cstate->state_table[i-1]; 194 printf(" %d", state->freq); 195 } 196 printf(" MHz\n"); 197 k1x_current_state = cstate; 198 cpu_setperf = k1x_setperf; 199 setperf_prio = 1; 200 return; 201 } 202 free(cstate, M_DEVBUF, sizeof(*cstate)); 203 } 204