xref: /openbsd-src/sys/arch/arm64/dev/smmu_fdt.c (revision 60036ea56503a2c67a8c44cc554c59bdb713d7ca)
1 /* $OpenBSD: smmu_fdt.c,v 1.7 2024/07/02 19:41:52 patrick Exp $ */
2 /*
3  * Copyright (c) 2021 Patrick Wildt <patrick@blueri.se>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #include <sys/param.h>
19 #include <sys/systm.h>
20 #include <sys/device.h>
21 #include <sys/pool.h>
22 
23 #include <machine/bus.h>
24 #include <machine/fdt.h>
25 #include <machine/intr.h>
26 
27 #include <dev/ofw/openfirm.h>
28 #include <dev/ofw/ofw_misc.h>
29 #include <dev/ofw/fdt.h>
30 
31 #include <dev/pci/pcivar.h>
32 #include <arm64/dev/smmuvar.h>
33 #include <arm64/dev/smmureg.h>
34 
35 struct smmu_fdt_softc {
36 	struct smmu_softc	 sc_smmu;
37 
38 	struct iommu_device	 sc_id;
39 };
40 
41 int smmu_fdt_match(struct device *, void *, void *);
42 void smmu_fdt_attach(struct device *, struct device *, void *);
43 
44 bus_dma_tag_t smmu_fdt_map(void *, uint32_t *, bus_dma_tag_t);
45 void smmu_fdt_reserve(void *, uint32_t *, bus_addr_t, bus_size_t);
46 
47 const struct cfattach smmu_fdt_ca = {
48 	sizeof(struct smmu_fdt_softc), smmu_fdt_match, smmu_fdt_attach
49 };
50 
51 int
smmu_fdt_match(struct device * parent,void * match,void * aux)52 smmu_fdt_match(struct device *parent, void *match, void *aux)
53 {
54 	struct fdt_attach_args *faa = aux;
55 
56 	return (OF_is_compatible(faa->fa_node, "arm,smmu-v2") ||
57 	    OF_is_compatible(faa->fa_node, "arm,mmu-500"));
58 }
59 
60 void
smmu_fdt_attach(struct device * parent,struct device * self,void * aux)61 smmu_fdt_attach(struct device *parent, struct device *self, void *aux)
62 {
63 	struct smmu_fdt_softc *fsc = (struct smmu_fdt_softc *)self;
64 	struct smmu_softc *sc = &fsc->sc_smmu;
65 	struct fdt_attach_args *faa = aux;
66 	uint32_t ngirq;
67 	int i;
68 
69 	if (faa->fa_nreg < 1) {
70 		printf(": no registers\n");
71 		return;
72 	}
73 
74 	sc->sc_dmat = faa->fa_dmat;
75 	sc->sc_iot = faa->fa_iot;
76 	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
77 	    faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
78 		printf(": can't map registers\n");
79 		return;
80 	}
81 
82 	if (OF_is_compatible(faa->fa_node, "arm,mmu-500"))
83 		sc->sc_is_mmu500 = 1;
84 	if (OF_is_compatible(faa->fa_node, "marvell,ap806-smmu-500"))
85 		sc->sc_is_ap806 = 1;
86 	if (OF_is_compatible(faa->fa_node, "qcom,sc8280xp-smmu-500") ||
87 	    OF_is_compatible(faa->fa_node, "qcom,x1e80100-smmu-500"))
88 		sc->sc_is_qcom = 1;
89 	if (OF_getproplen(faa->fa_node, "dma-coherent") == 0)
90 		sc->sc_coherent = 1;
91 
92 	if (sc->sc_is_qcom) {
93 		printf(": disabled\n");
94 		return;
95 	}
96 
97 	if (smmu_attach(sc) != 0)
98 		return;
99 
100 	ngirq = OF_getpropint(faa->fa_node, "#global-interrupts", 1);
101 	for (i = 0; i < ngirq; i++) {
102 		fdt_intr_establish_idx(faa->fa_node, i, IPL_TTY,
103 		    smmu_global_irq, sc, sc->sc_dev.dv_xname);
104 	}
105 	for (i = ngirq; ; i++) {
106 		struct smmu_cb_irq *cbi = malloc(sizeof(*cbi),
107 		    M_DEVBUF, M_WAITOK);
108 		cbi->cbi_sc = sc;
109 		cbi->cbi_idx = i - ngirq;
110 		if (fdt_intr_establish_idx(faa->fa_node, i, IPL_TTY,
111 		    smmu_context_irq, cbi, sc->sc_dev.dv_xname) == NULL) {
112 			free(cbi, M_DEVBUF, sizeof(*cbi));
113 			break;
114 		}
115 	}
116 
117 	fsc->sc_id.id_node = faa->fa_node;
118 	fsc->sc_id.id_cookie = fsc;
119 	fsc->sc_id.id_map = smmu_fdt_map;
120 	fsc->sc_id.id_reserve = smmu_fdt_reserve;
121 	iommu_device_register(&fsc->sc_id);
122 }
123 
124 bus_dma_tag_t
smmu_fdt_map(void * cookie,uint32_t * cells,bus_dma_tag_t dmat)125 smmu_fdt_map(void *cookie, uint32_t *cells, bus_dma_tag_t dmat)
126 {
127 	struct smmu_fdt_softc *fsc = (struct smmu_fdt_softc *)cookie;
128 	struct smmu_softc *sc = &fsc->sc_smmu;
129 
130 	return smmu_device_map(sc, cells[0], dmat);
131 }
132 
133 void
smmu_fdt_reserve(void * cookie,uint32_t * cells,bus_addr_t addr,bus_size_t size)134 smmu_fdt_reserve(void *cookie, uint32_t *cells, bus_addr_t addr,
135     bus_size_t size)
136 {
137 	struct smmu_fdt_softc *fsc = (struct smmu_fdt_softc *)cookie;
138 	struct smmu_softc *sc = &fsc->sc_smmu;
139 
140 	return smmu_reserve_region(sc, cells[0], addr, size);
141 }
142