xref: /openbsd-src/sys/arch/alpha/pci/pci_alphabook1.c (revision b27348b2082c02cb5227e0e4933400ad6739ec5a)
1 /* $OpenBSD: pci_alphabook1.c,v 1.5 2017/09/08 05:36:51 deraadt Exp $ */
2 /* $NetBSD: pci_alphabook1.c,v 1.16 2012/02/06 02:14:15 matt Exp $ */
3 
4 /*-
5  * Copyright (c) 1998 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
36  * All rights reserved.
37  *
38  * Authors: Jeffrey Hsu and Chris G. Demetriou
39  *
40  * Permission to use, copy, modify and distribute this software and
41  * its documentation is hereby granted, provided that both the copyright
42  * notice and this permission notice appear in all copies of the
43  * software, derivative works or modified versions, and any portions
44  * thereof, and that both notices appear in supporting documentation.
45  *
46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49  *
50  * Carnegie Mellon requests users of this software to return to
51  *
52  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
53  *  School of Computer Science
54  *  Carnegie Mellon University
55  *  Pittsburgh PA 15213-3890
56  *
57  * any improvements or extensions that they make and grant Carnegie the
58  * rights to redistribute these changes.
59  */
60 
61 #include <sys/param.h>
62 #include <sys/time.h>
63 #include <sys/systm.h>
64 #include <sys/errno.h>
65 #include <sys/device.h>
66 
67 #include <machine/intr.h>
68 
69 #include <dev/isa/isavar.h>
70 #include <dev/pci/pcireg.h>
71 #include <dev/pci/pcivar.h>
72 #include <dev/pci/ppbreg.h>
73 
74 #include <alpha/pci/lcavar.h>
75 
76 #include <alpha/pci/pci_alphabook1.h>
77 #include <alpha/pci/siovar.h>
78 
79 #include "sio.h"
80 
81 int     dec_alphabook1_intr_map(struct pci_attach_args *,
82 	    pci_intr_handle_t *);
83 const char *dec_alphabook1_intr_string(void *, pci_intr_handle_t);
84 int	 dec_alphabook1_intr_line(void *, pci_intr_handle_t);
85 void    *dec_alphabook1_intr_establish(void *, pci_intr_handle_t,
86 	    int, int (*func)(void *), void *, const char *);
87 void    dec_alphabook1_intr_disestablish(void *, void *);
88 
89 #define	LCA_SIO_DEVICE	7	/* XXX */
90 
91 void
pci_alphabook1_pickintr(struct lca_config * lcp)92 pci_alphabook1_pickintr(struct lca_config *lcp)
93 {
94 	bus_space_tag_t iot = &lcp->lc_iot;
95 	pci_chipset_tag_t pc = &lcp->lc_pc;
96 	pcireg_t sioclass;
97 	int sioII;
98 
99 	/* XXX MAGIC NUMBER */
100 	sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
101 	    PCI_CLASS_REG);
102 	sioII = (sioclass & 0xff) >= 3;
103 
104 	if (!sioII)
105 		printf("WARNING: SIO NOT SIO II... NO BETS...\n");
106 
107 	pc->pc_intr_v = lcp;
108 	pc->pc_intr_map = dec_alphabook1_intr_map;
109 	pc->pc_intr_string = dec_alphabook1_intr_string;
110 	pc->pc_intr_line = dec_alphabook1_intr_line;
111 	pc->pc_intr_establish = dec_alphabook1_intr_establish;
112 	pc->pc_intr_disestablish = dec_alphabook1_intr_disestablish;
113 
114 	/* Not supported on AlphaBook. */
115 	pc->pc_pciide_compat_intr_establish = NULL;
116 
117 #if NSIO
118 	sio_intr_setup(pc, iot);
119 #else
120 	panic("pci_alphabook1_pickintr: no I/O interrupt handler (no sio)");
121 #endif
122 }
123 
124 int
dec_alphabook1_intr_map(struct pci_attach_args * pa,pci_intr_handle_t * ihp)125 dec_alphabook1_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
126 {
127 	pcitag_t bustag = pa->pa_intrtag;
128 	int buspin, device;
129 
130 #ifdef notyet
131 	if (pa->pa_bridgetag) {
132 		buspin = PPB_INTERRUPT_SWIZZLE(pa->pa_rawintrpin,
133 		    pa->pa_device);
134 		if (pa->pa_bridgeih[buspin - 1] == 0)
135 			return 1;
136 
137 		*ihp = pa->pa_bridgeih[buspin - 1];
138 		return 0;
139 	}
140 #endif
141 
142 	buspin = pa->pa_intrpin;
143 	pci_decompose_tag(pa->pa_pc, bustag, NULL, &device, NULL);
144 
145 	/*
146 	 * There are only two interrupting PCI devices on the AlphaBook:
147 	 * the SCSI and PCMCIA controllers. The other PCI device is the
148 	 * SIO, and there are no option slots available.
149 	 *
150 	 * NOTE!  Apparently, there was a later AlphaBook which uses
151 	 * a different interrupt scheme, and has a built-in Tulip Ethernet
152 	 * interface!  We do not handle that here!
153 	 */
154 
155 	switch (device) {
156 	case 6:					/* NCR SCSI */
157 		*ihp = 14;
158 		return 0;
159 	case 8:					/* Cirrus CL-PD6729 */
160 		*ihp = 15;
161 		return 0;
162 	default:
163 	        return 1;
164 	}
165 }
166 
167 const char *
dec_alphabook1_intr_string(void * lcv,pci_intr_handle_t ih)168 dec_alphabook1_intr_string(void *lcv, pci_intr_handle_t ih)
169 {
170 	return sio_intr_string(NULL /*XXX*/, ih);
171 }
172 
173 int
dec_alphabook1_intr_line(void * lcv,pci_intr_handle_t ih)174 dec_alphabook1_intr_line(void *lcv, pci_intr_handle_t ih)
175 {
176 	return sio_intr_line(NULL /*XXX*/, ih);
177 }
178 
179 void *
dec_alphabook1_intr_establish(void * lcv,pci_intr_handle_t ih,int level,int (* func)(void *),void * arg,const char * name)180 dec_alphabook1_intr_establish(void *lcv, pci_intr_handle_t ih,
181     int level, int (*func)(void *), void *arg, const char *name)
182 {
183 	/*
184 	 * PCI interrupts on that platform are ISA interrupts in disguise,
185 	 * and are edge- rather than level-triggered.
186 	 */
187 	return sio_intr_establish(NULL /*XXX*/, ih, IST_EDGE, level, func,
188 	    arg, name);
189 }
190 
191 void
dec_alphabook1_intr_disestablish(void * lcv,void * cookie)192 dec_alphabook1_intr_disestablish(void *lcv, void *cookie)
193 {
194 	sio_intr_disestablish(NULL /*XXX*/, cookie);
195 }
196