1.\" $OpenBSD: cpu.4,v 1.20 2024/09/10 17:01:09 tb Exp $ 2.\" 3.\" Copyright (c) 2004 Ted Unangst 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25.\" 26.Dd $Mdocdate: September 10 2024 $ 27.Dt CPU 4 i386 28.Os 29.Sh NAME 30.Nm cpu 31.Nd Central Processing Unit 32.Sh SYNOPSIS 33.Cd "cpu0 at mainbus?" 34.Cd "cpu* at mainbus?" 35.Sh DESCRIPTION 36Several processor models have additional features that extend their base 37functionality, such as power and frequency control or thermal monitoring. 38.Pp 39The 40.Xr sysctl 2 41.Va hw.cpuspeed 42returns the current operating frequency of the processor, 43though on some processors this value may be only an approximation. 44If possible, speed may be adjusted by altering 45.Va hw.setperf 46from 0 to 100, 47representing percentage of maximum speed. 48.Pp 49There are several possible implementations for speed adjustment, 50all transparent to the user. 51In systems with more than one control capability, they are preferred in the 52order given: 53.Bl -tag -width tenletters 54.It LongRun 55Found on Transmeta Crusoe processors, offering frequency scaling with numerous 56positions. 57The processor dynamically adjusts frequency in response to load; the setperf 58value is interpreted as the maximum. 59.It EST 60Enhanced SpeedStep found on Intel Pentium M processors, 61offering frequency scaling with numerous positions. 62.It SpeedStep 63Found on some Intel Pentium 3 and newer mobile chips, 64it is capable of adjusting frequency between a low and high value. 65It is only enabled on some chipsets. 66.It TCC 67Thermal Control Circuit found on Intel Pentium 4 and newer processors, 68it can adjust processor duty cycle in 12.5 percent increments. 69.It PowerNow 70Found on various AMD processors. 71It currently only supports a limited set of models 72in the K6, K7, and K8 families. 73.El 74.Pp 75The presence of extended instruction sets can be determined by the sysctl 76.Va machdep : 77.Bl -tag -width "tenletters" 78.It osfxsr 79Supports the fxsave instruction. 80.It sse 81Supports the SSE instruction set. 82.It sse2 83Supports the SSE2 instruction set. 84.It xcrypt 85Supports the VIA AES encryption instruction set. 86.El 87.Pp 88The sysctl 89.Va hw.sensors 90returns the current temperature reported by the processor. 91.Sh SEE ALSO 92.Xr sysctl 8 93.Sh BUGS 94Due to the way in which thermal information is reported on Intel processors, 95the temperature may be off by exactly +/-15 degrees C. 96.Pp 97For multiprocessor kernels with more than one CPU sensor, 98processors report identical temperatures 99since the temperature is taken from the processor running the sensors update. 100