10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 50Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 60Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 70Sstevel@tonic-gate * with the License. 80Sstevel@tonic-gate * 90Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 100Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 110Sstevel@tonic-gate * See the License for the specific language governing permissions 120Sstevel@tonic-gate * and limitations under the License. 130Sstevel@tonic-gate * 140Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 150Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 160Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 170Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 180Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 190Sstevel@tonic-gate * 200Sstevel@tonic-gate * CDDL HEADER END 210Sstevel@tonic-gate */ 220Sstevel@tonic-gate /* 230Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 280Sstevel@tonic-gate 290Sstevel@tonic-gate /* 30509Smrj * x86 root nexus driver 310Sstevel@tonic-gate */ 320Sstevel@tonic-gate 330Sstevel@tonic-gate #include <sys/sysmacros.h> 340Sstevel@tonic-gate #include <sys/conf.h> 350Sstevel@tonic-gate #include <sys/autoconf.h> 360Sstevel@tonic-gate #include <sys/sysmacros.h> 370Sstevel@tonic-gate #include <sys/debug.h> 380Sstevel@tonic-gate #include <sys/psw.h> 390Sstevel@tonic-gate #include <sys/ddidmareq.h> 400Sstevel@tonic-gate #include <sys/promif.h> 410Sstevel@tonic-gate #include <sys/devops.h> 420Sstevel@tonic-gate #include <sys/kmem.h> 430Sstevel@tonic-gate #include <sys/cmn_err.h> 440Sstevel@tonic-gate #include <vm/seg.h> 450Sstevel@tonic-gate #include <vm/seg_kmem.h> 460Sstevel@tonic-gate #include <vm/seg_dev.h> 470Sstevel@tonic-gate #include <sys/vmem.h> 480Sstevel@tonic-gate #include <sys/mman.h> 490Sstevel@tonic-gate #include <vm/hat.h> 500Sstevel@tonic-gate #include <vm/as.h> 510Sstevel@tonic-gate #include <vm/page.h> 520Sstevel@tonic-gate #include <sys/avintr.h> 530Sstevel@tonic-gate #include <sys/errno.h> 540Sstevel@tonic-gate #include <sys/modctl.h> 550Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 560Sstevel@tonic-gate #include <sys/sunddi.h> 570Sstevel@tonic-gate #include <sys/sunndi.h> 58*916Sschwartz #include <sys/mach_intr.h> 590Sstevel@tonic-gate #include <sys/psm.h> 600Sstevel@tonic-gate #include <sys/ontrap.h> 61509Smrj #include <sys/atomic.h> 62509Smrj #include <sys/sdt.h> 63509Smrj #include <sys/rootnex.h> 64509Smrj #include <vm/hat_i86.h> 65509Smrj 66509Smrj 67509Smrj /* 68509Smrj * enable/disable extra checking of function parameters. Useful for debugging 69509Smrj * drivers. 70509Smrj */ 71509Smrj #ifdef DEBUG 72509Smrj int rootnex_alloc_check_parms = 1; 73509Smrj int rootnex_bind_check_parms = 1; 74509Smrj int rootnex_bind_check_inuse = 1; 75509Smrj int rootnex_unbind_verify_buffer = 0; 76509Smrj int rootnex_sync_check_parms = 1; 77509Smrj #else 78509Smrj int rootnex_alloc_check_parms = 0; 79509Smrj int rootnex_bind_check_parms = 0; 80509Smrj int rootnex_bind_check_inuse = 0; 81509Smrj int rootnex_unbind_verify_buffer = 0; 82509Smrj int rootnex_sync_check_parms = 0; 83509Smrj #endif 84509Smrj 85509Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 860Sstevel@tonic-gate int rootnex_bind_fail = 1; 870Sstevel@tonic-gate int rootnex_bind_warn = 1; 880Sstevel@tonic-gate uint8_t *rootnex_warn_list; 890Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 900Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 910Sstevel@tonic-gate 920Sstevel@tonic-gate /* 93509Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 94509Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 95509Smrj * the offset and size into ddi_dma_sync(). 960Sstevel@tonic-gate */ 97509Smrj int rootnex_sync_ignore_params = 0; 980Sstevel@tonic-gate 990Sstevel@tonic-gate /* 100509Smrj * maximum size that we will allow for a copy buffer. Can be patched on the 101509Smrj * fly 1020Sstevel@tonic-gate */ 103509Smrj size_t rootnex_max_copybuf_size = 0x100000; 1040Sstevel@tonic-gate 1050Sstevel@tonic-gate /* 106509Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 107509Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 108509Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 109509Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 110509Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 111509Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 112509Smrj * (if we need one). These can only be modified in /etc/system before rootnex 113509Smrj * attach. 1140Sstevel@tonic-gate */ 115509Smrj #if defined(__amd64) 116509Smrj int rootnex_prealloc_cookies = 65; 117509Smrj int rootnex_prealloc_windows = 4; 118509Smrj int rootnex_prealloc_copybuf = 2; 119509Smrj #else 120509Smrj int rootnex_prealloc_cookies = 33; 121509Smrj int rootnex_prealloc_windows = 4; 122509Smrj int rootnex_prealloc_copybuf = 2; 123509Smrj #endif 124509Smrj 125509Smrj /* driver global state */ 126509Smrj static rootnex_state_t *rootnex_state; 127509Smrj 128509Smrj /* shortcut to rootnex counters */ 129509Smrj static uint64_t *rootnex_cnt; 1300Sstevel@tonic-gate 1310Sstevel@tonic-gate /* 132509Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1330Sstevel@tonic-gate */ 134509Smrj /* statically defined integer/boolean properties for the root node */ 135509Smrj static rootnex_intprop_t rootnex_intprp[] = { 136509Smrj { "PAGESIZE", PAGESIZE }, 137509Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 138509Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 139509Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 140509Smrj }; 141509Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 142509Smrj 143509Smrj 144509Smrj static struct cb_ops rootnex_cb_ops = { 145509Smrj nodev, /* open */ 146509Smrj nodev, /* close */ 147509Smrj nodev, /* strategy */ 148509Smrj nodev, /* print */ 149509Smrj nodev, /* dump */ 150509Smrj nodev, /* read */ 151509Smrj nodev, /* write */ 152509Smrj nodev, /* ioctl */ 153509Smrj nodev, /* devmap */ 154509Smrj nodev, /* mmap */ 155509Smrj nodev, /* segmap */ 156509Smrj nochpoll, /* chpoll */ 157509Smrj ddi_prop_op, /* cb_prop_op */ 158509Smrj NULL, /* struct streamtab */ 159509Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 160509Smrj CB_REV, /* Rev */ 161509Smrj nodev, /* cb_aread */ 162509Smrj nodev /* cb_awrite */ 163509Smrj }; 164509Smrj 165509Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1660Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 167509Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1680Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1690Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 170509Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1710Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 172509Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 173509Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 174509Smrj ddi_dma_handle_t *handlep); 175509Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 176509Smrj ddi_dma_handle_t handle); 177509Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 178509Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 179509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 180509Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 181509Smrj ddi_dma_handle_t handle); 182509Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 183509Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 184509Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 185509Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 186509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 187509Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 1880Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 1890Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 190509Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 191509Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 192509Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 193509Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 194509Smrj 1950Sstevel@tonic-gate 1960Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 1970Sstevel@tonic-gate BUSO_REV, 1980Sstevel@tonic-gate rootnex_map, 1990Sstevel@tonic-gate NULL, 2000Sstevel@tonic-gate NULL, 2010Sstevel@tonic-gate NULL, 2020Sstevel@tonic-gate rootnex_map_fault, 2030Sstevel@tonic-gate rootnex_dma_map, 2040Sstevel@tonic-gate rootnex_dma_allochdl, 2050Sstevel@tonic-gate rootnex_dma_freehdl, 2060Sstevel@tonic-gate rootnex_dma_bindhdl, 2070Sstevel@tonic-gate rootnex_dma_unbindhdl, 208509Smrj rootnex_dma_sync, 2090Sstevel@tonic-gate rootnex_dma_win, 2100Sstevel@tonic-gate rootnex_dma_mctl, 2110Sstevel@tonic-gate rootnex_ctlops, 2120Sstevel@tonic-gate ddi_bus_prop_op, 2130Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2140Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2150Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2160Sstevel@tonic-gate i_ddi_rootnex_post_event, 2170Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2180Sstevel@tonic-gate 0, /* bus_config */ 2190Sstevel@tonic-gate 0, /* bus_unconfig */ 2200Sstevel@tonic-gate NULL, /* bus_fm_init */ 2210Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2220Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2230Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2240Sstevel@tonic-gate NULL, /* bus_powr */ 2250Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2260Sstevel@tonic-gate }; 2270Sstevel@tonic-gate 228509Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 229509Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 2300Sstevel@tonic-gate 2310Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2320Sstevel@tonic-gate DEVO_REV, 233509Smrj 0, 234509Smrj ddi_no_info, 235509Smrj nulldev, 2360Sstevel@tonic-gate nulldev, 2370Sstevel@tonic-gate rootnex_attach, 238509Smrj rootnex_detach, 239509Smrj nulldev, 240509Smrj &rootnex_cb_ops, 2410Sstevel@tonic-gate &rootnex_bus_ops 2420Sstevel@tonic-gate }; 2430Sstevel@tonic-gate 244509Smrj static struct modldrv rootnex_modldrv = { 245509Smrj &mod_driverops, 246509Smrj "i86pc root nexus %I%", 247509Smrj &rootnex_ops 248509Smrj }; 249509Smrj 250509Smrj static struct modlinkage rootnex_modlinkage = { 251509Smrj MODREV_1, 252509Smrj (void *)&rootnex_modldrv, 253509Smrj NULL 254509Smrj }; 255509Smrj 256509Smrj 257509Smrj /* 258509Smrj * extern hacks 259509Smrj */ 260509Smrj extern struct seg_ops segdev_ops; 261509Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 262509Smrj #ifdef DDI_MAP_DEBUG 263509Smrj extern int ddi_map_debug_flag; 264509Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 265509Smrj #endif 266509Smrj #define ptob64(x) (((uint64_t)(x)) << MMU_PAGESHIFT) 267509Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 268509Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 269509Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 270509Smrj psm_intr_op_t, int *); 271509Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 272509Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 273509Smrj /* 274509Smrj * Use device arena to use for device control register mappings. 275509Smrj * Various kernel memory walkers (debugger, dtrace) need to know 276509Smrj * to avoid this address range to prevent undesired device activity. 277509Smrj */ 278509Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 279509Smrj extern void device_arena_free(void * vaddr, size_t size); 280509Smrj 281509Smrj 2820Sstevel@tonic-gate /* 283509Smrj * Internal functions 2840Sstevel@tonic-gate */ 285509Smrj static int rootnex_dma_init(); 286509Smrj static void rootnex_add_props(dev_info_t *); 287509Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 288509Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 289509Smrj static int rootnex_ctlops_poke(peekpoke_ctlops_t *in_args); 290509Smrj static int rootnex_ctlops_peek(peekpoke_ctlops_t *in_args, void *result); 291509Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 292509Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 293509Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 294509Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 295509Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 296509Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 297509Smrj ddi_dma_attr_t *attr); 298509Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 299509Smrj rootnex_sglinfo_t *sglinfo); 300509Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 301509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 302509Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 303509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 304509Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 305509Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 306509Smrj ddi_dma_attr_t *attr, int kmflag); 307509Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 308509Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 309509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 310509Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 311509Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 312509Smrj size_t *copybuf_used, page_t **cur_pp); 313509Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 314509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 315509Smrj ddi_dma_attr_t *attr, off_t cur_offset); 316509Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 317509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 318509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 319509Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 320509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 321509Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 322509Smrj off_t offset, size_t size, uint_t cache_flags); 323509Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 324509Smrj 325509Smrj 326509Smrj /* 327509Smrj * _init() 328509Smrj * 329509Smrj */ 3300Sstevel@tonic-gate int 3310Sstevel@tonic-gate _init(void) 3320Sstevel@tonic-gate { 333509Smrj 334509Smrj rootnex_state = NULL; 335509Smrj return (mod_install(&rootnex_modlinkage)); 3360Sstevel@tonic-gate } 3370Sstevel@tonic-gate 338509Smrj 339509Smrj /* 340509Smrj * _info() 341509Smrj * 342509Smrj */ 343509Smrj int 344509Smrj _info(struct modinfo *modinfop) 345509Smrj { 346509Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 347509Smrj } 348509Smrj 349509Smrj 350509Smrj /* 351509Smrj * _fini() 352509Smrj * 353509Smrj */ 3540Sstevel@tonic-gate int 3550Sstevel@tonic-gate _fini(void) 3560Sstevel@tonic-gate { 3570Sstevel@tonic-gate return (EBUSY); 3580Sstevel@tonic-gate } 3590Sstevel@tonic-gate 3600Sstevel@tonic-gate 3610Sstevel@tonic-gate /* 362509Smrj * rootnex_attach() 3630Sstevel@tonic-gate * 3640Sstevel@tonic-gate */ 365509Smrj static int 366509Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 367509Smrj { 368509Smrj int e; 369509Smrj 370509Smrj 371509Smrj switch (cmd) { 372509Smrj case DDI_ATTACH: 373509Smrj break; 374509Smrj case DDI_RESUME: 375509Smrj return (DDI_SUCCESS); 376509Smrj default: 377509Smrj return (DDI_FAILURE); 378509Smrj } 379509Smrj 380509Smrj /* 381509Smrj * We should only have one instance of rootnex. Save it away since we 382509Smrj * don't have an easy way to get it back later. 383509Smrj */ 384509Smrj ASSERT(rootnex_state == NULL); 385509Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 386509Smrj 387509Smrj rootnex_state->r_dip = dip; 388509Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 389509Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 390509Smrj 391509Smrj mutex_init(&rootnex_state->r_peekpoke_mutex, NULL, MUTEX_SPIN, 392509Smrj (void *)ipltospl(15)); 393509Smrj 394509Smrj /* initialize DMA related state */ 395509Smrj e = rootnex_dma_init(); 396509Smrj if (e != DDI_SUCCESS) { 397509Smrj mutex_destroy(&rootnex_state->r_peekpoke_mutex); 398509Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 399509Smrj return (DDI_FAILURE); 400509Smrj } 401509Smrj 402509Smrj /* Add static root node properties */ 403509Smrj rootnex_add_props(dip); 404509Smrj 405509Smrj /* since we can't call ddi_report_dev() */ 406509Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 407509Smrj 408509Smrj /* Initialize rootnex event handle */ 409509Smrj i_ddi_rootnex_init_events(dip); 410509Smrj 411509Smrj return (DDI_SUCCESS); 412509Smrj } 413509Smrj 414509Smrj 415509Smrj /* 416509Smrj * rootnex_detach() 417509Smrj * 418509Smrj */ 4190Sstevel@tonic-gate /*ARGSUSED*/ 4200Sstevel@tonic-gate static int 421509Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 422509Smrj { 423509Smrj switch (cmd) { 424509Smrj case DDI_SUSPEND: 425509Smrj break; 426509Smrj default: 427509Smrj return (DDI_FAILURE); 428509Smrj } 429509Smrj 430509Smrj return (DDI_SUCCESS); 431509Smrj } 432509Smrj 433509Smrj 434509Smrj /* 435509Smrj * rootnex_dma_init() 436509Smrj * 437509Smrj */ 438509Smrj /*ARGSUSED*/ 439509Smrj static int 440509Smrj rootnex_dma_init() 4410Sstevel@tonic-gate { 442509Smrj size_t bufsize; 443509Smrj 444509Smrj 445509Smrj /* 446509Smrj * size of our cookie/window/copybuf state needed in dma bind that we 447509Smrj * pre-alloc in dma_alloc_handle 448509Smrj */ 449509Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 450509Smrj rootnex_state->r_prealloc_size = 451509Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 452509Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 453509Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 454509Smrj 455509Smrj /* 456509Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 457509Smrj * allocate 16 extra bytes for struct pointer alignment 458509Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 459509Smrj */ 460509Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 461509Smrj rootnex_state->r_prealloc_size + 0x10; 462509Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 463509Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 464509Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 465509Smrj return (DDI_FAILURE); 466509Smrj } 4670Sstevel@tonic-gate 4680Sstevel@tonic-gate /* 4690Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 4700Sstevel@tonic-gate * for. 4710Sstevel@tonic-gate */ 4720Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 4730Sstevel@tonic-gate KM_SLEEP); 4740Sstevel@tonic-gate 4750Sstevel@tonic-gate return (DDI_SUCCESS); 4760Sstevel@tonic-gate } 4770Sstevel@tonic-gate 4780Sstevel@tonic-gate 4790Sstevel@tonic-gate /* 480509Smrj * rootnex_add_props() 481509Smrj * 4820Sstevel@tonic-gate */ 4830Sstevel@tonic-gate static void 484509Smrj rootnex_add_props(dev_info_t *dip) 4850Sstevel@tonic-gate { 486509Smrj rootnex_intprop_t *rpp; 4870Sstevel@tonic-gate int i; 488509Smrj 489509Smrj /* Add static integer/boolean properties to the root node */ 490509Smrj rpp = rootnex_intprp; 491509Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 492509Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 493509Smrj rpp[i].prop_name, rpp[i].prop_value); 4940Sstevel@tonic-gate } 4950Sstevel@tonic-gate } 4960Sstevel@tonic-gate 497509Smrj 498509Smrj 499509Smrj /* 500509Smrj * ************************* 501509Smrj * ctlops related routines 502509Smrj * ************************* 503509Smrj */ 504509Smrj 5050Sstevel@tonic-gate /* 506509Smrj * rootnex_ctlops() 507509Smrj * 5080Sstevel@tonic-gate */ 509693Sgovinda /*ARGSUSED*/ 510509Smrj static int 511509Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 512509Smrj void *arg, void *result) 513509Smrj { 514509Smrj int n, *ptr; 515509Smrj struct ddi_parent_private_data *pdp; 516509Smrj 517509Smrj switch (ctlop) { 518509Smrj case DDI_CTLOPS_DMAPMAPC: 519509Smrj /* 520509Smrj * Return 'partial' to indicate that dma mapping 521509Smrj * has to be done in the main MMU. 522509Smrj */ 523509Smrj return (DDI_DMA_PARTIAL); 524509Smrj 525509Smrj case DDI_CTLOPS_BTOP: 526509Smrj /* 527509Smrj * Convert byte count input to physical page units. 528509Smrj * (byte counts that are not a page-size multiple 529509Smrj * are rounded down) 530509Smrj */ 531509Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 532509Smrj return (DDI_SUCCESS); 533509Smrj 534509Smrj case DDI_CTLOPS_PTOB: 535509Smrj /* 536509Smrj * Convert size in physical pages to bytes 537509Smrj */ 538509Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 539509Smrj return (DDI_SUCCESS); 540509Smrj 541509Smrj case DDI_CTLOPS_BTOPR: 542509Smrj /* 543509Smrj * Convert byte count input to physical page units 544509Smrj * (byte counts that are not a page-size multiple 545509Smrj * are rounded up) 546509Smrj */ 547509Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 548509Smrj return (DDI_SUCCESS); 549509Smrj 550509Smrj case DDI_CTLOPS_POKE: 551509Smrj return (rootnex_ctlops_poke((peekpoke_ctlops_t *)arg)); 552509Smrj 553509Smrj case DDI_CTLOPS_PEEK: 554509Smrj return (rootnex_ctlops_peek((peekpoke_ctlops_t *)arg, result)); 555509Smrj 556509Smrj case DDI_CTLOPS_INITCHILD: 557509Smrj return (impl_ddi_sunbus_initchild(arg)); 558509Smrj 559509Smrj case DDI_CTLOPS_UNINITCHILD: 560509Smrj impl_ddi_sunbus_removechild(arg); 561509Smrj return (DDI_SUCCESS); 562509Smrj 563509Smrj case DDI_CTLOPS_REPORTDEV: 564509Smrj return (rootnex_ctl_reportdev(rdip)); 565509Smrj 566509Smrj case DDI_CTLOPS_IOMIN: 567509Smrj /* 568509Smrj * Nothing to do here but reflect back.. 569509Smrj */ 570509Smrj return (DDI_SUCCESS); 571509Smrj 572509Smrj case DDI_CTLOPS_REGSIZE: 573509Smrj case DDI_CTLOPS_NREGS: 574509Smrj break; 575509Smrj 576509Smrj case DDI_CTLOPS_SIDDEV: 577509Smrj if (ndi_dev_is_prom_node(rdip)) 578509Smrj return (DDI_SUCCESS); 579509Smrj if (ndi_dev_is_persistent_node(rdip)) 580509Smrj return (DDI_SUCCESS); 581509Smrj return (DDI_FAILURE); 582509Smrj 583509Smrj case DDI_CTLOPS_POWER: 584509Smrj return ((*pm_platform_power)((power_req_t *)arg)); 585509Smrj 586693Sgovinda case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 587509Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 588509Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 589509Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 590693Sgovinda case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 591693Sgovinda case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 592509Smrj if (!rootnex_state->r_reserved_msg_printed) { 593509Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 594509Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 595509Smrj "1 or more reserved/obsolete operations."); 596509Smrj } 597509Smrj return (DDI_FAILURE); 598509Smrj 599509Smrj default: 600509Smrj return (DDI_FAILURE); 601509Smrj } 602509Smrj /* 603509Smrj * The rest are for "hardware" properties 604509Smrj */ 605509Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 606509Smrj return (DDI_FAILURE); 607509Smrj 608509Smrj if (ctlop == DDI_CTLOPS_NREGS) { 609509Smrj ptr = (int *)result; 610509Smrj *ptr = pdp->par_nreg; 611509Smrj } else { 612509Smrj off_t *size = (off_t *)result; 613509Smrj 614509Smrj ptr = (int *)arg; 615509Smrj n = *ptr; 616509Smrj if (n >= pdp->par_nreg) { 617509Smrj return (DDI_FAILURE); 618509Smrj } 619509Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 620509Smrj } 621509Smrj return (DDI_SUCCESS); 622509Smrj } 6230Sstevel@tonic-gate 6240Sstevel@tonic-gate 6250Sstevel@tonic-gate /* 626509Smrj * rootnex_ctl_reportdev() 627509Smrj * 6280Sstevel@tonic-gate */ 6290Sstevel@tonic-gate static int 630509Smrj rootnex_ctl_reportdev(dev_info_t *dev) 6310Sstevel@tonic-gate { 632509Smrj int i, n, len, f_len = 0; 633509Smrj char *buf; 634509Smrj 635509Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 636509Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 637509Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 638509Smrj len = strlen(buf); 639509Smrj 640509Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 641509Smrj 642509Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 643509Smrj 644509Smrj if (i == 0) 645509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 646509Smrj ": "); 647509Smrj else 648509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 649509Smrj " and "); 650509Smrj len = strlen(buf); 651509Smrj 652509Smrj switch (rp->regspec_bustype) { 653509Smrj 654509Smrj case BTEISA: 655509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 656509Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 6570Sstevel@tonic-gate break; 658509Smrj 659509Smrj case BTISA: 660509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 661509Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 6620Sstevel@tonic-gate break; 663509Smrj 664509Smrj default: 665509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 666509Smrj "space %x offset %x", 667509Smrj rp->regspec_bustype, rp->regspec_addr); 6680Sstevel@tonic-gate break; 6690Sstevel@tonic-gate } 670509Smrj len = strlen(buf); 6710Sstevel@tonic-gate } 672509Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 673509Smrj int pri; 674509Smrj 675509Smrj if (i != 0) { 676509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 677509Smrj ","); 678509Smrj len = strlen(buf); 679509Smrj } 680509Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 681509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 682509Smrj " sparc ipl %d", pri); 683509Smrj len = strlen(buf); 6840Sstevel@tonic-gate } 685509Smrj #ifdef DEBUG 686509Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 687509Smrj cmn_err(CE_NOTE, "next message is truncated: " 688509Smrj "printed length 1024, real length %d", f_len); 689509Smrj } 690509Smrj #endif /* DEBUG */ 691509Smrj cmn_err(CE_CONT, "?%s\n", buf); 692509Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 6930Sstevel@tonic-gate return (DDI_SUCCESS); 6940Sstevel@tonic-gate } 6950Sstevel@tonic-gate 696509Smrj 697509Smrj /* 698509Smrj * rootnex_ctlops_poke() 699509Smrj * 700509Smrj */ 7010Sstevel@tonic-gate static int 702509Smrj rootnex_ctlops_poke(peekpoke_ctlops_t *in_args) 7030Sstevel@tonic-gate { 704509Smrj int err = DDI_SUCCESS; 705509Smrj on_trap_data_t otd; 706509Smrj 707509Smrj /* Cautious access not supported. */ 708509Smrj if (in_args->handle != NULL) 7090Sstevel@tonic-gate return (DDI_FAILURE); 710509Smrj 711509Smrj mutex_enter(&rootnex_state->r_peekpoke_mutex); 712509Smrj 713509Smrj /* Set up protected environment. */ 714509Smrj if (!on_trap(&otd, OT_DATA_ACCESS)) { 715509Smrj switch (in_args->size) { 716509Smrj case sizeof (uint8_t): 717509Smrj *(uint8_t *)in_args->dev_addr = *(uint8_t *) 718509Smrj in_args->host_addr; 719509Smrj break; 720509Smrj 721509Smrj case sizeof (uint16_t): 722509Smrj *(uint16_t *)in_args->dev_addr = 723509Smrj *(uint16_t *)in_args->host_addr; 724509Smrj break; 725509Smrj 726509Smrj case sizeof (uint32_t): 727509Smrj *(uint32_t *)in_args->dev_addr = 728509Smrj *(uint32_t *)in_args->host_addr; 729509Smrj break; 730509Smrj 731509Smrj case sizeof (uint64_t): 732509Smrj *(uint64_t *)in_args->dev_addr = 733509Smrj *(uint64_t *)in_args->host_addr; 734509Smrj break; 735509Smrj 736509Smrj default: 737509Smrj err = DDI_FAILURE; 738509Smrj break; 739509Smrj } 740509Smrj } else 741509Smrj err = DDI_FAILURE; 742509Smrj 743509Smrj /* Take down protected environment. */ 744509Smrj no_trap(); 745509Smrj mutex_exit(&rootnex_state->r_peekpoke_mutex); 746509Smrj 747509Smrj return (err); 748509Smrj } 749509Smrj 750509Smrj 751509Smrj /* 752509Smrj * rootnex_ctlops_peek() 753509Smrj * 754509Smrj */ 755509Smrj static int 756509Smrj rootnex_ctlops_peek(peekpoke_ctlops_t *in_args, void *result) 757509Smrj { 758509Smrj int err = DDI_SUCCESS; 759509Smrj on_trap_data_t otd; 760509Smrj 761509Smrj /* Cautious access not supported. */ 762509Smrj if (in_args->handle != NULL) 7630Sstevel@tonic-gate return (DDI_FAILURE); 764509Smrj 765509Smrj mutex_enter(&rootnex_state->r_peekpoke_mutex); 766509Smrj 767509Smrj if (!on_trap(&otd, OT_DATA_ACCESS)) { 768509Smrj switch (in_args->size) { 769509Smrj case sizeof (uint8_t): 770509Smrj *(uint8_t *)in_args->host_addr = 771509Smrj *(uint8_t *)in_args->dev_addr; 772509Smrj break; 773509Smrj 774509Smrj case sizeof (uint16_t): 775509Smrj *(uint16_t *)in_args->host_addr = 776509Smrj *(uint16_t *)in_args->dev_addr; 777509Smrj break; 778509Smrj 779509Smrj case sizeof (uint32_t): 780509Smrj *(uint32_t *)in_args->host_addr = 781509Smrj *(uint32_t *)in_args->dev_addr; 782509Smrj break; 783509Smrj 784509Smrj case sizeof (uint64_t): 785509Smrj *(uint64_t *)in_args->host_addr = 786509Smrj *(uint64_t *)in_args->dev_addr; 787509Smrj break; 788509Smrj 789509Smrj default: 790509Smrj err = DDI_FAILURE; 791509Smrj break; 792509Smrj } 793509Smrj result = (void *)in_args->host_addr; 794509Smrj } else 795509Smrj err = DDI_FAILURE; 796509Smrj 797509Smrj no_trap(); 798509Smrj mutex_exit(&rootnex_state->r_peekpoke_mutex); 799509Smrj 800509Smrj return (err); 8010Sstevel@tonic-gate } 8020Sstevel@tonic-gate 803509Smrj 804509Smrj 805509Smrj /* 806509Smrj * ****************** 807509Smrj * map related code 808509Smrj * ****************** 809509Smrj */ 810509Smrj 811509Smrj /* 812509Smrj * rootnex_map() 813509Smrj * 814509Smrj */ 8150Sstevel@tonic-gate static int 816509Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 817509Smrj off_t len, caddr_t *vaddrp) 8180Sstevel@tonic-gate { 8190Sstevel@tonic-gate struct regspec *rp, tmp_reg; 8200Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 8210Sstevel@tonic-gate int error; 8220Sstevel@tonic-gate 8230Sstevel@tonic-gate mp = &mr; 8240Sstevel@tonic-gate 8250Sstevel@tonic-gate switch (mp->map_op) { 8260Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8270Sstevel@tonic-gate case DDI_MO_UNMAP: 8280Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8290Sstevel@tonic-gate break; 8300Sstevel@tonic-gate default: 8310Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8320Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 8330Sstevel@tonic-gate mp->map_op); 8340Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8350Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8360Sstevel@tonic-gate } 8370Sstevel@tonic-gate 8380Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 8390Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8400Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 8410Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8420Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8430Sstevel@tonic-gate } 8440Sstevel@tonic-gate 8450Sstevel@tonic-gate /* 8460Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 8470Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 8480Sstevel@tonic-gate */ 8490Sstevel@tonic-gate 8500Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 8510Sstevel@tonic-gate 8520Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 8530Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8540Sstevel@tonic-gate static char *out_of_range = 8550Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 8560Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8570Sstevel@tonic-gate 8580Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 8590Sstevel@tonic-gate if (rp == NULL) { 8600Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8610Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 8620Sstevel@tonic-gate ddi_get_name(rdip)); 8630Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8640Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 8650Sstevel@tonic-gate } 8660Sstevel@tonic-gate 8670Sstevel@tonic-gate /* 8680Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 8690Sstevel@tonic-gate */ 8700Sstevel@tonic-gate 8710Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 8720Sstevel@tonic-gate mp->map_obj.rp = rp; 8730Sstevel@tonic-gate } 8740Sstevel@tonic-gate 8750Sstevel@tonic-gate /* 8760Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 8770Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 8780Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 8790Sstevel@tonic-gate */ 8800Sstevel@tonic-gate 8810Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 8820Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 8830Sstevel@tonic-gate 8840Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8850Sstevel@tonic-gate cmn_err(CE_CONT, 8860Sstevel@tonic-gate "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d>" 8870Sstevel@tonic-gate " offset %d len %d handle 0x%x\n", 8880Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip), 8890Sstevel@tonic-gate rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 8900Sstevel@tonic-gate offset, len, mp->map_handlep); 8910Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8920Sstevel@tonic-gate 8930Sstevel@tonic-gate /* 8940Sstevel@tonic-gate * I/O or memory mapping: 8950Sstevel@tonic-gate * 8960Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 8970Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 8980Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 8990Sstevel@tonic-gate */ 9000Sstevel@tonic-gate 9010Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 9020Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 9030Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 9040Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 9050Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 9060Sstevel@tonic-gate return (DDI_ME_INVAL); 9070Sstevel@tonic-gate } 9080Sstevel@tonic-gate 9090Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 9100Sstevel@tonic-gate /* 9110Sstevel@tonic-gate * compatibility i/o mapping 9120Sstevel@tonic-gate */ 9130Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 9140Sstevel@tonic-gate } else { 9150Sstevel@tonic-gate /* 9160Sstevel@tonic-gate * Normal memory or i/o mapping 9170Sstevel@tonic-gate */ 9180Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 9190Sstevel@tonic-gate } 9200Sstevel@tonic-gate 9210Sstevel@tonic-gate if (len != 0) 9220Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 9230Sstevel@tonic-gate 9240Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9250Sstevel@tonic-gate cmn_err(CE_CONT, 9260Sstevel@tonic-gate " <%s,%s> <0x%x, 0x%x, 0x%d>" 9270Sstevel@tonic-gate " offset %d len %d handle 0x%x\n", 9280Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip), 9290Sstevel@tonic-gate rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 9300Sstevel@tonic-gate offset, len, mp->map_handlep); 9310Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9320Sstevel@tonic-gate 9330Sstevel@tonic-gate /* 9340Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 9350Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 9360Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 9370Sstevel@tonic-gate * provided via ddi_apply_range.) 9380Sstevel@tonic-gate */ 9390Sstevel@tonic-gate 9400Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9410Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 9420Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 9430Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9440Sstevel@tonic-gate 9450Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 9460Sstevel@tonic-gate return (error); 9470Sstevel@tonic-gate 9480Sstevel@tonic-gate switch (mp->map_op) { 9490Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 9500Sstevel@tonic-gate 9510Sstevel@tonic-gate /* 9520Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 9530Sstevel@tonic-gate */ 9540Sstevel@tonic-gate 9550Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 9560Sstevel@tonic-gate 9570Sstevel@tonic-gate case DDI_MO_UNMAP: 9580Sstevel@tonic-gate 9590Sstevel@tonic-gate /* 9600Sstevel@tonic-gate * Release mapping... 9610Sstevel@tonic-gate */ 9620Sstevel@tonic-gate 9630Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 9640Sstevel@tonic-gate 9650Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 9660Sstevel@tonic-gate 9670Sstevel@tonic-gate return (rootnex_map_handle(mp)); 9680Sstevel@tonic-gate 9690Sstevel@tonic-gate default: 9700Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 9710Sstevel@tonic-gate } 9720Sstevel@tonic-gate } 9730Sstevel@tonic-gate 9740Sstevel@tonic-gate 9750Sstevel@tonic-gate /* 976509Smrj * rootnex_map_fault() 9770Sstevel@tonic-gate * 9780Sstevel@tonic-gate * fault in mappings for requestors 9790Sstevel@tonic-gate */ 9800Sstevel@tonic-gate /*ARGSUSED*/ 9810Sstevel@tonic-gate static int 982509Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 983509Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 984509Smrj uint_t lock) 9850Sstevel@tonic-gate { 9860Sstevel@tonic-gate 9870Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9880Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 9890Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 9900Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 9910Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 9920Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9930Sstevel@tonic-gate 9940Sstevel@tonic-gate /* 9950Sstevel@tonic-gate * This is all terribly broken, but it is a start 9960Sstevel@tonic-gate * 9970Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 9980Sstevel@tonic-gate * must be exported from seg_dev.c. 9990Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 10000Sstevel@tonic-gate */ 10010Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 10020Sstevel@tonic-gate struct segdev_data *sdp = 10030Sstevel@tonic-gate (struct segdev_data *)seg->s_data; 10040Sstevel@tonic-gate 10050Sstevel@tonic-gate if (hat == NULL) { 10060Sstevel@tonic-gate /* 10070Sstevel@tonic-gate * This is one plausible interpretation of 10080Sstevel@tonic-gate * a null hat i.e. use the first hat on the 10090Sstevel@tonic-gate * address space hat list which by convention is 10100Sstevel@tonic-gate * the hat of the system MMU. At alternative 10110Sstevel@tonic-gate * would be to panic .. this might well be better .. 10120Sstevel@tonic-gate */ 10130Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 10140Sstevel@tonic-gate hat = seg->s_as->a_hat; 10150Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 10160Sstevel@tonic-gate } 10170Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 10180Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 10190Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 10200Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 10210Sstevel@tonic-gate HAT_LOAD_LOCK); 10220Sstevel@tonic-gate } else 10230Sstevel@tonic-gate return (DDI_FAILURE); 10240Sstevel@tonic-gate return (DDI_SUCCESS); 10250Sstevel@tonic-gate } 10260Sstevel@tonic-gate 10270Sstevel@tonic-gate 10280Sstevel@tonic-gate /* 1029509Smrj * rootnex_map_regspec() 1030509Smrj * we don't support mapping of I/O cards above 4Gb 10310Sstevel@tonic-gate */ 1032509Smrj static int 1033509Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1034509Smrj { 1035509Smrj ulong_t base; 1036509Smrj void *cvaddr; 1037509Smrj uint_t npages, pgoffset; 1038509Smrj struct regspec *rp; 1039509Smrj ddi_acc_hdl_t *hp; 1040509Smrj ddi_acc_impl_t *ap; 1041509Smrj uint_t hat_acc_flags; 1042509Smrj 1043509Smrj rp = mp->map_obj.rp; 1044509Smrj hp = mp->map_handlep; 1045509Smrj 1046509Smrj #ifdef DDI_MAP_DEBUG 1047509Smrj ddi_map_debug( 1048509Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1049509Smrj rp->regspec_bustype, rp->regspec_addr, 1050509Smrj rp->regspec_size, mp->map_handlep); 1051509Smrj #endif /* DDI_MAP_DEBUG */ 1052509Smrj 1053509Smrj /* 1054509Smrj * I/O or memory mapping 1055509Smrj * 1056509Smrj * <bustype=0, addr=x, len=x>: memory 1057509Smrj * <bustype=1, addr=x, len=x>: i/o 1058509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1059509Smrj */ 1060509Smrj 1061509Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1062509Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 1063509Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 1064509Smrj rp->regspec_addr, rp->regspec_size); 1065509Smrj return (DDI_FAILURE); 1066509Smrj } 1067509Smrj 1068509Smrj if (rp->regspec_bustype != 0) { 1069509Smrj /* 1070509Smrj * I/O space - needs a handle. 1071509Smrj */ 1072509Smrj if (hp == NULL) { 1073509Smrj return (DDI_FAILURE); 1074509Smrj } 1075509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1076509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1077509Smrj impl_acc_hdl_init(hp); 1078509Smrj 1079509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1080509Smrj #ifdef DDI_MAP_DEBUG 1081509Smrj ddi_map_debug("rootnex_map_regspec: mmap() \ 1082509Smrj to I/O space is not supported.\n"); 1083509Smrj #endif /* DDI_MAP_DEBUG */ 1084509Smrj return (DDI_ME_INVAL); 1085509Smrj } else { 1086509Smrj /* 1087509Smrj * 1275-compliant vs. compatibility i/o mapping 1088509Smrj */ 1089509Smrj *vaddrp = 1090509Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 1091509Smrj ((caddr_t)(uintptr_t)rp->regspec_bustype) : 1092509Smrj ((caddr_t)(uintptr_t)rp->regspec_addr); 1093509Smrj } 1094509Smrj 1095509Smrj #ifdef DDI_MAP_DEBUG 1096509Smrj ddi_map_debug( 1097509Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1098509Smrj rp->regspec_size, *vaddrp); 1099509Smrj #endif /* DDI_MAP_DEBUG */ 1100509Smrj return (DDI_SUCCESS); 1101509Smrj } 1102509Smrj 1103509Smrj /* 1104509Smrj * Memory space 1105509Smrj */ 1106509Smrj 1107509Smrj if (hp != NULL) { 1108509Smrj /* 1109509Smrj * hat layer ignores 1110509Smrj * hp->ah_acc.devacc_attr_endian_flags. 1111509Smrj */ 1112509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1113509Smrj case DDI_STRICTORDER_ACC: 1114509Smrj hat_acc_flags = HAT_STRICTORDER; 1115509Smrj break; 1116509Smrj case DDI_UNORDERED_OK_ACC: 1117509Smrj hat_acc_flags = HAT_UNORDERED_OK; 1118509Smrj break; 1119509Smrj case DDI_MERGING_OK_ACC: 1120509Smrj hat_acc_flags = HAT_MERGING_OK; 1121509Smrj break; 1122509Smrj case DDI_LOADCACHING_OK_ACC: 1123509Smrj hat_acc_flags = HAT_LOADCACHING_OK; 1124509Smrj break; 1125509Smrj case DDI_STORECACHING_OK_ACC: 1126509Smrj hat_acc_flags = HAT_STORECACHING_OK; 1127509Smrj break; 1128509Smrj } 1129509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1130509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1131509Smrj impl_acc_hdl_init(hp); 1132509Smrj hp->ah_hat_flags = hat_acc_flags; 1133509Smrj } else { 1134509Smrj hat_acc_flags = HAT_STRICTORDER; 1135509Smrj } 1136509Smrj 1137509Smrj base = (ulong_t)rp->regspec_addr & (~MMU_PAGEOFFSET); /* base addr */ 1138509Smrj pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; /* offset */ 1139509Smrj 1140509Smrj if (rp->regspec_size == 0) { 1141509Smrj #ifdef DDI_MAP_DEBUG 1142509Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1143509Smrj #endif /* DDI_MAP_DEBUG */ 1144509Smrj return (DDI_ME_INVAL); 1145509Smrj } 1146509Smrj 1147509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1148509Smrj *vaddrp = (caddr_t)mmu_btop(base); 1149509Smrj } else { 1150509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1151509Smrj 1152509Smrj #ifdef DDI_MAP_DEBUG 1153509Smrj ddi_map_debug("rootnex_map_regspec: Mapping %d pages \ 1154509Smrj physical %x ", 1155509Smrj npages, base); 1156509Smrj #endif /* DDI_MAP_DEBUG */ 1157509Smrj 1158509Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1159509Smrj if (cvaddr == NULL) 1160509Smrj return (DDI_ME_NORESOURCES); 1161509Smrj 1162509Smrj /* 1163509Smrj * Now map in the pages we've allocated... 1164509Smrj */ 1165509Smrj hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), mmu_btop(base), 1166509Smrj mp->map_prot | hat_acc_flags, HAT_LOAD_LOCK); 1167509Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 1168509Smrj } 1169509Smrj 1170509Smrj #ifdef DDI_MAP_DEBUG 1171509Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1172509Smrj #endif /* DDI_MAP_DEBUG */ 1173509Smrj return (DDI_SUCCESS); 1174509Smrj } 1175509Smrj 11760Sstevel@tonic-gate 11770Sstevel@tonic-gate /* 1178509Smrj * rootnex_unmap_regspec() 1179509Smrj * 1180509Smrj */ 1181509Smrj static int 1182509Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1183509Smrj { 1184509Smrj caddr_t addr = (caddr_t)*vaddrp; 1185509Smrj uint_t npages, pgoffset; 1186509Smrj struct regspec *rp; 1187509Smrj 1188509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1189509Smrj return (0); 1190509Smrj 1191509Smrj rp = mp->map_obj.rp; 1192509Smrj 1193509Smrj if (rp->regspec_size == 0) { 1194509Smrj #ifdef DDI_MAP_DEBUG 1195509Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1196509Smrj #endif /* DDI_MAP_DEBUG */ 1197509Smrj return (DDI_ME_INVAL); 1198509Smrj } 1199509Smrj 1200509Smrj /* 1201509Smrj * I/O or memory mapping: 1202509Smrj * 1203509Smrj * <bustype=0, addr=x, len=x>: memory 1204509Smrj * <bustype=1, addr=x, len=x>: i/o 1205509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1206509Smrj */ 1207509Smrj if (rp->regspec_bustype != 0) { 1208509Smrj /* 1209509Smrj * This is I/O space, which requires no particular 1210509Smrj * processing on unmap since it isn't mapped in the 1211509Smrj * first place. 1212509Smrj */ 1213509Smrj return (DDI_SUCCESS); 1214509Smrj } 1215509Smrj 1216509Smrj /* 1217509Smrj * Memory space 1218509Smrj */ 1219509Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1220509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1221509Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1222509Smrj device_arena_free(addr - pgoffset, ptob(npages)); 1223509Smrj 1224509Smrj /* 1225509Smrj * Destroy the pointer - the mapping has logically gone 1226509Smrj */ 1227509Smrj *vaddrp = NULL; 1228509Smrj 1229509Smrj return (DDI_SUCCESS); 1230509Smrj } 1231509Smrj 1232509Smrj 1233509Smrj /* 1234509Smrj * rootnex_map_handle() 1235509Smrj * 12360Sstevel@tonic-gate */ 1237509Smrj static int 1238509Smrj rootnex_map_handle(ddi_map_req_t *mp) 1239509Smrj { 1240509Smrj ddi_acc_hdl_t *hp; 1241509Smrj ulong_t base; 1242509Smrj uint_t pgoffset; 1243509Smrj struct regspec *rp; 1244509Smrj 1245509Smrj rp = mp->map_obj.rp; 1246509Smrj 1247509Smrj #ifdef DDI_MAP_DEBUG 1248509Smrj ddi_map_debug( 1249509Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1250509Smrj rp->regspec_bustype, rp->regspec_addr, 1251509Smrj rp->regspec_size, mp->map_handlep); 1252509Smrj #endif /* DDI_MAP_DEBUG */ 1253509Smrj 1254509Smrj /* 1255509Smrj * I/O or memory mapping: 1256509Smrj * 1257509Smrj * <bustype=0, addr=x, len=x>: memory 1258509Smrj * <bustype=1, addr=x, len=x>: i/o 1259509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1260509Smrj */ 1261509Smrj if (rp->regspec_bustype != 0) { 1262509Smrj /* 1263509Smrj * This refers to I/O space, and we don't support "mapping" 1264509Smrj * I/O space to a user. 1265509Smrj */ 1266509Smrj return (DDI_FAILURE); 1267509Smrj } 1268509Smrj 1269509Smrj /* 1270509Smrj * Set up the hat_flags for the mapping. 1271509Smrj */ 1272509Smrj hp = mp->map_handlep; 1273509Smrj 1274509Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 1275509Smrj case DDI_NEVERSWAP_ACC: 1276509Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1277509Smrj break; 1278509Smrj case DDI_STRUCTURE_LE_ACC: 1279509Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 1280509Smrj break; 1281509Smrj case DDI_STRUCTURE_BE_ACC: 1282509Smrj return (DDI_FAILURE); 1283509Smrj default: 1284509Smrj return (DDI_REGS_ACC_CONFLICT); 1285509Smrj } 1286509Smrj 1287509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1288509Smrj case DDI_STRICTORDER_ACC: 1289509Smrj break; 1290509Smrj case DDI_UNORDERED_OK_ACC: 1291509Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 1292509Smrj break; 1293509Smrj case DDI_MERGING_OK_ACC: 1294509Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 1295509Smrj break; 1296509Smrj case DDI_LOADCACHING_OK_ACC: 1297509Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1298509Smrj break; 1299509Smrj case DDI_STORECACHING_OK_ACC: 1300509Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 1301509Smrj break; 1302509Smrj default: 1303509Smrj return (DDI_FAILURE); 1304509Smrj } 1305509Smrj 1306509Smrj base = (ulong_t)rp->regspec_addr & (~MMU_PAGEOFFSET); /* base addr */ 1307509Smrj pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; /* offset */ 1308509Smrj 1309509Smrj if (rp->regspec_size == 0) 1310509Smrj return (DDI_ME_INVAL); 1311509Smrj 1312509Smrj hp->ah_pfn = mmu_btop(base); 1313509Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1314509Smrj 1315509Smrj return (DDI_SUCCESS); 1316509Smrj } 13170Sstevel@tonic-gate 13180Sstevel@tonic-gate 13190Sstevel@tonic-gate 13200Sstevel@tonic-gate /* 1321509Smrj * ************************ 1322509Smrj * interrupt related code 1323509Smrj * ************************ 13240Sstevel@tonic-gate */ 13250Sstevel@tonic-gate 13260Sstevel@tonic-gate /* 1327509Smrj * rootnex_intr_ops() 13280Sstevel@tonic-gate * bus_intr_op() function for interrupt support 13290Sstevel@tonic-gate */ 13300Sstevel@tonic-gate /* ARGSUSED */ 13310Sstevel@tonic-gate static int 13320Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 13330Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 13340Sstevel@tonic-gate { 13350Sstevel@tonic-gate struct intrspec *ispec; 13360Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 13370Sstevel@tonic-gate 13380Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 13390Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 13400Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 13410Sstevel@tonic-gate 13420Sstevel@tonic-gate /* Process the interrupt operation */ 13430Sstevel@tonic-gate switch (intr_op) { 13440Sstevel@tonic-gate case DDI_INTROP_GETCAP: 13450Sstevel@tonic-gate /* First check with pcplusmp */ 13460Sstevel@tonic-gate if (psm_intr_ops == NULL) 13470Sstevel@tonic-gate return (DDI_FAILURE); 13480Sstevel@tonic-gate 13490Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13500Sstevel@tonic-gate *(int *)result = 0; 13510Sstevel@tonic-gate return (DDI_FAILURE); 13520Sstevel@tonic-gate } 13530Sstevel@tonic-gate break; 13540Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13550Sstevel@tonic-gate if (psm_intr_ops == NULL) 13560Sstevel@tonic-gate return (DDI_FAILURE); 13570Sstevel@tonic-gate 13580Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13590Sstevel@tonic-gate return (DDI_FAILURE); 13600Sstevel@tonic-gate break; 13610Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13620Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13630Sstevel@tonic-gate return (DDI_FAILURE); 13640Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13650Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 13660Sstevel@tonic-gate break; 13670Sstevel@tonic-gate case DDI_INTROP_FREE: 13680Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 13690Sstevel@tonic-gate /* 13700Sstevel@tonic-gate * Special case for 'pcic' driver' only. 13710Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 13720Sstevel@tonic-gate * See detailed comments on this in the function 13730Sstevel@tonic-gate * rootnex_get_ispec(). 13740Sstevel@tonic-gate */ 13750Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 13760Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 13770Sstevel@tonic-gate pdp->par_nintr); 13780Sstevel@tonic-gate /* 13790Sstevel@tonic-gate * Set it to zero; so that 13800Sstevel@tonic-gate * DDI framework doesn't free it again 13810Sstevel@tonic-gate */ 13820Sstevel@tonic-gate pdp->par_intr = NULL; 13830Sstevel@tonic-gate pdp->par_nintr = 0; 13840Sstevel@tonic-gate } 13850Sstevel@tonic-gate break; 13860Sstevel@tonic-gate case DDI_INTROP_GETPRI: 13870Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13880Sstevel@tonic-gate return (DDI_FAILURE); 13890Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 13900Sstevel@tonic-gate break; 13910Sstevel@tonic-gate case DDI_INTROP_SETPRI: 13920Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 13930Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 13940Sstevel@tonic-gate return (DDI_FAILURE); 13950Sstevel@tonic-gate 13960Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 13970Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 13980Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 13990Sstevel@tonic-gate return (DDI_FAILURE); 14000Sstevel@tonic-gate 14010Sstevel@tonic-gate /* Change the priority */ 14020Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 14030Sstevel@tonic-gate PSM_FAILURE) 14040Sstevel@tonic-gate return (DDI_FAILURE); 14050Sstevel@tonic-gate 14060Sstevel@tonic-gate /* update the ispec with the new priority */ 14070Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 14080Sstevel@tonic-gate break; 14090Sstevel@tonic-gate case DDI_INTROP_ADDISR: 14100Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14110Sstevel@tonic-gate return (DDI_FAILURE); 14120Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 14130Sstevel@tonic-gate break; 14140Sstevel@tonic-gate case DDI_INTROP_REMISR: 14150Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14160Sstevel@tonic-gate return (DDI_FAILURE); 14170Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 14180Sstevel@tonic-gate break; 14190Sstevel@tonic-gate case DDI_INTROP_ENABLE: 14200Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14210Sstevel@tonic-gate return (DDI_FAILURE); 14220Sstevel@tonic-gate 14230Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 14240Sstevel@tonic-gate if (psm_intr_ops == NULL) 14250Sstevel@tonic-gate return (DDI_FAILURE); 14260Sstevel@tonic-gate 1427*916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14280Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 14290Sstevel@tonic-gate (int *)&hdlp->ih_vector); 14300Sstevel@tonic-gate 14310Sstevel@tonic-gate /* Add the interrupt handler */ 14320Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 14330Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1434*916Sschwartz hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 14350Sstevel@tonic-gate return (DDI_FAILURE); 14360Sstevel@tonic-gate break; 14370Sstevel@tonic-gate case DDI_INTROP_DISABLE: 14380Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14390Sstevel@tonic-gate return (DDI_FAILURE); 14400Sstevel@tonic-gate 14410Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 14420Sstevel@tonic-gate if (psm_intr_ops == NULL) 14430Sstevel@tonic-gate return (DDI_FAILURE); 14440Sstevel@tonic-gate 1445*916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14460Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14470Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14480Sstevel@tonic-gate 14490Sstevel@tonic-gate /* Remove the interrupt handler */ 14500Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14510Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14520Sstevel@tonic-gate break; 14530Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14540Sstevel@tonic-gate if (psm_intr_ops == NULL) 14550Sstevel@tonic-gate return (DDI_FAILURE); 14560Sstevel@tonic-gate 14570Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14580Sstevel@tonic-gate return (DDI_FAILURE); 14590Sstevel@tonic-gate break; 14600Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14610Sstevel@tonic-gate if (psm_intr_ops == NULL) 14620Sstevel@tonic-gate return (DDI_FAILURE); 14630Sstevel@tonic-gate 14640Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14650Sstevel@tonic-gate return (DDI_FAILURE); 14660Sstevel@tonic-gate break; 14670Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 14680Sstevel@tonic-gate if (psm_intr_ops == NULL) 14690Sstevel@tonic-gate return (DDI_FAILURE); 14700Sstevel@tonic-gate 14710Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 14720Sstevel@tonic-gate result)) { 14730Sstevel@tonic-gate *(int *)result = 0; 14740Sstevel@tonic-gate return (DDI_FAILURE); 14750Sstevel@tonic-gate } 14760Sstevel@tonic-gate break; 14770Sstevel@tonic-gate case DDI_INTROP_NINTRS: 14780Sstevel@tonic-gate if ((pdp = ddi_get_parent_data(rdip)) == NULL) 14790Sstevel@tonic-gate return (DDI_FAILURE); 14800Sstevel@tonic-gate *(int *)result = pdp->par_nintr; 14810Sstevel@tonic-gate if (pdp->par_nintr == 0) { 14820Sstevel@tonic-gate /* 14830Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 14840Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 14850Sstevel@tonic-gate * 14860Sstevel@tonic-gate * See detailed comments on this in the function 14870Sstevel@tonic-gate * rootnex_get_ispec(). 14880Sstevel@tonic-gate * 14890Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 14900Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 14910Sstevel@tonic-gate * field may not initialized. So, we fake it here 14920Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 14930Sstevel@tonic-gate */ 14940Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 14950Sstevel@tonic-gate *(int *)result = 1; 14960Sstevel@tonic-gate } 14970Sstevel@tonic-gate break; 14980Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 14990Sstevel@tonic-gate *(int *)result = 0; 15000Sstevel@tonic-gate *(int *)result |= DDI_INTR_TYPE_FIXED; /* Always ... */ 15010Sstevel@tonic-gate break; 15020Sstevel@tonic-gate case DDI_INTROP_NAVAIL: 15030Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 15040Sstevel@tonic-gate return (DDI_FAILURE); 15050Sstevel@tonic-gate 15060Sstevel@tonic-gate if (psm_intr_ops == NULL) { 15070Sstevel@tonic-gate *(int *)result = 1; 15080Sstevel@tonic-gate break; 15090Sstevel@tonic-gate } 15100Sstevel@tonic-gate 15110Sstevel@tonic-gate /* Priority in the handle not initialized yet */ 15120Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 15130Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 15140Sstevel@tonic-gate PSM_INTR_OP_NAVAIL_VECTORS, result); 15150Sstevel@tonic-gate break; 15160Sstevel@tonic-gate default: 15170Sstevel@tonic-gate return (DDI_FAILURE); 15180Sstevel@tonic-gate } 15190Sstevel@tonic-gate 15200Sstevel@tonic-gate return (DDI_SUCCESS); 15210Sstevel@tonic-gate } 15220Sstevel@tonic-gate 15230Sstevel@tonic-gate 15240Sstevel@tonic-gate /* 1525509Smrj * rootnex_get_ispec() 1526509Smrj * convert an interrupt number to an interrupt specification. 1527509Smrj * The interrupt number determines which interrupt spec will be 1528509Smrj * returned if more than one exists. 1529509Smrj * 1530509Smrj * Look into the parent private data area of the 'rdip' to find out 1531509Smrj * the interrupt specification. First check to make sure there is 1532509Smrj * one that matchs "inumber" and then return a pointer to it. 1533509Smrj * 1534509Smrj * Return NULL if one could not be found. 1535509Smrj * 1536509Smrj * NOTE: This is needed for rootnex_intr_ops() 1537509Smrj */ 1538509Smrj static struct intrspec * 1539509Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 1540509Smrj { 1541509Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1542509Smrj 1543509Smrj /* 1544509Smrj * Special case handling for drivers that provide their own 1545509Smrj * intrspec structures instead of relying on the DDI framework. 1546509Smrj * 1547509Smrj * A broken hardware driver in ON could potentially provide its 1548509Smrj * own intrspec structure, instead of relying on the hardware. 1549509Smrj * If these drivers are children of 'rootnex' then we need to 1550509Smrj * continue to provide backward compatibility to them here. 1551509Smrj * 1552509Smrj * Following check is a special case for 'pcic' driver which 1553509Smrj * was found to have broken hardwre andby provides its own intrspec. 1554509Smrj * 1555509Smrj * Verbatim comments from this driver are shown here: 1556509Smrj * "Don't use the ddi_add_intr since we don't have a 1557509Smrj * default intrspec in all cases." 1558509Smrj * 1559509Smrj * Since an 'ispec' may not be always created for it, 1560509Smrj * check for that and create one if so. 1561509Smrj * 1562509Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 1563509Smrj */ 1564509Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1565509Smrj pdp->par_nintr = 1; 1566509Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1567509Smrj pdp->par_nintr, KM_SLEEP); 1568509Smrj } 1569509Smrj 1570509Smrj /* Validate the interrupt number */ 1571509Smrj if (inum >= pdp->par_nintr) 1572509Smrj return (NULL); 1573509Smrj 1574509Smrj /* Get the interrupt structure pointer and return that */ 1575509Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 1576509Smrj } 1577509Smrj 1578509Smrj 1579509Smrj /* 1580509Smrj * ****************** 1581509Smrj * dma related code 1582509Smrj * ****************** 1583509Smrj */ 1584509Smrj 1585509Smrj /* 1586509Smrj * rootnex_dma_allochdl() 1587509Smrj * called from ddi_dma_alloc_handle(). 15880Sstevel@tonic-gate */ 1589509Smrj /*ARGSUSED*/ 1590509Smrj static int 1591509Smrj rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1592509Smrj int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1593509Smrj { 1594509Smrj uint64_t maxsegmentsize_ll; 1595509Smrj uint_t maxsegmentsize; 1596509Smrj ddi_dma_impl_t *hp; 1597509Smrj rootnex_dma_t *dma; 1598509Smrj uint64_t count_max; 1599509Smrj uint64_t seg; 1600509Smrj int kmflag; 1601509Smrj int e; 1602509Smrj 1603509Smrj 1604509Smrj /* convert our sleep flags */ 1605509Smrj if (waitfp == DDI_DMA_SLEEP) { 1606509Smrj kmflag = KM_SLEEP; 1607509Smrj } else { 1608509Smrj kmflag = KM_NOSLEEP; 1609509Smrj } 1610509Smrj 1611509Smrj /* 1612509Smrj * We try to do only one memory allocation here. We'll do a little 1613509Smrj * pointer manipulation later. If the bind ends up taking more than 1614509Smrj * our prealloc's space, we'll have to allocate more memory in the 1615509Smrj * bind operation. Not great, but much better than before and the 1616509Smrj * best we can do with the current bind interfaces. 1617509Smrj */ 1618509Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1619509Smrj if (hp == NULL) { 1620509Smrj if (waitfp != DDI_DMA_DONTWAIT) { 1621509Smrj ddi_set_callback(waitfp, arg, 1622509Smrj &rootnex_state->r_dvma_call_list_id); 1623509Smrj } 1624509Smrj return (DDI_DMA_NORESOURCES); 1625509Smrj } 1626509Smrj 1627509Smrj /* Do our pointer manipulation now, align the structures */ 1628509Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 1629509Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1630509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1631509Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1632509Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1633509Smrj 1634509Smrj /* setup the handle */ 1635509Smrj rootnex_clean_dmahdl(hp); 1636509Smrj dma->dp_dip = rdip; 1637509Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1638509Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1639509Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 1640509Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1641509Smrj hp->dmai_rdip = rdip; 1642509Smrj hp->dmai_attr = *attr; 1643509Smrj 1644509Smrj /* we don't need to worry about the SPL since we do a tryenter */ 1645509Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1646509Smrj 1647509Smrj /* 1648509Smrj * Figure out our maximum segment size. If the segment size is greater 1649509Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 1650509Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1651509Smrj * dma_attr_count_max are size-1 type values. 1652509Smrj * 1653509Smrj * Maximum segment size is the largest physically contiguous chunk of 1654509Smrj * memory that we can return from a bind (i.e. the maximum size of a 1655509Smrj * single cookie). 1656509Smrj */ 1657509Smrj 1658509Smrj /* handle the rollover cases */ 1659509Smrj seg = attr->dma_attr_seg + 1; 1660509Smrj if (seg < attr->dma_attr_seg) { 1661509Smrj seg = attr->dma_attr_seg; 1662509Smrj } 1663509Smrj count_max = attr->dma_attr_count_max + 1; 1664509Smrj if (count_max < attr->dma_attr_count_max) { 1665509Smrj count_max = attr->dma_attr_count_max; 1666509Smrj } 1667509Smrj 1668509Smrj /* 1669509Smrj * granularity may or may not be a power of two. If it isn't, we can't 1670509Smrj * use a simple mask. 1671509Smrj */ 1672509Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1673509Smrj dma->dp_granularity_power_2 = B_FALSE; 1674509Smrj } else { 1675509Smrj dma->dp_granularity_power_2 = B_TRUE; 1676509Smrj } 1677509Smrj 1678509Smrj /* 1679509Smrj * maxxfer should be a whole multiple of granularity. If we're going to 1680509Smrj * break up a window because we're greater than maxxfer, we might as 1681509Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 1682509Smrj * worry about triming the window later on for this case. 1683509Smrj */ 1684509Smrj if (attr->dma_attr_granular > 1) { 1685509Smrj if (dma->dp_granularity_power_2) { 1686509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1687509Smrj (attr->dma_attr_maxxfer & 1688509Smrj (attr->dma_attr_granular - 1)); 1689509Smrj } else { 1690509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1691509Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1692509Smrj } 1693509Smrj } else { 1694509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 1695509Smrj } 1696509Smrj 1697509Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1698509Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1699509Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1700509Smrj maxsegmentsize = 0xFFFFFFFF; 1701509Smrj } else { 1702509Smrj maxsegmentsize = maxsegmentsize_ll; 1703509Smrj } 1704509Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1705509Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1706509Smrj 1707509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1708509Smrj if (rootnex_alloc_check_parms) { 1709509Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1710509Smrj if (e != DDI_SUCCESS) { 1711509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1712509Smrj (void) rootnex_dma_freehdl(dip, rdip, 1713509Smrj (ddi_dma_handle_t)hp); 1714509Smrj return (e); 1715509Smrj } 1716509Smrj } 1717509Smrj 1718509Smrj *handlep = (ddi_dma_handle_t)hp; 1719509Smrj 1720509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1721509Smrj DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1722509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1723509Smrj 1724509Smrj return (DDI_SUCCESS); 1725509Smrj } 1726509Smrj 1727509Smrj 1728509Smrj /* 1729509Smrj * rootnex_dma_freehdl() 1730509Smrj * called from ddi_dma_free_handle(). 1731509Smrj */ 1732509Smrj /*ARGSUSED*/ 1733509Smrj static int 1734509Smrj rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1735509Smrj { 1736509Smrj ddi_dma_impl_t *hp; 1737509Smrj rootnex_dma_t *dma; 1738509Smrj 1739509Smrj 1740509Smrj hp = (ddi_dma_impl_t *)handle; 1741509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1742509Smrj 1743509Smrj /* unbind should have been called first */ 1744509Smrj ASSERT(!dma->dp_inuse); 1745509Smrj 1746509Smrj mutex_destroy(&dma->dp_mutex); 1747509Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1748509Smrj 1749509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1750509Smrj DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1751509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1752509Smrj 1753509Smrj if (rootnex_state->r_dvma_call_list_id) 1754509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1755509Smrj 1756509Smrj return (DDI_SUCCESS); 1757509Smrj } 1758509Smrj 1759509Smrj 1760509Smrj /* 1761509Smrj * rootnex_dma_bindhdl() 1762509Smrj * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 1763509Smrj */ 1764509Smrj /*ARGSUSED*/ 1765509Smrj static int 1766509Smrj rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 1767509Smrj struct ddi_dma_req *dmareq, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 17680Sstevel@tonic-gate { 1769509Smrj rootnex_sglinfo_t *sinfo; 1770509Smrj ddi_dma_attr_t *attr; 1771509Smrj ddi_dma_impl_t *hp; 1772509Smrj rootnex_dma_t *dma; 1773509Smrj int kmflag; 1774509Smrj int e; 1775509Smrj 1776509Smrj 1777509Smrj hp = (ddi_dma_impl_t *)handle; 1778509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1779509Smrj sinfo = &dma->dp_sglinfo; 1780509Smrj attr = &hp->dmai_attr; 1781509Smrj 1782509Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1783509Smrj 1784509Smrj /* 1785509Smrj * This is useful for debugging a driver. Not as useful in a production 1786509Smrj * system. The only time this will fail is if you have a driver bug. 1787509Smrj */ 1788509Smrj if (rootnex_bind_check_inuse) { 1789509Smrj /* 1790509Smrj * No one else should ever have this lock unless someone else 1791509Smrj * is trying to use this handle. So contention on the lock 1792509Smrj * is the same as inuse being set. 1793509Smrj */ 1794509Smrj e = mutex_tryenter(&dma->dp_mutex); 1795509Smrj if (e == 0) { 1796509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1797509Smrj return (DDI_DMA_INUSE); 1798509Smrj } 1799509Smrj if (dma->dp_inuse) { 1800509Smrj mutex_exit(&dma->dp_mutex); 1801509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1802509Smrj return (DDI_DMA_INUSE); 1803509Smrj } 1804509Smrj dma->dp_inuse = B_TRUE; 1805509Smrj mutex_exit(&dma->dp_mutex); 1806509Smrj } 1807509Smrj 1808509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1809509Smrj if (rootnex_bind_check_parms) { 1810509Smrj e = rootnex_valid_bind_parms(dmareq, attr); 1811509Smrj if (e != DDI_SUCCESS) { 1812509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1813509Smrj rootnex_clean_dmahdl(hp); 1814509Smrj return (e); 1815509Smrj } 1816509Smrj } 1817509Smrj 1818509Smrj /* save away the original bind info */ 1819509Smrj dma->dp_dma = dmareq->dmar_object; 1820509Smrj 1821509Smrj /* 1822509Smrj * Figure out a rough estimate of what maximum number of pages this 1823509Smrj * buffer could use (a high estimate of course). 1824509Smrj */ 1825509Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1826509Smrj 1827509Smrj /* 1828509Smrj * We'll use the pre-allocated cookies for any bind that will *always* 1829509Smrj * fit (more important to be consistent, we don't want to create 1830509Smrj * additional degenerate cases). 1831509Smrj */ 1832509Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1833509Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1834509Smrj dma->dp_need_to_free_cookie = B_FALSE; 1835509Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1836509Smrj uint_t, sinfo->si_max_pages); 1837509Smrj 1838509Smrj /* 1839509Smrj * For anything larger than that, we'll go ahead and allocate the 1840509Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 1841509Smrj * seeing this path in the fast path for high performance devices very 1842509Smrj * frequently. 1843509Smrj * 1844509Smrj * a ddi bind interface that allowed the driver to provide storage to 1845509Smrj * the bind interface would speed this case up. 1846509Smrj */ 1847509Smrj } else { 1848509Smrj /* convert the sleep flags */ 1849509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1850509Smrj kmflag = KM_SLEEP; 1851509Smrj } else { 1852509Smrj kmflag = KM_NOSLEEP; 1853509Smrj } 1854509Smrj 1855509Smrj /* 1856509Smrj * Save away how much memory we allocated. If we're doing a 1857509Smrj * nosleep, the alloc could fail... 1858509Smrj */ 1859509Smrj dma->dp_cookie_size = sinfo->si_max_pages * 1860509Smrj sizeof (ddi_dma_cookie_t); 1861509Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1862509Smrj if (dma->dp_cookies == NULL) { 1863509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1864509Smrj rootnex_clean_dmahdl(hp); 1865509Smrj return (DDI_DMA_NORESOURCES); 1866509Smrj } 1867509Smrj dma->dp_need_to_free_cookie = B_TRUE; 1868509Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1869509Smrj sinfo->si_max_pages); 1870509Smrj } 1871509Smrj hp->dmai_cookie = dma->dp_cookies; 1872509Smrj 1873509Smrj /* 1874509Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1875509Smrj * looking at the contraints in the dma structure. It will then put some 1876509Smrj * additional state about the sgl in the dma struct (i.e. is the sgl 1877509Smrj * clean, or do we need to do some munging; how many pages need to be 1878509Smrj * copied, etc.) 1879509Smrj */ 1880509Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1881509Smrj &dma->dp_sglinfo); 1882509Smrj ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1883509Smrj 1884509Smrj /* if we don't need a copy buffer, we don't need to sync */ 1885509Smrj if (sinfo->si_copybuf_req == 0) { 1886509Smrj hp->dmai_rflags |= DMP_NOSYNC; 1887509Smrj } 1888509Smrj 1889509Smrj /* 1890509Smrj * if we don't need the copybuf and we don't need to do a partial, we 1891509Smrj * hit the fast path. All the high performance devices should be trying 1892509Smrj * to hit this path. To hit this path, a device should be able to reach 1893509Smrj * all of memory, shouldn't try to bind more than it can transfer, and 1894509Smrj * the buffer shouldn't require more cookies than the driver/device can 1895509Smrj * handle [sgllen]). 1896509Smrj */ 1897509Smrj if ((sinfo->si_copybuf_req == 0) && 1898509Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1899509Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1900509Smrj /* 1901509Smrj * copy out the first cookie and ccountp, set the cookie 1902509Smrj * pointer to the second cookie. The first cookie is passed 1903509Smrj * back on the stack. Additional cookies are accessed via 1904509Smrj * ddi_dma_nextcookie() 1905509Smrj */ 1906509Smrj *cookiep = dma->dp_cookies[0]; 1907509Smrj *ccountp = sinfo->si_sgl_size; 1908509Smrj hp->dmai_cookie++; 1909509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1910509Smrj hp->dmai_nwin = 1; 1911509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1912509Smrj DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 1913509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1914509Smrj dma->dp_dma.dmao_size); 1915509Smrj return (DDI_DMA_MAPPED); 1916509Smrj } 1917509Smrj 1918509Smrj /* 1919509Smrj * go to the slow path, we may need to alloc more memory, create 1920509Smrj * multiple windows, and munge up a sgl to make the device happy. 1921509Smrj */ 1922509Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 1923509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 1924509Smrj if (dma->dp_need_to_free_cookie) { 1925509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 1926509Smrj } 1927509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1928509Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 1929509Smrj return (e); 1930509Smrj } 1931509Smrj 1932509Smrj /* if the first window uses the copy buffer, sync it for the device */ 1933509Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 1934509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 1935509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1936509Smrj DDI_DMA_SYNC_FORDEV); 1937509Smrj } 1938509Smrj 1939509Smrj /* 1940509Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 1941509Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 1942509Smrj * If we have a partial map (i.e. multiple windows), the number of 1943509Smrj * cookies we return is the number of cookies in the first window. 1944509Smrj */ 1945509Smrj if (e == DDI_DMA_MAPPED) { 1946509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1947509Smrj *ccountp = sinfo->si_sgl_size; 1948509Smrj } else { 1949509Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 1950509Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 1951509Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 1952509Smrj } 1953509Smrj *cookiep = dma->dp_cookies[0]; 1954509Smrj hp->dmai_cookie++; 1955509Smrj 1956509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1957509Smrj DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 1958509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1959509Smrj dma->dp_dma.dmao_size); 1960509Smrj return (e); 1961509Smrj } 1962509Smrj 1963509Smrj 1964509Smrj /* 1965509Smrj * rootnex_dma_unbindhdl() 1966509Smrj * called from ddi_dma_unbind_handle() 1967509Smrj */ 1968509Smrj /*ARGSUSED*/ 1969509Smrj static int 1970509Smrj rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 1971509Smrj ddi_dma_handle_t handle) 1972509Smrj { 1973509Smrj ddi_dma_impl_t *hp; 1974509Smrj rootnex_dma_t *dma; 1975509Smrj int e; 1976509Smrj 1977509Smrj 1978509Smrj hp = (ddi_dma_impl_t *)handle; 1979509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1980509Smrj 1981509Smrj /* make sure the buffer wasn't free'd before calling unbind */ 1982509Smrj if (rootnex_unbind_verify_buffer) { 1983509Smrj e = rootnex_verify_buffer(dma); 1984509Smrj if (e != DDI_SUCCESS) { 1985509Smrj ASSERT(0); 1986509Smrj return (DDI_FAILURE); 1987509Smrj } 1988509Smrj } 1989509Smrj 1990509Smrj /* sync the current window before unbinding the buffer */ 1991509Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 1992509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 1993509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1994509Smrj DDI_DMA_SYNC_FORCPU); 1995509Smrj } 1996509Smrj 1997509Smrj /* 1998509Smrj * cleanup and copy buffer or window state. if we didn't use the copy 1999509Smrj * buffer or windows, there won't be much to do :-) 2000509Smrj */ 2001509Smrj rootnex_teardown_copybuf(dma); 2002509Smrj rootnex_teardown_windows(dma); 2003509Smrj 2004509Smrj /* 2005509Smrj * If we had to allocate space to for the worse case sgl (it didn't 2006509Smrj * fit into our pre-allocate buffer), free that up now 2007509Smrj */ 2008509Smrj if (dma->dp_need_to_free_cookie) { 2009509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2010509Smrj } 2011509Smrj 2012509Smrj /* 2013509Smrj * clean up the handle so it's ready for the next bind (i.e. if the 2014509Smrj * handle is reused). 2015509Smrj */ 2016509Smrj rootnex_clean_dmahdl(hp); 2017509Smrj 2018509Smrj if (rootnex_state->r_dvma_call_list_id) 2019509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2020509Smrj 2021509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2022509Smrj DTRACE_PROBE1(rootnex__unbind, uint64_t, 2023509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2024509Smrj 2025509Smrj return (DDI_SUCCESS); 2026509Smrj } 2027509Smrj 2028509Smrj 2029509Smrj /* 2030509Smrj * rootnex_verify_buffer() 2031509Smrj * verify buffer wasn't free'd 2032509Smrj */ 2033509Smrj static int 2034509Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 2035509Smrj { 2036509Smrj peekpoke_ctlops_t peek; 2037509Smrj page_t **pplist; 2038509Smrj caddr_t vaddr; 2039509Smrj uint_t pcnt; 2040509Smrj uint_t poff; 2041509Smrj page_t *pp; 2042509Smrj uint8_t b; 2043509Smrj int i; 2044509Smrj int e; 2045509Smrj 2046509Smrj 2047509Smrj /* Figure out how many pages this buffer occupies */ 2048509Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2049509Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2050509Smrj } else { 2051509Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2052509Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2053509Smrj } 2054509Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2055509Smrj 2056509Smrj switch (dma->dp_dma.dmao_type) { 20570Sstevel@tonic-gate case DMA_OTYP_PAGES: 2058509Smrj /* 2059509Smrj * for a linked list of pp's walk through them to make sure 2060509Smrj * they're locked and not free. 2061509Smrj */ 2062509Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2063509Smrj for (i = 0; i < pcnt; i++) { 2064509Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2065509Smrj return (DDI_FAILURE); 20660Sstevel@tonic-gate } 2067509Smrj pp = pp->p_next; 20680Sstevel@tonic-gate } 20690Sstevel@tonic-gate break; 2070509Smrj 20710Sstevel@tonic-gate case DMA_OTYP_VADDR: 20720Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 2073509Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2074509Smrj /* 2075509Smrj * for an array of pp's walk through them to make sure they're 2076509Smrj * not free. It's possible that they may not be locked. 2077509Smrj */ 2078509Smrj if (pplist) { 2079509Smrj for (i = 0; i < pcnt; i++) { 2080509Smrj if (PP_ISFREE(pplist[i])) { 2081509Smrj return (DDI_FAILURE); 2082509Smrj } 2083509Smrj } 2084509Smrj 2085509Smrj /* For a virtual address, try to peek at each page */ 2086509Smrj } else { 2087509Smrj if (dma->dp_sglinfo.si_asp == &kas) { 2088509Smrj bzero(&peek, sizeof (peekpoke_ctlops_t)); 2089509Smrj peek.host_addr = (uintptr_t)&b; 2090509Smrj peek.size = sizeof (uint8_t); 2091509Smrj peek.dev_addr = (uintptr_t)vaddr; 2092509Smrj for (i = 0; i < pcnt; i++) { 2093509Smrj e = rootnex_ctlops_peek(&peek, &b); 2094509Smrj if (e != DDI_SUCCESS) { 2095509Smrj return (DDI_FAILURE); 2096509Smrj } 2097509Smrj peek.dev_addr += MMU_PAGESIZE; 2098509Smrj } 2099509Smrj } 2100509Smrj } 2101509Smrj break; 2102509Smrj 2103509Smrj default: 2104509Smrj ASSERT(0); 2105509Smrj break; 2106509Smrj } 2107509Smrj 2108509Smrj return (DDI_SUCCESS); 2109509Smrj } 2110509Smrj 2111509Smrj 2112509Smrj /* 2113509Smrj * rootnex_clean_dmahdl() 2114509Smrj * Clean the dma handle. This should be called on a handle alloc and an 2115509Smrj * unbind handle. Set the handle state to the default settings. 2116509Smrj */ 2117509Smrj static void 2118509Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2119509Smrj { 2120509Smrj rootnex_dma_t *dma; 2121509Smrj 2122509Smrj 2123509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2124509Smrj 2125509Smrj hp->dmai_nwin = 0; 2126509Smrj dma->dp_current_cookie = 0; 2127509Smrj dma->dp_copybuf_size = 0; 2128509Smrj dma->dp_window = NULL; 2129509Smrj dma->dp_cbaddr = NULL; 2130509Smrj dma->dp_inuse = B_FALSE; 2131509Smrj dma->dp_need_to_free_cookie = B_FALSE; 2132509Smrj dma->dp_need_to_free_window = B_FALSE; 2133509Smrj dma->dp_partial_required = B_FALSE; 2134509Smrj dma->dp_trim_required = B_FALSE; 2135509Smrj dma->dp_sglinfo.si_copybuf_req = 0; 2136509Smrj #if !defined(__amd64) 2137509Smrj dma->dp_cb_remaping = B_FALSE; 2138509Smrj dma->dp_kva = NULL; 2139509Smrj #endif 2140509Smrj 2141509Smrj /* FMA related initialization */ 2142509Smrj hp->dmai_fault = 0; 2143509Smrj hp->dmai_fault_check = NULL; 2144509Smrj hp->dmai_fault_notify = NULL; 2145509Smrj hp->dmai_error.err_ena = 0; 2146509Smrj hp->dmai_error.err_status = DDI_FM_OK; 2147509Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2148509Smrj hp->dmai_error.err_ontrap = NULL; 2149509Smrj hp->dmai_error.err_fep = NULL; 2150509Smrj } 2151509Smrj 2152509Smrj 2153509Smrj /* 2154509Smrj * rootnex_valid_alloc_parms() 2155509Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 2156509Smrj */ 2157509Smrj static int 2158509Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2159509Smrj { 2160509Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2161509Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2162509Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 2163509Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2164509Smrj return (DDI_DMA_BADATTR); 2165509Smrj } 2166509Smrj 2167509Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2168509Smrj return (DDI_DMA_BADATTR); 2169509Smrj } 2170509Smrj 2171509Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2172509Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2173509Smrj attr->dma_attr_sgllen <= 0) { 2174509Smrj return (DDI_DMA_BADATTR); 2175509Smrj } 2176509Smrj 2177509Smrj /* We should be able to DMA into every byte offset in a page */ 2178509Smrj if (maxsegmentsize < MMU_PAGESIZE) { 2179509Smrj return (DDI_DMA_BADATTR); 2180509Smrj } 2181509Smrj 2182509Smrj return (DDI_SUCCESS); 2183509Smrj } 2184509Smrj 2185509Smrj 2186509Smrj /* 2187509Smrj * rootnex_valid_bind_parms() 2188509Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 2189509Smrj */ 2190509Smrj /* ARGSUSED */ 2191509Smrj static int 2192509Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2193509Smrj { 2194509Smrj #if !defined(__amd64) 2195509Smrj /* 2196509Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 2197509Smrj * we can track the offset for the obsoleted interfaces. 2198509Smrj */ 2199509Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2200509Smrj return (DDI_DMA_TOOBIG); 2201509Smrj } 2202509Smrj #endif 2203509Smrj 2204509Smrj return (DDI_SUCCESS); 2205509Smrj } 2206509Smrj 2207509Smrj 2208509Smrj /* 2209509Smrj * rootnex_get_sgl() 2210509Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 2211509Smrj * with a call to the vm layer when vm2.0 comes around... 2212509Smrj */ 2213509Smrj static void 2214509Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2215509Smrj rootnex_sglinfo_t *sglinfo) 2216509Smrj { 2217509Smrj ddi_dma_atyp_t buftype; 2218509Smrj uint64_t last_page; 2219509Smrj uint64_t offset; 2220509Smrj uint64_t addrhi; 2221509Smrj uint64_t addrlo; 2222509Smrj uint64_t maxseg; 2223509Smrj page_t **pplist; 2224509Smrj uint64_t paddr; 2225509Smrj uint32_t psize; 2226509Smrj uint32_t size; 2227509Smrj caddr_t vaddr; 2228509Smrj uint_t pcnt; 2229509Smrj page_t *pp; 2230509Smrj uint_t cnt; 2231509Smrj 2232509Smrj 2233509Smrj /* shortcuts */ 2234509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2235509Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2236509Smrj maxseg = sglinfo->si_max_cookie_size; 2237509Smrj buftype = dmar_object->dmao_type; 2238509Smrj addrhi = sglinfo->si_max_addr; 2239509Smrj addrlo = sglinfo->si_min_addr; 2240509Smrj size = dmar_object->dmao_size; 2241509Smrj 2242509Smrj pcnt = 0; 2243509Smrj cnt = 0; 2244509Smrj 2245509Smrj /* 2246509Smrj * if we were passed down a linked list of pages, i.e. pointer to 2247509Smrj * page_t, use this to get our physical address and buf offset. 2248509Smrj */ 2249509Smrj if (buftype == DMA_OTYP_PAGES) { 2250509Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2251509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2252509Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2253509Smrj MMU_PAGEOFFSET; 2254509Smrj paddr = ptob64(pp->p_pagenum) + offset; 2255509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2256509Smrj pp = pp->p_next; 2257509Smrj sglinfo->si_asp = NULL; 2258509Smrj 2259509Smrj /* 2260509Smrj * We weren't passed down a linked list of pages, but if we were passed 2261509Smrj * down an array of pages, use this to get our physical address and buf 2262509Smrj * offset. 2263509Smrj */ 2264509Smrj } else if (pplist != NULL) { 2265509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2266509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2267509Smrj 2268509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2269509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2270509Smrj if (sglinfo->si_asp == NULL) { 2271509Smrj sglinfo->si_asp = &kas; 2272509Smrj } 2273509Smrj 2274509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2275509Smrj paddr = ptob64(pplist[pcnt]->p_pagenum); 2276509Smrj paddr += offset; 2277509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2278509Smrj pcnt++; 2279509Smrj 2280509Smrj /* 2281509Smrj * All we have is a virtual address, we'll need to call into the VM 2282509Smrj * to get the physical address. 2283509Smrj */ 2284509Smrj } else { 2285509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2286509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2287509Smrj 2288509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2289509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2290509Smrj if (sglinfo->si_asp == NULL) { 2291509Smrj sglinfo->si_asp = &kas; 2292509Smrj } 2293509Smrj 2294509Smrj paddr = ptob64(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2295509Smrj paddr += offset; 2296509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2297509Smrj vaddr += psize; 2298509Smrj } 2299509Smrj 2300509Smrj /* 2301509Smrj * Setup the first cookie with the physical address of the page and the 2302509Smrj * size of the page (which takes into account the initial offset into 2303509Smrj * the page. 2304509Smrj */ 2305509Smrj sgl[cnt].dmac_laddress = paddr; 2306509Smrj sgl[cnt].dmac_size = psize; 2307509Smrj sgl[cnt].dmac_type = 0; 2308509Smrj 2309509Smrj /* 2310509Smrj * Save away the buffer offset into the page. We'll need this later in 2311509Smrj * the copy buffer code to help figure out the page index within the 2312509Smrj * buffer and the offset into the current page. 2313509Smrj */ 2314509Smrj sglinfo->si_buf_offset = offset; 2315509Smrj 2316509Smrj /* 2317509Smrj * If the DMA engine can't reach the physical address, increase how 2318509Smrj * much copy buffer we need. We always increase by pagesize so we don't 2319509Smrj * have to worry about converting offsets. Set a flag in the cookies 2320509Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 2321509Smrj * last cookie, go to the next cookie (since we separate each page which 2322509Smrj * uses the copy buffer in case the copy buffer is not physically 2323509Smrj * contiguous. 2324509Smrj */ 2325509Smrj if ((paddr < addrlo) || ((paddr + psize) > addrhi)) { 2326509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2327509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2328509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2329509Smrj cnt++; 2330509Smrj sgl[cnt].dmac_laddress = 0; 2331509Smrj sgl[cnt].dmac_size = 0; 2332509Smrj sgl[cnt].dmac_type = 0; 2333509Smrj } 2334509Smrj } 2335509Smrj 2336509Smrj /* 2337509Smrj * save this page's physical address so we can figure out if the next 2338509Smrj * page is physically contiguous. Keep decrementing size until we are 2339509Smrj * done with the buffer. 2340509Smrj */ 2341509Smrj last_page = paddr & MMU_PAGEMASK; 2342509Smrj size -= psize; 2343509Smrj 2344509Smrj while (size > 0) { 2345509Smrj /* Get the size for this page (i.e. partial or full page) */ 2346509Smrj psize = MIN(size, MMU_PAGESIZE); 2347509Smrj 2348509Smrj if (buftype == DMA_OTYP_PAGES) { 2349509Smrj /* get the paddr from the page_t */ 2350509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2351509Smrj paddr = ptob64(pp->p_pagenum); 2352509Smrj pp = pp->p_next; 2353509Smrj } else if (pplist != NULL) { 2354509Smrj /* index into the array of page_t's to get the paddr */ 2355509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2356509Smrj paddr = ptob64(pplist[pcnt]->p_pagenum); 2357509Smrj pcnt++; 23580Sstevel@tonic-gate } else { 2359509Smrj /* call into the VM to get the paddr */ 2360509Smrj paddr = ptob64(hat_getpfnum(sglinfo->si_asp->a_hat, 2361509Smrj vaddr)); 2362509Smrj vaddr += psize; 2363509Smrj } 2364509Smrj 2365509Smrj /* check to see if this page needs the copy buffer */ 2366509Smrj if ((paddr < addrlo) || ((paddr + psize) > addrhi)) { 2367509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2368509Smrj 23690Sstevel@tonic-gate /* 2370509Smrj * if there is something in the current cookie, go to 2371509Smrj * the next one. We only want one page in a cookie which 2372509Smrj * uses the copybuf since the copybuf doesn't have to 2373509Smrj * be physically contiguous. 2374509Smrj */ 2375509Smrj if (sgl[cnt].dmac_size != 0) { 2376509Smrj cnt++; 2377509Smrj } 2378509Smrj sgl[cnt].dmac_laddress = paddr; 2379509Smrj sgl[cnt].dmac_size = psize; 2380509Smrj #if defined(__amd64) 2381509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2382509Smrj #else 2383509Smrj /* 2384509Smrj * save the buf offset for 32-bit kernel. used in the 2385509Smrj * obsoleted interfaces. 2386509Smrj */ 2387509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2388509Smrj (dmar_object->dmao_size - size); 2389509Smrj #endif 2390509Smrj /* if this isn't the last cookie, go to the next one */ 2391509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2392509Smrj cnt++; 2393509Smrj sgl[cnt].dmac_laddress = 0; 2394509Smrj sgl[cnt].dmac_size = 0; 2395509Smrj sgl[cnt].dmac_type = 0; 2396509Smrj } 2397509Smrj 2398509Smrj /* 2399509Smrj * this page didn't need the copy buffer, if it's not physically 2400509Smrj * contiguous, or it would put us over a segment boundary, or it 2401509Smrj * puts us over the max cookie size, or the current sgl doesn't 2402509Smrj * have anything in it. 2403509Smrj */ 2404509Smrj } else if (((last_page + MMU_PAGESIZE) != paddr) || 2405509Smrj !(paddr & sglinfo->si_segmask) || 2406509Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 2407509Smrj (sgl[cnt].dmac_size == 0)) { 2408509Smrj /* 2409509Smrj * if we're not already in a new cookie, go to the next 2410509Smrj * cookie. 2411509Smrj */ 2412509Smrj if (sgl[cnt].dmac_size != 0) { 2413509Smrj cnt++; 2414509Smrj } 2415509Smrj 2416509Smrj /* save the cookie information */ 2417509Smrj sgl[cnt].dmac_laddress = paddr; 2418509Smrj sgl[cnt].dmac_size = psize; 2419509Smrj #if defined(__amd64) 2420509Smrj sgl[cnt].dmac_type = 0; 2421509Smrj #else 2422509Smrj /* 2423509Smrj * save the buf offset for 32-bit kernel. used in the 2424509Smrj * obsoleted interfaces. 2425509Smrj */ 2426509Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2427509Smrj #endif 2428509Smrj 2429509Smrj /* 2430509Smrj * this page didn't need the copy buffer, it is physically 2431509Smrj * contiguous with the last page, and it's <= the max cookie 2432509Smrj * size. 2433509Smrj */ 2434509Smrj } else { 2435509Smrj sgl[cnt].dmac_size += psize; 2436509Smrj 2437509Smrj /* 2438509Smrj * if this exactly == the maximum cookie size, and 2439509Smrj * it isn't the last cookie, go to the next cookie. 2440509Smrj */ 2441509Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 2442509Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 2443509Smrj cnt++; 2444509Smrj sgl[cnt].dmac_laddress = 0; 2445509Smrj sgl[cnt].dmac_size = 0; 2446509Smrj sgl[cnt].dmac_type = 0; 2447509Smrj } 2448509Smrj } 2449509Smrj 2450509Smrj /* 2451509Smrj * save this page's physical address so we can figure out if the 2452509Smrj * next page is physically contiguous. Keep decrementing size 2453509Smrj * until we are done with the buffer. 2454509Smrj */ 2455509Smrj last_page = paddr; 2456509Smrj size -= psize; 2457509Smrj } 2458509Smrj 2459509Smrj /* we're done, save away how many cookies the sgl has */ 2460509Smrj if (sgl[cnt].dmac_size == 0) { 2461509Smrj ASSERT(cnt < sglinfo->si_max_pages); 2462509Smrj sglinfo->si_sgl_size = cnt; 2463509Smrj } else { 2464509Smrj sglinfo->si_sgl_size = cnt + 1; 2465509Smrj } 2466509Smrj } 2467509Smrj 2468509Smrj 2469509Smrj /* 2470509Smrj * rootnex_bind_slowpath() 2471509Smrj * Call in the bind path if the calling driver can't use the sgl without 2472509Smrj * modifying it. We either need to use the copy buffer and/or we will end up 2473509Smrj * with a partial bind. 2474509Smrj */ 2475509Smrj static int 2476509Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2477509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2478509Smrj { 2479509Smrj rootnex_sglinfo_t *sinfo; 2480509Smrj rootnex_window_t *window; 2481509Smrj ddi_dma_cookie_t *cookie; 2482509Smrj size_t copybuf_used; 2483509Smrj size_t dmac_size; 2484509Smrj boolean_t partial; 2485509Smrj off_t cur_offset; 2486509Smrj page_t *cur_pp; 2487509Smrj major_t mnum; 2488509Smrj int e; 2489509Smrj int i; 2490509Smrj 2491509Smrj 2492509Smrj sinfo = &dma->dp_sglinfo; 2493509Smrj copybuf_used = 0; 2494509Smrj partial = B_FALSE; 2495509Smrj 2496509Smrj /* 2497509Smrj * If we're using the copybuf, set the copybuf state in dma struct. 2498509Smrj * Needs to be first since it sets the copy buffer size. 2499509Smrj */ 2500509Smrj if (sinfo->si_copybuf_req != 0) { 2501509Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2502509Smrj if (e != DDI_SUCCESS) { 2503509Smrj return (e); 2504509Smrj } 2505509Smrj } else { 2506509Smrj dma->dp_copybuf_size = 0; 2507509Smrj } 2508509Smrj 2509509Smrj /* 2510509Smrj * Figure out if we need to do a partial mapping. If so, figure out 2511509Smrj * if we need to trim the buffers when we munge the sgl. 2512509Smrj */ 2513509Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2514509Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2515509Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2516509Smrj dma->dp_partial_required = B_TRUE; 2517509Smrj if (attr->dma_attr_granular != 1) { 2518509Smrj dma->dp_trim_required = B_TRUE; 2519509Smrj } 2520509Smrj } else { 2521509Smrj dma->dp_partial_required = B_FALSE; 2522509Smrj dma->dp_trim_required = B_FALSE; 2523509Smrj } 2524509Smrj 2525509Smrj /* If we need to do a partial bind, make sure the driver supports it */ 2526509Smrj if (dma->dp_partial_required && 2527509Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2528509Smrj 2529509Smrj mnum = ddi_driver_major(dma->dp_dip); 2530509Smrj /* 2531509Smrj * patchable which allows us to print one warning per major 2532509Smrj * number. 2533509Smrj */ 2534509Smrj if ((rootnex_bind_warn) && 2535509Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2536509Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2537509Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 2538509Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 2539509Smrj "There is a small risk of data corruption in " 2540509Smrj "particular with large I/Os. The driver should be " 2541509Smrj "replaced with a corrected version for proper " 2542509Smrj "system operation. To disable this warning, add " 2543509Smrj "'set rootnex:rootnex_bind_warn=0' to " 2544509Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2545509Smrj } 2546509Smrj return (DDI_DMA_TOOBIG); 2547509Smrj } 2548509Smrj 2549509Smrj /* 2550509Smrj * we might need multiple windows, setup state to handle them. In this 2551509Smrj * code path, we will have at least one window. 2552509Smrj */ 2553509Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 2554509Smrj if (e != DDI_SUCCESS) { 2555509Smrj rootnex_teardown_copybuf(dma); 2556509Smrj return (e); 2557509Smrj } 2558509Smrj 2559509Smrj window = &dma->dp_window[0]; 2560509Smrj cookie = &dma->dp_cookies[0]; 2561509Smrj cur_offset = 0; 2562509Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 2563509Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2564509Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2565509Smrj } 2566509Smrj 2567509Smrj /* loop though all the cookies we got back from get_sgl() */ 2568509Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 2569509Smrj /* 2570509Smrj * If we're using the copy buffer, check this cookie and setup 2571509Smrj * its associated copy buffer state. If this cookie uses the 2572509Smrj * copy buffer, make sure we sync this window during dma_sync. 2573509Smrj */ 2574509Smrj if (dma->dp_copybuf_size > 0) { 2575509Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2576509Smrj cur_offset, ©buf_used, &cur_pp); 2577509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2578509Smrj window->wd_dosync = B_TRUE; 2579509Smrj } 2580509Smrj } 2581509Smrj 2582509Smrj /* 2583509Smrj * save away the cookie size, since it could be modified in 2584509Smrj * the windowing code. 2585509Smrj */ 2586509Smrj dmac_size = cookie->dmac_size; 2587509Smrj 2588509Smrj /* if we went over max copybuf size */ 2589509Smrj if (dma->dp_copybuf_size && 2590509Smrj (copybuf_used > dma->dp_copybuf_size)) { 2591509Smrj partial = B_TRUE; 2592509Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 2593509Smrj cookie, cur_offset, ©buf_used); 2594509Smrj if (e != DDI_SUCCESS) { 2595509Smrj rootnex_teardown_copybuf(dma); 2596509Smrj rootnex_teardown_windows(dma); 2597509Smrj return (e); 2598509Smrj } 2599509Smrj 2600509Smrj /* 2601509Smrj * if the coookie uses the copy buffer, make sure the 2602509Smrj * new window we just moved to is set to sync. 2603509Smrj */ 2604509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2605509Smrj window->wd_dosync = B_TRUE; 2606509Smrj } 2607509Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2608509Smrj dma->dp_dip); 2609509Smrj 2610509Smrj /* if the cookie cnt == max sgllen, move to the next window */ 2611509Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2612509Smrj partial = B_TRUE; 2613509Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2614509Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 2615509Smrj cookie, attr, cur_offset); 2616509Smrj if (e != DDI_SUCCESS) { 2617509Smrj rootnex_teardown_copybuf(dma); 2618509Smrj rootnex_teardown_windows(dma); 2619509Smrj return (e); 2620509Smrj } 2621509Smrj 2622509Smrj /* 2623509Smrj * if the coookie uses the copy buffer, make sure the 2624509Smrj * new window we just moved to is set to sync. 2625509Smrj */ 2626509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2627509Smrj window->wd_dosync = B_TRUE; 2628509Smrj } 2629509Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2630509Smrj dma->dp_dip); 2631509Smrj 2632509Smrj /* else if we will be over maxxfer */ 2633509Smrj } else if ((window->wd_size + dmac_size) > 2634509Smrj dma->dp_maxxfer) { 2635509Smrj partial = B_TRUE; 2636509Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2637509Smrj cookie); 2638509Smrj if (e != DDI_SUCCESS) { 2639509Smrj rootnex_teardown_copybuf(dma); 2640509Smrj rootnex_teardown_windows(dma); 2641509Smrj return (e); 2642509Smrj } 2643509Smrj 2644509Smrj /* 2645509Smrj * if the coookie uses the copy buffer, make sure the 2646509Smrj * new window we just moved to is set to sync. 26470Sstevel@tonic-gate */ 2648509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2649509Smrj window->wd_dosync = B_TRUE; 2650509Smrj } 2651509Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2652509Smrj dma->dp_dip); 2653509Smrj 2654509Smrj /* else this cookie fits in the current window */ 2655509Smrj } else { 2656509Smrj window->wd_cookie_cnt++; 2657509Smrj window->wd_size += dmac_size; 2658509Smrj } 2659509Smrj 2660509Smrj /* track our offset into the buffer, go to the next cookie */ 2661509Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2662509Smrj ASSERT(cookie->dmac_size <= dmac_size); 2663509Smrj cur_offset += dmac_size; 2664509Smrj cookie++; 2665509Smrj } 2666509Smrj 2667509Smrj /* if we ended up with a zero sized window in the end, clean it up */ 2668509Smrj if (window->wd_size == 0) { 2669509Smrj hp->dmai_nwin--; 2670509Smrj window--; 2671509Smrj } 2672509Smrj 2673509Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 2674509Smrj 2675509Smrj if (!partial) { 2676509Smrj return (DDI_DMA_MAPPED); 2677509Smrj } 2678509Smrj 2679509Smrj ASSERT(dma->dp_partial_required); 2680509Smrj return (DDI_DMA_PARTIAL_MAP); 2681509Smrj } 2682509Smrj 2683509Smrj 2684509Smrj /* 2685509Smrj * rootnex_setup_copybuf() 2686509Smrj * Called in bind slowpath. Figures out if we're going to use the copy 2687509Smrj * buffer, and if we do, sets up the basic state to handle it. 2688509Smrj */ 2689509Smrj static int 2690509Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2691509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 2692509Smrj { 2693509Smrj rootnex_sglinfo_t *sinfo; 2694509Smrj ddi_dma_attr_t lattr; 2695509Smrj size_t max_copybuf; 2696509Smrj int cansleep; 2697509Smrj int e; 2698509Smrj #if !defined(__amd64) 2699509Smrj int vmflag; 2700509Smrj #endif 2701509Smrj 2702509Smrj 2703509Smrj sinfo = &dma->dp_sglinfo; 2704509Smrj 2705509Smrj /* 2706509Smrj * read this first so it's consistent through the routine so we can 2707509Smrj * patch it on the fly. 2708509Smrj */ 2709509Smrj max_copybuf = rootnex_max_copybuf_size & MMU_PAGEMASK; 2710509Smrj 2711509Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 2712509Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 2713509Smrj 2714509Smrj /* make sure the copybuf size <= the max size */ 2715509Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 2716509Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 2717509Smrj 2718509Smrj #if !defined(__amd64) 2719509Smrj /* 2720509Smrj * if we don't have kva space to copy to/from, allocate the KVA space 2721509Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 2722509Smrj * the 64-bit kernel. 2723509Smrj */ 2724509Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 2725509Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 2726509Smrj 2727509Smrj /* convert the sleep flags */ 2728509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2729509Smrj vmflag = VM_SLEEP; 2730509Smrj } else { 2731509Smrj vmflag = VM_NOSLEEP; 2732509Smrj } 2733509Smrj 2734509Smrj /* allocate Kernel VA space that we can bcopy to/from */ 2735509Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 2736509Smrj vmflag); 2737509Smrj if (dma->dp_kva == NULL) { 2738509Smrj return (DDI_DMA_NORESOURCES); 2739509Smrj } 2740509Smrj } 2741509Smrj #endif 2742509Smrj 2743509Smrj /* convert the sleep flags */ 2744509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2745509Smrj cansleep = 1; 2746509Smrj } else { 2747509Smrj cansleep = 0; 2748509Smrj } 2749509Smrj 2750509Smrj /* 2751509Smrj * Allocated the actual copy buffer. This needs to fit within the DMA 2752509Smrj * engines limits, so we can't use kmem_alloc... 2753509Smrj */ 2754509Smrj lattr = *attr; 2755509Smrj lattr.dma_attr_align = MMU_PAGESIZE; 2756509Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 2757509Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 2758509Smrj if (e != DDI_SUCCESS) { 2759509Smrj #if !defined(__amd64) 2760509Smrj if (dma->dp_kva != NULL) { 2761509Smrj vmem_free(heap_arena, dma->dp_kva, 2762509Smrj dma->dp_copybuf_size); 2763509Smrj } 2764509Smrj #endif 2765509Smrj return (DDI_DMA_NORESOURCES); 2766509Smrj } 2767509Smrj 2768509Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 2769509Smrj size_t, dma->dp_copybuf_size); 2770509Smrj 2771509Smrj return (DDI_SUCCESS); 2772509Smrj } 2773509Smrj 2774509Smrj 2775509Smrj /* 2776509Smrj * rootnex_setup_windows() 2777509Smrj * Called in bind slowpath to setup the window state. We always have windows 2778509Smrj * in the slowpath. Even if the window count = 1. 2779509Smrj */ 2780509Smrj static int 2781509Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2782509Smrj ddi_dma_attr_t *attr, int kmflag) 2783509Smrj { 2784509Smrj rootnex_window_t *windowp; 2785509Smrj rootnex_sglinfo_t *sinfo; 2786509Smrj size_t copy_state_size; 2787509Smrj size_t win_state_size; 2788509Smrj size_t state_available; 2789509Smrj size_t space_needed; 2790509Smrj uint_t copybuf_win; 2791509Smrj uint_t maxxfer_win; 2792509Smrj size_t space_used; 2793509Smrj uint_t sglwin; 2794509Smrj 2795509Smrj 2796509Smrj sinfo = &dma->dp_sglinfo; 2797509Smrj 2798509Smrj dma->dp_current_win = 0; 2799509Smrj hp->dmai_nwin = 0; 2800509Smrj 2801509Smrj /* If we don't need to do a partial, we only have one window */ 2802509Smrj if (!dma->dp_partial_required) { 2803509Smrj dma->dp_max_win = 1; 2804509Smrj 2805509Smrj /* 2806509Smrj * we need multiple windows, need to figure out the worse case number 2807509Smrj * of windows. 2808509Smrj */ 2809509Smrj } else { 2810509Smrj /* 2811509Smrj * if we need windows because we need more copy buffer that 2812509Smrj * we allow, the worse case number of windows we could need 2813509Smrj * here would be (copybuf space required / copybuf space that 2814509Smrj * we have) plus one for remainder, and plus 2 to handle the 2815509Smrj * extra pages on the trim for the first and last pages of the 2816509Smrj * buffer (a page is the minimum window size so under the right 2817509Smrj * attr settings, you could have a window for each page). 2818509Smrj * The last page will only be hit here if the size is not a 2819509Smrj * multiple of the granularity (which theoretically shouldn't 2820509Smrj * be the case but never has been enforced, so we could have 2821509Smrj * broken things without it). 2822509Smrj */ 2823509Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 2824509Smrj ASSERT(dma->dp_copybuf_size > 0); 2825509Smrj copybuf_win = (sinfo->si_copybuf_req / 2826509Smrj dma->dp_copybuf_size) + 1 + 2; 2827509Smrj } else { 2828509Smrj copybuf_win = 0; 2829509Smrj } 2830509Smrj 2831509Smrj /* 2832509Smrj * if we need windows because we have more cookies than the H/W 2833509Smrj * can handle, the number of windows we would need here would 2834509Smrj * be (cookie count / cookies count H/W supports) plus one for 2835509Smrj * remainder, and plus 2 to handle the extra pages on the trim 2836509Smrj * (see above comment about trim) 2837509Smrj */ 2838509Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 2839509Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 2840509Smrj + 1) + 2; 2841509Smrj } else { 2842509Smrj sglwin = 0; 2843509Smrj } 2844509Smrj 2845509Smrj /* 2846509Smrj * if we need windows because we're binding more memory than the 2847509Smrj * H/W can transfer at once, the number of windows we would need 2848509Smrj * here would be (xfer count / max xfer H/W supports) plus one 2849509Smrj * for remainder, and plus 2 to handle the extra pages on the 2850509Smrj * trim (see above comment about trim) 2851509Smrj */ 2852509Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 2853509Smrj maxxfer_win = (dma->dp_dma.dmao_size / 2854509Smrj dma->dp_maxxfer) + 1 + 2; 2855509Smrj } else { 2856509Smrj maxxfer_win = 0; 2857509Smrj } 2858509Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 2859509Smrj ASSERT(dma->dp_max_win > 0); 2860509Smrj } 2861509Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 2862509Smrj 2863509Smrj /* 2864509Smrj * Get space for window and potential copy buffer state. Before we 2865509Smrj * go and allocate memory, see if we can get away with using what's 2866509Smrj * left in the pre-allocted state or the dynamically allocated sgl. 2867509Smrj */ 2868509Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 2869509Smrj sizeof (ddi_dma_cookie_t)); 2870509Smrj 2871509Smrj /* if we dynamically allocated space for the cookies */ 2872509Smrj if (dma->dp_need_to_free_cookie) { 2873509Smrj /* if we have more space in the pre-allocted buffer, use it */ 2874509Smrj ASSERT(space_used <= dma->dp_cookie_size); 2875509Smrj if ((dma->dp_cookie_size - space_used) <= 2876509Smrj rootnex_state->r_prealloc_size) { 2877509Smrj state_available = rootnex_state->r_prealloc_size; 2878509Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 2879509Smrj 2880509Smrj /* 2881509Smrj * else, we have more free space in the dynamically allocated 2882509Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 2883509Smrj * didn't need a lot of cookies. 2884509Smrj */ 2885509Smrj } else { 2886509Smrj state_available = dma->dp_cookie_size - space_used; 2887509Smrj windowp = (rootnex_window_t *) 2888509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2889509Smrj } 2890509Smrj 2891509Smrj /* we used the pre-alloced buffer */ 2892509Smrj } else { 2893509Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 2894509Smrj state_available = rootnex_state->r_prealloc_size - space_used; 2895509Smrj windowp = (rootnex_window_t *) 2896509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2897509Smrj } 2898509Smrj 2899509Smrj /* 2900509Smrj * figure out how much state we need to track the copy buffer. Add an 2901509Smrj * addition 8 bytes for pointer alignemnt later. 2902509Smrj */ 2903509Smrj if (dma->dp_copybuf_size > 0) { 2904509Smrj copy_state_size = sinfo->si_max_pages * 2905509Smrj sizeof (rootnex_pgmap_t); 2906509Smrj } else { 2907509Smrj copy_state_size = 0; 2908509Smrj } 2909509Smrj /* add an additional 8 bytes for pointer alignment */ 2910509Smrj space_needed = win_state_size + copy_state_size + 0x8; 2911509Smrj 2912509Smrj /* if we have enough space already, use it */ 2913509Smrj if (state_available >= space_needed) { 2914509Smrj dma->dp_window = windowp; 2915509Smrj dma->dp_need_to_free_window = B_FALSE; 2916509Smrj 2917509Smrj /* not enough space, need to allocate more. */ 2918509Smrj } else { 2919509Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 2920509Smrj if (dma->dp_window == NULL) { 2921509Smrj return (DDI_DMA_NORESOURCES); 2922509Smrj } 2923509Smrj dma->dp_need_to_free_window = B_TRUE; 2924509Smrj dma->dp_window_size = space_needed; 2925509Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 2926509Smrj dma->dp_dip, size_t, space_needed); 2927509Smrj } 2928509Smrj 2929509Smrj /* 2930509Smrj * we allocate copy buffer state and window state at the same time. 2931509Smrj * setup our copy buffer state pointers. Make sure it's aligned. 2932509Smrj */ 2933509Smrj if (dma->dp_copybuf_size > 0) { 2934509Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 2935509Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 2936509Smrj 2937509Smrj #if !defined(__amd64) 2938509Smrj /* 2939509Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 2940509Smrj * false/NULL. Should be quicker to bzero vs loop and set. 2941509Smrj */ 2942509Smrj bzero(dma->dp_pgmap, copy_state_size); 2943509Smrj #endif 2944509Smrj } else { 2945509Smrj dma->dp_pgmap = NULL; 2946509Smrj } 2947509Smrj 2948509Smrj return (DDI_SUCCESS); 2949509Smrj } 2950509Smrj 2951509Smrj 2952509Smrj /* 2953509Smrj * rootnex_teardown_copybuf() 2954509Smrj * cleans up after rootnex_setup_copybuf() 2955509Smrj */ 2956509Smrj static void 2957509Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 2958509Smrj { 2959509Smrj #if !defined(__amd64) 2960509Smrj int i; 2961509Smrj 2962509Smrj /* 2963509Smrj * if we allocated kernel heap VMEM space, go through all the pages and 2964509Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 2965509Smrj * arena. Then free the VMEM space. 2966509Smrj */ 2967509Smrj if (dma->dp_kva != NULL) { 2968509Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 2969509Smrj if (dma->dp_pgmap[i].pm_mapped) { 2970509Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 2971509Smrj MMU_PAGESIZE, HAT_UNLOAD); 2972509Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 2973509Smrj } 2974509Smrj } 2975509Smrj 2976509Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 2977509Smrj } 2978509Smrj 2979509Smrj #endif 2980509Smrj 2981509Smrj /* if we allocated a copy buffer, free it */ 2982509Smrj if (dma->dp_cbaddr != NULL) { 2983509Smrj i_ddi_mem_free(dma->dp_cbaddr, 0); 2984509Smrj } 2985509Smrj } 2986509Smrj 2987509Smrj 2988509Smrj /* 2989509Smrj * rootnex_teardown_windows() 2990509Smrj * cleans up after rootnex_setup_windows() 2991509Smrj */ 2992509Smrj static void 2993509Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 2994509Smrj { 2995509Smrj /* 2996509Smrj * if we had to allocate window state on the last bind (because we 2997509Smrj * didn't have enough pre-allocated space in the handle), free it. 2998509Smrj */ 2999509Smrj if (dma->dp_need_to_free_window) { 3000509Smrj kmem_free(dma->dp_window, dma->dp_window_size); 3001509Smrj } 3002509Smrj } 3003509Smrj 3004509Smrj 3005509Smrj /* 3006509Smrj * rootnex_init_win() 3007509Smrj * Called in bind slow path during creation of a new window. Initializes 3008509Smrj * window state to default values. 3009509Smrj */ 3010509Smrj /*ARGSUSED*/ 3011509Smrj static void 3012509Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3013509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3014509Smrj { 3015509Smrj hp->dmai_nwin++; 3016509Smrj window->wd_dosync = B_FALSE; 3017509Smrj window->wd_offset = cur_offset; 3018509Smrj window->wd_size = 0; 3019509Smrj window->wd_first_cookie = cookie; 3020509Smrj window->wd_cookie_cnt = 0; 3021509Smrj window->wd_trim.tr_trim_first = B_FALSE; 3022509Smrj window->wd_trim.tr_trim_last = B_FALSE; 3023509Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 3024509Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 3025509Smrj #if !defined(__amd64) 3026509Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 3027509Smrj #endif 3028509Smrj } 3029509Smrj 3030509Smrj 3031509Smrj /* 3032509Smrj * rootnex_setup_cookie() 3033509Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 3034509Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 3035509Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 3036509Smrj * need during sync. 3037509Smrj */ 3038509Smrj static void 3039509Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3040509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3041509Smrj page_t **cur_pp) 3042509Smrj { 3043509Smrj boolean_t copybuf_sz_power_2; 3044509Smrj rootnex_sglinfo_t *sinfo; 3045509Smrj uint_t pidx; 3046509Smrj uint_t pcnt; 3047509Smrj off_t poff; 3048509Smrj #if defined(__amd64) 3049509Smrj pfn_t pfn; 3050509Smrj #else 3051509Smrj page_t **pplist; 3052509Smrj #endif 3053509Smrj 3054509Smrj sinfo = &dma->dp_sglinfo; 3055509Smrj 3056509Smrj /* 3057509Smrj * Calculate the page index relative to the start of the buffer. The 3058509Smrj * index to the current page for our buffer is the offset into the 3059509Smrj * first page of the buffer plus our current offset into the buffer 3060509Smrj * itself, shifted of course... 3061509Smrj */ 3062509Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3063509Smrj ASSERT(pidx < sinfo->si_max_pages); 3064509Smrj 3065509Smrj /* if this cookie uses the copy buffer */ 3066509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3067509Smrj /* 3068509Smrj * NOTE: we know that since this cookie uses the copy buffer, it 3069509Smrj * is <= MMU_PAGESIZE. 3070509Smrj */ 3071509Smrj 3072509Smrj /* 3073509Smrj * get the offset into the page. For the 64-bit kernel, get the 3074509Smrj * pfn which we'll use with seg kpm. 3075509Smrj */ 3076509Smrj poff = cookie->_dmu._dmac_ll & MMU_PAGEOFFSET; 3077509Smrj #if defined(__amd64) 3078509Smrj pfn = cookie->_dmu._dmac_ll >> MMU_PAGESHIFT; 3079509Smrj #endif 3080509Smrj 3081509Smrj /* figure out if the copybuf size is a power of 2 */ 3082509Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3083509Smrj copybuf_sz_power_2 = B_FALSE; 3084509Smrj } else { 3085509Smrj copybuf_sz_power_2 = B_TRUE; 3086509Smrj } 3087509Smrj 3088509Smrj /* This page uses the copy buffer */ 3089509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3090509Smrj 3091509Smrj /* 3092509Smrj * save the copy buffer KVA that we'll use with this page. 3093509Smrj * if we still fit within the copybuf, it's a simple add. 3094509Smrj * otherwise, we need to wrap over using & or % accordingly. 3095509Smrj */ 3096509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3097509Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3098509Smrj *copybuf_used; 3099509Smrj } else { 3100509Smrj if (copybuf_sz_power_2) { 3101509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3102509Smrj (uintptr_t)dma->dp_cbaddr + 3103509Smrj (*copybuf_used & 3104509Smrj (dma->dp_copybuf_size - 1))); 31050Sstevel@tonic-gate } else { 3106509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3107509Smrj (uintptr_t)dma->dp_cbaddr + 3108509Smrj (*copybuf_used % dma->dp_copybuf_size)); 31090Sstevel@tonic-gate } 3110509Smrj } 3111509Smrj 3112509Smrj /* 3113509Smrj * over write the cookie physical address with the address of 3114509Smrj * the physical address of the copy buffer page that we will 3115509Smrj * use. 3116509Smrj */ 3117509Smrj cookie->_dmu._dmac_ll = ptob64(hat_getpfnum(kas.a_hat, 3118509Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3119509Smrj 3120509Smrj /* if we have a kernel VA, it's easy, just save that address */ 3121509Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3122509Smrj (sinfo->si_asp == &kas)) { 3123509Smrj /* 3124509Smrj * save away the page aligned virtual address of the 3125509Smrj * driver buffer. Offsets are handled in the sync code. 3126509Smrj */ 3127509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3128509Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3129509Smrj & MMU_PAGEMASK); 3130509Smrj #if !defined(__amd64) 3131509Smrj /* 3132509Smrj * we didn't need to, and will never need to map this 3133509Smrj * page. 3134509Smrj */ 3135509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3136509Smrj #endif 3137509Smrj 3138509Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 3139509Smrj } else { 3140509Smrj #if defined(__amd64) 3141509Smrj /* 3142509Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 3143509Smrj * get a Kernel VA for the corresponding pfn. 3144509Smrj */ 3145509Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3146509Smrj #else 3147509Smrj /* 3148509Smrj * for the 32-bit kernel, this is a pain. First we'll 3149509Smrj * save away the page_t or user VA for this page. This 3150509Smrj * is needed in rootnex_dma_win() when we switch to a 3151509Smrj * new window which requires us to re-map the copy 3152509Smrj * buffer. 3153509Smrj */ 3154509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3155509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3156509Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3157509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3158509Smrj } else if (pplist != NULL) { 3159509Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3160509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3161509Smrj } else { 3162509Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 3163509Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3164509Smrj (((uintptr_t) 3165509Smrj dmar_object->dmao_obj.virt_obj.v_addr + 3166509Smrj cur_offset) & MMU_PAGEMASK); 3167509Smrj } 3168509Smrj 3169509Smrj /* 3170509Smrj * save away the page aligned virtual address which was 3171509Smrj * allocated from the kernel heap arena (taking into 3172509Smrj * account if we need more copy buffer than we alloced 3173509Smrj * and use multiple windows to handle this, i.e. &,%). 3174509Smrj * NOTE: there isn't and physical memory backing up this 3175509Smrj * virtual address space currently. 3176509Smrj */ 3177509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 3178509Smrj dma->dp_copybuf_size) { 3179509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3180509Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 3181509Smrj MMU_PAGEMASK); 3182509Smrj } else { 3183509Smrj if (copybuf_sz_power_2) { 3184509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3185509Smrj (((uintptr_t)dma->dp_kva + 3186509Smrj (*copybuf_used & 3187509Smrj (dma->dp_copybuf_size - 1))) & 3188509Smrj MMU_PAGEMASK); 3189509Smrj } else { 3190509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3191509Smrj (((uintptr_t)dma->dp_kva + 3192509Smrj (*copybuf_used % 3193509Smrj dma->dp_copybuf_size)) & 3194509Smrj MMU_PAGEMASK); 3195509Smrj } 3196509Smrj } 3197509Smrj 3198509Smrj /* 3199509Smrj * if we haven't used up the available copy buffer yet, 3200509Smrj * map the kva to the physical page. 3201509Smrj */ 3202509Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 3203509Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3204509Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3205509Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3206509Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3207509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3208509Smrj } else { 3209509Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3210509Smrj sinfo->si_asp, 3211509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3212509Smrj } 3213509Smrj 3214509Smrj /* 3215509Smrj * we've used up the available copy buffer, this page 3216509Smrj * will have to be mapped during rootnex_dma_win() when 3217509Smrj * we switch to a new window which requires a re-map 3218509Smrj * the copy buffer. (32-bit kernel only) 3219509Smrj */ 3220509Smrj } else { 3221509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3222509Smrj } 3223509Smrj #endif 3224509Smrj /* go to the next page_t */ 3225509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3226509Smrj *cur_pp = (*cur_pp)->p_next; 3227509Smrj } 32280Sstevel@tonic-gate } 3229509Smrj 3230509Smrj /* add to the copy buffer count */ 3231509Smrj *copybuf_used += MMU_PAGESIZE; 3232509Smrj 3233509Smrj /* 3234509Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 3235509Smrj * cookie occupies to reflect this. 3236509Smrj */ 3237509Smrj } else { 3238509Smrj /* 3239509Smrj * figure out how many pages the cookie occupies. We need to 3240509Smrj * use the original page offset of the buffer and the cookies 3241509Smrj * offset in the buffer to do this. 3242509Smrj */ 3243509Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3244509Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 3245509Smrj 3246509Smrj while (pcnt > 0) { 3247509Smrj #if !defined(__amd64) 3248509Smrj /* 3249509Smrj * the 32-bit kernel doesn't have seg kpm, so we need 3250509Smrj * to map in the driver buffer (if it didn't come down 3251509Smrj * with a kernel VA) on the fly. Since this page doesn't 3252509Smrj * use the copy buffer, it's not, or will it ever, have 3253509Smrj * to be mapped in. 3254509Smrj */ 3255509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3256509Smrj #endif 3257509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3258509Smrj 3259509Smrj /* 3260509Smrj * we need to update pidx and cur_pp or we'll loose 3261509Smrj * track of where we are. 3262509Smrj */ 3263509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3264509Smrj *cur_pp = (*cur_pp)->p_next; 3265509Smrj } 3266509Smrj pidx++; 3267509Smrj pcnt--; 3268509Smrj } 3269509Smrj } 3270509Smrj } 3271509Smrj 3272509Smrj 3273509Smrj /* 3274509Smrj * rootnex_sgllen_window_boundary() 3275509Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 3276509Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3277509Smrj * length supported by the DMA H/W. 3278509Smrj */ 3279509Smrj static int 3280509Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3281509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3282509Smrj off_t cur_offset) 3283509Smrj { 3284509Smrj off_t new_offset; 3285509Smrj size_t trim_sz; 3286509Smrj off_t coffset; 3287509Smrj 3288509Smrj 3289509Smrj /* 3290509Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 3291509Smrj * the next window and init it. We're done. 3292509Smrj */ 3293509Smrj if (!dma->dp_trim_required) { 3294509Smrj (*windowp)++; 3295509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3296509Smrj (*windowp)->wd_cookie_cnt++; 3297509Smrj (*windowp)->wd_size = cookie->dmac_size; 3298509Smrj return (DDI_SUCCESS); 3299509Smrj } 3300509Smrj 3301509Smrj /* figure out how much we need to trim from the window */ 3302509Smrj ASSERT(attr->dma_attr_granular != 0); 3303509Smrj if (dma->dp_granularity_power_2) { 3304509Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3305509Smrj } else { 3306509Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3307509Smrj } 3308509Smrj 3309509Smrj /* The window's a whole multiple of granularity. We're done */ 3310509Smrj if (trim_sz == 0) { 3311509Smrj (*windowp)++; 3312509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3313509Smrj (*windowp)->wd_cookie_cnt++; 3314509Smrj (*windowp)->wd_size = cookie->dmac_size; 3315509Smrj return (DDI_SUCCESS); 3316509Smrj } 3317509Smrj 3318509Smrj /* 3319509Smrj * The window's not a whole multiple of granularity, since we know this 3320509Smrj * is due to the sgllen, we need to go back to the last cookie and trim 3321509Smrj * that one, add the left over part of the old cookie into the new 3322509Smrj * window, and then add in the new cookie into the new window. 3323509Smrj */ 3324509Smrj 3325509Smrj /* 3326509Smrj * make sure the driver isn't making us do something bad... Trimming and 3327509Smrj * sgllen == 1 don't go together. 3328509Smrj */ 3329509Smrj if (attr->dma_attr_sgllen == 1) { 3330509Smrj return (DDI_DMA_NOMAPPING); 3331509Smrj } 3332509Smrj 3333509Smrj /* 3334509Smrj * first, setup the current window to account for the trim. Need to go 3335509Smrj * back to the last cookie for this. 3336509Smrj */ 3337509Smrj cookie--; 3338509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3339509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3340509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3341509Smrj ASSERT(cookie->dmac_size > trim_sz); 3342509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3343509Smrj (*windowp)->wd_size -= trim_sz; 3344509Smrj 3345509Smrj /* save the buffer offsets for the next window */ 3346509Smrj coffset = cookie->dmac_size - trim_sz; 3347509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3348509Smrj 3349509Smrj /* 3350509Smrj * set this now in case this is the first window. all other cases are 3351509Smrj * set in dma_win() 3352509Smrj */ 3353509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3354509Smrj 3355509Smrj /* 3356509Smrj * initialize the next window using what's left over in the previous 3357509Smrj * cookie. 3358509Smrj */ 3359509Smrj (*windowp)++; 3360509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3361509Smrj (*windowp)->wd_cookie_cnt++; 3362509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3363509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + coffset; 3364509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3365509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3366509Smrj (*windowp)->wd_dosync = B_TRUE; 3367509Smrj } 3368509Smrj 3369509Smrj /* 3370509Smrj * now go back to the current cookie and add it to the new window. set 3371509Smrj * the new window size to the what was left over from the previous 3372509Smrj * cookie and what's in the current cookie. 3373509Smrj */ 3374509Smrj cookie++; 3375509Smrj (*windowp)->wd_cookie_cnt++; 3376509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3377509Smrj 3378509Smrj /* 3379509Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 3380509Smrj * a max size of maxxfer). Handle that case. 3381509Smrj */ 3382509Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 3383509Smrj /* 3384509Smrj * maxxfer is already a whole multiple of granularity, and this 3385509Smrj * trim will be <= the previous trim (since a cookie can't be 3386509Smrj * larger than maxxfer). Make things simple here. 3387509Smrj */ 3388509Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3389509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3390509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3391509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3392509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3393509Smrj (*windowp)->wd_size -= trim_sz; 3394509Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3395509Smrj 3396509Smrj /* save the buffer offsets for the next window */ 3397509Smrj coffset = cookie->dmac_size - trim_sz; 3398509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3399509Smrj 3400509Smrj /* setup the next window */ 3401509Smrj (*windowp)++; 3402509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3403509Smrj (*windowp)->wd_cookie_cnt++; 3404509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3405509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + 3406509Smrj coffset; 3407509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3408509Smrj } 3409509Smrj 3410509Smrj return (DDI_SUCCESS); 3411509Smrj } 3412509Smrj 3413509Smrj 3414509Smrj /* 3415509Smrj * rootnex_copybuf_window_boundary() 3416509Smrj * Called in bind slowpath when we get to a window boundary because we used 3417509Smrj * up all the copy buffer that we have. 3418509Smrj */ 3419509Smrj static int 3420509Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3421509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3422509Smrj size_t *copybuf_used) 3423509Smrj { 3424509Smrj rootnex_sglinfo_t *sinfo; 3425509Smrj off_t new_offset; 3426509Smrj size_t trim_sz; 3427509Smrj off_t coffset; 3428509Smrj uint_t pidx; 3429509Smrj off_t poff; 3430509Smrj 3431509Smrj 3432509Smrj sinfo = &dma->dp_sglinfo; 3433509Smrj 3434509Smrj /* 3435509Smrj * the copy buffer should be a whole multiple of page size. We know that 3436509Smrj * this cookie is <= MMU_PAGESIZE. 3437509Smrj */ 3438509Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3439509Smrj 3440509Smrj /* 3441509Smrj * from now on, all new windows in this bind need to be re-mapped during 3442509Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3443509Smrj * space... 3444509Smrj */ 3445509Smrj #if !defined(__amd64) 3446509Smrj dma->dp_cb_remaping = B_TRUE; 3447509Smrj #endif 3448509Smrj 3449509Smrj /* reset copybuf used */ 3450509Smrj *copybuf_used = 0; 3451509Smrj 3452509Smrj /* 3453509Smrj * if we don't have to trim (since granularity is set to 1), go to the 3454509Smrj * next window and add the current cookie to it. We know the current 3455509Smrj * cookie uses the copy buffer since we're in this code path. 3456509Smrj */ 3457509Smrj if (!dma->dp_trim_required) { 3458509Smrj (*windowp)++; 3459509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3460509Smrj 3461509Smrj /* Add this cookie to the new window */ 3462509Smrj (*windowp)->wd_cookie_cnt++; 3463509Smrj (*windowp)->wd_size += cookie->dmac_size; 3464509Smrj *copybuf_used += MMU_PAGESIZE; 3465509Smrj return (DDI_SUCCESS); 3466509Smrj } 3467509Smrj 3468509Smrj /* 3469509Smrj * *** may need to trim, figure it out. 3470509Smrj */ 3471509Smrj 3472509Smrj /* figure out how much we need to trim from the window */ 3473509Smrj if (dma->dp_granularity_power_2) { 3474509Smrj trim_sz = (*windowp)->wd_size & 3475509Smrj (hp->dmai_attr.dma_attr_granular - 1); 3476509Smrj } else { 3477509Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3478509Smrj } 3479509Smrj 3480509Smrj /* 3481509Smrj * if the window's a whole multiple of granularity, go to the next 3482509Smrj * window, init it, then add in the current cookie. We know the current 3483509Smrj * cookie uses the copy buffer since we're in this code path. 3484509Smrj */ 3485509Smrj if (trim_sz == 0) { 3486509Smrj (*windowp)++; 3487509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3488509Smrj 3489509Smrj /* Add this cookie to the new window */ 3490509Smrj (*windowp)->wd_cookie_cnt++; 3491509Smrj (*windowp)->wd_size += cookie->dmac_size; 3492509Smrj *copybuf_used += MMU_PAGESIZE; 3493509Smrj return (DDI_SUCCESS); 3494509Smrj } 3495509Smrj 3496509Smrj /* 3497509Smrj * *** We figured it out, we definitly need to trim 3498509Smrj */ 3499509Smrj 3500509Smrj /* 3501509Smrj * make sure the driver isn't making us do something bad... 3502509Smrj * Trimming and sgllen == 1 don't go together. 3503509Smrj */ 3504509Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 3505509Smrj return (DDI_DMA_NOMAPPING); 3506509Smrj } 3507509Smrj 3508509Smrj /* 3509509Smrj * first, setup the current window to account for the trim. Need to go 3510509Smrj * back to the last cookie for this. Some of the last cookie will be in 3511509Smrj * the current window, and some of the last cookie will be in the new 3512509Smrj * window. All of the current cookie will be in the new window. 3513509Smrj */ 3514509Smrj cookie--; 3515509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3516509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3517509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3518509Smrj ASSERT(cookie->dmac_size > trim_sz); 3519509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3520509Smrj (*windowp)->wd_size -= trim_sz; 3521509Smrj 3522509Smrj /* 3523509Smrj * we're trimming the last cookie (not the current cookie). So that 3524509Smrj * last cookie may have or may not have been using the copy buffer ( 3525509Smrj * we know the cookie passed in uses the copy buffer since we're in 3526509Smrj * this code path). 3527509Smrj * 3528509Smrj * If the last cookie doesn't use the copy buffer, nothing special to 3529509Smrj * do. However, if it does uses the copy buffer, it will be both the 3530509Smrj * last page in the current window and the first page in the next 3531509Smrj * window. Since we are reusing the copy buffer (and KVA space on the 3532509Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 3533509Smrj * current window, and the start of the copy buffer in the next window. 3534509Smrj * Track that info... The cookie physical address was already set to 3535509Smrj * the copy buffer physical address in setup_cookie.. 3536509Smrj */ 3537509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3538509Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3539509Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 3540509Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3541509Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 3542509Smrj (*windowp)->wd_trim.tr_last_cbaddr = 3543509Smrj dma->dp_pgmap[pidx].pm_cbaddr; 3544509Smrj #if !defined(__amd64) 3545509Smrj (*windowp)->wd_trim.tr_last_kaddr = 3546509Smrj dma->dp_pgmap[pidx].pm_kaddr; 3547509Smrj #endif 3548509Smrj } 3549509Smrj 3550509Smrj /* save the buffer offsets for the next window */ 3551509Smrj coffset = cookie->dmac_size - trim_sz; 3552509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3553509Smrj 3554509Smrj /* 3555509Smrj * set this now in case this is the first window. all other cases are 3556509Smrj * set in dma_win() 3557509Smrj */ 3558509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3559509Smrj 3560509Smrj /* 3561509Smrj * initialize the next window using what's left over in the previous 3562509Smrj * cookie. 3563509Smrj */ 3564509Smrj (*windowp)++; 3565509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3566509Smrj (*windowp)->wd_cookie_cnt++; 3567509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3568509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + coffset; 3569509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3570509Smrj 3571509Smrj /* 3572509Smrj * again, we're tracking if the last cookie uses the copy buffer. 3573509Smrj * read the comment above for more info on why we need to track 3574509Smrj * additional state. 3575509Smrj * 3576509Smrj * For the first cookie in the new window, we need reset the physical 3577509Smrj * address to DMA into to the start of the copy buffer plus any 3578509Smrj * initial page offset which may be present. 3579509Smrj */ 3580509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3581509Smrj (*windowp)->wd_dosync = B_TRUE; 3582509Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3583509Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 3584509Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3585509Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 3586509Smrj (*windowp)->wd_trim.tr_first_paddr = ptob64(hat_getpfnum( 3587509Smrj kas.a_hat, dma->dp_cbaddr)) + poff; 3588509Smrj #if !defined(__amd64) 3589509Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3590509Smrj #endif 3591509Smrj /* account for the cookie copybuf usage in the new window */ 3592509Smrj *copybuf_used += MMU_PAGESIZE; 3593509Smrj 3594509Smrj /* 3595509Smrj * every piece of code has to have a hack, and here is this 3596509Smrj * ones :-) 3597509Smrj * 3598509Smrj * There is a complex interaction between setup_cookie and the 3599509Smrj * copybuf window boundary. The complexity had to be in either 3600509Smrj * the maxxfer window, or the copybuf window, and I chose the 3601509Smrj * copybuf code. 3602509Smrj * 3603509Smrj * So in this code path, we have taken the last cookie, 3604509Smrj * virtually broken it in half due to the trim, and it happens 3605509Smrj * to use the copybuf which further complicates life. At the 3606509Smrj * same time, we have already setup the current cookie, which 3607509Smrj * is now wrong. More background info: the current cookie uses 3608509Smrj * the copybuf, so it is only a page long max. So we need to 3609509Smrj * fix the current cookies copy buffer address, physical 3610509Smrj * address, and kva for the 32-bit kernel. We due this by 3611509Smrj * bumping them by page size (of course, we can't due this on 3612509Smrj * the physical address since the copy buffer may not be 3613509Smrj * physically contiguous). 3614509Smrj */ 3615509Smrj cookie++; 3616509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 3617509Smrj poff = cookie->_dmu._dmac_ll & MMU_PAGEOFFSET; 3618509Smrj cookie->_dmu._dmac_ll = ptob64(hat_getpfnum(kas.a_hat, 3619509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 3620509Smrj #if !defined(__amd64) 3621509Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3622509Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3623509Smrj #endif 3624509Smrj } else { 3625509Smrj /* go back to the current cookie */ 3626509Smrj cookie++; 3627509Smrj } 3628509Smrj 3629509Smrj /* 3630509Smrj * add the current cookie to the new window. set the new window size to 3631509Smrj * the what was left over from the previous cookie and what's in the 3632509Smrj * current cookie. 3633509Smrj */ 3634509Smrj (*windowp)->wd_cookie_cnt++; 3635509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3636509Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 3637509Smrj 3638509Smrj /* 3639509Smrj * we know that the cookie passed in always uses the copy buffer. We 3640509Smrj * wouldn't be here if it didn't. 3641509Smrj */ 3642509Smrj *copybuf_used += MMU_PAGESIZE; 3643509Smrj 3644509Smrj return (DDI_SUCCESS); 3645509Smrj } 3646509Smrj 3647509Smrj 3648509Smrj /* 3649509Smrj * rootnex_maxxfer_window_boundary() 3650509Smrj * Called in bind slowpath when we get to a window boundary because we will 3651509Smrj * go over maxxfer. 3652509Smrj */ 3653509Smrj static int 3654509Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3655509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 3656509Smrj { 3657509Smrj size_t dmac_size; 3658509Smrj off_t new_offset; 3659509Smrj size_t trim_sz; 3660509Smrj off_t coffset; 3661509Smrj 3662509Smrj 3663509Smrj /* 3664509Smrj * calculate how much we have to trim off of the current cookie to equal 3665509Smrj * maxxfer. We don't have to account for granularity here since our 3666509Smrj * maxxfer already takes that into account. 3667509Smrj */ 3668509Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 3669509Smrj ASSERT(trim_sz <= cookie->dmac_size); 3670509Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 3671509Smrj 3672509Smrj /* save cookie size since we need it later and we might change it */ 3673509Smrj dmac_size = cookie->dmac_size; 3674509Smrj 3675509Smrj /* 3676509Smrj * if we're not trimming the entire cookie, setup the current window to 3677509Smrj * account for the trim. 3678509Smrj */ 3679509Smrj if (trim_sz < cookie->dmac_size) { 3680509Smrj (*windowp)->wd_cookie_cnt++; 3681509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3682509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3683509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3684509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3685509Smrj (*windowp)->wd_size = dma->dp_maxxfer; 3686509Smrj 3687509Smrj /* 3688509Smrj * set the adjusted cookie size now in case this is the first 3689509Smrj * window. All other windows are taken care of in get win 3690509Smrj */ 3691509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3692509Smrj } 3693509Smrj 3694509Smrj /* 3695509Smrj * coffset is the current offset within the cookie, new_offset is the 3696509Smrj * current offset with the entire buffer. 3697509Smrj */ 3698509Smrj coffset = dmac_size - trim_sz; 3699509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3700509Smrj 3701509Smrj /* initialize the next window */ 3702509Smrj (*windowp)++; 3703509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3704509Smrj (*windowp)->wd_cookie_cnt++; 3705509Smrj (*windowp)->wd_size = trim_sz; 3706509Smrj if (trim_sz < dmac_size) { 3707509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3708509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + 3709509Smrj coffset; 3710509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3711509Smrj } 3712509Smrj 3713509Smrj return (DDI_SUCCESS); 3714509Smrj } 3715509Smrj 3716509Smrj 3717509Smrj /* 3718509Smrj * rootnex_dma_sync() 3719509Smrj * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 3720509Smrj * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 3721509Smrj * is set, ddi_dma_sync() returns immediately passing back success. 3722509Smrj */ 3723509Smrj /*ARGSUSED*/ 3724509Smrj static int 3725509Smrj rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3726509Smrj off_t off, size_t len, uint_t cache_flags) 3727509Smrj { 3728509Smrj rootnex_sglinfo_t *sinfo; 3729509Smrj rootnex_pgmap_t *cbpage; 3730509Smrj rootnex_window_t *win; 3731509Smrj ddi_dma_impl_t *hp; 3732509Smrj rootnex_dma_t *dma; 3733509Smrj caddr_t fromaddr; 3734509Smrj caddr_t toaddr; 3735509Smrj uint_t psize; 3736509Smrj off_t offset; 3737509Smrj uint_t pidx; 3738509Smrj size_t size; 3739509Smrj off_t poff; 3740509Smrj int e; 3741509Smrj 3742509Smrj 3743509Smrj hp = (ddi_dma_impl_t *)handle; 3744509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3745509Smrj sinfo = &dma->dp_sglinfo; 3746509Smrj 3747509Smrj /* 3748509Smrj * if we don't have any windows, we don't need to sync. A copybuf 3749509Smrj * will cause us to have at least one window. 3750509Smrj */ 3751509Smrj if (dma->dp_window == NULL) { 3752509Smrj return (DDI_SUCCESS); 3753509Smrj } 3754509Smrj 3755509Smrj /* This window may not need to be sync'd */ 3756509Smrj win = &dma->dp_window[dma->dp_current_win]; 3757509Smrj if (!win->wd_dosync) { 3758509Smrj return (DDI_SUCCESS); 3759509Smrj } 3760509Smrj 3761509Smrj /* handle off and len special cases */ 3762509Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 3763509Smrj offset = win->wd_offset; 3764509Smrj } else { 3765509Smrj offset = off; 3766509Smrj } 3767509Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 3768509Smrj size = win->wd_size; 3769509Smrj } else { 3770509Smrj size = len; 3771509Smrj } 3772509Smrj 3773509Smrj /* check the sync args to make sure they make a little sense */ 3774509Smrj if (rootnex_sync_check_parms) { 3775509Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 3776509Smrj cache_flags); 3777509Smrj if (e != DDI_SUCCESS) { 3778509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 3779509Smrj return (DDI_FAILURE); 3780509Smrj } 3781509Smrj } 3782509Smrj 3783509Smrj /* 3784509Smrj * special case the first page to handle the offset into the page. The 3785509Smrj * offset to the current page for our buffer is the offset into the 3786509Smrj * first page of the buffer plus our current offset into the buffer 3787509Smrj * itself, masked of course. 3788509Smrj */ 3789509Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 3790509Smrj psize = MIN((MMU_PAGESIZE - poff), size); 3791509Smrj 3792509Smrj /* go through all the pages that we want to sync */ 3793509Smrj while (size > 0) { 3794509Smrj /* 3795509Smrj * Calculate the page index relative to the start of the buffer. 3796509Smrj * The index to the current page for our buffer is the offset 3797509Smrj * into the first page of the buffer plus our current offset 3798509Smrj * into the buffer itself, shifted of course... 3799509Smrj */ 3800509Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 3801509Smrj ASSERT(pidx < sinfo->si_max_pages); 3802509Smrj 3803509Smrj /* 3804509Smrj * if this page uses the copy buffer, we need to sync it, 3805509Smrj * otherwise, go on to the next page. 3806509Smrj */ 3807509Smrj cbpage = &dma->dp_pgmap[pidx]; 3808509Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 3809509Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 3810509Smrj if (cbpage->pm_uses_copybuf) { 3811509Smrj /* cbaddr and kaddr should be page aligned */ 3812509Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 3813509Smrj MMU_PAGEOFFSET) == 0); 3814509Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 3815509Smrj MMU_PAGEOFFSET) == 0); 3816509Smrj 3817509Smrj /* 3818509Smrj * if we're copying for the device, we are going to 3819509Smrj * copy from the drivers buffer and to the rootnex 3820509Smrj * allocated copy buffer. 3821509Smrj */ 3822509Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 3823509Smrj fromaddr = cbpage->pm_kaddr + poff; 3824509Smrj toaddr = cbpage->pm_cbaddr + poff; 3825509Smrj DTRACE_PROBE2(rootnex__sync__dev, 3826509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3827509Smrj 3828509Smrj /* 3829509Smrj * if we're copying for the cpu/kernel, we are going to 3830509Smrj * copy from the rootnex allocated copy buffer to the 3831509Smrj * drivers buffer. 3832509Smrj */ 3833509Smrj } else { 3834509Smrj fromaddr = cbpage->pm_cbaddr + poff; 3835509Smrj toaddr = cbpage->pm_kaddr + poff; 3836509Smrj DTRACE_PROBE2(rootnex__sync__cpu, 3837509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3838509Smrj } 3839509Smrj 3840509Smrj bcopy(fromaddr, toaddr, psize); 3841509Smrj } 3842509Smrj 3843509Smrj /* 3844509Smrj * decrement size until we're done, update our offset into the 3845509Smrj * buffer, and get the next page size. 3846509Smrj */ 3847509Smrj size -= psize; 3848509Smrj offset += psize; 3849509Smrj psize = MIN(MMU_PAGESIZE, size); 3850509Smrj 3851509Smrj /* page offset is zero for the rest of this loop */ 3852509Smrj poff = 0; 3853509Smrj } 3854509Smrj 3855509Smrj return (DDI_SUCCESS); 3856509Smrj } 3857509Smrj 3858509Smrj 3859509Smrj /* 3860509Smrj * rootnex_valid_sync_parms() 3861509Smrj * checks the parameters passed to sync to verify they are correct. 3862509Smrj */ 3863509Smrj static int 3864509Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 3865509Smrj off_t offset, size_t size, uint_t cache_flags) 3866509Smrj { 3867509Smrj off_t woffset; 3868509Smrj 3869509Smrj 3870509Smrj /* 3871509Smrj * the first part of the test to make sure the offset passed in is 3872509Smrj * within the window. 3873509Smrj */ 3874509Smrj if (offset < win->wd_offset) { 3875509Smrj return (DDI_FAILURE); 3876509Smrj } 3877509Smrj 3878509Smrj /* 3879509Smrj * second and last part of the test to make sure the offset and length 3880509Smrj * passed in is within the window. 3881509Smrj */ 3882509Smrj woffset = offset - win->wd_offset; 3883509Smrj if ((woffset + size) > win->wd_size) { 3884509Smrj return (DDI_FAILURE); 3885509Smrj } 3886509Smrj 3887509Smrj /* 3888509Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 3889509Smrj * be set too. 3890509Smrj */ 3891509Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 3892509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 3893509Smrj return (DDI_SUCCESS); 3894509Smrj } 3895509Smrj 3896509Smrj /* 3897509Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 3898509Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 3899509Smrj */ 3900509Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 3901509Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 3902509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 3903509Smrj return (DDI_SUCCESS); 3904509Smrj } 3905509Smrj 3906509Smrj return (DDI_FAILURE); 3907509Smrj } 3908509Smrj 3909509Smrj 3910509Smrj /* 3911509Smrj * rootnex_dma_win() 3912509Smrj * called from ddi_dma_getwin() 3913509Smrj */ 3914509Smrj /*ARGSUSED*/ 3915509Smrj static int 3916509Smrj rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3917509Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 3918509Smrj uint_t *ccountp) 3919509Smrj { 3920509Smrj rootnex_window_t *window; 3921509Smrj rootnex_trim_t *trim; 3922509Smrj ddi_dma_impl_t *hp; 3923509Smrj rootnex_dma_t *dma; 3924509Smrj #if !defined(__amd64) 3925509Smrj rootnex_sglinfo_t *sinfo; 3926509Smrj rootnex_pgmap_t *pmap; 3927509Smrj uint_t pidx; 3928509Smrj uint_t pcnt; 3929509Smrj off_t poff; 3930509Smrj int i; 3931509Smrj #endif 3932509Smrj 3933509Smrj 3934509Smrj hp = (ddi_dma_impl_t *)handle; 3935509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3936509Smrj #if !defined(__amd64) 3937509Smrj sinfo = &dma->dp_sglinfo; 3938509Smrj #endif 3939509Smrj 3940509Smrj /* If we try and get a window which doesn't exist, return failure */ 3941509Smrj if (win >= hp->dmai_nwin) { 3942509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3943509Smrj return (DDI_FAILURE); 3944509Smrj } 3945509Smrj 3946509Smrj /* 3947509Smrj * if we don't have any windows, and they're asking for the first 3948509Smrj * window, setup the cookie pointer to the first cookie in the bind. 3949509Smrj * setup our return values, then increment the cookie since we return 3950509Smrj * the first cookie on the stack. 3951509Smrj */ 3952509Smrj if (dma->dp_window == NULL) { 3953509Smrj if (win != 0) { 3954509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3955509Smrj return (DDI_FAILURE); 3956509Smrj } 3957509Smrj hp->dmai_cookie = dma->dp_cookies; 3958509Smrj *offp = 0; 3959509Smrj *lenp = dma->dp_dma.dmao_size; 3960509Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 3961509Smrj *cookiep = hp->dmai_cookie[0]; 3962509Smrj hp->dmai_cookie++; 3963509Smrj return (DDI_SUCCESS); 3964509Smrj } 3965509Smrj 3966509Smrj /* sync the old window before moving on to the new one */ 3967509Smrj window = &dma->dp_window[dma->dp_current_win]; 3968509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 3969509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 3970509Smrj DDI_DMA_SYNC_FORCPU); 3971509Smrj } 3972509Smrj 3973509Smrj #if !defined(__amd64) 3974509Smrj /* 3975509Smrj * before we move to the next window, if we need to re-map, unmap all 3976509Smrj * the pages in this window. 3977509Smrj */ 3978509Smrj if (dma->dp_cb_remaping) { 3979509Smrj /* 3980509Smrj * If we switch to this window again, we'll need to map in 3981509Smrj * on the fly next time. 3982509Smrj */ 3983509Smrj window->wd_remap_copybuf = B_TRUE; 3984509Smrj 3985509Smrj /* 3986509Smrj * calculate the page index into the buffer where this window 3987509Smrj * starts, and the number of pages this window takes up. 3988509Smrj */ 3989509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 3990509Smrj MMU_PAGESHIFT; 3991509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 3992509Smrj MMU_PAGEOFFSET; 3993509Smrj pcnt = mmu_btopr(window->wd_size + poff); 3994509Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 3995509Smrj 3996509Smrj /* unmap pages which are currently mapped in this window */ 3997509Smrj for (i = 0; i < pcnt; i++) { 3998509Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 3999509Smrj hat_unload(kas.a_hat, 4000509Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4001509Smrj HAT_UNLOAD); 4002509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4003509Smrj } 4004509Smrj pidx++; 4005509Smrj } 4006509Smrj } 4007509Smrj #endif 4008509Smrj 4009509Smrj /* 4010509Smrj * Move to the new window. 4011509Smrj * NOTE: current_win must be set for sync to work right 4012509Smrj */ 4013509Smrj dma->dp_current_win = win; 4014509Smrj window = &dma->dp_window[win]; 4015509Smrj 4016509Smrj /* if needed, adjust the first and/or last cookies for trim */ 4017509Smrj trim = &window->wd_trim; 4018509Smrj if (trim->tr_trim_first) { 4019509Smrj window->wd_first_cookie->_dmu._dmac_ll = trim->tr_first_paddr; 4020509Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 4021509Smrj #if !defined(__amd64) 4022509Smrj window->wd_first_cookie->dmac_type = 4023509Smrj (window->wd_first_cookie->dmac_type & 4024509Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 4025509Smrj #endif 4026509Smrj if (trim->tr_first_copybuf_win) { 4027509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4028509Smrj trim->tr_first_cbaddr; 4029509Smrj #if !defined(__amd64) 4030509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4031509Smrj trim->tr_first_kaddr; 4032509Smrj #endif 4033509Smrj } 4034509Smrj } 4035509Smrj if (trim->tr_trim_last) { 4036509Smrj trim->tr_last_cookie->_dmu._dmac_ll = trim->tr_last_paddr; 4037509Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4038509Smrj if (trim->tr_last_copybuf_win) { 4039509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4040509Smrj trim->tr_last_cbaddr; 4041509Smrj #if !defined(__amd64) 4042509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4043509Smrj trim->tr_last_kaddr; 4044509Smrj #endif 4045509Smrj } 4046509Smrj } 4047509Smrj 4048509Smrj /* 4049509Smrj * setup the cookie pointer to the first cookie in the window. setup 4050509Smrj * our return values, then increment the cookie since we return the 4051509Smrj * first cookie on the stack. 4052509Smrj */ 4053509Smrj hp->dmai_cookie = window->wd_first_cookie; 4054509Smrj *offp = window->wd_offset; 4055509Smrj *lenp = window->wd_size; 4056509Smrj *ccountp = window->wd_cookie_cnt; 4057509Smrj *cookiep = hp->dmai_cookie[0]; 4058509Smrj hp->dmai_cookie++; 4059509Smrj 4060509Smrj #if !defined(__amd64) 4061509Smrj /* re-map copybuf if required for this window */ 4062509Smrj if (dma->dp_cb_remaping) { 4063509Smrj /* 4064509Smrj * calculate the page index into the buffer where this 4065509Smrj * window starts. 4066509Smrj */ 4067509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4068509Smrj MMU_PAGESHIFT; 4069509Smrj ASSERT(pidx < sinfo->si_max_pages); 4070509Smrj 4071509Smrj /* 4072509Smrj * the first page can get unmapped if it's shared with the 4073509Smrj * previous window. Even if the rest of this window is already 4074509Smrj * mapped in, we need to still check this one. 4075509Smrj */ 4076509Smrj pmap = &dma->dp_pgmap[pidx]; 4077509Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4078509Smrj if (pmap->pm_pp != NULL) { 4079509Smrj pmap->pm_mapped = B_TRUE; 4080509Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4081509Smrj } else if (pmap->pm_vaddr != NULL) { 4082509Smrj pmap->pm_mapped = B_TRUE; 4083509Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4084509Smrj pmap->pm_kaddr); 4085509Smrj } 4086509Smrj } 4087509Smrj pidx++; 4088509Smrj 4089509Smrj /* map in the rest of the pages if required */ 4090509Smrj if (window->wd_remap_copybuf) { 4091509Smrj window->wd_remap_copybuf = B_FALSE; 4092509Smrj 4093509Smrj /* figure out many pages this window takes up */ 4094509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4095509Smrj MMU_PAGEOFFSET; 4096509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4097509Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4098509Smrj 4099509Smrj /* map pages which require it */ 4100509Smrj for (i = 1; i < pcnt; i++) { 4101509Smrj pmap = &dma->dp_pgmap[pidx]; 4102509Smrj if (pmap->pm_uses_copybuf) { 4103509Smrj ASSERT(pmap->pm_mapped == B_FALSE); 4104509Smrj if (pmap->pm_pp != NULL) { 4105509Smrj pmap->pm_mapped = B_TRUE; 4106509Smrj i86_pp_map(pmap->pm_pp, 4107509Smrj pmap->pm_kaddr); 4108509Smrj } else if (pmap->pm_vaddr != NULL) { 4109509Smrj pmap->pm_mapped = B_TRUE; 4110509Smrj i86_va_map(pmap->pm_vaddr, 4111509Smrj sinfo->si_asp, 4112509Smrj pmap->pm_kaddr); 4113509Smrj } 4114509Smrj } 4115509Smrj pidx++; 4116509Smrj } 4117509Smrj } 4118509Smrj } 4119509Smrj #endif 4120509Smrj 4121509Smrj /* if the new window uses the copy buffer, sync it for the device */ 4122509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4123509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4124509Smrj DDI_DMA_SYNC_FORDEV); 4125509Smrj } 4126509Smrj 4127509Smrj return (DDI_SUCCESS); 4128509Smrj } 4129509Smrj 4130509Smrj 4131509Smrj 4132509Smrj /* 4133509Smrj * ************************ 4134509Smrj * obsoleted dma routines 4135509Smrj * ************************ 4136509Smrj */ 4137509Smrj 4138509Smrj /* 4139509Smrj * rootnex_dma_map() 4140509Smrj * called from ddi_dma_setup() 4141509Smrj */ 4142509Smrj /* ARGSUSED */ 4143509Smrj static int 4144509Smrj rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, struct ddi_dma_req *dmareq, 4145509Smrj ddi_dma_handle_t *handlep) 4146509Smrj { 4147509Smrj #if defined(__amd64) 4148509Smrj /* 4149509Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 4150509Smrj * rootnex_dma_mctl() 4151509Smrj */ 4152509Smrj ASSERT(0); 4153509Smrj return (DDI_DMA_NORESOURCES); 4154509Smrj 4155509Smrj #else /* 32-bit x86 kernel */ 4156509Smrj ddi_dma_handle_t *lhandlep; 4157509Smrj ddi_dma_handle_t lhandle; 4158509Smrj ddi_dma_cookie_t cookie; 4159509Smrj ddi_dma_attr_t dma_attr; 4160509Smrj ddi_dma_lim_t *dma_lim; 4161509Smrj uint_t ccnt; 4162509Smrj int e; 4163509Smrj 4164509Smrj 4165509Smrj /* 4166509Smrj * if the driver is just testing to see if it's possible to do the bind, 4167509Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 4168509Smrj */ 4169509Smrj if (handlep == NULL) { 4170509Smrj lhandlep = &lhandle; 4171509Smrj } else { 4172509Smrj lhandlep = handlep; 4173509Smrj } 4174509Smrj 4175509Smrj /* convert the limit structure to a dma_attr one */ 4176509Smrj dma_lim = dmareq->dmar_limits; 4177509Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 4178509Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4179509Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4180509Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4181509Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4182509Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4183509Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4184509Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4185509Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4186509Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4187509Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 4188509Smrj dma_attr.dma_attr_flags = 0; 4189509Smrj 4190509Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4191509Smrj dmareq->dmar_arg, lhandlep); 4192509Smrj if (e != DDI_SUCCESS) { 4193509Smrj return (e); 4194509Smrj } 4195509Smrj 4196509Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4197509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4198509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4199509Smrj return (e); 4200509Smrj } 4201509Smrj 4202509Smrj /* 4203509Smrj * if the driver is just testing to see if it's possible to do the bind, 4204509Smrj * free up the local state and return the result. 4205509Smrj */ 4206509Smrj if (handlep == NULL) { 4207509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4208509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4209509Smrj if (e == DDI_DMA_MAPPED) { 4210509Smrj return (DDI_DMA_MAPOK); 42110Sstevel@tonic-gate } else { 4212509Smrj return (DDI_DMA_NOMAPPING); 4213509Smrj } 4214509Smrj } 4215509Smrj 4216509Smrj return (e); 4217509Smrj #endif /* defined(__amd64) */ 4218509Smrj } 4219509Smrj 4220509Smrj 4221509Smrj /* 4222509Smrj * rootnex_dma_mctl() 4223509Smrj * 4224509Smrj */ 4225509Smrj /* ARGSUSED */ 4226509Smrj static int 4227509Smrj rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4228509Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4229509Smrj uint_t cache_flags) 4230509Smrj { 4231509Smrj #if defined(__amd64) 4232509Smrj /* 4233509Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4234509Smrj * common implementation in genunix, so they no longer have x86 4235509Smrj * specific functionality which called into dma_ctl. 4236509Smrj * 4237509Smrj * The rest of the obsoleted interfaces were never supported in the 4238509Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4239509Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4240509Smrj * implementation issues. 4241509Smrj * 4242509Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4243509Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4244509Smrj * reflect that now too... 4245509Smrj * 4246509Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4247509Smrj * not going to put this functionality into the 64-bit x86 kernel now. 4248509Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 4249509Smrj * that in a future release. 4250509Smrj */ 4251509Smrj ASSERT(0); 4252509Smrj return (DDI_FAILURE); 4253509Smrj 4254509Smrj #else /* 32-bit x86 kernel */ 4255509Smrj ddi_dma_cookie_t lcookie; 4256509Smrj ddi_dma_cookie_t *cookie; 4257509Smrj rootnex_window_t *window; 4258509Smrj ddi_dma_impl_t *hp; 4259509Smrj rootnex_dma_t *dma; 4260509Smrj uint_t nwin; 4261509Smrj uint_t ccnt; 4262509Smrj size_t len; 4263509Smrj off_t off; 4264509Smrj int e; 4265509Smrj 4266509Smrj 4267509Smrj /* 4268509Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4269509Smrj * hacky since were optimizing for the current interfaces and so we can 4270509Smrj * cleanup the mess in genunix. Hopefully we will remove the this 4271509Smrj * obsoleted routines someday soon. 4272509Smrj */ 4273509Smrj 4274509Smrj switch (request) { 4275509Smrj 4276509Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4277509Smrj hp = (ddi_dma_impl_t *)handle; 4278509Smrj cookie = (ddi_dma_cookie_t *)objpp; 4279509Smrj 4280509Smrj /* 4281509Smrj * convert segment to cookie. We don't distinguish between the 4282509Smrj * two :-) 4283509Smrj */ 4284509Smrj *cookie = *hp->dmai_cookie; 4285509Smrj *lenp = cookie->dmac_size; 4286509Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4287509Smrj return (DDI_SUCCESS); 4288509Smrj 4289509Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4290509Smrj hp = (ddi_dma_impl_t *)handle; 4291509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4292509Smrj 4293509Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4294509Smrj return (DDI_DMA_STALE); 42950Sstevel@tonic-gate } 4296509Smrj 4297509Smrj /* handle the case where we don't have any windows */ 4298509Smrj if (dma->dp_window == NULL) { 4299509Smrj /* 4300509Smrj * if seg == NULL, and we don't have any windows, 4301509Smrj * return the first cookie in the sgl. 4302509Smrj */ 4303509Smrj if (*lenp == NULL) { 4304509Smrj dma->dp_current_cookie = 0; 4305509Smrj hp->dmai_cookie = dma->dp_cookies; 4306509Smrj *objpp = (caddr_t)handle; 4307509Smrj return (DDI_SUCCESS); 4308509Smrj 4309509Smrj /* if we have more cookies, go to the next cookie */ 4310509Smrj } else { 4311509Smrj if ((dma->dp_current_cookie + 1) >= 4312509Smrj dma->dp_sglinfo.si_sgl_size) { 4313509Smrj return (DDI_DMA_DONE); 4314509Smrj } 4315509Smrj dma->dp_current_cookie++; 4316509Smrj hp->dmai_cookie++; 4317509Smrj return (DDI_SUCCESS); 4318509Smrj } 4319509Smrj } 4320509Smrj 4321509Smrj /* We have one or more windows */ 4322509Smrj window = &dma->dp_window[dma->dp_current_win]; 4323509Smrj 4324509Smrj /* 4325509Smrj * if seg == NULL, return the first cookie in the current 4326509Smrj * window 4327509Smrj */ 4328509Smrj if (*lenp == NULL) { 4329509Smrj dma->dp_current_cookie = 0; 4330683Smrj hp->dmai_cookie = window->wd_first_cookie; 4331509Smrj 4332509Smrj /* 4333509Smrj * go to the next cookie in the window then see if we done with 4334509Smrj * this window. 4335509Smrj */ 4336509Smrj } else { 4337509Smrj if ((dma->dp_current_cookie + 1) >= 4338509Smrj window->wd_cookie_cnt) { 4339509Smrj return (DDI_DMA_DONE); 4340509Smrj } 4341509Smrj dma->dp_current_cookie++; 4342509Smrj hp->dmai_cookie++; 4343509Smrj } 4344509Smrj *objpp = (caddr_t)handle; 4345509Smrj return (DDI_SUCCESS); 4346509Smrj 4347509Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4348509Smrj hp = (ddi_dma_impl_t *)handle; 4349509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4350509Smrj 4351509Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4352509Smrj return (DDI_DMA_STALE); 4353509Smrj } 4354509Smrj 4355509Smrj /* if win == NULL, return the first window in the bind */ 4356509Smrj if (*offp == NULL) { 4357509Smrj nwin = 0; 4358509Smrj 4359509Smrj /* 4360509Smrj * else, go to the next window then see if we're done with all 4361509Smrj * the windows. 4362509Smrj */ 4363509Smrj } else { 4364509Smrj nwin = dma->dp_current_win + 1; 4365509Smrj if (nwin >= hp->dmai_nwin) { 4366509Smrj return (DDI_DMA_DONE); 4367509Smrj } 4368509Smrj } 4369509Smrj 4370509Smrj /* switch to the next window */ 4371509Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4372509Smrj &lcookie, &ccnt); 4373509Smrj ASSERT(e == DDI_SUCCESS); 4374509Smrj if (e != DDI_SUCCESS) { 4375509Smrj return (DDI_DMA_STALE); 4376509Smrj } 4377509Smrj 4378509Smrj /* reset the cookie back to the first cookie in the window */ 4379509Smrj if (dma->dp_window != NULL) { 4380509Smrj window = &dma->dp_window[dma->dp_current_win]; 4381509Smrj hp->dmai_cookie = window->wd_first_cookie; 4382509Smrj } else { 4383509Smrj hp->dmai_cookie = dma->dp_cookies; 4384509Smrj } 4385509Smrj 4386509Smrj *objpp = (caddr_t)handle; 4387509Smrj return (DDI_SUCCESS); 4388509Smrj 4389509Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 4390509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4391509Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 4392509Smrj if (rootnex_state->r_dvma_call_list_id) { 4393509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4394509Smrj } 4395509Smrj return (DDI_SUCCESS); 4396509Smrj 4397509Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4398509Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4399509Smrj /* should never get here, handled in genunix */ 4400509Smrj ASSERT(0); 4401509Smrj return (DDI_FAILURE); 4402509Smrj 4403509Smrj case DDI_DMA_KVADDR: 4404509Smrj case DDI_DMA_GETERR: 4405509Smrj case DDI_DMA_COFF: 4406509Smrj return (DDI_FAILURE); 44070Sstevel@tonic-gate } 4408509Smrj 4409509Smrj return (DDI_FAILURE); 4410509Smrj #endif /* defined(__amd64) */ 44110Sstevel@tonic-gate } 4412