1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
23 */
24
25 /*
26 * x86 root nexus driver
27 */
28
29 #include <sys/sysmacros.h>
30 #include <sys/conf.h>
31 #include <sys/autoconf.h>
32 #include <sys/sysmacros.h>
33 #include <sys/debug.h>
34 #include <sys/psw.h>
35 #include <sys/ddidmareq.h>
36 #include <sys/promif.h>
37 #include <sys/devops.h>
38 #include <sys/kmem.h>
39 #include <sys/cmn_err.h>
40 #include <vm/seg.h>
41 #include <vm/seg_kmem.h>
42 #include <vm/seg_dev.h>
43 #include <sys/vmem.h>
44 #include <sys/mman.h>
45 #include <vm/hat.h>
46 #include <vm/as.h>
47 #include <vm/page.h>
48 #include <sys/avintr.h>
49 #include <sys/errno.h>
50 #include <sys/modctl.h>
51 #include <sys/ddi_impldefs.h>
52 #include <sys/sunddi.h>
53 #include <sys/sunndi.h>
54 #include <sys/mach_intr.h>
55 #include <sys/psm.h>
56 #include <sys/ontrap.h>
57 #include <sys/atomic.h>
58 #include <sys/sdt.h>
59 #include <sys/rootnex.h>
60 #include <vm/hat_i86.h>
61 #include <sys/ddifm.h>
62 #include <sys/ddi_isa.h>
63 #include <sys/apic.h>
64
65 #ifdef __xpv
66 #include <sys/bootinfo.h>
67 #include <sys/hypervisor.h>
68 #include <sys/bootconf.h>
69 #include <vm/kboot_mmu.h>
70 #endif
71
72 #if defined(__amd64) && !defined(__xpv)
73 #include <sys/immu.h>
74 #endif
75
76
77 /*
78 * enable/disable extra checking of function parameters. Useful for debugging
79 * drivers.
80 */
81 #ifdef DEBUG
82 int rootnex_alloc_check_parms = 1;
83 int rootnex_bind_check_parms = 1;
84 int rootnex_bind_check_inuse = 1;
85 int rootnex_unbind_verify_buffer = 0;
86 int rootnex_sync_check_parms = 1;
87 #else
88 int rootnex_alloc_check_parms = 0;
89 int rootnex_bind_check_parms = 0;
90 int rootnex_bind_check_inuse = 0;
91 int rootnex_unbind_verify_buffer = 0;
92 int rootnex_sync_check_parms = 0;
93 #endif
94
95 boolean_t rootnex_dmar_not_setup;
96
97 /* Master Abort and Target Abort panic flag */
98 int rootnex_fm_ma_ta_panic_flag = 0;
99
100 /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */
101 int rootnex_bind_fail = 1;
102 int rootnex_bind_warn = 1;
103 uint8_t *rootnex_warn_list;
104 /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */
105 #define ROOTNEX_BIND_WARNING (0x1 << 0)
106
107 /*
108 * revert back to old broken behavior of always sync'ing entire copy buffer.
109 * This is useful if be have a buggy driver which doesn't correctly pass in
110 * the offset and size into ddi_dma_sync().
111 */
112 int rootnex_sync_ignore_params = 0;
113
114 /*
115 * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1
116 * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a
117 * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit
118 * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65
119 * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages
120 * (< 8K). We will still need to allocate the copy buffer during bind though
121 * (if we need one). These can only be modified in /etc/system before rootnex
122 * attach.
123 */
124 #if defined(__amd64)
125 int rootnex_prealloc_cookies = 65;
126 int rootnex_prealloc_windows = 4;
127 int rootnex_prealloc_copybuf = 2;
128 #else
129 int rootnex_prealloc_cookies = 33;
130 int rootnex_prealloc_windows = 4;
131 int rootnex_prealloc_copybuf = 2;
132 #endif
133
134 /* driver global state */
135 static rootnex_state_t *rootnex_state;
136
137 #ifdef DEBUG
138 /* shortcut to rootnex counters */
139 static uint64_t *rootnex_cnt;
140 #endif
141
142 /*
143 * XXX - does x86 even need these or are they left over from the SPARC days?
144 */
145 /* statically defined integer/boolean properties for the root node */
146 static rootnex_intprop_t rootnex_intprp[] = {
147 { "PAGESIZE", PAGESIZE },
148 { "MMU_PAGESIZE", MMU_PAGESIZE },
149 { "MMU_PAGEOFFSET", MMU_PAGEOFFSET },
150 { DDI_RELATIVE_ADDRESSING, 1 },
151 };
152 #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t))
153
154 /*
155 * If we're dom0, we're using a real device so we need to load
156 * the cookies with MFNs instead of PFNs.
157 */
158 #ifdef __xpv
159 typedef maddr_t rootnex_addr_t;
160 #define ROOTNEX_PADDR_TO_RBASE(pa) \
161 (DOMAIN_IS_INITDOMAIN(xen_info) ? pa_to_ma(pa) : (pa))
162 #else
163 typedef paddr_t rootnex_addr_t;
164 #define ROOTNEX_PADDR_TO_RBASE(pa) (pa)
165 #endif
166
167 #if !defined(__xpv)
168 char _depends_on[] = "misc/iommulib misc/acpica";
169 #endif
170
171 static struct cb_ops rootnex_cb_ops = {
172 nodev, /* open */
173 nodev, /* close */
174 nodev, /* strategy */
175 nodev, /* print */
176 nodev, /* dump */
177 nodev, /* read */
178 nodev, /* write */
179 nodev, /* ioctl */
180 nodev, /* devmap */
181 nodev, /* mmap */
182 nodev, /* segmap */
183 nochpoll, /* chpoll */
184 ddi_prop_op, /* cb_prop_op */
185 NULL, /* struct streamtab */
186 D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */
187 CB_REV, /* Rev */
188 nodev, /* cb_aread */
189 nodev /* cb_awrite */
190 };
191
192 static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp,
193 off_t offset, off_t len, caddr_t *vaddrp);
194 static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip,
195 struct hat *hat, struct seg *seg, caddr_t addr,
196 struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock);
197 static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
198 struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep);
199 static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip,
200 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
201 ddi_dma_handle_t *handlep);
202 static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip,
203 ddi_dma_handle_t handle);
204 static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
205 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
206 ddi_dma_cookie_t *cookiep, uint_t *ccountp);
207 static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
208 ddi_dma_handle_t handle);
209 static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip,
210 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
211 static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip,
212 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
213 ddi_dma_cookie_t *cookiep, uint_t *ccountp);
214 static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip,
215 ddi_dma_handle_t handle, enum ddi_dma_ctlops request,
216 off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags);
217 static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip,
218 ddi_ctl_enum_t ctlop, void *arg, void *result);
219 static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
220 ddi_iblock_cookie_t *ibc);
221 static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip,
222 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result);
223 static int rootnex_alloc_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *,
224 void *);
225 static int rootnex_free_intr_fixed(dev_info_t *, ddi_intr_handle_impl_t *);
226
227 static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
228 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
229 ddi_dma_handle_t *handlep);
230 static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
231 ddi_dma_handle_t handle);
232 static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
233 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
234 ddi_dma_cookie_t *cookiep, uint_t *ccountp);
235 static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
236 ddi_dma_handle_t handle);
237 #if defined(__amd64) && !defined(__xpv)
238 static void rootnex_coredma_reset_cookies(dev_info_t *dip,
239 ddi_dma_handle_t handle);
240 static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
241 ddi_dma_cookie_t **cookiepp, uint_t *ccountp);
242 static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
243 ddi_dma_cookie_t *cookiep, uint_t ccount);
244 static int rootnex_coredma_clear_cookies(dev_info_t *dip,
245 ddi_dma_handle_t handle);
246 static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle);
247 #endif
248 static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip,
249 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags);
250 static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip,
251 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp,
252 ddi_dma_cookie_t *cookiep, uint_t *ccountp);
253
254 #if defined(__amd64) && !defined(__xpv)
255 static int rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip,
256 ddi_dma_handle_t handle, void *v);
257 static void *rootnex_coredma_hdl_getprivate(dev_info_t *dip, dev_info_t *rdip,
258 ddi_dma_handle_t handle);
259 #endif
260
261
262 static struct bus_ops rootnex_bus_ops = {
263 BUSO_REV,
264 rootnex_map,
265 NULL,
266 NULL,
267 NULL,
268 rootnex_map_fault,
269 rootnex_dma_map,
270 rootnex_dma_allochdl,
271 rootnex_dma_freehdl,
272 rootnex_dma_bindhdl,
273 rootnex_dma_unbindhdl,
274 rootnex_dma_sync,
275 rootnex_dma_win,
276 rootnex_dma_mctl,
277 rootnex_ctlops,
278 ddi_bus_prop_op,
279 i_ddi_rootnex_get_eventcookie,
280 i_ddi_rootnex_add_eventcall,
281 i_ddi_rootnex_remove_eventcall,
282 i_ddi_rootnex_post_event,
283 0, /* bus_intr_ctl */
284 0, /* bus_config */
285 0, /* bus_unconfig */
286 rootnex_fm_init, /* bus_fm_init */
287 NULL, /* bus_fm_fini */
288 NULL, /* bus_fm_access_enter */
289 NULL, /* bus_fm_access_exit */
290 NULL, /* bus_powr */
291 rootnex_intr_ops /* bus_intr_op */
292 };
293
294 static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
295 static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
296 static int rootnex_quiesce(dev_info_t *dip);
297
298 static struct dev_ops rootnex_ops = {
299 DEVO_REV,
300 0,
301 ddi_no_info,
302 nulldev,
303 nulldev,
304 rootnex_attach,
305 rootnex_detach,
306 nulldev,
307 &rootnex_cb_ops,
308 &rootnex_bus_ops,
309 NULL,
310 rootnex_quiesce, /* quiesce */
311 };
312
313 static struct modldrv rootnex_modldrv = {
314 &mod_driverops,
315 "i86pc root nexus",
316 &rootnex_ops
317 };
318
319 static struct modlinkage rootnex_modlinkage = {
320 MODREV_1,
321 (void *)&rootnex_modldrv,
322 NULL
323 };
324
325 #if defined(__amd64) && !defined(__xpv)
326 static iommulib_nexops_t iommulib_nexops = {
327 IOMMU_NEXOPS_VERSION,
328 "Rootnex IOMMU ops Vers 1.1",
329 NULL,
330 rootnex_coredma_allochdl,
331 rootnex_coredma_freehdl,
332 rootnex_coredma_bindhdl,
333 rootnex_coredma_unbindhdl,
334 rootnex_coredma_reset_cookies,
335 rootnex_coredma_get_cookies,
336 rootnex_coredma_set_cookies,
337 rootnex_coredma_clear_cookies,
338 rootnex_coredma_get_sleep_flags,
339 rootnex_coredma_sync,
340 rootnex_coredma_win,
341 rootnex_dma_map,
342 rootnex_dma_mctl,
343 rootnex_coredma_hdl_setprivate,
344 rootnex_coredma_hdl_getprivate
345 };
346 #endif
347
348 /*
349 * extern hacks
350 */
351 extern struct seg_ops segdev_ops;
352 extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */
353 #ifdef DDI_MAP_DEBUG
354 extern int ddi_map_debug_flag;
355 #define ddi_map_debug if (ddi_map_debug_flag) prom_printf
356 #endif
357 extern void i86_pp_map(page_t *pp, caddr_t kaddr);
358 extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr);
359 extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *,
360 psm_intr_op_t, int *);
361 extern int impl_ddi_sunbus_initchild(dev_info_t *dip);
362 extern void impl_ddi_sunbus_removechild(dev_info_t *dip);
363
364 /*
365 * Use device arena to use for device control register mappings.
366 * Various kernel memory walkers (debugger, dtrace) need to know
367 * to avoid this address range to prevent undesired device activity.
368 */
369 extern void *device_arena_alloc(size_t size, int vm_flag);
370 extern void device_arena_free(void * vaddr, size_t size);
371
372
373 /*
374 * Internal functions
375 */
376 static int rootnex_dma_init();
377 static void rootnex_add_props(dev_info_t *);
378 static int rootnex_ctl_reportdev(dev_info_t *dip);
379 static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum);
380 static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
381 static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp);
382 static int rootnex_map_handle(ddi_map_req_t *mp);
383 static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp);
384 static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize);
385 static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq,
386 ddi_dma_attr_t *attr);
387 static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
388 rootnex_sglinfo_t *sglinfo);
389 static void rootnex_dvma_get_sgl(ddi_dma_obj_t *dmar_object,
390 ddi_dma_cookie_t *sgl, rootnex_sglinfo_t *sglinfo);
391 static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
392 rootnex_dma_t *dma, ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag);
393 static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
394 rootnex_dma_t *dma, ddi_dma_attr_t *attr);
395 static void rootnex_teardown_copybuf(rootnex_dma_t *dma);
396 static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
397 ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag);
398 static void rootnex_teardown_windows(rootnex_dma_t *dma);
399 static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
400 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset);
401 static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object,
402 rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset,
403 size_t *copybuf_used, page_t **cur_pp);
404 static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp,
405 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie,
406 ddi_dma_attr_t *attr, off_t cur_offset);
407 static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp,
408 rootnex_dma_t *dma, rootnex_window_t **windowp,
409 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used);
410 static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp,
411 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie);
412 static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
413 off_t offset, size_t size, uint_t cache_flags);
414 static int rootnex_verify_buffer(rootnex_dma_t *dma);
415 static int rootnex_dma_check(dev_info_t *dip, const void *handle,
416 const void *comp_addr, const void *not_used);
417 static boolean_t rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object,
418 rootnex_sglinfo_t *sglinfo);
419 static struct as *rootnex_get_as(ddi_dma_obj_t *dmar_object);
420
421 /*
422 * _init()
423 *
424 */
425 int
_init(void)426 _init(void)
427 {
428
429 rootnex_state = NULL;
430 return (mod_install(&rootnex_modlinkage));
431 }
432
433
434 /*
435 * _info()
436 *
437 */
438 int
_info(struct modinfo * modinfop)439 _info(struct modinfo *modinfop)
440 {
441 return (mod_info(&rootnex_modlinkage, modinfop));
442 }
443
444
445 /*
446 * _fini()
447 *
448 */
449 int
_fini(void)450 _fini(void)
451 {
452 return (EBUSY);
453 }
454
455
456 /*
457 * rootnex_attach()
458 *
459 */
460 static int
rootnex_attach(dev_info_t * dip,ddi_attach_cmd_t cmd)461 rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
462 {
463 int fmcap;
464 int e;
465
466 switch (cmd) {
467 case DDI_ATTACH:
468 break;
469 case DDI_RESUME:
470 #if defined(__amd64) && !defined(__xpv)
471 return (immu_unquiesce());
472 #else
473 return (DDI_SUCCESS);
474 #endif
475 default:
476 return (DDI_FAILURE);
477 }
478
479 /*
480 * We should only have one instance of rootnex. Save it away since we
481 * don't have an easy way to get it back later.
482 */
483 ASSERT(rootnex_state == NULL);
484 rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP);
485
486 rootnex_state->r_dip = dip;
487 rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15);
488 rootnex_state->r_reserved_msg_printed = B_FALSE;
489 #ifdef DEBUG
490 rootnex_cnt = &rootnex_state->r_counters[0];
491 #endif
492
493 /*
494 * Set minimum fm capability level for i86pc platforms and then
495 * initialize error handling. Since we're the rootnex, we don't
496 * care what's returned in the fmcap field.
497 */
498 ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE |
499 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE;
500 fmcap = ddi_system_fmcap;
501 ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc);
502
503 /* initialize DMA related state */
504 e = rootnex_dma_init();
505 if (e != DDI_SUCCESS) {
506 kmem_free(rootnex_state, sizeof (rootnex_state_t));
507 return (DDI_FAILURE);
508 }
509
510 /* Add static root node properties */
511 rootnex_add_props(dip);
512
513 /* since we can't call ddi_report_dev() */
514 cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip));
515
516 /* Initialize rootnex event handle */
517 i_ddi_rootnex_init_events(dip);
518
519 #if defined(__amd64) && !defined(__xpv)
520 e = iommulib_nexus_register(dip, &iommulib_nexops,
521 &rootnex_state->r_iommulib_handle);
522
523 ASSERT(e == DDI_SUCCESS);
524 #endif
525
526 return (DDI_SUCCESS);
527 }
528
529
530 /*
531 * rootnex_detach()
532 *
533 */
534 /*ARGSUSED*/
535 static int
rootnex_detach(dev_info_t * dip,ddi_detach_cmd_t cmd)536 rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
537 {
538 switch (cmd) {
539 case DDI_SUSPEND:
540 #if defined(__amd64) && !defined(__xpv)
541 return (immu_quiesce());
542 #else
543 return (DDI_SUCCESS);
544 #endif
545 default:
546 return (DDI_FAILURE);
547 }
548 /*NOTREACHED*/
549
550 }
551
552
553 /*
554 * rootnex_dma_init()
555 *
556 */
557 /*ARGSUSED*/
558 static int
rootnex_dma_init()559 rootnex_dma_init()
560 {
561 size_t bufsize;
562
563
564 /*
565 * size of our cookie/window/copybuf state needed in dma bind that we
566 * pre-alloc in dma_alloc_handle
567 */
568 rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies;
569 rootnex_state->r_prealloc_size =
570 (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) +
571 (rootnex_prealloc_windows * sizeof (rootnex_window_t)) +
572 (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t));
573
574 /*
575 * setup DDI DMA handle kmem cache, align each handle on 64 bytes,
576 * allocate 16 extra bytes for struct pointer alignment
577 * (p->dmai_private & dma->dp_prealloc_buffer)
578 */
579 bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) +
580 rootnex_state->r_prealloc_size + 0x10;
581 rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl",
582 bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0);
583 if (rootnex_state->r_dmahdl_cache == NULL) {
584 return (DDI_FAILURE);
585 }
586
587 /*
588 * allocate array to track which major numbers we have printed warnings
589 * for.
590 */
591 rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list),
592 KM_SLEEP);
593
594 return (DDI_SUCCESS);
595 }
596
597
598 /*
599 * rootnex_add_props()
600 *
601 */
602 static void
rootnex_add_props(dev_info_t * dip)603 rootnex_add_props(dev_info_t *dip)
604 {
605 rootnex_intprop_t *rpp;
606 int i;
607
608 /* Add static integer/boolean properties to the root node */
609 rpp = rootnex_intprp;
610 for (i = 0; i < NROOT_INTPROPS; i++) {
611 (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip,
612 rpp[i].prop_name, rpp[i].prop_value);
613 }
614 }
615
616
617
618 /*
619 * *************************
620 * ctlops related routines
621 * *************************
622 */
623
624 /*
625 * rootnex_ctlops()
626 *
627 */
628 /*ARGSUSED*/
629 static int
rootnex_ctlops(dev_info_t * dip,dev_info_t * rdip,ddi_ctl_enum_t ctlop,void * arg,void * result)630 rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop,
631 void *arg, void *result)
632 {
633 int n, *ptr;
634 struct ddi_parent_private_data *pdp;
635
636 switch (ctlop) {
637 case DDI_CTLOPS_DMAPMAPC:
638 /*
639 * Return 'partial' to indicate that dma mapping
640 * has to be done in the main MMU.
641 */
642 return (DDI_DMA_PARTIAL);
643
644 case DDI_CTLOPS_BTOP:
645 /*
646 * Convert byte count input to physical page units.
647 * (byte counts that are not a page-size multiple
648 * are rounded down)
649 */
650 *(ulong_t *)result = btop(*(ulong_t *)arg);
651 return (DDI_SUCCESS);
652
653 case DDI_CTLOPS_PTOB:
654 /*
655 * Convert size in physical pages to bytes
656 */
657 *(ulong_t *)result = ptob(*(ulong_t *)arg);
658 return (DDI_SUCCESS);
659
660 case DDI_CTLOPS_BTOPR:
661 /*
662 * Convert byte count input to physical page units
663 * (byte counts that are not a page-size multiple
664 * are rounded up)
665 */
666 *(ulong_t *)result = btopr(*(ulong_t *)arg);
667 return (DDI_SUCCESS);
668
669 case DDI_CTLOPS_INITCHILD:
670 return (impl_ddi_sunbus_initchild(arg));
671
672 case DDI_CTLOPS_UNINITCHILD:
673 impl_ddi_sunbus_removechild(arg);
674 return (DDI_SUCCESS);
675
676 case DDI_CTLOPS_REPORTDEV:
677 return (rootnex_ctl_reportdev(rdip));
678
679 case DDI_CTLOPS_IOMIN:
680 /*
681 * Nothing to do here but reflect back..
682 */
683 return (DDI_SUCCESS);
684
685 case DDI_CTLOPS_REGSIZE:
686 case DDI_CTLOPS_NREGS:
687 break;
688
689 case DDI_CTLOPS_SIDDEV:
690 if (ndi_dev_is_prom_node(rdip))
691 return (DDI_SUCCESS);
692 if (ndi_dev_is_persistent_node(rdip))
693 return (DDI_SUCCESS);
694 return (DDI_FAILURE);
695
696 case DDI_CTLOPS_POWER:
697 return ((*pm_platform_power)((power_req_t *)arg));
698
699 case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */
700 case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */
701 case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */
702 case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */
703 case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */
704 case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */
705 if (!rootnex_state->r_reserved_msg_printed) {
706 rootnex_state->r_reserved_msg_printed = B_TRUE;
707 cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for "
708 "1 or more reserved/obsolete operations.");
709 }
710 return (DDI_FAILURE);
711
712 default:
713 return (DDI_FAILURE);
714 }
715 /*
716 * The rest are for "hardware" properties
717 */
718 if ((pdp = ddi_get_parent_data(rdip)) == NULL)
719 return (DDI_FAILURE);
720
721 if (ctlop == DDI_CTLOPS_NREGS) {
722 ptr = (int *)result;
723 *ptr = pdp->par_nreg;
724 } else {
725 off_t *size = (off_t *)result;
726
727 ptr = (int *)arg;
728 n = *ptr;
729 if (n >= pdp->par_nreg) {
730 return (DDI_FAILURE);
731 }
732 *size = (off_t)pdp->par_reg[n].regspec_size;
733 }
734 return (DDI_SUCCESS);
735 }
736
737
738 /*
739 * rootnex_ctl_reportdev()
740 *
741 */
742 static int
rootnex_ctl_reportdev(dev_info_t * dev)743 rootnex_ctl_reportdev(dev_info_t *dev)
744 {
745 int i, n, len, f_len = 0;
746 char *buf;
747
748 buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP);
749 f_len += snprintf(buf, REPORTDEV_BUFSIZE,
750 "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev));
751 len = strlen(buf);
752
753 for (i = 0; i < sparc_pd_getnreg(dev); i++) {
754
755 struct regspec *rp = sparc_pd_getreg(dev, i);
756
757 if (i == 0)
758 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
759 ": ");
760 else
761 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
762 " and ");
763 len = strlen(buf);
764
765 switch (rp->regspec_bustype) {
766
767 case BTEISA:
768 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
769 "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr);
770 break;
771
772 case BTISA:
773 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
774 "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr);
775 break;
776
777 default:
778 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
779 "space %x offset %x",
780 rp->regspec_bustype, rp->regspec_addr);
781 break;
782 }
783 len = strlen(buf);
784 }
785 for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) {
786 int pri;
787
788 if (i != 0) {
789 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
790 ",");
791 len = strlen(buf);
792 }
793 pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri);
794 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len,
795 " sparc ipl %d", pri);
796 len = strlen(buf);
797 }
798 #ifdef DEBUG
799 if (f_len + 1 >= REPORTDEV_BUFSIZE) {
800 cmn_err(CE_NOTE, "next message is truncated: "
801 "printed length 1024, real length %d", f_len);
802 }
803 #endif /* DEBUG */
804 cmn_err(CE_CONT, "?%s\n", buf);
805 kmem_free(buf, REPORTDEV_BUFSIZE);
806 return (DDI_SUCCESS);
807 }
808
809
810 /*
811 * ******************
812 * map related code
813 * ******************
814 */
815
816 /*
817 * rootnex_map()
818 *
819 */
820 static int
rootnex_map(dev_info_t * dip,dev_info_t * rdip,ddi_map_req_t * mp,off_t offset,off_t len,caddr_t * vaddrp)821 rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset,
822 off_t len, caddr_t *vaddrp)
823 {
824 struct regspec *rp, tmp_reg;
825 ddi_map_req_t mr = *mp; /* Get private copy of request */
826 int error;
827
828 mp = &mr;
829
830 switch (mp->map_op) {
831 case DDI_MO_MAP_LOCKED:
832 case DDI_MO_UNMAP:
833 case DDI_MO_MAP_HANDLE:
834 break;
835 default:
836 #ifdef DDI_MAP_DEBUG
837 cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.",
838 mp->map_op);
839 #endif /* DDI_MAP_DEBUG */
840 return (DDI_ME_UNIMPLEMENTED);
841 }
842
843 if (mp->map_flags & DDI_MF_USER_MAPPING) {
844 #ifdef DDI_MAP_DEBUG
845 cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user.");
846 #endif /* DDI_MAP_DEBUG */
847 return (DDI_ME_UNIMPLEMENTED);
848 }
849
850 /*
851 * First, if given an rnumber, convert it to a regspec...
852 * (Presumably, this is on behalf of a child of the root node?)
853 */
854
855 if (mp->map_type == DDI_MT_RNUMBER) {
856
857 int rnumber = mp->map_obj.rnumber;
858 #ifdef DDI_MAP_DEBUG
859 static char *out_of_range =
860 "rootnex_map: Out of range rnumber <%d>, device <%s>";
861 #endif /* DDI_MAP_DEBUG */
862
863 rp = i_ddi_rnumber_to_regspec(rdip, rnumber);
864 if (rp == NULL) {
865 #ifdef DDI_MAP_DEBUG
866 cmn_err(CE_WARN, out_of_range, rnumber,
867 ddi_get_name(rdip));
868 #endif /* DDI_MAP_DEBUG */
869 return (DDI_ME_RNUMBER_RANGE);
870 }
871
872 /*
873 * Convert the given ddi_map_req_t from rnumber to regspec...
874 */
875
876 mp->map_type = DDI_MT_REGSPEC;
877 mp->map_obj.rp = rp;
878 }
879
880 /*
881 * Adjust offset and length correspnding to called values...
882 * XXX: A non-zero length means override the one in the regspec
883 * XXX: (regardless of what's in the parent's range?)
884 */
885
886 tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */
887 rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */
888
889 #ifdef DDI_MAP_DEBUG
890 cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d "
891 "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
892 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset,
893 len, mp->map_handlep);
894 #endif /* DDI_MAP_DEBUG */
895
896 /*
897 * I/O or memory mapping:
898 *
899 * <bustype=0, addr=x, len=x>: memory
900 * <bustype=1, addr=x, len=x>: i/o
901 * <bustype>1, addr=0, len=x>: x86-compatibility i/o
902 */
903
904 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
905 cmn_err(CE_WARN, "<%s,%s> invalid register spec"
906 " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip),
907 ddi_get_name(rdip), rp->regspec_bustype,
908 rp->regspec_addr, rp->regspec_size);
909 return (DDI_ME_INVAL);
910 }
911
912 if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) {
913 /*
914 * compatibility i/o mapping
915 */
916 rp->regspec_bustype += (uint_t)offset;
917 } else {
918 /*
919 * Normal memory or i/o mapping
920 */
921 rp->regspec_addr += (uint_t)offset;
922 }
923
924 if (len != 0)
925 rp->regspec_size = (uint_t)len;
926
927 #ifdef DDI_MAP_DEBUG
928 cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d "
929 "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip),
930 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size,
931 offset, len, mp->map_handlep);
932 #endif /* DDI_MAP_DEBUG */
933
934 /*
935 * Apply any parent ranges at this level, if applicable.
936 * (This is where nexus specific regspec translation takes place.
937 * Use of this function is implicit agreement that translation is
938 * provided via ddi_apply_range.)
939 */
940
941 #ifdef DDI_MAP_DEBUG
942 ddi_map_debug("applying range of parent <%s> to child <%s>...\n",
943 ddi_get_name(dip), ddi_get_name(rdip));
944 #endif /* DDI_MAP_DEBUG */
945
946 if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0)
947 return (error);
948
949 switch (mp->map_op) {
950 case DDI_MO_MAP_LOCKED:
951
952 /*
953 * Set up the locked down kernel mapping to the regspec...
954 */
955
956 return (rootnex_map_regspec(mp, vaddrp));
957
958 case DDI_MO_UNMAP:
959
960 /*
961 * Release mapping...
962 */
963
964 return (rootnex_unmap_regspec(mp, vaddrp));
965
966 case DDI_MO_MAP_HANDLE:
967
968 return (rootnex_map_handle(mp));
969
970 default:
971 return (DDI_ME_UNIMPLEMENTED);
972 }
973 }
974
975
976 /*
977 * rootnex_map_fault()
978 *
979 * fault in mappings for requestors
980 */
981 /*ARGSUSED*/
982 static int
rootnex_map_fault(dev_info_t * dip,dev_info_t * rdip,struct hat * hat,struct seg * seg,caddr_t addr,struct devpage * dp,pfn_t pfn,uint_t prot,uint_t lock)983 rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat,
984 struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot,
985 uint_t lock)
986 {
987
988 #ifdef DDI_MAP_DEBUG
989 ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn);
990 ddi_map_debug(" Seg <%s>\n",
991 seg->s_ops == &segdev_ops ? "segdev" :
992 seg == &kvseg ? "segkmem" : "NONE!");
993 #endif /* DDI_MAP_DEBUG */
994
995 /*
996 * This is all terribly broken, but it is a start
997 *
998 * XXX Note that this test means that segdev_ops
999 * must be exported from seg_dev.c.
1000 * XXX What about devices with their own segment drivers?
1001 */
1002 if (seg->s_ops == &segdev_ops) {
1003 struct segdev_data *sdp = (struct segdev_data *)seg->s_data;
1004
1005 if (hat == NULL) {
1006 /*
1007 * This is one plausible interpretation of
1008 * a null hat i.e. use the first hat on the
1009 * address space hat list which by convention is
1010 * the hat of the system MMU. At alternative
1011 * would be to panic .. this might well be better ..
1012 */
1013 ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock));
1014 hat = seg->s_as->a_hat;
1015 cmn_err(CE_NOTE, "rootnex_map_fault: nil hat");
1016 }
1017 hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr,
1018 (lock ? HAT_LOAD_LOCK : HAT_LOAD));
1019 } else if (seg == &kvseg && dp == NULL) {
1020 hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot,
1021 HAT_LOAD_LOCK);
1022 } else
1023 return (DDI_FAILURE);
1024 return (DDI_SUCCESS);
1025 }
1026
1027
1028 /*
1029 * rootnex_map_regspec()
1030 * we don't support mapping of I/O cards above 4Gb
1031 */
1032 static int
rootnex_map_regspec(ddi_map_req_t * mp,caddr_t * vaddrp)1033 rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
1034 {
1035 rootnex_addr_t rbase;
1036 void *cvaddr;
1037 uint_t npages, pgoffset;
1038 struct regspec *rp;
1039 ddi_acc_hdl_t *hp;
1040 ddi_acc_impl_t *ap;
1041 uint_t hat_acc_flags;
1042 paddr_t pbase;
1043
1044 rp = mp->map_obj.rp;
1045 hp = mp->map_handlep;
1046
1047 #ifdef DDI_MAP_DEBUG
1048 ddi_map_debug(
1049 "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n",
1050 rp->regspec_bustype, rp->regspec_addr,
1051 rp->regspec_size, mp->map_handlep);
1052 #endif /* DDI_MAP_DEBUG */
1053
1054 /*
1055 * I/O or memory mapping
1056 *
1057 * <bustype=0, addr=x, len=x>: memory
1058 * <bustype=1, addr=x, len=x>: i/o
1059 * <bustype>1, addr=0, len=x>: x86-compatibility i/o
1060 */
1061
1062 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
1063 cmn_err(CE_WARN, "rootnex: invalid register spec"
1064 " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype,
1065 rp->regspec_addr, rp->regspec_size);
1066 return (DDI_FAILURE);
1067 }
1068
1069 if (rp->regspec_bustype != 0) {
1070 /*
1071 * I/O space - needs a handle.
1072 */
1073 if (hp == NULL) {
1074 return (DDI_FAILURE);
1075 }
1076 ap = (ddi_acc_impl_t *)hp->ah_platform_private;
1077 ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE;
1078 impl_acc_hdl_init(hp);
1079
1080 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
1081 #ifdef DDI_MAP_DEBUG
1082 ddi_map_debug("rootnex_map_regspec: mmap() "
1083 "to I/O space is not supported.\n");
1084 #endif /* DDI_MAP_DEBUG */
1085 return (DDI_ME_INVAL);
1086 } else {
1087 /*
1088 * 1275-compliant vs. compatibility i/o mapping
1089 */
1090 *vaddrp =
1091 (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ?
1092 ((caddr_t)(uintptr_t)rp->regspec_bustype) :
1093 ((caddr_t)(uintptr_t)rp->regspec_addr);
1094 #ifdef __xpv
1095 if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1096 hp->ah_pfn = xen_assign_pfn(
1097 mmu_btop((ulong_t)rp->regspec_addr &
1098 MMU_PAGEMASK));
1099 } else {
1100 hp->ah_pfn = mmu_btop(
1101 (ulong_t)rp->regspec_addr & MMU_PAGEMASK);
1102 }
1103 #else
1104 hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr &
1105 MMU_PAGEMASK);
1106 #endif
1107 hp->ah_pnum = mmu_btopr(rp->regspec_size +
1108 (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET);
1109 }
1110
1111 #ifdef DDI_MAP_DEBUG
1112 ddi_map_debug(
1113 "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n",
1114 rp->regspec_size, *vaddrp);
1115 #endif /* DDI_MAP_DEBUG */
1116 return (DDI_SUCCESS);
1117 }
1118
1119 /*
1120 * Memory space
1121 */
1122
1123 if (hp != NULL) {
1124 /*
1125 * hat layer ignores
1126 * hp->ah_acc.devacc_attr_endian_flags.
1127 */
1128 switch (hp->ah_acc.devacc_attr_dataorder) {
1129 case DDI_STRICTORDER_ACC:
1130 hat_acc_flags = HAT_STRICTORDER;
1131 break;
1132 case DDI_UNORDERED_OK_ACC:
1133 hat_acc_flags = HAT_UNORDERED_OK;
1134 break;
1135 case DDI_MERGING_OK_ACC:
1136 hat_acc_flags = HAT_MERGING_OK;
1137 break;
1138 case DDI_LOADCACHING_OK_ACC:
1139 hat_acc_flags = HAT_LOADCACHING_OK;
1140 break;
1141 case DDI_STORECACHING_OK_ACC:
1142 hat_acc_flags = HAT_STORECACHING_OK;
1143 break;
1144 }
1145 ap = (ddi_acc_impl_t *)hp->ah_platform_private;
1146 ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR;
1147 impl_acc_hdl_init(hp);
1148 hp->ah_hat_flags = hat_acc_flags;
1149 } else {
1150 hat_acc_flags = HAT_STRICTORDER;
1151 }
1152
1153 rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK);
1154 #ifdef __xpv
1155 /*
1156 * If we're dom0, we're using a real device so we need to translate
1157 * the MA to a PA.
1158 */
1159 if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1160 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase)));
1161 } else {
1162 pbase = rbase;
1163 }
1164 #else
1165 pbase = rbase;
1166 #endif
1167 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
1168
1169 if (rp->regspec_size == 0) {
1170 #ifdef DDI_MAP_DEBUG
1171 ddi_map_debug("rootnex_map_regspec: zero regspec_size\n");
1172 #endif /* DDI_MAP_DEBUG */
1173 return (DDI_ME_INVAL);
1174 }
1175
1176 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) {
1177 /* extra cast to make gcc happy */
1178 *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase));
1179 } else {
1180 npages = mmu_btopr(rp->regspec_size + pgoffset);
1181
1182 #ifdef DDI_MAP_DEBUG
1183 ddi_map_debug("rootnex_map_regspec: Mapping %d pages "
1184 "physical %llx", npages, pbase);
1185 #endif /* DDI_MAP_DEBUG */
1186
1187 cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP);
1188 if (cvaddr == NULL)
1189 return (DDI_ME_NORESOURCES);
1190
1191 /*
1192 * Now map in the pages we've allocated...
1193 */
1194 hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages),
1195 mmu_btop(pbase), mp->map_prot | hat_acc_flags,
1196 HAT_LOAD_LOCK);
1197 *vaddrp = (caddr_t)cvaddr + pgoffset;
1198
1199 /* save away pfn and npages for FMA */
1200 hp = mp->map_handlep;
1201 if (hp) {
1202 hp->ah_pfn = mmu_btop(pbase);
1203 hp->ah_pnum = npages;
1204 }
1205 }
1206
1207 #ifdef DDI_MAP_DEBUG
1208 ddi_map_debug("at virtual 0x%x\n", *vaddrp);
1209 #endif /* DDI_MAP_DEBUG */
1210 return (DDI_SUCCESS);
1211 }
1212
1213
1214 /*
1215 * rootnex_unmap_regspec()
1216 *
1217 */
1218 static int
rootnex_unmap_regspec(ddi_map_req_t * mp,caddr_t * vaddrp)1219 rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp)
1220 {
1221 caddr_t addr = (caddr_t)*vaddrp;
1222 uint_t npages, pgoffset;
1223 struct regspec *rp;
1224
1225 if (mp->map_flags & DDI_MF_DEVICE_MAPPING)
1226 return (0);
1227
1228 rp = mp->map_obj.rp;
1229
1230 if (rp->regspec_size == 0) {
1231 #ifdef DDI_MAP_DEBUG
1232 ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n");
1233 #endif /* DDI_MAP_DEBUG */
1234 return (DDI_ME_INVAL);
1235 }
1236
1237 /*
1238 * I/O or memory mapping:
1239 *
1240 * <bustype=0, addr=x, len=x>: memory
1241 * <bustype=1, addr=x, len=x>: i/o
1242 * <bustype>1, addr=0, len=x>: x86-compatibility i/o
1243 */
1244 if (rp->regspec_bustype != 0) {
1245 /*
1246 * This is I/O space, which requires no particular
1247 * processing on unmap since it isn't mapped in the
1248 * first place.
1249 */
1250 return (DDI_SUCCESS);
1251 }
1252
1253 /*
1254 * Memory space
1255 */
1256 pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET;
1257 npages = mmu_btopr(rp->regspec_size + pgoffset);
1258 hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK);
1259 device_arena_free(addr - pgoffset, ptob(npages));
1260
1261 /*
1262 * Destroy the pointer - the mapping has logically gone
1263 */
1264 *vaddrp = NULL;
1265
1266 return (DDI_SUCCESS);
1267 }
1268
1269
1270 /*
1271 * rootnex_map_handle()
1272 *
1273 */
1274 static int
rootnex_map_handle(ddi_map_req_t * mp)1275 rootnex_map_handle(ddi_map_req_t *mp)
1276 {
1277 rootnex_addr_t rbase;
1278 ddi_acc_hdl_t *hp;
1279 uint_t pgoffset;
1280 struct regspec *rp;
1281 paddr_t pbase;
1282
1283 rp = mp->map_obj.rp;
1284
1285 #ifdef DDI_MAP_DEBUG
1286 ddi_map_debug(
1287 "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n",
1288 rp->regspec_bustype, rp->regspec_addr,
1289 rp->regspec_size, mp->map_handlep);
1290 #endif /* DDI_MAP_DEBUG */
1291
1292 /*
1293 * I/O or memory mapping:
1294 *
1295 * <bustype=0, addr=x, len=x>: memory
1296 * <bustype=1, addr=x, len=x>: i/o
1297 * <bustype>1, addr=0, len=x>: x86-compatibility i/o
1298 */
1299 if (rp->regspec_bustype != 0) {
1300 /*
1301 * This refers to I/O space, and we don't support "mapping"
1302 * I/O space to a user.
1303 */
1304 return (DDI_FAILURE);
1305 }
1306
1307 /*
1308 * Set up the hat_flags for the mapping.
1309 */
1310 hp = mp->map_handlep;
1311
1312 switch (hp->ah_acc.devacc_attr_endian_flags) {
1313 case DDI_NEVERSWAP_ACC:
1314 hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER;
1315 break;
1316 case DDI_STRUCTURE_LE_ACC:
1317 hp->ah_hat_flags = HAT_STRUCTURE_LE;
1318 break;
1319 case DDI_STRUCTURE_BE_ACC:
1320 return (DDI_FAILURE);
1321 default:
1322 return (DDI_REGS_ACC_CONFLICT);
1323 }
1324
1325 switch (hp->ah_acc.devacc_attr_dataorder) {
1326 case DDI_STRICTORDER_ACC:
1327 break;
1328 case DDI_UNORDERED_OK_ACC:
1329 hp->ah_hat_flags |= HAT_UNORDERED_OK;
1330 break;
1331 case DDI_MERGING_OK_ACC:
1332 hp->ah_hat_flags |= HAT_MERGING_OK;
1333 break;
1334 case DDI_LOADCACHING_OK_ACC:
1335 hp->ah_hat_flags |= HAT_LOADCACHING_OK;
1336 break;
1337 case DDI_STORECACHING_OK_ACC:
1338 hp->ah_hat_flags |= HAT_STORECACHING_OK;
1339 break;
1340 default:
1341 return (DDI_FAILURE);
1342 }
1343
1344 rbase = (rootnex_addr_t)rp->regspec_addr &
1345 (~(rootnex_addr_t)MMU_PAGEOFFSET);
1346 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET;
1347
1348 if (rp->regspec_size == 0)
1349 return (DDI_ME_INVAL);
1350
1351 #ifdef __xpv
1352 /*
1353 * If we're dom0, we're using a real device so we need to translate
1354 * the MA to a PA.
1355 */
1356 if (DOMAIN_IS_INITDOMAIN(xen_info)) {
1357 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) |
1358 (rbase & MMU_PAGEOFFSET);
1359 } else {
1360 pbase = rbase;
1361 }
1362 #else
1363 pbase = rbase;
1364 #endif
1365
1366 hp->ah_pfn = mmu_btop(pbase);
1367 hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset);
1368
1369 return (DDI_SUCCESS);
1370 }
1371
1372
1373
1374 /*
1375 * ************************
1376 * interrupt related code
1377 * ************************
1378 */
1379
1380 /*
1381 * rootnex_intr_ops()
1382 * bus_intr_op() function for interrupt support
1383 */
1384 /* ARGSUSED */
1385 static int
rootnex_intr_ops(dev_info_t * pdip,dev_info_t * rdip,ddi_intr_op_t intr_op,ddi_intr_handle_impl_t * hdlp,void * result)1386 rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op,
1387 ddi_intr_handle_impl_t *hdlp, void *result)
1388 {
1389 struct intrspec *ispec;
1390
1391 DDI_INTR_NEXDBG((CE_CONT,
1392 "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n",
1393 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp));
1394
1395 /* Process the interrupt operation */
1396 switch (intr_op) {
1397 case DDI_INTROP_GETCAP:
1398 /* First check with pcplusmp */
1399 if (psm_intr_ops == NULL)
1400 return (DDI_FAILURE);
1401
1402 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) {
1403 *(int *)result = 0;
1404 return (DDI_FAILURE);
1405 }
1406 break;
1407 case DDI_INTROP_SETCAP:
1408 if (psm_intr_ops == NULL)
1409 return (DDI_FAILURE);
1410
1411 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result))
1412 return (DDI_FAILURE);
1413 break;
1414 case DDI_INTROP_ALLOC:
1415 ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED);
1416 return (rootnex_alloc_intr_fixed(rdip, hdlp, result));
1417 case DDI_INTROP_FREE:
1418 ASSERT(hdlp->ih_type == DDI_INTR_TYPE_FIXED);
1419 return (rootnex_free_intr_fixed(rdip, hdlp));
1420 case DDI_INTROP_GETPRI:
1421 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1422 return (DDI_FAILURE);
1423 *(int *)result = ispec->intrspec_pri;
1424 break;
1425 case DDI_INTROP_SETPRI:
1426 /* Validate the interrupt priority passed to us */
1427 if (*(int *)result > LOCK_LEVEL)
1428 return (DDI_FAILURE);
1429
1430 /* Ensure that PSM is all initialized and ispec is ok */
1431 if ((psm_intr_ops == NULL) ||
1432 ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL))
1433 return (DDI_FAILURE);
1434
1435 /* Change the priority */
1436 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) ==
1437 PSM_FAILURE)
1438 return (DDI_FAILURE);
1439
1440 /* update the ispec with the new priority */
1441 ispec->intrspec_pri = *(int *)result;
1442 break;
1443 case DDI_INTROP_ADDISR:
1444 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1445 return (DDI_FAILURE);
1446 ispec->intrspec_func = hdlp->ih_cb_func;
1447 break;
1448 case DDI_INTROP_REMISR:
1449 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1450 return (DDI_FAILURE);
1451 ispec->intrspec_func = (uint_t (*)()) 0;
1452 break;
1453 case DDI_INTROP_ENABLE:
1454 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1455 return (DDI_FAILURE);
1456
1457 /* Call psmi to translate irq with the dip */
1458 if (psm_intr_ops == NULL)
1459 return (DDI_FAILURE);
1460
1461 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1462 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR,
1463 (int *)&hdlp->ih_vector) == PSM_FAILURE)
1464 return (DDI_FAILURE);
1465
1466 /* Add the interrupt handler */
1467 if (!add_avintr((void *)hdlp, ispec->intrspec_pri,
1468 hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector,
1469 hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip))
1470 return (DDI_FAILURE);
1471 break;
1472 case DDI_INTROP_DISABLE:
1473 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1474 return (DDI_FAILURE);
1475
1476 /* Call psm_ops() to translate irq with the dip */
1477 if (psm_intr_ops == NULL)
1478 return (DDI_FAILURE);
1479
1480 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1481 (void) (*psm_intr_ops)(rdip, hdlp,
1482 PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector);
1483
1484 /* Remove the interrupt handler */
1485 rem_avintr((void *)hdlp, ispec->intrspec_pri,
1486 hdlp->ih_cb_func, hdlp->ih_vector);
1487 break;
1488 case DDI_INTROP_SETMASK:
1489 if (psm_intr_ops == NULL)
1490 return (DDI_FAILURE);
1491
1492 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL))
1493 return (DDI_FAILURE);
1494 break;
1495 case DDI_INTROP_CLRMASK:
1496 if (psm_intr_ops == NULL)
1497 return (DDI_FAILURE);
1498
1499 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL))
1500 return (DDI_FAILURE);
1501 break;
1502 case DDI_INTROP_GETPENDING:
1503 if (psm_intr_ops == NULL)
1504 return (DDI_FAILURE);
1505
1506 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING,
1507 result)) {
1508 *(int *)result = 0;
1509 return (DDI_FAILURE);
1510 }
1511 break;
1512 case DDI_INTROP_NAVAIL:
1513 case DDI_INTROP_NINTRS:
1514 *(int *)result = i_ddi_get_intx_nintrs(rdip);
1515 if (*(int *)result == 0) {
1516 /*
1517 * Special case for 'pcic' driver' only. This driver
1518 * driver is a child of 'isa' and 'rootnex' drivers.
1519 *
1520 * See detailed comments on this in the function
1521 * rootnex_get_ispec().
1522 *
1523 * Children of 'pcic' send 'NINITR' request all the
1524 * way to rootnex driver. But, the 'pdp->par_nintr'
1525 * field may not initialized. So, we fake it here
1526 * to return 1 (a la what PCMCIA nexus does).
1527 */
1528 if (strcmp(ddi_get_name(rdip), "pcic") == 0)
1529 *(int *)result = 1;
1530 else
1531 return (DDI_FAILURE);
1532 }
1533 break;
1534 case DDI_INTROP_SUPPORTED_TYPES:
1535 *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */
1536 break;
1537 default:
1538 return (DDI_FAILURE);
1539 }
1540
1541 return (DDI_SUCCESS);
1542 }
1543
1544
1545 /*
1546 * rootnex_get_ispec()
1547 * convert an interrupt number to an interrupt specification.
1548 * The interrupt number determines which interrupt spec will be
1549 * returned if more than one exists.
1550 *
1551 * Look into the parent private data area of the 'rdip' to find out
1552 * the interrupt specification. First check to make sure there is
1553 * one that matchs "inumber" and then return a pointer to it.
1554 *
1555 * Return NULL if one could not be found.
1556 *
1557 * NOTE: This is needed for rootnex_intr_ops()
1558 */
1559 static struct intrspec *
rootnex_get_ispec(dev_info_t * rdip,int inum)1560 rootnex_get_ispec(dev_info_t *rdip, int inum)
1561 {
1562 struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip);
1563
1564 /*
1565 * Special case handling for drivers that provide their own
1566 * intrspec structures instead of relying on the DDI framework.
1567 *
1568 * A broken hardware driver in ON could potentially provide its
1569 * own intrspec structure, instead of relying on the hardware.
1570 * If these drivers are children of 'rootnex' then we need to
1571 * continue to provide backward compatibility to them here.
1572 *
1573 * Following check is a special case for 'pcic' driver which
1574 * was found to have broken hardwre andby provides its own intrspec.
1575 *
1576 * Verbatim comments from this driver are shown here:
1577 * "Don't use the ddi_add_intr since we don't have a
1578 * default intrspec in all cases."
1579 *
1580 * Since an 'ispec' may not be always created for it,
1581 * check for that and create one if so.
1582 *
1583 * NOTE: Currently 'pcic' is the only driver found to do this.
1584 */
1585 if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
1586 pdp->par_nintr = 1;
1587 pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) *
1588 pdp->par_nintr, KM_SLEEP);
1589 }
1590
1591 /* Validate the interrupt number */
1592 if (inum >= pdp->par_nintr)
1593 return (NULL);
1594
1595 /* Get the interrupt structure pointer and return that */
1596 return ((struct intrspec *)&pdp->par_intr[inum]);
1597 }
1598
1599 /*
1600 * Allocate interrupt vector for FIXED (legacy) type.
1601 */
1602 static int
rootnex_alloc_intr_fixed(dev_info_t * rdip,ddi_intr_handle_impl_t * hdlp,void * result)1603 rootnex_alloc_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp,
1604 void *result)
1605 {
1606 struct intrspec *ispec;
1607 ddi_intr_handle_impl_t info_hdl;
1608 int ret;
1609 int free_phdl = 0;
1610 apic_get_type_t type_info;
1611
1612 if (psm_intr_ops == NULL)
1613 return (DDI_FAILURE);
1614
1615 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1616 return (DDI_FAILURE);
1617
1618 /*
1619 * If the PSM module is "APIX" then pass the request for it
1620 * to allocate the vector now.
1621 */
1622 bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t));
1623 info_hdl.ih_private = &type_info;
1624 if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) ==
1625 PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) {
1626 if (hdlp->ih_private == NULL) { /* allocate phdl structure */
1627 free_phdl = 1;
1628 i_ddi_alloc_intr_phdl(hdlp);
1629 }
1630 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1631 ret = (*psm_intr_ops)(rdip, hdlp,
1632 PSM_INTR_OP_ALLOC_VECTORS, result);
1633 if (free_phdl) { /* free up the phdl structure */
1634 free_phdl = 0;
1635 i_ddi_free_intr_phdl(hdlp);
1636 hdlp->ih_private = NULL;
1637 }
1638 } else {
1639 /*
1640 * No APIX module; fall back to the old scheme where the
1641 * interrupt vector is allocated during ddi_enable_intr() call.
1642 */
1643 hdlp->ih_pri = ispec->intrspec_pri;
1644 *(int *)result = hdlp->ih_scratch1;
1645 ret = DDI_SUCCESS;
1646 }
1647
1648 return (ret);
1649 }
1650
1651 /*
1652 * Free up interrupt vector for FIXED (legacy) type.
1653 */
1654 static int
rootnex_free_intr_fixed(dev_info_t * rdip,ddi_intr_handle_impl_t * hdlp)1655 rootnex_free_intr_fixed(dev_info_t *rdip, ddi_intr_handle_impl_t *hdlp)
1656 {
1657 struct intrspec *ispec;
1658 struct ddi_parent_private_data *pdp;
1659 ddi_intr_handle_impl_t info_hdl;
1660 int ret;
1661 apic_get_type_t type_info;
1662
1663 if (psm_intr_ops == NULL)
1664 return (DDI_FAILURE);
1665
1666 /*
1667 * If the PSM module is "APIX" then pass the request for it
1668 * to free up the vector now.
1669 */
1670 bzero(&info_hdl, sizeof (ddi_intr_handle_impl_t));
1671 info_hdl.ih_private = &type_info;
1672 if ((*psm_intr_ops)(NULL, &info_hdl, PSM_INTR_OP_APIC_TYPE, NULL) ==
1673 PSM_SUCCESS && strcmp(type_info.avgi_type, APIC_APIX_NAME) == 0) {
1674 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)
1675 return (DDI_FAILURE);
1676 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec;
1677 ret = (*psm_intr_ops)(rdip, hdlp,
1678 PSM_INTR_OP_FREE_VECTORS, NULL);
1679 } else {
1680 /*
1681 * No APIX module; fall back to the old scheme where
1682 * the interrupt vector was already freed during
1683 * ddi_disable_intr() call.
1684 */
1685 ret = DDI_SUCCESS;
1686 }
1687
1688 pdp = ddi_get_parent_data(rdip);
1689
1690 /*
1691 * Special case for 'pcic' driver' only.
1692 * If an intrspec was created for it, clean it up here
1693 * See detailed comments on this in the function
1694 * rootnex_get_ispec().
1695 */
1696 if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) {
1697 kmem_free(pdp->par_intr, sizeof (struct intrspec) *
1698 pdp->par_nintr);
1699 /*
1700 * Set it to zero; so that
1701 * DDI framework doesn't free it again
1702 */
1703 pdp->par_intr = NULL;
1704 pdp->par_nintr = 0;
1705 }
1706
1707 return (ret);
1708 }
1709
1710
1711 /*
1712 * ******************
1713 * dma related code
1714 * ******************
1715 */
1716
1717 /*ARGSUSED*/
1718 static int
rootnex_coredma_allochdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_attr_t * attr,int (* waitfp)(caddr_t),caddr_t arg,ddi_dma_handle_t * handlep)1719 rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip,
1720 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg,
1721 ddi_dma_handle_t *handlep)
1722 {
1723 uint64_t maxsegmentsize_ll;
1724 uint_t maxsegmentsize;
1725 ddi_dma_impl_t *hp;
1726 rootnex_dma_t *dma;
1727 uint64_t count_max;
1728 uint64_t seg;
1729 int kmflag;
1730 int e;
1731
1732
1733 /* convert our sleep flags */
1734 if (waitfp == DDI_DMA_SLEEP) {
1735 kmflag = KM_SLEEP;
1736 } else {
1737 kmflag = KM_NOSLEEP;
1738 }
1739
1740 /*
1741 * We try to do only one memory allocation here. We'll do a little
1742 * pointer manipulation later. If the bind ends up taking more than
1743 * our prealloc's space, we'll have to allocate more memory in the
1744 * bind operation. Not great, but much better than before and the
1745 * best we can do with the current bind interfaces.
1746 */
1747 hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag);
1748 if (hp == NULL)
1749 return (DDI_DMA_NORESOURCES);
1750
1751 /* Do our pointer manipulation now, align the structures */
1752 hp->dmai_private = (void *)(((uintptr_t)hp +
1753 (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7);
1754 dma = (rootnex_dma_t *)hp->dmai_private;
1755 dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma +
1756 sizeof (rootnex_dma_t) + 0x7) & ~0x7);
1757
1758 /* setup the handle */
1759 rootnex_clean_dmahdl(hp);
1760 hp->dmai_error.err_fep = NULL;
1761 hp->dmai_error.err_cf = NULL;
1762 dma->dp_dip = rdip;
1763 dma->dp_sglinfo.si_flags = attr->dma_attr_flags;
1764 dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo;
1765
1766 /*
1767 * The BOUNCE_ON_SEG workaround is not needed when an IOMMU
1768 * is being used. Set the upper limit to the seg value.
1769 * There will be enough DVMA space to always get addresses
1770 * that will match the constraints.
1771 */
1772 if (IOMMU_USED(rdip) &&
1773 (attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG)) {
1774 dma->dp_sglinfo.si_max_addr = attr->dma_attr_seg;
1775 dma->dp_sglinfo.si_flags &= ~_DDI_DMA_BOUNCE_ON_SEG;
1776 } else
1777 dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi;
1778
1779 hp->dmai_minxfer = attr->dma_attr_minxfer;
1780 hp->dmai_burstsizes = attr->dma_attr_burstsizes;
1781 hp->dmai_rdip = rdip;
1782 hp->dmai_attr = *attr;
1783
1784 if (attr->dma_attr_seg >= dma->dp_sglinfo.si_max_addr)
1785 dma->dp_sglinfo.si_cancross = B_FALSE;
1786 else
1787 dma->dp_sglinfo.si_cancross = B_TRUE;
1788
1789 /* we don't need to worry about the SPL since we do a tryenter */
1790 mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL);
1791
1792 /*
1793 * Figure out our maximum segment size. If the segment size is greater
1794 * than 4G, we will limit it to (4G - 1) since the max size of a dma
1795 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and
1796 * dma_attr_count_max are size-1 type values.
1797 *
1798 * Maximum segment size is the largest physically contiguous chunk of
1799 * memory that we can return from a bind (i.e. the maximum size of a
1800 * single cookie).
1801 */
1802
1803 /* handle the rollover cases */
1804 seg = attr->dma_attr_seg + 1;
1805 if (seg < attr->dma_attr_seg) {
1806 seg = attr->dma_attr_seg;
1807 }
1808 count_max = attr->dma_attr_count_max + 1;
1809 if (count_max < attr->dma_attr_count_max) {
1810 count_max = attr->dma_attr_count_max;
1811 }
1812
1813 /*
1814 * granularity may or may not be a power of two. If it isn't, we can't
1815 * use a simple mask.
1816 */
1817 if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) {
1818 dma->dp_granularity_power_2 = B_FALSE;
1819 } else {
1820 dma->dp_granularity_power_2 = B_TRUE;
1821 }
1822
1823 /*
1824 * maxxfer should be a whole multiple of granularity. If we're going to
1825 * break up a window because we're greater than maxxfer, we might as
1826 * well make sure it's maxxfer is a whole multiple so we don't have to
1827 * worry about triming the window later on for this case.
1828 */
1829 if (attr->dma_attr_granular > 1) {
1830 if (dma->dp_granularity_power_2) {
1831 dma->dp_maxxfer = attr->dma_attr_maxxfer -
1832 (attr->dma_attr_maxxfer &
1833 (attr->dma_attr_granular - 1));
1834 } else {
1835 dma->dp_maxxfer = attr->dma_attr_maxxfer -
1836 (attr->dma_attr_maxxfer % attr->dma_attr_granular);
1837 }
1838 } else {
1839 dma->dp_maxxfer = attr->dma_attr_maxxfer;
1840 }
1841
1842 maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer);
1843 maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max);
1844 if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) {
1845 maxsegmentsize = 0xFFFFFFFF;
1846 } else {
1847 maxsegmentsize = maxsegmentsize_ll;
1848 }
1849 dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize;
1850 dma->dp_sglinfo.si_segmask = attr->dma_attr_seg;
1851
1852 /* check the ddi_dma_attr arg to make sure it makes a little sense */
1853 if (rootnex_alloc_check_parms) {
1854 e = rootnex_valid_alloc_parms(attr, maxsegmentsize);
1855 if (e != DDI_SUCCESS) {
1856 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]);
1857 (void) rootnex_dma_freehdl(dip, rdip,
1858 (ddi_dma_handle_t)hp);
1859 return (e);
1860 }
1861 }
1862
1863 *handlep = (ddi_dma_handle_t)hp;
1864
1865 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1866 ROOTNEX_DPROBE1(rootnex__alloc__handle, uint64_t,
1867 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1868
1869 return (DDI_SUCCESS);
1870 }
1871
1872
1873 /*
1874 * rootnex_dma_allochdl()
1875 * called from ddi_dma_alloc_handle().
1876 */
1877 static int
rootnex_dma_allochdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_attr_t * attr,int (* waitfp)(caddr_t),caddr_t arg,ddi_dma_handle_t * handlep)1878 rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr,
1879 int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep)
1880 {
1881 int retval = DDI_SUCCESS;
1882 #if defined(__amd64) && !defined(__xpv)
1883
1884 if (IOMMU_UNITIALIZED(rdip)) {
1885 retval = iommulib_nex_open(dip, rdip);
1886
1887 if (retval != DDI_SUCCESS && retval != DDI_ENOTSUP)
1888 return (retval);
1889 }
1890
1891 if (IOMMU_UNUSED(rdip)) {
1892 retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
1893 handlep);
1894 } else {
1895 retval = iommulib_nexdma_allochdl(dip, rdip, attr,
1896 waitfp, arg, handlep);
1897 }
1898 #else
1899 retval = rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg,
1900 handlep);
1901 #endif
1902 switch (retval) {
1903 case DDI_DMA_NORESOURCES:
1904 if (waitfp != DDI_DMA_DONTWAIT) {
1905 ddi_set_callback(waitfp, arg,
1906 &rootnex_state->r_dvma_call_list_id);
1907 }
1908 break;
1909 case DDI_SUCCESS:
1910 ndi_fmc_insert(rdip, DMA_HANDLE, *handlep, NULL);
1911 break;
1912 default:
1913 break;
1914 }
1915 return (retval);
1916 }
1917
1918 /*ARGSUSED*/
1919 static int
rootnex_coredma_freehdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle)1920 rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip,
1921 ddi_dma_handle_t handle)
1922 {
1923 ddi_dma_impl_t *hp;
1924 rootnex_dma_t *dma;
1925
1926
1927 hp = (ddi_dma_impl_t *)handle;
1928 dma = (rootnex_dma_t *)hp->dmai_private;
1929
1930 /* unbind should have been called first */
1931 ASSERT(!dma->dp_inuse);
1932
1933 mutex_destroy(&dma->dp_mutex);
1934 kmem_cache_free(rootnex_state->r_dmahdl_cache, hp);
1935
1936 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1937 ROOTNEX_DPROBE1(rootnex__free__handle, uint64_t,
1938 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]);
1939
1940 return (DDI_SUCCESS);
1941 }
1942
1943 /*
1944 * rootnex_dma_freehdl()
1945 * called from ddi_dma_free_handle().
1946 */
1947 static int
rootnex_dma_freehdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle)1948 rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle)
1949 {
1950 int ret;
1951
1952 ndi_fmc_remove(rdip, DMA_HANDLE, handle);
1953 #if defined(__amd64) && !defined(__xpv)
1954 if (IOMMU_USED(rdip))
1955 ret = iommulib_nexdma_freehdl(dip, rdip, handle);
1956 else
1957 #endif
1958 ret = rootnex_coredma_freehdl(dip, rdip, handle);
1959
1960 if (rootnex_state->r_dvma_call_list_id)
1961 ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
1962
1963 return (ret);
1964 }
1965
1966 /*ARGSUSED*/
1967 static int
rootnex_coredma_bindhdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,struct ddi_dma_req * dmareq,ddi_dma_cookie_t * cookiep,uint_t * ccountp)1968 rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
1969 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
1970 ddi_dma_cookie_t *cookiep, uint_t *ccountp)
1971 {
1972 rootnex_sglinfo_t *sinfo;
1973 ddi_dma_obj_t *dmao;
1974 #if defined(__amd64) && !defined(__xpv)
1975 struct dvmaseg *dvs;
1976 ddi_dma_cookie_t *cookie;
1977 #endif
1978 ddi_dma_attr_t *attr;
1979 ddi_dma_impl_t *hp;
1980 rootnex_dma_t *dma;
1981 int kmflag;
1982 int e;
1983 uint_t ncookies;
1984
1985 hp = (ddi_dma_impl_t *)handle;
1986 dma = (rootnex_dma_t *)hp->dmai_private;
1987 dmao = &dma->dp_dma;
1988 sinfo = &dma->dp_sglinfo;
1989 attr = &hp->dmai_attr;
1990
1991 /* convert the sleep flags */
1992 if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
1993 dma->dp_sleep_flags = kmflag = KM_SLEEP;
1994 } else {
1995 dma->dp_sleep_flags = kmflag = KM_NOSLEEP;
1996 }
1997
1998 hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS;
1999
2000 /*
2001 * This is useful for debugging a driver. Not as useful in a production
2002 * system. The only time this will fail is if you have a driver bug.
2003 */
2004 if (rootnex_bind_check_inuse) {
2005 /*
2006 * No one else should ever have this lock unless someone else
2007 * is trying to use this handle. So contention on the lock
2008 * is the same as inuse being set.
2009 */
2010 e = mutex_tryenter(&dma->dp_mutex);
2011 if (e == 0) {
2012 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
2013 return (DDI_DMA_INUSE);
2014 }
2015 if (dma->dp_inuse) {
2016 mutex_exit(&dma->dp_mutex);
2017 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
2018 return (DDI_DMA_INUSE);
2019 }
2020 dma->dp_inuse = B_TRUE;
2021 mutex_exit(&dma->dp_mutex);
2022 }
2023
2024 /* check the ddi_dma_attr arg to make sure it makes a little sense */
2025 if (rootnex_bind_check_parms) {
2026 e = rootnex_valid_bind_parms(dmareq, attr);
2027 if (e != DDI_SUCCESS) {
2028 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
2029 rootnex_clean_dmahdl(hp);
2030 return (e);
2031 }
2032 }
2033
2034 /* save away the original bind info */
2035 dma->dp_dma = dmareq->dmar_object;
2036
2037 #if defined(__amd64) && !defined(__xpv)
2038 if (IOMMU_USED(rdip)) {
2039 dmao = &dma->dp_dvma;
2040 e = iommulib_nexdma_mapobject(dip, rdip, handle, dmareq, dmao);
2041 switch (e) {
2042 case DDI_SUCCESS:
2043 if (sinfo->si_cancross ||
2044 dmao->dmao_obj.dvma_obj.dv_nseg != 1 ||
2045 dmao->dmao_size > sinfo->si_max_cookie_size) {
2046 dma->dp_dvma_used = B_TRUE;
2047 break;
2048 }
2049 sinfo->si_sgl_size = 1;
2050 hp->dmai_rflags |= DMP_NOSYNC;
2051
2052 dma->dp_dvma_used = B_TRUE;
2053 dma->dp_need_to_free_cookie = B_FALSE;
2054
2055 dvs = &dmao->dmao_obj.dvma_obj.dv_seg[0];
2056 cookie = hp->dmai_cookie = dma->dp_cookies =
2057 (ddi_dma_cookie_t *)dma->dp_prealloc_buffer;
2058 cookie->dmac_laddress = dvs->dvs_start +
2059 dmao->dmao_obj.dvma_obj.dv_off;
2060 cookie->dmac_size = dvs->dvs_len;
2061 cookie->dmac_type = 0;
2062
2063 ROOTNEX_DPROBE1(rootnex__bind__dvmafast, dev_info_t *,
2064 rdip);
2065 goto fast;
2066 case DDI_ENOTSUP:
2067 break;
2068 default:
2069 rootnex_clean_dmahdl(hp);
2070 return (e);
2071 }
2072 }
2073 #endif
2074
2075 /*
2076 * Figure out a rough estimate of what maximum number of pages
2077 * this buffer could use (a high estimate of course).
2078 */
2079 sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1;
2080
2081 if (dma->dp_dvma_used) {
2082 /*
2083 * The number of physical pages is the worst case.
2084 *
2085 * For DVMA, the worst case is the length divided
2086 * by the maximum cookie length, plus 1. Add to that
2087 * the number of segment boundaries potentially crossed, and
2088 * the additional number of DVMA segments that was returned.
2089 *
2090 * In the normal case, for modern devices, si_cancross will
2091 * be false, and dv_nseg will be 1, and the fast path will
2092 * have been taken above.
2093 */
2094 ncookies = (dma->dp_dma.dmao_size / sinfo->si_max_cookie_size)
2095 + 1;
2096 if (sinfo->si_cancross)
2097 ncookies +=
2098 (dma->dp_dma.dmao_size / attr->dma_attr_seg) + 1;
2099 ncookies += (dmao->dmao_obj.dvma_obj.dv_nseg - 1);
2100
2101 sinfo->si_max_pages = MIN(sinfo->si_max_pages, ncookies);
2102 }
2103
2104 /*
2105 * We'll use the pre-allocated cookies for any bind that will *always*
2106 * fit (more important to be consistent, we don't want to create
2107 * additional degenerate cases).
2108 */
2109 if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) {
2110 dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer;
2111 dma->dp_need_to_free_cookie = B_FALSE;
2112 ROOTNEX_DPROBE2(rootnex__bind__prealloc, dev_info_t *, rdip,
2113 uint_t, sinfo->si_max_pages);
2114
2115 /*
2116 * For anything larger than that, we'll go ahead and allocate the
2117 * maximum number of pages we expect to see. Hopefuly, we won't be
2118 * seeing this path in the fast path for high performance devices very
2119 * frequently.
2120 *
2121 * a ddi bind interface that allowed the driver to provide storage to
2122 * the bind interface would speed this case up.
2123 */
2124 } else {
2125 /*
2126 * Save away how much memory we allocated. If we're doing a
2127 * nosleep, the alloc could fail...
2128 */
2129 dma->dp_cookie_size = sinfo->si_max_pages *
2130 sizeof (ddi_dma_cookie_t);
2131 dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag);
2132 if (dma->dp_cookies == NULL) {
2133 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
2134 rootnex_clean_dmahdl(hp);
2135 return (DDI_DMA_NORESOURCES);
2136 }
2137 dma->dp_need_to_free_cookie = B_TRUE;
2138 ROOTNEX_DPROBE2(rootnex__bind__alloc, dev_info_t *, rdip,
2139 uint_t, sinfo->si_max_pages);
2140 }
2141 hp->dmai_cookie = dma->dp_cookies;
2142
2143 /*
2144 * Get the real sgl. rootnex_get_sgl will fill in cookie array while
2145 * looking at the constraints in the dma structure. It will then put
2146 * some additional state about the sgl in the dma struct (i.e. is
2147 * the sgl clean, or do we need to do some munging; how many pages
2148 * need to be copied, etc.)
2149 */
2150 if (dma->dp_dvma_used)
2151 rootnex_dvma_get_sgl(dmao, dma->dp_cookies, &dma->dp_sglinfo);
2152 else
2153 rootnex_get_sgl(dmao, dma->dp_cookies, &dma->dp_sglinfo);
2154
2155 out:
2156 ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages);
2157 /* if we don't need a copy buffer, we don't need to sync */
2158 if (sinfo->si_copybuf_req == 0) {
2159 hp->dmai_rflags |= DMP_NOSYNC;
2160 }
2161
2162 /*
2163 * if we don't need the copybuf and we don't need to do a partial, we
2164 * hit the fast path. All the high performance devices should be trying
2165 * to hit this path. To hit this path, a device should be able to reach
2166 * all of memory, shouldn't try to bind more than it can transfer, and
2167 * the buffer shouldn't require more cookies than the driver/device can
2168 * handle [sgllen]).
2169 */
2170 if ((sinfo->si_copybuf_req == 0) &&
2171 (sinfo->si_sgl_size <= attr->dma_attr_sgllen) &&
2172 (dmao->dmao_size < dma->dp_maxxfer)) {
2173 fast:
2174 /*
2175 * If the driver supports FMA, insert the handle in the FMA DMA
2176 * handle cache.
2177 */
2178 if (attr->dma_attr_flags & DDI_DMA_FLAGERR)
2179 hp->dmai_error.err_cf = rootnex_dma_check;
2180
2181 /*
2182 * copy out the first cookie and ccountp, set the cookie
2183 * pointer to the second cookie. The first cookie is passed
2184 * back on the stack. Additional cookies are accessed via
2185 * ddi_dma_nextcookie()
2186 */
2187 *cookiep = dma->dp_cookies[0];
2188 *ccountp = sinfo->si_sgl_size;
2189 hp->dmai_cookie++;
2190 hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
2191 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2192 ROOTNEX_DPROBE4(rootnex__bind__fast, dev_info_t *, rdip,
2193 uint64_t, rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS],
2194 uint_t, dmao->dmao_size, uint_t, *ccountp);
2195
2196
2197 return (DDI_DMA_MAPPED);
2198 }
2199
2200 /*
2201 * go to the slow path, we may need to alloc more memory, create
2202 * multiple windows, and munge up a sgl to make the device happy.
2203 */
2204
2205 /*
2206 * With the IOMMU mapobject method used, we should never hit
2207 * the slow path. If we do, something is seriously wrong.
2208 * Clean up and return an error.
2209 */
2210
2211 if (dma->dp_dvma_used) {
2212 (void) iommulib_nexdma_unmapobject(dip, rdip, handle,
2213 &dma->dp_dvma);
2214 e = DDI_DMA_NOMAPPING;
2215 } else {
2216 e = rootnex_bind_slowpath(hp, dmareq, dma, attr, &dma->dp_dma,
2217 kmflag);
2218 }
2219 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
2220 if (dma->dp_need_to_free_cookie) {
2221 kmem_free(dma->dp_cookies, dma->dp_cookie_size);
2222 }
2223 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]);
2224 rootnex_clean_dmahdl(hp); /* must be after free cookie */
2225 return (e);
2226 }
2227
2228 /*
2229 * If the driver supports FMA, insert the handle in the FMA DMA handle
2230 * cache.
2231 */
2232 if (attr->dma_attr_flags & DDI_DMA_FLAGERR)
2233 hp->dmai_error.err_cf = rootnex_dma_check;
2234
2235 /* if the first window uses the copy buffer, sync it for the device */
2236 if ((dma->dp_window[dma->dp_current_win].wd_dosync) &&
2237 (hp->dmai_rflags & DDI_DMA_WRITE)) {
2238 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
2239 DDI_DMA_SYNC_FORDEV);
2240 }
2241
2242 /*
2243 * copy out the first cookie and ccountp, set the cookie pointer to the
2244 * second cookie. Make sure the partial flag is set/cleared correctly.
2245 * If we have a partial map (i.e. multiple windows), the number of
2246 * cookies we return is the number of cookies in the first window.
2247 */
2248 if (e == DDI_DMA_MAPPED) {
2249 hp->dmai_rflags &= ~DDI_DMA_PARTIAL;
2250 *ccountp = sinfo->si_sgl_size;
2251 hp->dmai_nwin = 1;
2252 } else {
2253 hp->dmai_rflags |= DDI_DMA_PARTIAL;
2254 *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt;
2255 ASSERT(hp->dmai_nwin <= dma->dp_max_win);
2256 }
2257 *cookiep = dma->dp_cookies[0];
2258 hp->dmai_cookie++;
2259
2260 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2261 ROOTNEX_DPROBE4(rootnex__bind__slow, dev_info_t *, rdip, uint64_t,
2262 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t,
2263 dmao->dmao_size, uint_t, *ccountp);
2264 return (e);
2265 }
2266
2267 /*
2268 * rootnex_dma_bindhdl()
2269 * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle().
2270 */
2271 static int
rootnex_dma_bindhdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,struct ddi_dma_req * dmareq,ddi_dma_cookie_t * cookiep,uint_t * ccountp)2272 rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip,
2273 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq,
2274 ddi_dma_cookie_t *cookiep, uint_t *ccountp)
2275 {
2276 int ret;
2277 #if defined(__amd64) && !defined(__xpv)
2278 if (IOMMU_USED(rdip))
2279 ret = iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq,
2280 cookiep, ccountp);
2281 else
2282 #endif
2283 ret = rootnex_coredma_bindhdl(dip, rdip, handle, dmareq,
2284 cookiep, ccountp);
2285
2286 if (ret == DDI_DMA_NORESOURCES && dmareq->dmar_fp != DDI_DMA_DONTWAIT) {
2287 ddi_set_callback(dmareq->dmar_fp, dmareq->dmar_arg,
2288 &rootnex_state->r_dvma_call_list_id);
2289 }
2290
2291 return (ret);
2292 }
2293
2294
2295
2296 /*ARGSUSED*/
2297 static int
rootnex_coredma_unbindhdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle)2298 rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
2299 ddi_dma_handle_t handle)
2300 {
2301 ddi_dma_impl_t *hp;
2302 rootnex_dma_t *dma;
2303 int e;
2304
2305 hp = (ddi_dma_impl_t *)handle;
2306 dma = (rootnex_dma_t *)hp->dmai_private;
2307
2308 /* make sure the buffer wasn't free'd before calling unbind */
2309 if (rootnex_unbind_verify_buffer) {
2310 e = rootnex_verify_buffer(dma);
2311 if (e != DDI_SUCCESS) {
2312 ASSERT(0);
2313 return (DDI_FAILURE);
2314 }
2315 }
2316
2317 /* sync the current window before unbinding the buffer */
2318 if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync &&
2319 (hp->dmai_rflags & DDI_DMA_READ)) {
2320 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
2321 DDI_DMA_SYNC_FORCPU);
2322 }
2323
2324 /*
2325 * cleanup and copy buffer or window state. if we didn't use the copy
2326 * buffer or windows, there won't be much to do :-)
2327 */
2328 rootnex_teardown_copybuf(dma);
2329 rootnex_teardown_windows(dma);
2330
2331 if (IOMMU_USED(rdip))
2332 (void) iommulib_nexdma_unmapobject(dip, rdip, handle,
2333 &dma->dp_dvma);
2334
2335 /*
2336 * If we had to allocate space to for the worse case sgl (it didn't
2337 * fit into our pre-allocate buffer), free that up now
2338 */
2339 if (dma->dp_need_to_free_cookie) {
2340 kmem_free(dma->dp_cookies, dma->dp_cookie_size);
2341 }
2342
2343 /*
2344 * clean up the handle so it's ready for the next bind (i.e. if the
2345 * handle is reused).
2346 */
2347 rootnex_clean_dmahdl(hp);
2348 hp->dmai_error.err_cf = NULL;
2349
2350 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2351 ROOTNEX_DPROBE1(rootnex__unbind, uint64_t,
2352 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]);
2353
2354 return (DDI_SUCCESS);
2355 }
2356
2357 /*
2358 * rootnex_dma_unbindhdl()
2359 * called from ddi_dma_unbind_handle()
2360 */
2361 /*ARGSUSED*/
2362 static int
rootnex_dma_unbindhdl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle)2363 rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip,
2364 ddi_dma_handle_t handle)
2365 {
2366 int ret;
2367
2368 #if defined(__amd64) && !defined(__xpv)
2369 if (IOMMU_USED(rdip))
2370 ret = iommulib_nexdma_unbindhdl(dip, rdip, handle);
2371 else
2372 #endif
2373 ret = rootnex_coredma_unbindhdl(dip, rdip, handle);
2374
2375 if (rootnex_state->r_dvma_call_list_id)
2376 ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
2377
2378 return (ret);
2379 }
2380
2381 #if defined(__amd64) && !defined(__xpv)
2382
2383 static int
rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle)2384 rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle)
2385 {
2386 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2387 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2388
2389 if (dma->dp_sleep_flags != KM_SLEEP &&
2390 dma->dp_sleep_flags != KM_NOSLEEP)
2391 cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle");
2392 return (dma->dp_sleep_flags);
2393 }
2394 /*ARGSUSED*/
2395 static void
rootnex_coredma_reset_cookies(dev_info_t * dip,ddi_dma_handle_t handle)2396 rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
2397 {
2398 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2399 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2400 rootnex_window_t *window;
2401
2402 if (dma->dp_window) {
2403 window = &dma->dp_window[dma->dp_current_win];
2404 hp->dmai_cookie = window->wd_first_cookie;
2405 } else {
2406 hp->dmai_cookie = dma->dp_cookies;
2407 }
2408 hp->dmai_cookie++;
2409 }
2410
2411 /*ARGSUSED*/
2412 static int
rootnex_coredma_get_cookies(dev_info_t * dip,ddi_dma_handle_t handle,ddi_dma_cookie_t ** cookiepp,uint_t * ccountp)2413 rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
2414 ddi_dma_cookie_t **cookiepp, uint_t *ccountp)
2415 {
2416 int i;
2417 int km_flags;
2418 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2419 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2420 rootnex_window_t *window;
2421 ddi_dma_cookie_t *cp;
2422 ddi_dma_cookie_t *cookie;
2423
2424 ASSERT(*cookiepp == NULL);
2425 ASSERT(*ccountp == 0);
2426
2427 if (dma->dp_window) {
2428 window = &dma->dp_window[dma->dp_current_win];
2429 cp = window->wd_first_cookie;
2430 *ccountp = window->wd_cookie_cnt;
2431 } else {
2432 cp = dma->dp_cookies;
2433 *ccountp = dma->dp_sglinfo.si_sgl_size;
2434 }
2435
2436 km_flags = rootnex_coredma_get_sleep_flags(handle);
2437 cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags);
2438 if (cookie == NULL) {
2439 return (DDI_DMA_NORESOURCES);
2440 }
2441
2442 for (i = 0; i < *ccountp; i++) {
2443 cookie[i].dmac_notused = cp[i].dmac_notused;
2444 cookie[i].dmac_type = cp[i].dmac_type;
2445 cookie[i].dmac_address = cp[i].dmac_address;
2446 cookie[i].dmac_size = cp[i].dmac_size;
2447 }
2448
2449 *cookiepp = cookie;
2450
2451 return (DDI_SUCCESS);
2452 }
2453
2454 /*ARGSUSED*/
2455 static int
rootnex_coredma_set_cookies(dev_info_t * dip,ddi_dma_handle_t handle,ddi_dma_cookie_t * cookiep,uint_t ccount)2456 rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle,
2457 ddi_dma_cookie_t *cookiep, uint_t ccount)
2458 {
2459 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2460 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2461 rootnex_window_t *window;
2462 ddi_dma_cookie_t *cur_cookiep;
2463
2464 ASSERT(cookiep);
2465 ASSERT(ccount != 0);
2466 ASSERT(dma->dp_need_to_switch_cookies == B_FALSE);
2467
2468 if (dma->dp_window) {
2469 window = &dma->dp_window[dma->dp_current_win];
2470 dma->dp_saved_cookies = window->wd_first_cookie;
2471 window->wd_first_cookie = cookiep;
2472 ASSERT(ccount == window->wd_cookie_cnt);
2473 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
2474 + window->wd_first_cookie;
2475 } else {
2476 dma->dp_saved_cookies = dma->dp_cookies;
2477 dma->dp_cookies = cookiep;
2478 ASSERT(ccount == dma->dp_sglinfo.si_sgl_size);
2479 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies)
2480 + dma->dp_cookies;
2481 }
2482
2483 dma->dp_need_to_switch_cookies = B_TRUE;
2484 hp->dmai_cookie = cur_cookiep;
2485
2486 return (DDI_SUCCESS);
2487 }
2488
2489 /*ARGSUSED*/
2490 static int
rootnex_coredma_clear_cookies(dev_info_t * dip,ddi_dma_handle_t handle)2491 rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle)
2492 {
2493 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle;
2494 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private;
2495 rootnex_window_t *window;
2496 ddi_dma_cookie_t *cur_cookiep;
2497 ddi_dma_cookie_t *cookie_array;
2498 uint_t ccount;
2499
2500 /* check if cookies have not been switched */
2501 if (dma->dp_need_to_switch_cookies == B_FALSE)
2502 return (DDI_SUCCESS);
2503
2504 ASSERT(dma->dp_saved_cookies);
2505
2506 if (dma->dp_window) {
2507 window = &dma->dp_window[dma->dp_current_win];
2508 cookie_array = window->wd_first_cookie;
2509 window->wd_first_cookie = dma->dp_saved_cookies;
2510 dma->dp_saved_cookies = NULL;
2511 ccount = window->wd_cookie_cnt;
2512 cur_cookiep = (hp->dmai_cookie - cookie_array)
2513 + window->wd_first_cookie;
2514 } else {
2515 cookie_array = dma->dp_cookies;
2516 dma->dp_cookies = dma->dp_saved_cookies;
2517 dma->dp_saved_cookies = NULL;
2518 ccount = dma->dp_sglinfo.si_sgl_size;
2519 cur_cookiep = (hp->dmai_cookie - cookie_array)
2520 + dma->dp_cookies;
2521 }
2522
2523 kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount);
2524
2525 hp->dmai_cookie = cur_cookiep;
2526
2527 dma->dp_need_to_switch_cookies = B_FALSE;
2528
2529 return (DDI_SUCCESS);
2530 }
2531
2532 #endif
2533
2534 static struct as *
rootnex_get_as(ddi_dma_obj_t * dmao)2535 rootnex_get_as(ddi_dma_obj_t *dmao)
2536 {
2537 struct as *asp;
2538
2539 switch (dmao->dmao_type) {
2540 case DMA_OTYP_VADDR:
2541 case DMA_OTYP_BUFVADDR:
2542 asp = dmao->dmao_obj.virt_obj.v_as;
2543 if (asp == NULL)
2544 asp = &kas;
2545 break;
2546 default:
2547 asp = NULL;
2548 break;
2549 }
2550 return (asp);
2551 }
2552
2553 /*
2554 * rootnex_verify_buffer()
2555 * verify buffer wasn't free'd
2556 */
2557 static int
rootnex_verify_buffer(rootnex_dma_t * dma)2558 rootnex_verify_buffer(rootnex_dma_t *dma)
2559 {
2560 page_t **pplist;
2561 caddr_t vaddr;
2562 uint_t pcnt;
2563 uint_t poff;
2564 page_t *pp;
2565 char b;
2566 int i;
2567
2568 /* Figure out how many pages this buffer occupies */
2569 if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) {
2570 poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET;
2571 } else {
2572 vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr;
2573 poff = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2574 }
2575 pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff);
2576
2577 switch (dma->dp_dma.dmao_type) {
2578 case DMA_OTYP_PAGES:
2579 /*
2580 * for a linked list of pp's walk through them to make sure
2581 * they're locked and not free.
2582 */
2583 pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp;
2584 for (i = 0; i < pcnt; i++) {
2585 if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) {
2586 return (DDI_FAILURE);
2587 }
2588 pp = pp->p_next;
2589 }
2590 break;
2591
2592 case DMA_OTYP_VADDR:
2593 case DMA_OTYP_BUFVADDR:
2594 pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv;
2595 /*
2596 * for an array of pp's walk through them to make sure they're
2597 * not free. It's possible that they may not be locked.
2598 */
2599 if (pplist) {
2600 for (i = 0; i < pcnt; i++) {
2601 if (PP_ISFREE(pplist[i])) {
2602 return (DDI_FAILURE);
2603 }
2604 }
2605
2606 /* For a virtual address, try to peek at each page */
2607 } else {
2608 if (rootnex_get_as(&dma->dp_dma) == &kas) {
2609 for (i = 0; i < pcnt; i++) {
2610 if (ddi_peek8(NULL, vaddr, &b) ==
2611 DDI_FAILURE)
2612 return (DDI_FAILURE);
2613 vaddr += MMU_PAGESIZE;
2614 }
2615 }
2616 }
2617 break;
2618
2619 default:
2620 cmn_err(CE_PANIC, "rootnex_verify_buffer: bad DMA object");
2621 break;
2622 }
2623
2624 return (DDI_SUCCESS);
2625 }
2626
2627
2628 /*
2629 * rootnex_clean_dmahdl()
2630 * Clean the dma handle. This should be called on a handle alloc and an
2631 * unbind handle. Set the handle state to the default settings.
2632 */
2633 static void
rootnex_clean_dmahdl(ddi_dma_impl_t * hp)2634 rootnex_clean_dmahdl(ddi_dma_impl_t *hp)
2635 {
2636 rootnex_dma_t *dma;
2637
2638
2639 dma = (rootnex_dma_t *)hp->dmai_private;
2640
2641 hp->dmai_nwin = 0;
2642 dma->dp_current_cookie = 0;
2643 dma->dp_copybuf_size = 0;
2644 dma->dp_window = NULL;
2645 dma->dp_cbaddr = NULL;
2646 dma->dp_inuse = B_FALSE;
2647 dma->dp_dvma_used = B_FALSE;
2648 dma->dp_need_to_free_cookie = B_FALSE;
2649 dma->dp_need_to_switch_cookies = B_FALSE;
2650 dma->dp_saved_cookies = NULL;
2651 dma->dp_sleep_flags = KM_PANIC;
2652 dma->dp_need_to_free_window = B_FALSE;
2653 dma->dp_partial_required = B_FALSE;
2654 dma->dp_trim_required = B_FALSE;
2655 dma->dp_sglinfo.si_copybuf_req = 0;
2656 #if !defined(__amd64)
2657 dma->dp_cb_remaping = B_FALSE;
2658 dma->dp_kva = NULL;
2659 #endif
2660
2661 /* FMA related initialization */
2662 hp->dmai_fault = 0;
2663 hp->dmai_fault_check = NULL;
2664 hp->dmai_fault_notify = NULL;
2665 hp->dmai_error.err_ena = 0;
2666 hp->dmai_error.err_status = DDI_FM_OK;
2667 hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED;
2668 hp->dmai_error.err_ontrap = NULL;
2669 }
2670
2671
2672 /*
2673 * rootnex_valid_alloc_parms()
2674 * Called in ddi_dma_alloc_handle path to validate its parameters.
2675 */
2676 static int
rootnex_valid_alloc_parms(ddi_dma_attr_t * attr,uint_t maxsegmentsize)2677 rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize)
2678 {
2679 if ((attr->dma_attr_seg < MMU_PAGEOFFSET) ||
2680 (attr->dma_attr_count_max < MMU_PAGEOFFSET) ||
2681 (attr->dma_attr_granular > MMU_PAGESIZE) ||
2682 (attr->dma_attr_maxxfer < MMU_PAGESIZE)) {
2683 return (DDI_DMA_BADATTR);
2684 }
2685
2686 if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) {
2687 return (DDI_DMA_BADATTR);
2688 }
2689
2690 if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET ||
2691 MMU_PAGESIZE & (attr->dma_attr_granular - 1) ||
2692 attr->dma_attr_sgllen <= 0) {
2693 return (DDI_DMA_BADATTR);
2694 }
2695
2696 /* We should be able to DMA into every byte offset in a page */
2697 if (maxsegmentsize < MMU_PAGESIZE) {
2698 return (DDI_DMA_BADATTR);
2699 }
2700
2701 /* if we're bouncing on seg, seg must be <= addr_hi */
2702 if ((attr->dma_attr_flags & _DDI_DMA_BOUNCE_ON_SEG) &&
2703 (attr->dma_attr_seg > attr->dma_attr_addr_hi)) {
2704 return (DDI_DMA_BADATTR);
2705 }
2706 return (DDI_SUCCESS);
2707 }
2708
2709 /*
2710 * rootnex_valid_bind_parms()
2711 * Called in ddi_dma_*_bind_handle path to validate its parameters.
2712 */
2713 /* ARGSUSED */
2714 static int
rootnex_valid_bind_parms(ddi_dma_req_t * dmareq,ddi_dma_attr_t * attr)2715 rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr)
2716 {
2717 #if !defined(__amd64)
2718 /*
2719 * we only support up to a 2G-1 transfer size on 32-bit kernels so
2720 * we can track the offset for the obsoleted interfaces.
2721 */
2722 if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) {
2723 return (DDI_DMA_TOOBIG);
2724 }
2725 #endif
2726
2727 return (DDI_SUCCESS);
2728 }
2729
2730
2731 /*
2732 * rootnex_need_bounce_seg()
2733 * check to see if the buffer lives on both side of the seg.
2734 */
2735 static boolean_t
rootnex_need_bounce_seg(ddi_dma_obj_t * dmar_object,rootnex_sglinfo_t * sglinfo)2736 rootnex_need_bounce_seg(ddi_dma_obj_t *dmar_object, rootnex_sglinfo_t *sglinfo)
2737 {
2738 ddi_dma_atyp_t buftype;
2739 rootnex_addr_t raddr;
2740 boolean_t lower_addr;
2741 boolean_t upper_addr;
2742 uint64_t offset;
2743 page_t **pplist;
2744 uint64_t paddr;
2745 uint32_t psize;
2746 uint32_t size;
2747 caddr_t vaddr;
2748 uint_t pcnt;
2749 page_t *pp;
2750
2751
2752 /* shortcuts */
2753 pplist = dmar_object->dmao_obj.virt_obj.v_priv;
2754 vaddr = dmar_object->dmao_obj.virt_obj.v_addr;
2755 buftype = dmar_object->dmao_type;
2756 size = dmar_object->dmao_size;
2757
2758 lower_addr = B_FALSE;
2759 upper_addr = B_FALSE;
2760 pcnt = 0;
2761
2762 /*
2763 * Process the first page to handle the initial offset of the buffer.
2764 * We'll use the base address we get later when we loop through all
2765 * the pages.
2766 */
2767 if (buftype == DMA_OTYP_PAGES) {
2768 pp = dmar_object->dmao_obj.pp_obj.pp_pp;
2769 offset = dmar_object->dmao_obj.pp_obj.pp_offset &
2770 MMU_PAGEOFFSET;
2771 paddr = pfn_to_pa(pp->p_pagenum) + offset;
2772 psize = MIN(size, (MMU_PAGESIZE - offset));
2773 pp = pp->p_next;
2774 sglinfo->si_asp = NULL;
2775 } else if (pplist != NULL) {
2776 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2777 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2778 if (sglinfo->si_asp == NULL) {
2779 sglinfo->si_asp = &kas;
2780 }
2781 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
2782 paddr += offset;
2783 psize = MIN(size, (MMU_PAGESIZE - offset));
2784 pcnt++;
2785 } else {
2786 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2787 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2788 if (sglinfo->si_asp == NULL) {
2789 sglinfo->si_asp = &kas;
2790 }
2791 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr));
2792 paddr += offset;
2793 psize = MIN(size, (MMU_PAGESIZE - offset));
2794 vaddr += psize;
2795 }
2796
2797 raddr = ROOTNEX_PADDR_TO_RBASE(paddr);
2798
2799 if ((raddr + psize) > sglinfo->si_segmask) {
2800 upper_addr = B_TRUE;
2801 } else {
2802 lower_addr = B_TRUE;
2803 }
2804 size -= psize;
2805
2806 /*
2807 * Walk through the rest of the pages in the buffer. Track to see
2808 * if we have pages on both sides of the segment boundary.
2809 */
2810 while (size > 0) {
2811 /* partial or full page */
2812 psize = MIN(size, MMU_PAGESIZE);
2813
2814 if (buftype == DMA_OTYP_PAGES) {
2815 /* get the paddr from the page_t */
2816 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
2817 paddr = pfn_to_pa(pp->p_pagenum);
2818 pp = pp->p_next;
2819 } else if (pplist != NULL) {
2820 /* index into the array of page_t's to get the paddr */
2821 ASSERT(!PP_ISFREE(pplist[pcnt]));
2822 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
2823 pcnt++;
2824 } else {
2825 /* call into the VM to get the paddr */
2826 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat,
2827 vaddr));
2828 vaddr += psize;
2829 }
2830
2831 raddr = ROOTNEX_PADDR_TO_RBASE(paddr);
2832
2833 if ((raddr + psize) > sglinfo->si_segmask) {
2834 upper_addr = B_TRUE;
2835 } else {
2836 lower_addr = B_TRUE;
2837 }
2838 /*
2839 * if the buffer lives both above and below the segment
2840 * boundary, or the current page is the page immediately
2841 * after the segment, we will use a copy/bounce buffer for
2842 * all pages > seg.
2843 */
2844 if ((lower_addr && upper_addr) ||
2845 (raddr == (sglinfo->si_segmask + 1))) {
2846 return (B_TRUE);
2847 }
2848
2849 size -= psize;
2850 }
2851
2852 return (B_FALSE);
2853 }
2854
2855 /*
2856 * rootnex_get_sgl()
2857 * Called in bind fastpath to get the sgl. Most of this will be replaced
2858 * with a call to the vm layer when vm2.0 comes around...
2859 */
2860 static void
rootnex_get_sgl(ddi_dma_obj_t * dmar_object,ddi_dma_cookie_t * sgl,rootnex_sglinfo_t * sglinfo)2861 rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
2862 rootnex_sglinfo_t *sglinfo)
2863 {
2864 ddi_dma_atyp_t buftype;
2865 rootnex_addr_t raddr;
2866 uint64_t last_page;
2867 uint64_t offset;
2868 uint64_t addrhi;
2869 uint64_t addrlo;
2870 uint64_t maxseg;
2871 page_t **pplist;
2872 uint64_t paddr;
2873 uint32_t psize;
2874 uint32_t size;
2875 caddr_t vaddr;
2876 uint_t pcnt;
2877 page_t *pp;
2878 uint_t cnt;
2879
2880
2881 /* shortcuts */
2882 pplist = dmar_object->dmao_obj.virt_obj.v_priv;
2883 vaddr = dmar_object->dmao_obj.virt_obj.v_addr;
2884 maxseg = sglinfo->si_max_cookie_size;
2885 buftype = dmar_object->dmao_type;
2886 addrhi = sglinfo->si_max_addr;
2887 addrlo = sglinfo->si_min_addr;
2888 size = dmar_object->dmao_size;
2889
2890 pcnt = 0;
2891 cnt = 0;
2892
2893
2894 /*
2895 * check to see if we need to use the copy buffer for pages over
2896 * the segment attr.
2897 */
2898 sglinfo->si_bounce_on_seg = B_FALSE;
2899 if (sglinfo->si_flags & _DDI_DMA_BOUNCE_ON_SEG) {
2900 sglinfo->si_bounce_on_seg = rootnex_need_bounce_seg(
2901 dmar_object, sglinfo);
2902 }
2903
2904 /*
2905 * if we were passed down a linked list of pages, i.e. pointer to
2906 * page_t, use this to get our physical address and buf offset.
2907 */
2908 if (buftype == DMA_OTYP_PAGES) {
2909 pp = dmar_object->dmao_obj.pp_obj.pp_pp;
2910 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
2911 offset = dmar_object->dmao_obj.pp_obj.pp_offset &
2912 MMU_PAGEOFFSET;
2913 paddr = pfn_to_pa(pp->p_pagenum) + offset;
2914 psize = MIN(size, (MMU_PAGESIZE - offset));
2915 pp = pp->p_next;
2916 sglinfo->si_asp = NULL;
2917
2918 /*
2919 * We weren't passed down a linked list of pages, but if we were passed
2920 * down an array of pages, use this to get our physical address and buf
2921 * offset.
2922 */
2923 } else if (pplist != NULL) {
2924 ASSERT((buftype == DMA_OTYP_VADDR) ||
2925 (buftype == DMA_OTYP_BUFVADDR));
2926
2927 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2928 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2929 if (sglinfo->si_asp == NULL) {
2930 sglinfo->si_asp = &kas;
2931 }
2932
2933 ASSERT(!PP_ISFREE(pplist[pcnt]));
2934 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
2935 paddr += offset;
2936 psize = MIN(size, (MMU_PAGESIZE - offset));
2937 pcnt++;
2938
2939 /*
2940 * All we have is a virtual address, we'll need to call into the VM
2941 * to get the physical address.
2942 */
2943 } else {
2944 ASSERT((buftype == DMA_OTYP_VADDR) ||
2945 (buftype == DMA_OTYP_BUFVADDR));
2946
2947 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET;
2948 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as;
2949 if (sglinfo->si_asp == NULL) {
2950 sglinfo->si_asp = &kas;
2951 }
2952
2953 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr));
2954 paddr += offset;
2955 psize = MIN(size, (MMU_PAGESIZE - offset));
2956 vaddr += psize;
2957 }
2958
2959 raddr = ROOTNEX_PADDR_TO_RBASE(paddr);
2960
2961 /*
2962 * Setup the first cookie with the physical address of the page and the
2963 * size of the page (which takes into account the initial offset into
2964 * the page.
2965 */
2966 sgl[cnt].dmac_laddress = raddr;
2967 sgl[cnt].dmac_size = psize;
2968 sgl[cnt].dmac_type = 0;
2969
2970 /*
2971 * Save away the buffer offset into the page. We'll need this later in
2972 * the copy buffer code to help figure out the page index within the
2973 * buffer and the offset into the current page.
2974 */
2975 sglinfo->si_buf_offset = offset;
2976
2977 /*
2978 * If we are using the copy buffer for anything over the segment
2979 * boundary, and this page is over the segment boundary.
2980 * OR
2981 * if the DMA engine can't reach the physical address.
2982 */
2983 if (((sglinfo->si_bounce_on_seg) &&
2984 ((raddr + psize) > sglinfo->si_segmask)) ||
2985 ((raddr < addrlo) || ((raddr + psize) > addrhi))) {
2986 /*
2987 * Increase how much copy buffer we use. We always increase by
2988 * pagesize so we don't have to worry about converting offsets.
2989 * Set a flag in the cookies dmac_type to indicate that it uses
2990 * the copy buffer. If this isn't the last cookie, go to the
2991 * next cookie (since we separate each page which uses the copy
2992 * buffer in case the copy buffer is not physically contiguous.
2993 */
2994 sglinfo->si_copybuf_req += MMU_PAGESIZE;
2995 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
2996 if ((cnt + 1) < sglinfo->si_max_pages) {
2997 cnt++;
2998 sgl[cnt].dmac_laddress = 0;
2999 sgl[cnt].dmac_size = 0;
3000 sgl[cnt].dmac_type = 0;
3001 }
3002 }
3003
3004 /*
3005 * save this page's physical address so we can figure out if the next
3006 * page is physically contiguous. Keep decrementing size until we are
3007 * done with the buffer.
3008 */
3009 last_page = raddr & MMU_PAGEMASK;
3010 size -= psize;
3011
3012 while (size > 0) {
3013 /* Get the size for this page (i.e. partial or full page) */
3014 psize = MIN(size, MMU_PAGESIZE);
3015
3016 if (buftype == DMA_OTYP_PAGES) {
3017 /* get the paddr from the page_t */
3018 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp));
3019 paddr = pfn_to_pa(pp->p_pagenum);
3020 pp = pp->p_next;
3021 } else if (pplist != NULL) {
3022 /* index into the array of page_t's to get the paddr */
3023 ASSERT(!PP_ISFREE(pplist[pcnt]));
3024 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum);
3025 pcnt++;
3026 } else {
3027 /* call into the VM to get the paddr */
3028 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat,
3029 vaddr));
3030 vaddr += psize;
3031 }
3032
3033 raddr = ROOTNEX_PADDR_TO_RBASE(paddr);
3034
3035 /*
3036 * If we are using the copy buffer for anything over the
3037 * segment boundary, and this page is over the segment
3038 * boundary.
3039 * OR
3040 * if the DMA engine can't reach the physical address.
3041 */
3042 if (((sglinfo->si_bounce_on_seg) &&
3043 ((raddr + psize) > sglinfo->si_segmask)) ||
3044 ((raddr < addrlo) || ((raddr + psize) > addrhi))) {
3045
3046 sglinfo->si_copybuf_req += MMU_PAGESIZE;
3047
3048 /*
3049 * if there is something in the current cookie, go to
3050 * the next one. We only want one page in a cookie which
3051 * uses the copybuf since the copybuf doesn't have to
3052 * be physically contiguous.
3053 */
3054 if (sgl[cnt].dmac_size != 0) {
3055 cnt++;
3056 }
3057 sgl[cnt].dmac_laddress = raddr;
3058 sgl[cnt].dmac_size = psize;
3059 #if defined(__amd64)
3060 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF;
3061 #else
3062 /*
3063 * save the buf offset for 32-bit kernel. used in the
3064 * obsoleted interfaces.
3065 */
3066 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF |
3067 (dmar_object->dmao_size - size);
3068 #endif
3069 /* if this isn't the last cookie, go to the next one */
3070 if ((cnt + 1) < sglinfo->si_max_pages) {
3071 cnt++;
3072 sgl[cnt].dmac_laddress = 0;
3073 sgl[cnt].dmac_size = 0;
3074 sgl[cnt].dmac_type = 0;
3075 }
3076
3077 /*
3078 * this page didn't need the copy buffer, if it's not physically
3079 * contiguous, or it would put us over a segment boundary, or it
3080 * puts us over the max cookie size, or the current sgl doesn't
3081 * have anything in it.
3082 */
3083 } else if (((last_page + MMU_PAGESIZE) != raddr) ||
3084 !(raddr & sglinfo->si_segmask) ||
3085 ((sgl[cnt].dmac_size + psize) > maxseg) ||
3086 (sgl[cnt].dmac_size == 0)) {
3087 /*
3088 * if we're not already in a new cookie, go to the next
3089 * cookie.
3090 */
3091 if (sgl[cnt].dmac_size != 0) {
3092 cnt++;
3093 }
3094
3095 /* save the cookie information */
3096 sgl[cnt].dmac_laddress = raddr;
3097 sgl[cnt].dmac_size = psize;
3098 #if defined(__amd64)
3099 sgl[cnt].dmac_type = 0;
3100 #else
3101 /*
3102 * save the buf offset for 32-bit kernel. used in the
3103 * obsoleted interfaces.
3104 */
3105 sgl[cnt].dmac_type = dmar_object->dmao_size - size;
3106 #endif
3107
3108 /*
3109 * this page didn't need the copy buffer, it is physically
3110 * contiguous with the last page, and it's <= the max cookie
3111 * size.
3112 */
3113 } else {
3114 sgl[cnt].dmac_size += psize;
3115
3116 /*
3117 * if this exactly == the maximum cookie size, and
3118 * it isn't the last cookie, go to the next cookie.
3119 */
3120 if (((sgl[cnt].dmac_size + psize) == maxseg) &&
3121 ((cnt + 1) < sglinfo->si_max_pages)) {
3122 cnt++;
3123 sgl[cnt].dmac_laddress = 0;
3124 sgl[cnt].dmac_size = 0;
3125 sgl[cnt].dmac_type = 0;
3126 }
3127 }
3128
3129 /*
3130 * save this page's physical address so we can figure out if the
3131 * next page is physically contiguous. Keep decrementing size
3132 * until we are done with the buffer.
3133 */
3134 last_page = raddr;
3135 size -= psize;
3136 }
3137
3138 /* we're done, save away how many cookies the sgl has */
3139 if (sgl[cnt].dmac_size == 0) {
3140 ASSERT(cnt < sglinfo->si_max_pages);
3141 sglinfo->si_sgl_size = cnt;
3142 } else {
3143 sglinfo->si_sgl_size = cnt + 1;
3144 }
3145 }
3146
3147 static void
rootnex_dvma_get_sgl(ddi_dma_obj_t * dmar_object,ddi_dma_cookie_t * sgl,rootnex_sglinfo_t * sglinfo)3148 rootnex_dvma_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl,
3149 rootnex_sglinfo_t *sglinfo)
3150 {
3151 uint64_t offset;
3152 uint64_t maxseg;
3153 uint64_t dvaddr;
3154 struct dvmaseg *dvs;
3155 uint64_t paddr;
3156 uint32_t psize, ssize;
3157 uint32_t size;
3158 uint_t cnt;
3159 int physcontig;
3160
3161 ASSERT(dmar_object->dmao_type == DMA_OTYP_DVADDR);
3162
3163 /* shortcuts */
3164 maxseg = sglinfo->si_max_cookie_size;
3165 size = dmar_object->dmao_size;
3166
3167 cnt = 0;
3168 sglinfo->si_bounce_on_seg = B_FALSE;
3169
3170 dvs = dmar_object->dmao_obj.dvma_obj.dv_seg;
3171 offset = dmar_object->dmao_obj.dvma_obj.dv_off;
3172 ssize = dvs->dvs_len;
3173 paddr = dvs->dvs_start;
3174 paddr += offset;
3175 psize = MIN(ssize, (maxseg - offset));
3176 dvaddr = paddr + psize;
3177 ssize -= psize;
3178
3179 sgl[cnt].dmac_laddress = paddr;
3180 sgl[cnt].dmac_size = psize;
3181 sgl[cnt].dmac_type = 0;
3182
3183 size -= psize;
3184 while (size > 0) {
3185 if (ssize == 0) {
3186 dvs++;
3187 ssize = dvs->dvs_len;
3188 dvaddr = dvs->dvs_start;
3189 physcontig = 0;
3190 } else
3191 physcontig = 1;
3192
3193 paddr = dvaddr;
3194 psize = MIN(ssize, maxseg);
3195 dvaddr += psize;
3196 ssize -= psize;
3197
3198 if (!physcontig || !(paddr & sglinfo->si_segmask) ||
3199 ((sgl[cnt].dmac_size + psize) > maxseg) ||
3200 (sgl[cnt].dmac_size == 0)) {
3201 /*
3202 * if we're not already in a new cookie, go to the next
3203 * cookie.
3204 */
3205 if (sgl[cnt].dmac_size != 0) {
3206 cnt++;
3207 }
3208
3209 /* save the cookie information */
3210 sgl[cnt].dmac_laddress = paddr;
3211 sgl[cnt].dmac_size = psize;
3212 sgl[cnt].dmac_type = 0;
3213 } else {
3214 sgl[cnt].dmac_size += psize;
3215
3216 /*
3217 * if this exactly == the maximum cookie size, and
3218 * it isn't the last cookie, go to the next cookie.
3219 */
3220 if (((sgl[cnt].dmac_size + psize) == maxseg) &&
3221 ((cnt + 1) < sglinfo->si_max_pages)) {
3222 cnt++;
3223 sgl[cnt].dmac_laddress = 0;
3224 sgl[cnt].dmac_size = 0;
3225 sgl[cnt].dmac_type = 0;
3226 }
3227 }
3228 size -= psize;
3229 }
3230
3231 /* we're done, save away how many cookies the sgl has */
3232 if (sgl[cnt].dmac_size == 0) {
3233 sglinfo->si_sgl_size = cnt;
3234 } else {
3235 sglinfo->si_sgl_size = cnt + 1;
3236 }
3237 }
3238
3239 /*
3240 * rootnex_bind_slowpath()
3241 * Call in the bind path if the calling driver can't use the sgl without
3242 * modifying it. We either need to use the copy buffer and/or we will end up
3243 * with a partial bind.
3244 */
3245 static int
rootnex_bind_slowpath(ddi_dma_impl_t * hp,struct ddi_dma_req * dmareq,rootnex_dma_t * dma,ddi_dma_attr_t * attr,ddi_dma_obj_t * dmao,int kmflag)3246 rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
3247 rootnex_dma_t *dma, ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag)
3248 {
3249 rootnex_sglinfo_t *sinfo;
3250 rootnex_window_t *window;
3251 ddi_dma_cookie_t *cookie;
3252 size_t copybuf_used;
3253 size_t dmac_size;
3254 boolean_t partial;
3255 off_t cur_offset;
3256 page_t *cur_pp;
3257 major_t mnum;
3258 int e;
3259 int i;
3260
3261
3262 sinfo = &dma->dp_sglinfo;
3263 copybuf_used = 0;
3264 partial = B_FALSE;
3265
3266 /*
3267 * If we're using the copybuf, set the copybuf state in dma struct.
3268 * Needs to be first since it sets the copy buffer size.
3269 */
3270 if (sinfo->si_copybuf_req != 0) {
3271 e = rootnex_setup_copybuf(hp, dmareq, dma, attr);
3272 if (e != DDI_SUCCESS) {
3273 return (e);
3274 }
3275 } else {
3276 dma->dp_copybuf_size = 0;
3277 }
3278
3279 /*
3280 * Figure out if we need to do a partial mapping. If so, figure out
3281 * if we need to trim the buffers when we munge the sgl.
3282 */
3283 if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) ||
3284 (dmao->dmao_size > dma->dp_maxxfer) ||
3285 (attr->dma_attr_sgllen < sinfo->si_sgl_size)) {
3286 dma->dp_partial_required = B_TRUE;
3287 if (attr->dma_attr_granular != 1) {
3288 dma->dp_trim_required = B_TRUE;
3289 }
3290 } else {
3291 dma->dp_partial_required = B_FALSE;
3292 dma->dp_trim_required = B_FALSE;
3293 }
3294
3295 /* If we need to do a partial bind, make sure the driver supports it */
3296 if (dma->dp_partial_required &&
3297 !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) {
3298
3299 mnum = ddi_driver_major(dma->dp_dip);
3300 /*
3301 * patchable which allows us to print one warning per major
3302 * number.
3303 */
3304 if ((rootnex_bind_warn) &&
3305 ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) {
3306 rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING;
3307 cmn_err(CE_WARN, "!%s: coding error detected, the "
3308 "driver is using ddi_dma_attr(9S) incorrectly. "
3309 "There is a small risk of data corruption in "
3310 "particular with large I/Os. The driver should be "
3311 "replaced with a corrected version for proper "
3312 "system operation. To disable this warning, add "
3313 "'set rootnex:rootnex_bind_warn=0' to "
3314 "/etc/system(4).", ddi_driver_name(dma->dp_dip));
3315 }
3316 return (DDI_DMA_TOOBIG);
3317 }
3318
3319 /*
3320 * we might need multiple windows, setup state to handle them. In this
3321 * code path, we will have at least one window.
3322 */
3323 e = rootnex_setup_windows(hp, dma, attr, dmao, kmflag);
3324 if (e != DDI_SUCCESS) {
3325 rootnex_teardown_copybuf(dma);
3326 return (e);
3327 }
3328
3329 window = &dma->dp_window[0];
3330 cookie = &dma->dp_cookies[0];
3331 cur_offset = 0;
3332 rootnex_init_win(hp, dma, window, cookie, cur_offset);
3333 if (dmao->dmao_type == DMA_OTYP_PAGES) {
3334 cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp;
3335 }
3336
3337 /* loop though all the cookies we got back from get_sgl() */
3338 for (i = 0; i < sinfo->si_sgl_size; i++) {
3339 /*
3340 * If we're using the copy buffer, check this cookie and setup
3341 * its associated copy buffer state. If this cookie uses the
3342 * copy buffer, make sure we sync this window during dma_sync.
3343 */
3344 if (dma->dp_copybuf_size > 0) {
3345 rootnex_setup_cookie(dmao, dma, cookie,
3346 cur_offset, ©buf_used, &cur_pp);
3347 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3348 window->wd_dosync = B_TRUE;
3349 }
3350 }
3351
3352 /*
3353 * save away the cookie size, since it could be modified in
3354 * the windowing code.
3355 */
3356 dmac_size = cookie->dmac_size;
3357
3358 /* if we went over max copybuf size */
3359 if (dma->dp_copybuf_size &&
3360 (copybuf_used > dma->dp_copybuf_size)) {
3361 partial = B_TRUE;
3362 e = rootnex_copybuf_window_boundary(hp, dma, &window,
3363 cookie, cur_offset, ©buf_used);
3364 if (e != DDI_SUCCESS) {
3365 rootnex_teardown_copybuf(dma);
3366 rootnex_teardown_windows(dma);
3367 return (e);
3368 }
3369
3370 /*
3371 * if the coookie uses the copy buffer, make sure the
3372 * new window we just moved to is set to sync.
3373 */
3374 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3375 window->wd_dosync = B_TRUE;
3376 }
3377 ROOTNEX_DPROBE1(rootnex__copybuf__window, dev_info_t *,
3378 dma->dp_dip);
3379
3380 /* if the cookie cnt == max sgllen, move to the next window */
3381 } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) {
3382 partial = B_TRUE;
3383 ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen);
3384 e = rootnex_sgllen_window_boundary(hp, dma, &window,
3385 cookie, attr, cur_offset);
3386 if (e != DDI_SUCCESS) {
3387 rootnex_teardown_copybuf(dma);
3388 rootnex_teardown_windows(dma);
3389 return (e);
3390 }
3391
3392 /*
3393 * if the coookie uses the copy buffer, make sure the
3394 * new window we just moved to is set to sync.
3395 */
3396 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3397 window->wd_dosync = B_TRUE;
3398 }
3399 ROOTNEX_DPROBE1(rootnex__sgllen__window, dev_info_t *,
3400 dma->dp_dip);
3401
3402 /* else if we will be over maxxfer */
3403 } else if ((window->wd_size + dmac_size) >
3404 dma->dp_maxxfer) {
3405 partial = B_TRUE;
3406 e = rootnex_maxxfer_window_boundary(hp, dma, &window,
3407 cookie);
3408 if (e != DDI_SUCCESS) {
3409 rootnex_teardown_copybuf(dma);
3410 rootnex_teardown_windows(dma);
3411 return (e);
3412 }
3413
3414 /*
3415 * if the coookie uses the copy buffer, make sure the
3416 * new window we just moved to is set to sync.
3417 */
3418 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3419 window->wd_dosync = B_TRUE;
3420 }
3421 ROOTNEX_DPROBE1(rootnex__maxxfer__window, dev_info_t *,
3422 dma->dp_dip);
3423
3424 /* else this cookie fits in the current window */
3425 } else {
3426 window->wd_cookie_cnt++;
3427 window->wd_size += dmac_size;
3428 }
3429
3430 /* track our offset into the buffer, go to the next cookie */
3431 ASSERT(dmac_size <= dmao->dmao_size);
3432 ASSERT(cookie->dmac_size <= dmac_size);
3433 cur_offset += dmac_size;
3434 cookie++;
3435 }
3436
3437 /* if we ended up with a zero sized window in the end, clean it up */
3438 if (window->wd_size == 0) {
3439 hp->dmai_nwin--;
3440 window--;
3441 }
3442
3443 ASSERT(window->wd_trim.tr_trim_last == B_FALSE);
3444
3445 if (!partial) {
3446 return (DDI_DMA_MAPPED);
3447 }
3448
3449 ASSERT(dma->dp_partial_required);
3450 return (DDI_DMA_PARTIAL_MAP);
3451 }
3452
3453 /*
3454 * rootnex_setup_copybuf()
3455 * Called in bind slowpath. Figures out if we're going to use the copy
3456 * buffer, and if we do, sets up the basic state to handle it.
3457 */
3458 static int
rootnex_setup_copybuf(ddi_dma_impl_t * hp,struct ddi_dma_req * dmareq,rootnex_dma_t * dma,ddi_dma_attr_t * attr)3459 rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq,
3460 rootnex_dma_t *dma, ddi_dma_attr_t *attr)
3461 {
3462 rootnex_sglinfo_t *sinfo;
3463 ddi_dma_attr_t lattr;
3464 size_t max_copybuf;
3465 int cansleep;
3466 int e;
3467 #if !defined(__amd64)
3468 int vmflag;
3469 #endif
3470
3471 ASSERT(!dma->dp_dvma_used);
3472
3473 sinfo = &dma->dp_sglinfo;
3474
3475 /* read this first so it's consistent through the routine */
3476 max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK;
3477
3478 /* We need to call into the rootnex on ddi_dma_sync() */
3479 hp->dmai_rflags &= ~DMP_NOSYNC;
3480
3481 /* make sure the copybuf size <= the max size */
3482 dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf);
3483 ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0);
3484
3485 #if !defined(__amd64)
3486 /*
3487 * if we don't have kva space to copy to/from, allocate the KVA space
3488 * now. We only do this for the 32-bit kernel. We use seg kpm space for
3489 * the 64-bit kernel.
3490 */
3491 if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) ||
3492 (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) {
3493
3494 /* convert the sleep flags */
3495 if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
3496 vmflag = VM_SLEEP;
3497 } else {
3498 vmflag = VM_NOSLEEP;
3499 }
3500
3501 /* allocate Kernel VA space that we can bcopy to/from */
3502 dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size,
3503 vmflag);
3504 if (dma->dp_kva == NULL) {
3505 return (DDI_DMA_NORESOURCES);
3506 }
3507 }
3508 #endif
3509
3510 /* convert the sleep flags */
3511 if (dmareq->dmar_fp == DDI_DMA_SLEEP) {
3512 cansleep = 1;
3513 } else {
3514 cansleep = 0;
3515 }
3516
3517 /*
3518 * Allocate the actual copy buffer. This needs to fit within the DMA
3519 * engine limits, so we can't use kmem_alloc... We don't need
3520 * contiguous memory (sgllen) since we will be forcing windows on
3521 * sgllen anyway.
3522 */
3523 lattr = *attr;
3524 lattr.dma_attr_align = MMU_PAGESIZE;
3525 /*
3526 * this should be < 0 to indicate no limit, but due to a bug in
3527 * the rootnex, we'll set it to the maximum positive int.
3528 */
3529 lattr.dma_attr_sgllen = 0x7fffffff;
3530 /*
3531 * if we're using the copy buffer because of seg, use that for our
3532 * upper address limit.
3533 */
3534 if (sinfo->si_bounce_on_seg) {
3535 lattr.dma_attr_addr_hi = lattr.dma_attr_seg;
3536 }
3537 e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep,
3538 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL);
3539 if (e != DDI_SUCCESS) {
3540 #if !defined(__amd64)
3541 if (dma->dp_kva != NULL) {
3542 vmem_free(heap_arena, dma->dp_kva,
3543 dma->dp_copybuf_size);
3544 }
3545 #endif
3546 return (DDI_DMA_NORESOURCES);
3547 }
3548
3549 ROOTNEX_DPROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip,
3550 size_t, dma->dp_copybuf_size);
3551
3552 return (DDI_SUCCESS);
3553 }
3554
3555
3556 /*
3557 * rootnex_setup_windows()
3558 * Called in bind slowpath to setup the window state. We always have windows
3559 * in the slowpath. Even if the window count = 1.
3560 */
3561 static int
rootnex_setup_windows(ddi_dma_impl_t * hp,rootnex_dma_t * dma,ddi_dma_attr_t * attr,ddi_dma_obj_t * dmao,int kmflag)3562 rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
3563 ddi_dma_attr_t *attr, ddi_dma_obj_t *dmao, int kmflag)
3564 {
3565 rootnex_window_t *windowp;
3566 rootnex_sglinfo_t *sinfo;
3567 size_t copy_state_size;
3568 size_t win_state_size;
3569 size_t state_available;
3570 size_t space_needed;
3571 uint_t copybuf_win;
3572 uint_t maxxfer_win;
3573 size_t space_used;
3574 uint_t sglwin;
3575
3576
3577 sinfo = &dma->dp_sglinfo;
3578
3579 dma->dp_current_win = 0;
3580 hp->dmai_nwin = 0;
3581
3582 /* If we don't need to do a partial, we only have one window */
3583 if (!dma->dp_partial_required) {
3584 dma->dp_max_win = 1;
3585
3586 /*
3587 * we need multiple windows, need to figure out the worse case number
3588 * of windows.
3589 */
3590 } else {
3591 /*
3592 * if we need windows because we need more copy buffer that
3593 * we allow, the worse case number of windows we could need
3594 * here would be (copybuf space required / copybuf space that
3595 * we have) plus one for remainder, and plus 2 to handle the
3596 * extra pages on the trim for the first and last pages of the
3597 * buffer (a page is the minimum window size so under the right
3598 * attr settings, you could have a window for each page).
3599 * The last page will only be hit here if the size is not a
3600 * multiple of the granularity (which theoretically shouldn't
3601 * be the case but never has been enforced, so we could have
3602 * broken things without it).
3603 */
3604 if (sinfo->si_copybuf_req > dma->dp_copybuf_size) {
3605 ASSERT(dma->dp_copybuf_size > 0);
3606 copybuf_win = (sinfo->si_copybuf_req /
3607 dma->dp_copybuf_size) + 1 + 2;
3608 } else {
3609 copybuf_win = 0;
3610 }
3611
3612 /*
3613 * if we need windows because we have more cookies than the H/W
3614 * can handle, the number of windows we would need here would
3615 * be (cookie count / cookies count H/W supports minus 1[for
3616 * trim]) plus one for remainder.
3617 */
3618 if (attr->dma_attr_sgllen < sinfo->si_sgl_size) {
3619 sglwin = (sinfo->si_sgl_size /
3620 (attr->dma_attr_sgllen - 1)) + 1;
3621 } else {
3622 sglwin = 0;
3623 }
3624
3625 /*
3626 * if we need windows because we're binding more memory than the
3627 * H/W can transfer at once, the number of windows we would need
3628 * here would be (xfer count / max xfer H/W supports) plus one
3629 * for remainder, and plus 2 to handle the extra pages on the
3630 * trim (see above comment about trim)
3631 */
3632 if (dmao->dmao_size > dma->dp_maxxfer) {
3633 maxxfer_win = (dmao->dmao_size /
3634 dma->dp_maxxfer) + 1 + 2;
3635 } else {
3636 maxxfer_win = 0;
3637 }
3638 dma->dp_max_win = copybuf_win + sglwin + maxxfer_win;
3639 ASSERT(dma->dp_max_win > 0);
3640 }
3641 win_state_size = dma->dp_max_win * sizeof (rootnex_window_t);
3642
3643 /*
3644 * Get space for window and potential copy buffer state. Before we
3645 * go and allocate memory, see if we can get away with using what's
3646 * left in the pre-allocted state or the dynamically allocated sgl.
3647 */
3648 space_used = (uintptr_t)(sinfo->si_sgl_size *
3649 sizeof (ddi_dma_cookie_t));
3650
3651 /* if we dynamically allocated space for the cookies */
3652 if (dma->dp_need_to_free_cookie) {
3653 /* if we have more space in the pre-allocted buffer, use it */
3654 ASSERT(space_used <= dma->dp_cookie_size);
3655 if ((dma->dp_cookie_size - space_used) <=
3656 rootnex_state->r_prealloc_size) {
3657 state_available = rootnex_state->r_prealloc_size;
3658 windowp = (rootnex_window_t *)dma->dp_prealloc_buffer;
3659
3660 /*
3661 * else, we have more free space in the dynamically allocated
3662 * buffer, i.e. the buffer wasn't worse case fragmented so we
3663 * didn't need a lot of cookies.
3664 */
3665 } else {
3666 state_available = dma->dp_cookie_size - space_used;
3667 windowp = (rootnex_window_t *)
3668 &dma->dp_cookies[sinfo->si_sgl_size];
3669 }
3670
3671 /* we used the pre-alloced buffer */
3672 } else {
3673 ASSERT(space_used <= rootnex_state->r_prealloc_size);
3674 state_available = rootnex_state->r_prealloc_size - space_used;
3675 windowp = (rootnex_window_t *)
3676 &dma->dp_cookies[sinfo->si_sgl_size];
3677 }
3678
3679 /*
3680 * figure out how much state we need to track the copy buffer. Add an
3681 * addition 8 bytes for pointer alignemnt later.
3682 */
3683 if (dma->dp_copybuf_size > 0) {
3684 copy_state_size = sinfo->si_max_pages *
3685 sizeof (rootnex_pgmap_t);
3686 } else {
3687 copy_state_size = 0;
3688 }
3689 /* add an additional 8 bytes for pointer alignment */
3690 space_needed = win_state_size + copy_state_size + 0x8;
3691
3692 /* if we have enough space already, use it */
3693 if (state_available >= space_needed) {
3694 dma->dp_window = windowp;
3695 dma->dp_need_to_free_window = B_FALSE;
3696
3697 /* not enough space, need to allocate more. */
3698 } else {
3699 dma->dp_window = kmem_alloc(space_needed, kmflag);
3700 if (dma->dp_window == NULL) {
3701 return (DDI_DMA_NORESOURCES);
3702 }
3703 dma->dp_need_to_free_window = B_TRUE;
3704 dma->dp_window_size = space_needed;
3705 ROOTNEX_DPROBE2(rootnex__bind__sp__alloc, dev_info_t *,
3706 dma->dp_dip, size_t, space_needed);
3707 }
3708
3709 /*
3710 * we allocate copy buffer state and window state at the same time.
3711 * setup our copy buffer state pointers. Make sure it's aligned.
3712 */
3713 if (dma->dp_copybuf_size > 0) {
3714 dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t)
3715 &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7);
3716
3717 #if !defined(__amd64)
3718 /*
3719 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to
3720 * false/NULL. Should be quicker to bzero vs loop and set.
3721 */
3722 bzero(dma->dp_pgmap, copy_state_size);
3723 #endif
3724 } else {
3725 dma->dp_pgmap = NULL;
3726 }
3727
3728 return (DDI_SUCCESS);
3729 }
3730
3731
3732 /*
3733 * rootnex_teardown_copybuf()
3734 * cleans up after rootnex_setup_copybuf()
3735 */
3736 static void
rootnex_teardown_copybuf(rootnex_dma_t * dma)3737 rootnex_teardown_copybuf(rootnex_dma_t *dma)
3738 {
3739 #if !defined(__amd64)
3740 int i;
3741
3742 /*
3743 * if we allocated kernel heap VMEM space, go through all the pages and
3744 * map out any of the ones that we're mapped into the kernel heap VMEM
3745 * arena. Then free the VMEM space.
3746 */
3747 if (dma->dp_kva != NULL) {
3748 for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) {
3749 if (dma->dp_pgmap[i].pm_mapped) {
3750 hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr,
3751 MMU_PAGESIZE, HAT_UNLOAD);
3752 dma->dp_pgmap[i].pm_mapped = B_FALSE;
3753 }
3754 }
3755
3756 vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size);
3757 }
3758
3759 #endif
3760
3761 /* if we allocated a copy buffer, free it */
3762 if (dma->dp_cbaddr != NULL) {
3763 i_ddi_mem_free(dma->dp_cbaddr, NULL);
3764 }
3765 }
3766
3767
3768 /*
3769 * rootnex_teardown_windows()
3770 * cleans up after rootnex_setup_windows()
3771 */
3772 static void
rootnex_teardown_windows(rootnex_dma_t * dma)3773 rootnex_teardown_windows(rootnex_dma_t *dma)
3774 {
3775 /*
3776 * if we had to allocate window state on the last bind (because we
3777 * didn't have enough pre-allocated space in the handle), free it.
3778 */
3779 if (dma->dp_need_to_free_window) {
3780 kmem_free(dma->dp_window, dma->dp_window_size);
3781 }
3782 }
3783
3784
3785 /*
3786 * rootnex_init_win()
3787 * Called in bind slow path during creation of a new window. Initializes
3788 * window state to default values.
3789 */
3790 /*ARGSUSED*/
3791 static void
rootnex_init_win(ddi_dma_impl_t * hp,rootnex_dma_t * dma,rootnex_window_t * window,ddi_dma_cookie_t * cookie,off_t cur_offset)3792 rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
3793 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset)
3794 {
3795 hp->dmai_nwin++;
3796 window->wd_dosync = B_FALSE;
3797 window->wd_offset = cur_offset;
3798 window->wd_size = 0;
3799 window->wd_first_cookie = cookie;
3800 window->wd_cookie_cnt = 0;
3801 window->wd_trim.tr_trim_first = B_FALSE;
3802 window->wd_trim.tr_trim_last = B_FALSE;
3803 window->wd_trim.tr_first_copybuf_win = B_FALSE;
3804 window->wd_trim.tr_last_copybuf_win = B_FALSE;
3805 #if !defined(__amd64)
3806 window->wd_remap_copybuf = dma->dp_cb_remaping;
3807 #endif
3808 }
3809
3810
3811 /*
3812 * rootnex_setup_cookie()
3813 * Called in the bind slow path when the sgl uses the copy buffer. If any of
3814 * the sgl uses the copy buffer, we need to go through each cookie, figure
3815 * out if it uses the copy buffer, and if it does, save away everything we'll
3816 * need during sync.
3817 */
3818 static void
rootnex_setup_cookie(ddi_dma_obj_t * dmar_object,rootnex_dma_t * dma,ddi_dma_cookie_t * cookie,off_t cur_offset,size_t * copybuf_used,page_t ** cur_pp)3819 rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma,
3820 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used,
3821 page_t **cur_pp)
3822 {
3823 boolean_t copybuf_sz_power_2;
3824 rootnex_sglinfo_t *sinfo;
3825 paddr_t paddr;
3826 uint_t pidx;
3827 uint_t pcnt;
3828 off_t poff;
3829 #if defined(__amd64)
3830 pfn_t pfn;
3831 #else
3832 page_t **pplist;
3833 #endif
3834
3835 ASSERT(dmar_object->dmao_type != DMA_OTYP_DVADDR);
3836
3837 sinfo = &dma->dp_sglinfo;
3838
3839 /*
3840 * Calculate the page index relative to the start of the buffer. The
3841 * index to the current page for our buffer is the offset into the
3842 * first page of the buffer plus our current offset into the buffer
3843 * itself, shifted of course...
3844 */
3845 pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT;
3846 ASSERT(pidx < sinfo->si_max_pages);
3847
3848 /* if this cookie uses the copy buffer */
3849 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
3850 /*
3851 * NOTE: we know that since this cookie uses the copy buffer, it
3852 * is <= MMU_PAGESIZE.
3853 */
3854
3855 /*
3856 * get the offset into the page. For the 64-bit kernel, get the
3857 * pfn which we'll use with seg kpm.
3858 */
3859 poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
3860 #if defined(__amd64)
3861 /* mfn_to_pfn() is a NOP on i86pc */
3862 pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT);
3863 #endif /* __amd64 */
3864
3865 /* figure out if the copybuf size is a power of 2 */
3866 if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) {
3867 copybuf_sz_power_2 = B_FALSE;
3868 } else {
3869 copybuf_sz_power_2 = B_TRUE;
3870 }
3871
3872 /* This page uses the copy buffer */
3873 dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE;
3874
3875 /*
3876 * save the copy buffer KVA that we'll use with this page.
3877 * if we still fit within the copybuf, it's a simple add.
3878 * otherwise, we need to wrap over using & or % accordingly.
3879 */
3880 if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) {
3881 dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr +
3882 *copybuf_used;
3883 } else {
3884 if (copybuf_sz_power_2) {
3885 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
3886 (uintptr_t)dma->dp_cbaddr +
3887 (*copybuf_used &
3888 (dma->dp_copybuf_size - 1)));
3889 } else {
3890 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)(
3891 (uintptr_t)dma->dp_cbaddr +
3892 (*copybuf_used % dma->dp_copybuf_size));
3893 }
3894 }
3895
3896 /*
3897 * over write the cookie physical address with the address of
3898 * the physical address of the copy buffer page that we will
3899 * use.
3900 */
3901 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
3902 dma->dp_pgmap[pidx].pm_cbaddr)) + poff;
3903
3904 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(paddr);
3905
3906 /* if we have a kernel VA, it's easy, just save that address */
3907 if ((dmar_object->dmao_type != DMA_OTYP_PAGES) &&
3908 (sinfo->si_asp == &kas)) {
3909 /*
3910 * save away the page aligned virtual address of the
3911 * driver buffer. Offsets are handled in the sync code.
3912 */
3913 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t)
3914 dmar_object->dmao_obj.virt_obj.v_addr + cur_offset)
3915 & MMU_PAGEMASK);
3916 #if !defined(__amd64)
3917 /*
3918 * we didn't need to, and will never need to map this
3919 * page.
3920 */
3921 dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
3922 #endif
3923
3924 /* we don't have a kernel VA. We need one for the bcopy. */
3925 } else {
3926 #if defined(__amd64)
3927 /*
3928 * for the 64-bit kernel, it's easy. We use seg kpm to
3929 * get a Kernel VA for the corresponding pfn.
3930 */
3931 dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn);
3932 #else
3933 /*
3934 * for the 32-bit kernel, this is a pain. First we'll
3935 * save away the page_t or user VA for this page. This
3936 * is needed in rootnex_dma_win() when we switch to a
3937 * new window which requires us to re-map the copy
3938 * buffer.
3939 */
3940 pplist = dmar_object->dmao_obj.virt_obj.v_priv;
3941 if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
3942 dma->dp_pgmap[pidx].pm_pp = *cur_pp;
3943 dma->dp_pgmap[pidx].pm_vaddr = NULL;
3944 } else if (pplist != NULL) {
3945 dma->dp_pgmap[pidx].pm_pp = pplist[pidx];
3946 dma->dp_pgmap[pidx].pm_vaddr = NULL;
3947 } else {
3948 dma->dp_pgmap[pidx].pm_pp = NULL;
3949 dma->dp_pgmap[pidx].pm_vaddr = (caddr_t)
3950 (((uintptr_t)
3951 dmar_object->dmao_obj.virt_obj.v_addr +
3952 cur_offset) & MMU_PAGEMASK);
3953 }
3954
3955 /*
3956 * save away the page aligned virtual address which was
3957 * allocated from the kernel heap arena (taking into
3958 * account if we need more copy buffer than we alloced
3959 * and use multiple windows to handle this, i.e. &,%).
3960 * NOTE: there isn't and physical memory backing up this
3961 * virtual address space currently.
3962 */
3963 if ((*copybuf_used + MMU_PAGESIZE) <=
3964 dma->dp_copybuf_size) {
3965 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
3966 (((uintptr_t)dma->dp_kva + *copybuf_used) &
3967 MMU_PAGEMASK);
3968 } else {
3969 if (copybuf_sz_power_2) {
3970 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
3971 (((uintptr_t)dma->dp_kva +
3972 (*copybuf_used &
3973 (dma->dp_copybuf_size - 1))) &
3974 MMU_PAGEMASK);
3975 } else {
3976 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)
3977 (((uintptr_t)dma->dp_kva +
3978 (*copybuf_used %
3979 dma->dp_copybuf_size)) &
3980 MMU_PAGEMASK);
3981 }
3982 }
3983
3984 /*
3985 * if we haven't used up the available copy buffer yet,
3986 * map the kva to the physical page.
3987 */
3988 if (!dma->dp_cb_remaping && ((*copybuf_used +
3989 MMU_PAGESIZE) <= dma->dp_copybuf_size)) {
3990 dma->dp_pgmap[pidx].pm_mapped = B_TRUE;
3991 if (dma->dp_pgmap[pidx].pm_pp != NULL) {
3992 i86_pp_map(dma->dp_pgmap[pidx].pm_pp,
3993 dma->dp_pgmap[pidx].pm_kaddr);
3994 } else {
3995 i86_va_map(dma->dp_pgmap[pidx].pm_vaddr,
3996 sinfo->si_asp,
3997 dma->dp_pgmap[pidx].pm_kaddr);
3998 }
3999
4000 /*
4001 * we've used up the available copy buffer, this page
4002 * will have to be mapped during rootnex_dma_win() when
4003 * we switch to a new window which requires a re-map
4004 * the copy buffer. (32-bit kernel only)
4005 */
4006 } else {
4007 dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
4008 }
4009 #endif
4010 /* go to the next page_t */
4011 if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
4012 *cur_pp = (*cur_pp)->p_next;
4013 }
4014 }
4015
4016 /* add to the copy buffer count */
4017 *copybuf_used += MMU_PAGESIZE;
4018
4019 /*
4020 * This cookie doesn't use the copy buffer. Walk through the pages this
4021 * cookie occupies to reflect this.
4022 */
4023 } else {
4024 /*
4025 * figure out how many pages the cookie occupies. We need to
4026 * use the original page offset of the buffer and the cookies
4027 * offset in the buffer to do this.
4028 */
4029 poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET;
4030 pcnt = mmu_btopr(cookie->dmac_size + poff);
4031
4032 while (pcnt > 0) {
4033 #if !defined(__amd64)
4034 /*
4035 * the 32-bit kernel doesn't have seg kpm, so we need
4036 * to map in the driver buffer (if it didn't come down
4037 * with a kernel VA) on the fly. Since this page doesn't
4038 * use the copy buffer, it's not, or will it ever, have
4039 * to be mapped in.
4040 */
4041 dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
4042 #endif
4043 dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE;
4044
4045 /*
4046 * we need to update pidx and cur_pp or we'll loose
4047 * track of where we are.
4048 */
4049 if (dmar_object->dmao_type == DMA_OTYP_PAGES) {
4050 *cur_pp = (*cur_pp)->p_next;
4051 }
4052 pidx++;
4053 pcnt--;
4054 }
4055 }
4056 }
4057
4058
4059 /*
4060 * rootnex_sgllen_window_boundary()
4061 * Called in the bind slow path when the next cookie causes us to exceed (in
4062 * this case == since we start at 0 and sgllen starts at 1) the maximum sgl
4063 * length supported by the DMA H/W.
4064 */
4065 static int
rootnex_sgllen_window_boundary(ddi_dma_impl_t * hp,rootnex_dma_t * dma,rootnex_window_t ** windowp,ddi_dma_cookie_t * cookie,ddi_dma_attr_t * attr,off_t cur_offset)4066 rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
4067 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr,
4068 off_t cur_offset)
4069 {
4070 off_t new_offset;
4071 size_t trim_sz;
4072 off_t coffset;
4073
4074
4075 /*
4076 * if we know we'll never have to trim, it's pretty easy. Just move to
4077 * the next window and init it. We're done.
4078 */
4079 if (!dma->dp_trim_required) {
4080 (*windowp)++;
4081 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
4082 (*windowp)->wd_cookie_cnt++;
4083 (*windowp)->wd_size = cookie->dmac_size;
4084 return (DDI_SUCCESS);
4085 }
4086
4087 /* figure out how much we need to trim from the window */
4088 ASSERT(attr->dma_attr_granular != 0);
4089 if (dma->dp_granularity_power_2) {
4090 trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1);
4091 } else {
4092 trim_sz = (*windowp)->wd_size % attr->dma_attr_granular;
4093 }
4094
4095 /* The window's a whole multiple of granularity. We're done */
4096 if (trim_sz == 0) {
4097 (*windowp)++;
4098 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
4099 (*windowp)->wd_cookie_cnt++;
4100 (*windowp)->wd_size = cookie->dmac_size;
4101 return (DDI_SUCCESS);
4102 }
4103
4104 /*
4105 * The window's not a whole multiple of granularity, since we know this
4106 * is due to the sgllen, we need to go back to the last cookie and trim
4107 * that one, add the left over part of the old cookie into the new
4108 * window, and then add in the new cookie into the new window.
4109 */
4110
4111 /*
4112 * make sure the driver isn't making us do something bad... Trimming and
4113 * sgllen == 1 don't go together.
4114 */
4115 if (attr->dma_attr_sgllen == 1) {
4116 return (DDI_DMA_NOMAPPING);
4117 }
4118
4119 /*
4120 * first, setup the current window to account for the trim. Need to go
4121 * back to the last cookie for this.
4122 */
4123 cookie--;
4124 (*windowp)->wd_trim.tr_trim_last = B_TRUE;
4125 (*windowp)->wd_trim.tr_last_cookie = cookie;
4126 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
4127 ASSERT(cookie->dmac_size > trim_sz);
4128 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
4129 (*windowp)->wd_size -= trim_sz;
4130
4131 /* save the buffer offsets for the next window */
4132 coffset = cookie->dmac_size - trim_sz;
4133 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
4134
4135 /*
4136 * set this now in case this is the first window. all other cases are
4137 * set in dma_win()
4138 */
4139 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
4140
4141 /*
4142 * initialize the next window using what's left over in the previous
4143 * cookie.
4144 */
4145 (*windowp)++;
4146 rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
4147 (*windowp)->wd_cookie_cnt++;
4148 (*windowp)->wd_trim.tr_trim_first = B_TRUE;
4149 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
4150 (*windowp)->wd_trim.tr_first_size = trim_sz;
4151 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
4152 (*windowp)->wd_dosync = B_TRUE;
4153 }
4154
4155 /*
4156 * now go back to the current cookie and add it to the new window. set
4157 * the new window size to the what was left over from the previous
4158 * cookie and what's in the current cookie.
4159 */
4160 cookie++;
4161 (*windowp)->wd_cookie_cnt++;
4162 (*windowp)->wd_size = trim_sz + cookie->dmac_size;
4163
4164 /*
4165 * trim plus the next cookie could put us over maxxfer (a cookie can be
4166 * a max size of maxxfer). Handle that case.
4167 */
4168 if ((*windowp)->wd_size > dma->dp_maxxfer) {
4169 /*
4170 * maxxfer is already a whole multiple of granularity, and this
4171 * trim will be <= the previous trim (since a cookie can't be
4172 * larger than maxxfer). Make things simple here.
4173 */
4174 trim_sz = (*windowp)->wd_size - dma->dp_maxxfer;
4175 (*windowp)->wd_trim.tr_trim_last = B_TRUE;
4176 (*windowp)->wd_trim.tr_last_cookie = cookie;
4177 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
4178 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
4179 (*windowp)->wd_size -= trim_sz;
4180 ASSERT((*windowp)->wd_size == dma->dp_maxxfer);
4181
4182 /* save the buffer offsets for the next window */
4183 coffset = cookie->dmac_size - trim_sz;
4184 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
4185
4186 /* setup the next window */
4187 (*windowp)++;
4188 rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
4189 (*windowp)->wd_cookie_cnt++;
4190 (*windowp)->wd_trim.tr_trim_first = B_TRUE;
4191 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
4192 coffset;
4193 (*windowp)->wd_trim.tr_first_size = trim_sz;
4194 }
4195
4196 return (DDI_SUCCESS);
4197 }
4198
4199
4200 /*
4201 * rootnex_copybuf_window_boundary()
4202 * Called in bind slowpath when we get to a window boundary because we used
4203 * up all the copy buffer that we have.
4204 */
4205 static int
rootnex_copybuf_window_boundary(ddi_dma_impl_t * hp,rootnex_dma_t * dma,rootnex_window_t ** windowp,ddi_dma_cookie_t * cookie,off_t cur_offset,size_t * copybuf_used)4206 rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
4207 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset,
4208 size_t *copybuf_used)
4209 {
4210 rootnex_sglinfo_t *sinfo;
4211 off_t new_offset;
4212 size_t trim_sz;
4213 paddr_t paddr;
4214 off_t coffset;
4215 uint_t pidx;
4216 off_t poff;
4217
4218
4219 sinfo = &dma->dp_sglinfo;
4220
4221 /*
4222 * the copy buffer should be a whole multiple of page size. We know that
4223 * this cookie is <= MMU_PAGESIZE.
4224 */
4225 ASSERT(cookie->dmac_size <= MMU_PAGESIZE);
4226
4227 /*
4228 * from now on, all new windows in this bind need to be re-mapped during
4229 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf
4230 * space...
4231 */
4232 #if !defined(__amd64)
4233 dma->dp_cb_remaping = B_TRUE;
4234 #endif
4235
4236 /* reset copybuf used */
4237 *copybuf_used = 0;
4238
4239 /*
4240 * if we don't have to trim (since granularity is set to 1), go to the
4241 * next window and add the current cookie to it. We know the current
4242 * cookie uses the copy buffer since we're in this code path.
4243 */
4244 if (!dma->dp_trim_required) {
4245 (*windowp)++;
4246 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
4247
4248 /* Add this cookie to the new window */
4249 (*windowp)->wd_cookie_cnt++;
4250 (*windowp)->wd_size += cookie->dmac_size;
4251 *copybuf_used += MMU_PAGESIZE;
4252 return (DDI_SUCCESS);
4253 }
4254
4255 /*
4256 * *** may need to trim, figure it out.
4257 */
4258
4259 /* figure out how much we need to trim from the window */
4260 if (dma->dp_granularity_power_2) {
4261 trim_sz = (*windowp)->wd_size &
4262 (hp->dmai_attr.dma_attr_granular - 1);
4263 } else {
4264 trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular;
4265 }
4266
4267 /*
4268 * if the window's a whole multiple of granularity, go to the next
4269 * window, init it, then add in the current cookie. We know the current
4270 * cookie uses the copy buffer since we're in this code path.
4271 */
4272 if (trim_sz == 0) {
4273 (*windowp)++;
4274 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset);
4275
4276 /* Add this cookie to the new window */
4277 (*windowp)->wd_cookie_cnt++;
4278 (*windowp)->wd_size += cookie->dmac_size;
4279 *copybuf_used += MMU_PAGESIZE;
4280 return (DDI_SUCCESS);
4281 }
4282
4283 /*
4284 * *** We figured it out, we definitly need to trim
4285 */
4286
4287 /*
4288 * make sure the driver isn't making us do something bad...
4289 * Trimming and sgllen == 1 don't go together.
4290 */
4291 if (hp->dmai_attr.dma_attr_sgllen == 1) {
4292 return (DDI_DMA_NOMAPPING);
4293 }
4294
4295 /*
4296 * first, setup the current window to account for the trim. Need to go
4297 * back to the last cookie for this. Some of the last cookie will be in
4298 * the current window, and some of the last cookie will be in the new
4299 * window. All of the current cookie will be in the new window.
4300 */
4301 cookie--;
4302 (*windowp)->wd_trim.tr_trim_last = B_TRUE;
4303 (*windowp)->wd_trim.tr_last_cookie = cookie;
4304 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
4305 ASSERT(cookie->dmac_size > trim_sz);
4306 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
4307 (*windowp)->wd_size -= trim_sz;
4308
4309 /*
4310 * we're trimming the last cookie (not the current cookie). So that
4311 * last cookie may have or may not have been using the copy buffer (
4312 * we know the cookie passed in uses the copy buffer since we're in
4313 * this code path).
4314 *
4315 * If the last cookie doesn't use the copy buffer, nothing special to
4316 * do. However, if it does uses the copy buffer, it will be both the
4317 * last page in the current window and the first page in the next
4318 * window. Since we are reusing the copy buffer (and KVA space on the
4319 * 32-bit kernel), this page will use the end of the copy buffer in the
4320 * current window, and the start of the copy buffer in the next window.
4321 * Track that info... The cookie physical address was already set to
4322 * the copy buffer physical address in setup_cookie..
4323 */
4324 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
4325 pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset +
4326 (*windowp)->wd_size) >> MMU_PAGESHIFT;
4327 (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE;
4328 (*windowp)->wd_trim.tr_last_pidx = pidx;
4329 (*windowp)->wd_trim.tr_last_cbaddr =
4330 dma->dp_pgmap[pidx].pm_cbaddr;
4331 #if !defined(__amd64)
4332 (*windowp)->wd_trim.tr_last_kaddr =
4333 dma->dp_pgmap[pidx].pm_kaddr;
4334 #endif
4335 }
4336
4337 /* save the buffer offsets for the next window */
4338 coffset = cookie->dmac_size - trim_sz;
4339 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
4340
4341 /*
4342 * set this now in case this is the first window. all other cases are
4343 * set in dma_win()
4344 */
4345 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
4346
4347 /*
4348 * initialize the next window using what's left over in the previous
4349 * cookie.
4350 */
4351 (*windowp)++;
4352 rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
4353 (*windowp)->wd_cookie_cnt++;
4354 (*windowp)->wd_trim.tr_trim_first = B_TRUE;
4355 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset;
4356 (*windowp)->wd_trim.tr_first_size = trim_sz;
4357
4358 /*
4359 * again, we're tracking if the last cookie uses the copy buffer.
4360 * read the comment above for more info on why we need to track
4361 * additional state.
4362 *
4363 * For the first cookie in the new window, we need reset the physical
4364 * address to DMA into to the start of the copy buffer plus any
4365 * initial page offset which may be present.
4366 */
4367 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) {
4368 (*windowp)->wd_dosync = B_TRUE;
4369 (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE;
4370 (*windowp)->wd_trim.tr_first_pidx = pidx;
4371 (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr;
4372 poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET;
4373
4374 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) +
4375 poff;
4376 (*windowp)->wd_trim.tr_first_paddr =
4377 ROOTNEX_PADDR_TO_RBASE(paddr);
4378
4379 #if !defined(__amd64)
4380 (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva;
4381 #endif
4382 /* account for the cookie copybuf usage in the new window */
4383 *copybuf_used += MMU_PAGESIZE;
4384
4385 /*
4386 * every piece of code has to have a hack, and here is this
4387 * ones :-)
4388 *
4389 * There is a complex interaction between setup_cookie and the
4390 * copybuf window boundary. The complexity had to be in either
4391 * the maxxfer window, or the copybuf window, and I chose the
4392 * copybuf code.
4393 *
4394 * So in this code path, we have taken the last cookie,
4395 * virtually broken it in half due to the trim, and it happens
4396 * to use the copybuf which further complicates life. At the
4397 * same time, we have already setup the current cookie, which
4398 * is now wrong. More background info: the current cookie uses
4399 * the copybuf, so it is only a page long max. So we need to
4400 * fix the current cookies copy buffer address, physical
4401 * address, and kva for the 32-bit kernel. We due this by
4402 * bumping them by page size (of course, we can't due this on
4403 * the physical address since the copy buffer may not be
4404 * physically contiguous).
4405 */
4406 cookie++;
4407 dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE;
4408 poff = cookie->dmac_laddress & MMU_PAGEOFFSET;
4409
4410 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat,
4411 dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff;
4412 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(paddr);
4413
4414 #if !defined(__amd64)
4415 ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE);
4416 dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE;
4417 #endif
4418 } else {
4419 /* go back to the current cookie */
4420 cookie++;
4421 }
4422
4423 /*
4424 * add the current cookie to the new window. set the new window size to
4425 * the what was left over from the previous cookie and what's in the
4426 * current cookie.
4427 */
4428 (*windowp)->wd_cookie_cnt++;
4429 (*windowp)->wd_size = trim_sz + cookie->dmac_size;
4430 ASSERT((*windowp)->wd_size < dma->dp_maxxfer);
4431
4432 /*
4433 * we know that the cookie passed in always uses the copy buffer. We
4434 * wouldn't be here if it didn't.
4435 */
4436 *copybuf_used += MMU_PAGESIZE;
4437
4438 return (DDI_SUCCESS);
4439 }
4440
4441
4442 /*
4443 * rootnex_maxxfer_window_boundary()
4444 * Called in bind slowpath when we get to a window boundary because we will
4445 * go over maxxfer.
4446 */
4447 static int
rootnex_maxxfer_window_boundary(ddi_dma_impl_t * hp,rootnex_dma_t * dma,rootnex_window_t ** windowp,ddi_dma_cookie_t * cookie)4448 rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma,
4449 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie)
4450 {
4451 size_t dmac_size;
4452 off_t new_offset;
4453 size_t trim_sz;
4454 off_t coffset;
4455
4456
4457 /*
4458 * calculate how much we have to trim off of the current cookie to equal
4459 * maxxfer. We don't have to account for granularity here since our
4460 * maxxfer already takes that into account.
4461 */
4462 trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer;
4463 ASSERT(trim_sz <= cookie->dmac_size);
4464 ASSERT(trim_sz <= dma->dp_maxxfer);
4465
4466 /* save cookie size since we need it later and we might change it */
4467 dmac_size = cookie->dmac_size;
4468
4469 /*
4470 * if we're not trimming the entire cookie, setup the current window to
4471 * account for the trim.
4472 */
4473 if (trim_sz < cookie->dmac_size) {
4474 (*windowp)->wd_cookie_cnt++;
4475 (*windowp)->wd_trim.tr_trim_last = B_TRUE;
4476 (*windowp)->wd_trim.tr_last_cookie = cookie;
4477 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress;
4478 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz;
4479 (*windowp)->wd_size = dma->dp_maxxfer;
4480
4481 /*
4482 * set the adjusted cookie size now in case this is the first
4483 * window. All other windows are taken care of in get win
4484 */
4485 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size;
4486 }
4487
4488 /*
4489 * coffset is the current offset within the cookie, new_offset is the
4490 * current offset with the entire buffer.
4491 */
4492 coffset = dmac_size - trim_sz;
4493 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size;
4494
4495 /* initialize the next window */
4496 (*windowp)++;
4497 rootnex_init_win(hp, dma, *windowp, cookie, new_offset);
4498 (*windowp)->wd_cookie_cnt++;
4499 (*windowp)->wd_size = trim_sz;
4500 if (trim_sz < dmac_size) {
4501 (*windowp)->wd_trim.tr_trim_first = B_TRUE;
4502 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress +
4503 coffset;
4504 (*windowp)->wd_trim.tr_first_size = trim_sz;
4505 }
4506
4507 return (DDI_SUCCESS);
4508 }
4509
4510
4511 /*ARGSUSED*/
4512 static int
rootnex_coredma_sync(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,off_t off,size_t len,uint_t cache_flags)4513 rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4514 off_t off, size_t len, uint_t cache_flags)
4515 {
4516 rootnex_sglinfo_t *sinfo;
4517 rootnex_pgmap_t *cbpage;
4518 rootnex_window_t *win;
4519 ddi_dma_impl_t *hp;
4520 rootnex_dma_t *dma;
4521 caddr_t fromaddr;
4522 caddr_t toaddr;
4523 uint_t psize;
4524 off_t offset;
4525 uint_t pidx;
4526 size_t size;
4527 off_t poff;
4528 int e;
4529
4530
4531 hp = (ddi_dma_impl_t *)handle;
4532 dma = (rootnex_dma_t *)hp->dmai_private;
4533 sinfo = &dma->dp_sglinfo;
4534
4535 /*
4536 * if we don't have any windows, we don't need to sync. A copybuf
4537 * will cause us to have at least one window.
4538 */
4539 if (dma->dp_window == NULL) {
4540 return (DDI_SUCCESS);
4541 }
4542
4543 /* This window may not need to be sync'd */
4544 win = &dma->dp_window[dma->dp_current_win];
4545 if (!win->wd_dosync) {
4546 return (DDI_SUCCESS);
4547 }
4548
4549 /* handle off and len special cases */
4550 if ((off == 0) || (rootnex_sync_ignore_params)) {
4551 offset = win->wd_offset;
4552 } else {
4553 offset = off;
4554 }
4555 if ((len == 0) || (rootnex_sync_ignore_params)) {
4556 size = win->wd_size;
4557 } else {
4558 size = len;
4559 }
4560
4561 /* check the sync args to make sure they make a little sense */
4562 if (rootnex_sync_check_parms) {
4563 e = rootnex_valid_sync_parms(hp, win, offset, size,
4564 cache_flags);
4565 if (e != DDI_SUCCESS) {
4566 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]);
4567 return (DDI_FAILURE);
4568 }
4569 }
4570
4571 /*
4572 * special case the first page to handle the offset into the page. The
4573 * offset to the current page for our buffer is the offset into the
4574 * first page of the buffer plus our current offset into the buffer
4575 * itself, masked of course.
4576 */
4577 poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET;
4578 psize = MIN((MMU_PAGESIZE - poff), size);
4579
4580 /* go through all the pages that we want to sync */
4581 while (size > 0) {
4582 /*
4583 * Calculate the page index relative to the start of the buffer.
4584 * The index to the current page for our buffer is the offset
4585 * into the first page of the buffer plus our current offset
4586 * into the buffer itself, shifted of course...
4587 */
4588 pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT;
4589 ASSERT(pidx < sinfo->si_max_pages);
4590
4591 /*
4592 * if this page uses the copy buffer, we need to sync it,
4593 * otherwise, go on to the next page.
4594 */
4595 cbpage = &dma->dp_pgmap[pidx];
4596 ASSERT((cbpage->pm_uses_copybuf == B_TRUE) ||
4597 (cbpage->pm_uses_copybuf == B_FALSE));
4598 if (cbpage->pm_uses_copybuf) {
4599 /* cbaddr and kaddr should be page aligned */
4600 ASSERT(((uintptr_t)cbpage->pm_cbaddr &
4601 MMU_PAGEOFFSET) == 0);
4602 ASSERT(((uintptr_t)cbpage->pm_kaddr &
4603 MMU_PAGEOFFSET) == 0);
4604
4605 /*
4606 * if we're copying for the device, we are going to
4607 * copy from the drivers buffer and to the rootnex
4608 * allocated copy buffer.
4609 */
4610 if (cache_flags == DDI_DMA_SYNC_FORDEV) {
4611 fromaddr = cbpage->pm_kaddr + poff;
4612 toaddr = cbpage->pm_cbaddr + poff;
4613 ROOTNEX_DPROBE2(rootnex__sync__dev,
4614 dev_info_t *, dma->dp_dip, size_t, psize);
4615
4616 /*
4617 * if we're copying for the cpu/kernel, we are going to
4618 * copy from the rootnex allocated copy buffer to the
4619 * drivers buffer.
4620 */
4621 } else {
4622 fromaddr = cbpage->pm_cbaddr + poff;
4623 toaddr = cbpage->pm_kaddr + poff;
4624 ROOTNEX_DPROBE2(rootnex__sync__cpu,
4625 dev_info_t *, dma->dp_dip, size_t, psize);
4626 }
4627
4628 bcopy(fromaddr, toaddr, psize);
4629 }
4630
4631 /*
4632 * decrement size until we're done, update our offset into the
4633 * buffer, and get the next page size.
4634 */
4635 size -= psize;
4636 offset += psize;
4637 psize = MIN(MMU_PAGESIZE, size);
4638
4639 /* page offset is zero for the rest of this loop */
4640 poff = 0;
4641 }
4642
4643 return (DDI_SUCCESS);
4644 }
4645
4646 /*
4647 * rootnex_dma_sync()
4648 * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags.
4649 * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC
4650 * is set, ddi_dma_sync() returns immediately passing back success.
4651 */
4652 /*ARGSUSED*/
4653 static int
rootnex_dma_sync(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,off_t off,size_t len,uint_t cache_flags)4654 rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4655 off_t off, size_t len, uint_t cache_flags)
4656 {
4657 #if defined(__amd64) && !defined(__xpv)
4658 if (IOMMU_USED(rdip)) {
4659 return (iommulib_nexdma_sync(dip, rdip, handle, off, len,
4660 cache_flags));
4661 }
4662 #endif
4663 return (rootnex_coredma_sync(dip, rdip, handle, off, len,
4664 cache_flags));
4665 }
4666
4667 /*
4668 * rootnex_valid_sync_parms()
4669 * checks the parameters passed to sync to verify they are correct.
4670 */
4671 static int
rootnex_valid_sync_parms(ddi_dma_impl_t * hp,rootnex_window_t * win,off_t offset,size_t size,uint_t cache_flags)4672 rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win,
4673 off_t offset, size_t size, uint_t cache_flags)
4674 {
4675 off_t woffset;
4676
4677
4678 /*
4679 * the first part of the test to make sure the offset passed in is
4680 * within the window.
4681 */
4682 if (offset < win->wd_offset) {
4683 return (DDI_FAILURE);
4684 }
4685
4686 /*
4687 * second and last part of the test to make sure the offset and length
4688 * passed in is within the window.
4689 */
4690 woffset = offset - win->wd_offset;
4691 if ((woffset + size) > win->wd_size) {
4692 return (DDI_FAILURE);
4693 }
4694
4695 /*
4696 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should
4697 * be set too.
4698 */
4699 if ((cache_flags == DDI_DMA_SYNC_FORDEV) &&
4700 (hp->dmai_rflags & DDI_DMA_WRITE)) {
4701 return (DDI_SUCCESS);
4702 }
4703
4704 /*
4705 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL
4706 * should be set. Also DDI_DMA_READ should be set in the flags.
4707 */
4708 if (((cache_flags == DDI_DMA_SYNC_FORCPU) ||
4709 (cache_flags == DDI_DMA_SYNC_FORKERNEL)) &&
4710 (hp->dmai_rflags & DDI_DMA_READ)) {
4711 return (DDI_SUCCESS);
4712 }
4713
4714 return (DDI_FAILURE);
4715 }
4716
4717
4718 /*ARGSUSED*/
4719 static int
rootnex_coredma_win(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,uint_t win,off_t * offp,size_t * lenp,ddi_dma_cookie_t * cookiep,uint_t * ccountp)4720 rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4721 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
4722 uint_t *ccountp)
4723 {
4724 rootnex_window_t *window;
4725 rootnex_trim_t *trim;
4726 ddi_dma_impl_t *hp;
4727 rootnex_dma_t *dma;
4728 ddi_dma_obj_t *dmao;
4729 #if !defined(__amd64)
4730 rootnex_sglinfo_t *sinfo;
4731 rootnex_pgmap_t *pmap;
4732 uint_t pidx;
4733 uint_t pcnt;
4734 off_t poff;
4735 int i;
4736 #endif
4737
4738
4739 hp = (ddi_dma_impl_t *)handle;
4740 dma = (rootnex_dma_t *)hp->dmai_private;
4741 #if !defined(__amd64)
4742 sinfo = &dma->dp_sglinfo;
4743 #endif
4744
4745 /* If we try and get a window which doesn't exist, return failure */
4746 if (win >= hp->dmai_nwin) {
4747 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
4748 return (DDI_FAILURE);
4749 }
4750
4751 dmao = dma->dp_dvma_used ? &dma->dp_dma : &dma->dp_dvma;
4752
4753 /*
4754 * if we don't have any windows, and they're asking for the first
4755 * window, setup the cookie pointer to the first cookie in the bind.
4756 * setup our return values, then increment the cookie since we return
4757 * the first cookie on the stack.
4758 */
4759 if (dma->dp_window == NULL) {
4760 if (win != 0) {
4761 ROOTNEX_DPROF_INC(
4762 &rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]);
4763 return (DDI_FAILURE);
4764 }
4765 hp->dmai_cookie = dma->dp_cookies;
4766 *offp = 0;
4767 *lenp = dmao->dmao_size;
4768 *ccountp = dma->dp_sglinfo.si_sgl_size;
4769 *cookiep = hp->dmai_cookie[0];
4770 hp->dmai_cookie++;
4771 return (DDI_SUCCESS);
4772 }
4773
4774 /* sync the old window before moving on to the new one */
4775 window = &dma->dp_window[dma->dp_current_win];
4776 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) {
4777 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
4778 DDI_DMA_SYNC_FORCPU);
4779 }
4780
4781 #if !defined(__amd64)
4782 /*
4783 * before we move to the next window, if we need to re-map, unmap all
4784 * the pages in this window.
4785 */
4786 if (dma->dp_cb_remaping) {
4787 /*
4788 * If we switch to this window again, we'll need to map in
4789 * on the fly next time.
4790 */
4791 window->wd_remap_copybuf = B_TRUE;
4792
4793 /*
4794 * calculate the page index into the buffer where this window
4795 * starts, and the number of pages this window takes up.
4796 */
4797 pidx = (sinfo->si_buf_offset + window->wd_offset) >>
4798 MMU_PAGESHIFT;
4799 poff = (sinfo->si_buf_offset + window->wd_offset) &
4800 MMU_PAGEOFFSET;
4801 pcnt = mmu_btopr(window->wd_size + poff);
4802 ASSERT((pidx + pcnt) <= sinfo->si_max_pages);
4803
4804 /* unmap pages which are currently mapped in this window */
4805 for (i = 0; i < pcnt; i++) {
4806 if (dma->dp_pgmap[pidx].pm_mapped) {
4807 hat_unload(kas.a_hat,
4808 dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE,
4809 HAT_UNLOAD);
4810 dma->dp_pgmap[pidx].pm_mapped = B_FALSE;
4811 }
4812 pidx++;
4813 }
4814 }
4815 #endif
4816
4817 /*
4818 * Move to the new window.
4819 * NOTE: current_win must be set for sync to work right
4820 */
4821 dma->dp_current_win = win;
4822 window = &dma->dp_window[win];
4823
4824 /* if needed, adjust the first and/or last cookies for trim */
4825 trim = &window->wd_trim;
4826 if (trim->tr_trim_first) {
4827 window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr;
4828 window->wd_first_cookie->dmac_size = trim->tr_first_size;
4829 #if !defined(__amd64)
4830 window->wd_first_cookie->dmac_type =
4831 (window->wd_first_cookie->dmac_type &
4832 ROOTNEX_USES_COPYBUF) + window->wd_offset;
4833 #endif
4834 if (trim->tr_first_copybuf_win) {
4835 dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr =
4836 trim->tr_first_cbaddr;
4837 #if !defined(__amd64)
4838 dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr =
4839 trim->tr_first_kaddr;
4840 #endif
4841 }
4842 }
4843 if (trim->tr_trim_last) {
4844 trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr;
4845 trim->tr_last_cookie->dmac_size = trim->tr_last_size;
4846 if (trim->tr_last_copybuf_win) {
4847 dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr =
4848 trim->tr_last_cbaddr;
4849 #if !defined(__amd64)
4850 dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr =
4851 trim->tr_last_kaddr;
4852 #endif
4853 }
4854 }
4855
4856 /*
4857 * setup the cookie pointer to the first cookie in the window. setup
4858 * our return values, then increment the cookie since we return the
4859 * first cookie on the stack.
4860 */
4861 hp->dmai_cookie = window->wd_first_cookie;
4862 *offp = window->wd_offset;
4863 *lenp = window->wd_size;
4864 *ccountp = window->wd_cookie_cnt;
4865 *cookiep = hp->dmai_cookie[0];
4866 hp->dmai_cookie++;
4867
4868 #if !defined(__amd64)
4869 /* re-map copybuf if required for this window */
4870 if (dma->dp_cb_remaping) {
4871 /*
4872 * calculate the page index into the buffer where this
4873 * window starts.
4874 */
4875 pidx = (sinfo->si_buf_offset + window->wd_offset) >>
4876 MMU_PAGESHIFT;
4877 ASSERT(pidx < sinfo->si_max_pages);
4878
4879 /*
4880 * the first page can get unmapped if it's shared with the
4881 * previous window. Even if the rest of this window is already
4882 * mapped in, we need to still check this one.
4883 */
4884 pmap = &dma->dp_pgmap[pidx];
4885 if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) {
4886 if (pmap->pm_pp != NULL) {
4887 pmap->pm_mapped = B_TRUE;
4888 i86_pp_map(pmap->pm_pp, pmap->pm_kaddr);
4889 } else if (pmap->pm_vaddr != NULL) {
4890 pmap->pm_mapped = B_TRUE;
4891 i86_va_map(pmap->pm_vaddr, sinfo->si_asp,
4892 pmap->pm_kaddr);
4893 }
4894 }
4895 pidx++;
4896
4897 /* map in the rest of the pages if required */
4898 if (window->wd_remap_copybuf) {
4899 window->wd_remap_copybuf = B_FALSE;
4900
4901 /* figure out many pages this window takes up */
4902 poff = (sinfo->si_buf_offset + window->wd_offset) &
4903 MMU_PAGEOFFSET;
4904 pcnt = mmu_btopr(window->wd_size + poff);
4905 ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages);
4906
4907 /* map pages which require it */
4908 for (i = 1; i < pcnt; i++) {
4909 pmap = &dma->dp_pgmap[pidx];
4910 if (pmap->pm_uses_copybuf) {
4911 ASSERT(pmap->pm_mapped == B_FALSE);
4912 if (pmap->pm_pp != NULL) {
4913 pmap->pm_mapped = B_TRUE;
4914 i86_pp_map(pmap->pm_pp,
4915 pmap->pm_kaddr);
4916 } else if (pmap->pm_vaddr != NULL) {
4917 pmap->pm_mapped = B_TRUE;
4918 i86_va_map(pmap->pm_vaddr,
4919 sinfo->si_asp,
4920 pmap->pm_kaddr);
4921 }
4922 }
4923 pidx++;
4924 }
4925 }
4926 }
4927 #endif
4928
4929 /* if the new window uses the copy buffer, sync it for the device */
4930 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) {
4931 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0,
4932 DDI_DMA_SYNC_FORDEV);
4933 }
4934
4935 return (DDI_SUCCESS);
4936 }
4937
4938 /*
4939 * rootnex_dma_win()
4940 * called from ddi_dma_getwin()
4941 */
4942 /*ARGSUSED*/
4943 static int
rootnex_dma_win(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,uint_t win,off_t * offp,size_t * lenp,ddi_dma_cookie_t * cookiep,uint_t * ccountp)4944 rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
4945 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep,
4946 uint_t *ccountp)
4947 {
4948 #if defined(__amd64) && !defined(__xpv)
4949 if (IOMMU_USED(rdip)) {
4950 return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp,
4951 cookiep, ccountp));
4952 }
4953 #endif
4954
4955 return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp,
4956 cookiep, ccountp));
4957 }
4958
4959 #if defined(__amd64) && !defined(__xpv)
4960 /*ARGSUSED*/
4961 static int
rootnex_coredma_hdl_setprivate(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,void * v)4962 rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip,
4963 ddi_dma_handle_t handle, void *v)
4964 {
4965 ddi_dma_impl_t *hp;
4966 rootnex_dma_t *dma;
4967
4968 hp = (ddi_dma_impl_t *)handle;
4969 dma = (rootnex_dma_t *)hp->dmai_private;
4970 dma->dp_iommu_private = v;
4971
4972 return (DDI_SUCCESS);
4973 }
4974
4975 /*ARGSUSED*/
4976 static void *
rootnex_coredma_hdl_getprivate(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle)4977 rootnex_coredma_hdl_getprivate(dev_info_t *dip, dev_info_t *rdip,
4978 ddi_dma_handle_t handle)
4979 {
4980 ddi_dma_impl_t *hp;
4981 rootnex_dma_t *dma;
4982
4983 hp = (ddi_dma_impl_t *)handle;
4984 dma = (rootnex_dma_t *)hp->dmai_private;
4985
4986 return (dma->dp_iommu_private);
4987 }
4988 #endif
4989
4990 /*
4991 * ************************
4992 * obsoleted dma routines
4993 * ************************
4994 */
4995
4996 /*
4997 * rootnex_dma_map()
4998 * called from ddi_dma_setup()
4999 * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode.
5000 */
5001 /* ARGSUSED */
5002 static int
rootnex_dma_map(dev_info_t * dip,dev_info_t * rdip,struct ddi_dma_req * dmareq,ddi_dma_handle_t * handlep)5003 rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip,
5004 struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep)
5005 {
5006 #if defined(__amd64)
5007 /*
5008 * this interface is not supported in 64-bit x86 kernel. See comment in
5009 * rootnex_dma_mctl()
5010 */
5011 return (DDI_DMA_NORESOURCES);
5012
5013 #else /* 32-bit x86 kernel */
5014 ddi_dma_handle_t *lhandlep;
5015 ddi_dma_handle_t lhandle;
5016 ddi_dma_cookie_t cookie;
5017 ddi_dma_attr_t dma_attr;
5018 ddi_dma_lim_t *dma_lim;
5019 uint_t ccnt;
5020 int e;
5021
5022
5023 /*
5024 * if the driver is just testing to see if it's possible to do the bind,
5025 * we'll use local state. Otherwise, use the handle pointer passed in.
5026 */
5027 if (handlep == NULL) {
5028 lhandlep = &lhandle;
5029 } else {
5030 lhandlep = handlep;
5031 }
5032
5033 /* convert the limit structure to a dma_attr one */
5034 dma_lim = dmareq->dmar_limits;
5035 dma_attr.dma_attr_version = DMA_ATTR_V0;
5036 dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo;
5037 dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi;
5038 dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer;
5039 dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max;
5040 dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max;
5041 dma_attr.dma_attr_granular = dma_lim->dlim_granular;
5042 dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen;
5043 dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize;
5044 dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes;
5045 dma_attr.dma_attr_align = MMU_PAGESIZE;
5046 dma_attr.dma_attr_flags = 0;
5047
5048 e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp,
5049 dmareq->dmar_arg, lhandlep);
5050 if (e != DDI_SUCCESS) {
5051 return (e);
5052 }
5053
5054 e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt);
5055 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) {
5056 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
5057 return (e);
5058 }
5059
5060 /*
5061 * if the driver is just testing to see if it's possible to do the bind,
5062 * free up the local state and return the result.
5063 */
5064 if (handlep == NULL) {
5065 (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep);
5066 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep);
5067 if (e == DDI_DMA_MAPPED) {
5068 return (DDI_DMA_MAPOK);
5069 } else {
5070 return (DDI_DMA_NOMAPPING);
5071 }
5072 }
5073
5074 return (e);
5075 #endif /* defined(__amd64) */
5076 }
5077
5078 /*
5079 * rootnex_dma_mctl()
5080 *
5081 * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode.
5082 */
5083 /* ARGSUSED */
5084 static int
rootnex_dma_mctl(dev_info_t * dip,dev_info_t * rdip,ddi_dma_handle_t handle,enum ddi_dma_ctlops request,off_t * offp,size_t * lenp,caddr_t * objpp,uint_t cache_flags)5085 rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle,
5086 enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp,
5087 uint_t cache_flags)
5088 {
5089 #if defined(__amd64)
5090 /*
5091 * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a
5092 * common implementation in genunix, so they no longer have x86
5093 * specific functionality which called into dma_ctl.
5094 *
5095 * The rest of the obsoleted interfaces were never supported in the
5096 * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface
5097 * was not ported to the x86 64-bit kernel do to serious x86 rootnex
5098 * implementation issues.
5099 *
5100 * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and
5101 * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we
5102 * reflect that now too...
5103 *
5104 * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are
5105 * not going to put this functionality into the 64-bit x86 kernel now.
5106 * It wasn't ported to the 64-bit kernel for s10, no reason to change
5107 * that in a future release.
5108 */
5109 return (DDI_FAILURE);
5110
5111 #else /* 32-bit x86 kernel */
5112 ddi_dma_cookie_t lcookie;
5113 ddi_dma_cookie_t *cookie;
5114 rootnex_window_t *window;
5115 ddi_dma_impl_t *hp;
5116 rootnex_dma_t *dma;
5117 uint_t nwin;
5118 uint_t ccnt;
5119 size_t len;
5120 off_t off;
5121 int e;
5122
5123
5124 /*
5125 * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little
5126 * hacky since were optimizing for the current interfaces and so we can
5127 * cleanup the mess in genunix. Hopefully we will remove the this
5128 * obsoleted routines someday soon.
5129 */
5130
5131 switch (request) {
5132
5133 case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */
5134 hp = (ddi_dma_impl_t *)handle;
5135 cookie = (ddi_dma_cookie_t *)objpp;
5136
5137 /*
5138 * convert segment to cookie. We don't distinguish between the
5139 * two :-)
5140 */
5141 *cookie = *hp->dmai_cookie;
5142 *lenp = cookie->dmac_size;
5143 *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF;
5144 return (DDI_SUCCESS);
5145
5146 case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */
5147 hp = (ddi_dma_impl_t *)handle;
5148 dma = (rootnex_dma_t *)hp->dmai_private;
5149
5150 if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) {
5151 return (DDI_DMA_STALE);
5152 }
5153
5154 /* handle the case where we don't have any windows */
5155 if (dma->dp_window == NULL) {
5156 /*
5157 * if seg == NULL, and we don't have any windows,
5158 * return the first cookie in the sgl.
5159 */
5160 if (*lenp == NULL) {
5161 dma->dp_current_cookie = 0;
5162 hp->dmai_cookie = dma->dp_cookies;
5163 *objpp = (caddr_t)handle;
5164 return (DDI_SUCCESS);
5165
5166 /* if we have more cookies, go to the next cookie */
5167 } else {
5168 if ((dma->dp_current_cookie + 1) >=
5169 dma->dp_sglinfo.si_sgl_size) {
5170 return (DDI_DMA_DONE);
5171 }
5172 dma->dp_current_cookie++;
5173 hp->dmai_cookie++;
5174 return (DDI_SUCCESS);
5175 }
5176 }
5177
5178 /* We have one or more windows */
5179 window = &dma->dp_window[dma->dp_current_win];
5180
5181 /*
5182 * if seg == NULL, return the first cookie in the current
5183 * window
5184 */
5185 if (*lenp == NULL) {
5186 dma->dp_current_cookie = 0;
5187 hp->dmai_cookie = window->wd_first_cookie;
5188
5189 /*
5190 * go to the next cookie in the window then see if we done with
5191 * this window.
5192 */
5193 } else {
5194 if ((dma->dp_current_cookie + 1) >=
5195 window->wd_cookie_cnt) {
5196 return (DDI_DMA_DONE);
5197 }
5198 dma->dp_current_cookie++;
5199 hp->dmai_cookie++;
5200 }
5201 *objpp = (caddr_t)handle;
5202 return (DDI_SUCCESS);
5203
5204 case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */
5205 hp = (ddi_dma_impl_t *)handle;
5206 dma = (rootnex_dma_t *)hp->dmai_private;
5207
5208 if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) {
5209 return (DDI_DMA_STALE);
5210 }
5211
5212 /* if win == NULL, return the first window in the bind */
5213 if (*offp == NULL) {
5214 nwin = 0;
5215
5216 /*
5217 * else, go to the next window then see if we're done with all
5218 * the windows.
5219 */
5220 } else {
5221 nwin = dma->dp_current_win + 1;
5222 if (nwin >= hp->dmai_nwin) {
5223 return (DDI_DMA_DONE);
5224 }
5225 }
5226
5227 /* switch to the next window */
5228 e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len,
5229 &lcookie, &ccnt);
5230 ASSERT(e == DDI_SUCCESS);
5231 if (e != DDI_SUCCESS) {
5232 return (DDI_DMA_STALE);
5233 }
5234
5235 /* reset the cookie back to the first cookie in the window */
5236 if (dma->dp_window != NULL) {
5237 window = &dma->dp_window[dma->dp_current_win];
5238 hp->dmai_cookie = window->wd_first_cookie;
5239 } else {
5240 hp->dmai_cookie = dma->dp_cookies;
5241 }
5242
5243 *objpp = (caddr_t)handle;
5244 return (DDI_SUCCESS);
5245
5246 case DDI_DMA_FREE: /* ddi_dma_free() */
5247 (void) rootnex_dma_unbindhdl(dip, rdip, handle);
5248 (void) rootnex_dma_freehdl(dip, rdip, handle);
5249 if (rootnex_state->r_dvma_call_list_id) {
5250 ddi_run_callback(&rootnex_state->r_dvma_call_list_id);
5251 }
5252 return (DDI_SUCCESS);
5253
5254 case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */
5255 case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */
5256 /* should never get here, handled in genunix */
5257 ASSERT(0);
5258 return (DDI_FAILURE);
5259
5260 case DDI_DMA_KVADDR:
5261 case DDI_DMA_GETERR:
5262 case DDI_DMA_COFF:
5263 return (DDI_FAILURE);
5264 }
5265
5266 return (DDI_FAILURE);
5267 #endif /* defined(__amd64) */
5268 }
5269
5270 /*
5271 * *********
5272 * FMA Code
5273 * *********
5274 */
5275
5276 /*
5277 * rootnex_fm_init()
5278 * FMA init busop
5279 */
5280 /* ARGSUSED */
5281 static int
rootnex_fm_init(dev_info_t * dip,dev_info_t * tdip,int tcap,ddi_iblock_cookie_t * ibc)5282 rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap,
5283 ddi_iblock_cookie_t *ibc)
5284 {
5285 *ibc = rootnex_state->r_err_ibc;
5286
5287 return (ddi_system_fmcap);
5288 }
5289
5290 /*
5291 * rootnex_dma_check()
5292 * Function called after a dma fault occurred to find out whether the
5293 * fault address is associated with a driver that is able to handle faults
5294 * and recover from faults.
5295 */
5296 /* ARGSUSED */
5297 static int
rootnex_dma_check(dev_info_t * dip,const void * handle,const void * addr,const void * not_used)5298 rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr,
5299 const void *not_used)
5300 {
5301 rootnex_window_t *window;
5302 uint64_t start_addr;
5303 uint64_t fault_addr;
5304 ddi_dma_impl_t *hp;
5305 rootnex_dma_t *dma;
5306 uint64_t end_addr;
5307 size_t csize;
5308 int i;
5309 int j;
5310
5311
5312 /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */
5313 hp = (ddi_dma_impl_t *)handle;
5314 ASSERT(hp);
5315
5316 dma = (rootnex_dma_t *)hp->dmai_private;
5317
5318 /* Get the address that we need to search for */
5319 fault_addr = *(uint64_t *)addr;
5320
5321 /*
5322 * if we don't have any windows, we can just walk through all the
5323 * cookies.
5324 */
5325 if (dma->dp_window == NULL) {
5326 /* for each cookie */
5327 for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) {
5328 /*
5329 * if the faulted address is within the physical address
5330 * range of the cookie, return DDI_FM_NONFATAL.
5331 */
5332 if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) &&
5333 (fault_addr <= (dma->dp_cookies[i].dmac_laddress +
5334 dma->dp_cookies[i].dmac_size))) {
5335 return (DDI_FM_NONFATAL);
5336 }
5337 }
5338
5339 /* fault_addr not within this DMA handle */
5340 return (DDI_FM_UNKNOWN);
5341 }
5342
5343 /* we have mutiple windows, walk through each window */
5344 for (i = 0; i < hp->dmai_nwin; i++) {
5345 window = &dma->dp_window[i];
5346
5347 /* Go through all the cookies in the window */
5348 for (j = 0; j < window->wd_cookie_cnt; j++) {
5349
5350 start_addr = window->wd_first_cookie[j].dmac_laddress;
5351 csize = window->wd_first_cookie[j].dmac_size;
5352
5353 /*
5354 * if we are trimming the first cookie in the window,
5355 * and this is the first cookie, adjust the start
5356 * address and size of the cookie to account for the
5357 * trim.
5358 */
5359 if (window->wd_trim.tr_trim_first && (j == 0)) {
5360 start_addr = window->wd_trim.tr_first_paddr;
5361 csize = window->wd_trim.tr_first_size;
5362 }
5363
5364 /*
5365 * if we are trimming the last cookie in the window,
5366 * and this is the last cookie, adjust the start
5367 * address and size of the cookie to account for the
5368 * trim.
5369 */
5370 if (window->wd_trim.tr_trim_last &&
5371 (j == (window->wd_cookie_cnt - 1))) {
5372 start_addr = window->wd_trim.tr_last_paddr;
5373 csize = window->wd_trim.tr_last_size;
5374 }
5375
5376 end_addr = start_addr + csize;
5377
5378 /*
5379 * if the faulted address is within the physical
5380 * address of the cookie, return DDI_FM_NONFATAL.
5381 */
5382 if ((fault_addr >= start_addr) &&
5383 (fault_addr <= end_addr)) {
5384 return (DDI_FM_NONFATAL);
5385 }
5386 }
5387 }
5388
5389 /* fault_addr not within this DMA handle */
5390 return (DDI_FM_UNKNOWN);
5391 }
5392
5393 /*ARGSUSED*/
5394 static int
rootnex_quiesce(dev_info_t * dip)5395 rootnex_quiesce(dev_info_t *dip)
5396 {
5397 #if defined(__amd64) && !defined(__xpv)
5398 return (immu_quiesce());
5399 #else
5400 return (DDI_SUCCESS);
5401 #endif
5402 }
5403
5404 #if defined(__xpv)
5405 void
immu_init(void)5406 immu_init(void)
5407 {
5408 ;
5409 }
5410
5411 void
immu_startup(void)5412 immu_startup(void)
5413 {
5414 ;
5415 }
5416 /*ARGSUSED*/
5417 void
immu_physmem_update(uint64_t addr,uint64_t size)5418 immu_physmem_update(uint64_t addr, uint64_t size)
5419 {
5420 ;
5421 }
5422 #endif
5423