10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51865Sdilpreet * Common Development and Distribution License (the "License"). 61865Sdilpreet * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 227173Smrj * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate /* 27509Smrj * x86 root nexus driver 280Sstevel@tonic-gate */ 290Sstevel@tonic-gate 300Sstevel@tonic-gate #include <sys/sysmacros.h> 310Sstevel@tonic-gate #include <sys/conf.h> 320Sstevel@tonic-gate #include <sys/autoconf.h> 330Sstevel@tonic-gate #include <sys/sysmacros.h> 340Sstevel@tonic-gate #include <sys/debug.h> 350Sstevel@tonic-gate #include <sys/psw.h> 360Sstevel@tonic-gate #include <sys/ddidmareq.h> 370Sstevel@tonic-gate #include <sys/promif.h> 380Sstevel@tonic-gate #include <sys/devops.h> 390Sstevel@tonic-gate #include <sys/kmem.h> 400Sstevel@tonic-gate #include <sys/cmn_err.h> 410Sstevel@tonic-gate #include <vm/seg.h> 420Sstevel@tonic-gate #include <vm/seg_kmem.h> 430Sstevel@tonic-gate #include <vm/seg_dev.h> 440Sstevel@tonic-gate #include <sys/vmem.h> 450Sstevel@tonic-gate #include <sys/mman.h> 460Sstevel@tonic-gate #include <vm/hat.h> 470Sstevel@tonic-gate #include <vm/as.h> 480Sstevel@tonic-gate #include <vm/page.h> 490Sstevel@tonic-gate #include <sys/avintr.h> 500Sstevel@tonic-gate #include <sys/errno.h> 510Sstevel@tonic-gate #include <sys/modctl.h> 520Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 530Sstevel@tonic-gate #include <sys/sunddi.h> 540Sstevel@tonic-gate #include <sys/sunndi.h> 55916Sschwartz #include <sys/mach_intr.h> 560Sstevel@tonic-gate #include <sys/psm.h> 570Sstevel@tonic-gate #include <sys/ontrap.h> 58509Smrj #include <sys/atomic.h> 59509Smrj #include <sys/sdt.h> 60509Smrj #include <sys/rootnex.h> 61509Smrj #include <vm/hat_i86.h> 621865Sdilpreet #include <sys/ddifm.h> 635251Smrj #include <sys/ddi_isa.h> 64509Smrj 655084Sjohnlev #ifdef __xpv 665084Sjohnlev #include <sys/bootinfo.h> 675084Sjohnlev #include <sys/hypervisor.h> 685084Sjohnlev #include <sys/bootconf.h> 695084Sjohnlev #include <vm/kboot_mmu.h> 707613SVikram.Hegde@Sun.COM #else 717589SVikram.Hegde@Sun.COM #include <sys/intel_iommu.h> 727613SVikram.Hegde@Sun.COM #endif 737613SVikram.Hegde@Sun.COM 747589SVikram.Hegde@Sun.COM 75509Smrj /* 76509Smrj * enable/disable extra checking of function parameters. Useful for debugging 77509Smrj * drivers. 78509Smrj */ 79509Smrj #ifdef DEBUG 80509Smrj int rootnex_alloc_check_parms = 1; 81509Smrj int rootnex_bind_check_parms = 1; 82509Smrj int rootnex_bind_check_inuse = 1; 83509Smrj int rootnex_unbind_verify_buffer = 0; 84509Smrj int rootnex_sync_check_parms = 1; 85509Smrj #else 86509Smrj int rootnex_alloc_check_parms = 0; 87509Smrj int rootnex_bind_check_parms = 0; 88509Smrj int rootnex_bind_check_inuse = 0; 89509Smrj int rootnex_unbind_verify_buffer = 0; 90509Smrj int rootnex_sync_check_parms = 0; 91509Smrj #endif 92509Smrj 931414Scindi /* Master Abort and Target Abort panic flag */ 941414Scindi int rootnex_fm_ma_ta_panic_flag = 0; 951414Scindi 96509Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 970Sstevel@tonic-gate int rootnex_bind_fail = 1; 980Sstevel@tonic-gate int rootnex_bind_warn = 1; 990Sstevel@tonic-gate uint8_t *rootnex_warn_list; 1000Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 1010Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 1020Sstevel@tonic-gate 1030Sstevel@tonic-gate /* 104509Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 105509Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 106509Smrj * the offset and size into ddi_dma_sync(). 1070Sstevel@tonic-gate */ 108509Smrj int rootnex_sync_ignore_params = 0; 1090Sstevel@tonic-gate 1100Sstevel@tonic-gate /* 111509Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 112509Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 113509Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 114509Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 115509Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 116509Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 117509Smrj * (if we need one). These can only be modified in /etc/system before rootnex 118509Smrj * attach. 1190Sstevel@tonic-gate */ 120509Smrj #if defined(__amd64) 121509Smrj int rootnex_prealloc_cookies = 65; 122509Smrj int rootnex_prealloc_windows = 4; 123509Smrj int rootnex_prealloc_copybuf = 2; 124509Smrj #else 125509Smrj int rootnex_prealloc_cookies = 33; 126509Smrj int rootnex_prealloc_windows = 4; 127509Smrj int rootnex_prealloc_copybuf = 2; 128509Smrj #endif 129509Smrj 130509Smrj /* driver global state */ 131509Smrj static rootnex_state_t *rootnex_state; 132509Smrj 133509Smrj /* shortcut to rootnex counters */ 134509Smrj static uint64_t *rootnex_cnt; 1350Sstevel@tonic-gate 1360Sstevel@tonic-gate /* 137509Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1380Sstevel@tonic-gate */ 139509Smrj /* statically defined integer/boolean properties for the root node */ 140509Smrj static rootnex_intprop_t rootnex_intprp[] = { 141509Smrj { "PAGESIZE", PAGESIZE }, 142509Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 143509Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 144509Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 145509Smrj }; 146509Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 147509Smrj 1485084Sjohnlev #ifdef __xpv 1495084Sjohnlev typedef maddr_t rootnex_addr_t; 1505084Sjohnlev #define ROOTNEX_PADDR_TO_RBASE(xinfo, pa) \ 1515084Sjohnlev (DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa)) 1525084Sjohnlev #else 1535084Sjohnlev typedef paddr_t rootnex_addr_t; 1545084Sjohnlev #endif 1555084Sjohnlev 1567613SVikram.Hegde@Sun.COM #if !defined(__xpv) 1577613SVikram.Hegde@Sun.COM char _depends_on[] = "mach/pcplusmp misc/iommulib"; 1587613SVikram.Hegde@Sun.COM #endif 159509Smrj 160509Smrj static struct cb_ops rootnex_cb_ops = { 161509Smrj nodev, /* open */ 162509Smrj nodev, /* close */ 163509Smrj nodev, /* strategy */ 164509Smrj nodev, /* print */ 165509Smrj nodev, /* dump */ 166509Smrj nodev, /* read */ 167509Smrj nodev, /* write */ 168509Smrj nodev, /* ioctl */ 169509Smrj nodev, /* devmap */ 170509Smrj nodev, /* mmap */ 171509Smrj nodev, /* segmap */ 172509Smrj nochpoll, /* chpoll */ 173509Smrj ddi_prop_op, /* cb_prop_op */ 174509Smrj NULL, /* struct streamtab */ 175509Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 176509Smrj CB_REV, /* Rev */ 177509Smrj nodev, /* cb_aread */ 178509Smrj nodev /* cb_awrite */ 179509Smrj }; 180509Smrj 181509Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1820Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 183509Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1840Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1850Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 186509Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1870Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 188509Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 189509Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 190509Smrj ddi_dma_handle_t *handlep); 191509Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 192509Smrj ddi_dma_handle_t handle); 193509Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 194509Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 195509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 196509Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 197509Smrj ddi_dma_handle_t handle); 198509Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 199509Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 200509Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 201509Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 202509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 203509Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 2040Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 2050Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 206509Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 207509Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 2081865Sdilpreet static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 2091865Sdilpreet ddi_iblock_cookie_t *ibc); 210509Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 211509Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 212509Smrj 2137613SVikram.Hegde@Sun.COM static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 2147613SVikram.Hegde@Sun.COM ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 2157613SVikram.Hegde@Sun.COM ddi_dma_handle_t *handlep); 2167613SVikram.Hegde@Sun.COM static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 2177613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 2187613SVikram.Hegde@Sun.COM static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 2197613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 2207613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp); 2217613SVikram.Hegde@Sun.COM static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2227613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 2237617SVikram.Hegde@Sun.COM #if !defined(__xpv) 2247613SVikram.Hegde@Sun.COM static void rootnex_coredma_reset_cookies(dev_info_t *dip, 2257613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 2267613SVikram.Hegde@Sun.COM static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 227*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t **cookiepp, uint_t *ccountp); 228*8215SVikram.Hegde@Sun.COM static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 229*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t ccount); 230*8215SVikram.Hegde@Sun.COM static int rootnex_coredma_clear_cookies(dev_info_t *dip, 231*8215SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 232*8215SVikram.Hegde@Sun.COM static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle); 2337617SVikram.Hegde@Sun.COM #endif 2347613SVikram.Hegde@Sun.COM static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, 2357613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 2367613SVikram.Hegde@Sun.COM static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, 2377613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 2387613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp); 2397613SVikram.Hegde@Sun.COM static int rootnex_coredma_map(dev_info_t *dip, dev_info_t *rdip, 2407613SVikram.Hegde@Sun.COM struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 2417613SVikram.Hegde@Sun.COM static int rootnex_coredma_mctl(dev_info_t *dip, dev_info_t *rdip, 2427613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, enum ddi_dma_ctlops request, off_t *offp, 2437613SVikram.Hegde@Sun.COM size_t *lenp, caddr_t *objpp, uint_t cache_flags); 2440Sstevel@tonic-gate 2450Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 2460Sstevel@tonic-gate BUSO_REV, 2470Sstevel@tonic-gate rootnex_map, 2480Sstevel@tonic-gate NULL, 2490Sstevel@tonic-gate NULL, 2500Sstevel@tonic-gate NULL, 2510Sstevel@tonic-gate rootnex_map_fault, 2520Sstevel@tonic-gate rootnex_dma_map, 2530Sstevel@tonic-gate rootnex_dma_allochdl, 2540Sstevel@tonic-gate rootnex_dma_freehdl, 2550Sstevel@tonic-gate rootnex_dma_bindhdl, 2560Sstevel@tonic-gate rootnex_dma_unbindhdl, 257509Smrj rootnex_dma_sync, 2580Sstevel@tonic-gate rootnex_dma_win, 2590Sstevel@tonic-gate rootnex_dma_mctl, 2600Sstevel@tonic-gate rootnex_ctlops, 2610Sstevel@tonic-gate ddi_bus_prop_op, 2620Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2630Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2640Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2650Sstevel@tonic-gate i_ddi_rootnex_post_event, 2660Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2670Sstevel@tonic-gate 0, /* bus_config */ 2680Sstevel@tonic-gate 0, /* bus_unconfig */ 2691865Sdilpreet rootnex_fm_init, /* bus_fm_init */ 2700Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2710Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2720Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2730Sstevel@tonic-gate NULL, /* bus_powr */ 2740Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2750Sstevel@tonic-gate }; 2760Sstevel@tonic-gate 277509Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 278509Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 2790Sstevel@tonic-gate 2800Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2810Sstevel@tonic-gate DEVO_REV, 282509Smrj 0, 283509Smrj ddi_no_info, 284509Smrj nulldev, 2850Sstevel@tonic-gate nulldev, 2860Sstevel@tonic-gate rootnex_attach, 287509Smrj rootnex_detach, 288509Smrj nulldev, 289509Smrj &rootnex_cb_ops, 2907656SSherry.Moore@Sun.COM &rootnex_bus_ops, 2917656SSherry.Moore@Sun.COM NULL, 2927656SSherry.Moore@Sun.COM ddi_quiesce_not_needed, /* quiesce */ 2930Sstevel@tonic-gate }; 2940Sstevel@tonic-gate 295509Smrj static struct modldrv rootnex_modldrv = { 296509Smrj &mod_driverops, 2977542SRichard.Bean@Sun.COM "i86pc root nexus", 298509Smrj &rootnex_ops 299509Smrj }; 300509Smrj 301509Smrj static struct modlinkage rootnex_modlinkage = { 302509Smrj MODREV_1, 303509Smrj (void *)&rootnex_modldrv, 304509Smrj NULL 305509Smrj }; 306509Smrj 3077617SVikram.Hegde@Sun.COM #if !defined(__xpv) 3087613SVikram.Hegde@Sun.COM static iommulib_nexops_t iommulib_nexops = { 3097613SVikram.Hegde@Sun.COM IOMMU_NEXOPS_VERSION, 3107613SVikram.Hegde@Sun.COM "Rootnex IOMMU ops Vers 1.1", 3117613SVikram.Hegde@Sun.COM NULL, 3127613SVikram.Hegde@Sun.COM rootnex_coredma_allochdl, 3137613SVikram.Hegde@Sun.COM rootnex_coredma_freehdl, 3147613SVikram.Hegde@Sun.COM rootnex_coredma_bindhdl, 3157613SVikram.Hegde@Sun.COM rootnex_coredma_unbindhdl, 3167613SVikram.Hegde@Sun.COM rootnex_coredma_reset_cookies, 3177613SVikram.Hegde@Sun.COM rootnex_coredma_get_cookies, 318*8215SVikram.Hegde@Sun.COM rootnex_coredma_set_cookies, 319*8215SVikram.Hegde@Sun.COM rootnex_coredma_clear_cookies, 320*8215SVikram.Hegde@Sun.COM rootnex_coredma_get_sleep_flags, 3217613SVikram.Hegde@Sun.COM rootnex_coredma_sync, 3227613SVikram.Hegde@Sun.COM rootnex_coredma_win, 3237613SVikram.Hegde@Sun.COM rootnex_coredma_map, 3247613SVikram.Hegde@Sun.COM rootnex_coredma_mctl 3257613SVikram.Hegde@Sun.COM }; 3267617SVikram.Hegde@Sun.COM #endif 327509Smrj 328509Smrj /* 329509Smrj * extern hacks 330509Smrj */ 331509Smrj extern struct seg_ops segdev_ops; 332509Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 333509Smrj #ifdef DDI_MAP_DEBUG 334509Smrj extern int ddi_map_debug_flag; 335509Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 336509Smrj #endif 337509Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 338509Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 339509Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 340509Smrj psm_intr_op_t, int *); 341509Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 342509Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 3435251Smrj 344509Smrj /* 345509Smrj * Use device arena to use for device control register mappings. 346509Smrj * Various kernel memory walkers (debugger, dtrace) need to know 347509Smrj * to avoid this address range to prevent undesired device activity. 348509Smrj */ 349509Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 350509Smrj extern void device_arena_free(void * vaddr, size_t size); 351509Smrj 352509Smrj 3530Sstevel@tonic-gate /* 354509Smrj * Internal functions 3550Sstevel@tonic-gate */ 356509Smrj static int rootnex_dma_init(); 357509Smrj static void rootnex_add_props(dev_info_t *); 358509Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 359509Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 360509Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 361509Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 362509Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 363509Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 364509Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 365509Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 366509Smrj ddi_dma_attr_t *attr); 367509Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 368509Smrj rootnex_sglinfo_t *sglinfo); 369509Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 370509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 371509Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 372509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 373509Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 374509Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 375509Smrj ddi_dma_attr_t *attr, int kmflag); 376509Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 377509Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 378509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 379509Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 380509Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 381509Smrj size_t *copybuf_used, page_t **cur_pp); 382509Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 383509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 384509Smrj ddi_dma_attr_t *attr, off_t cur_offset); 385509Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 386509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 387509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 388509Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 389509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 390509Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 391509Smrj off_t offset, size_t size, uint_t cache_flags); 392509Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 3931865Sdilpreet static int rootnex_dma_check(dev_info_t *dip, const void *handle, 3941865Sdilpreet const void *comp_addr, const void *not_used); 395509Smrj 396509Smrj /* 397509Smrj * _init() 398509Smrj * 399509Smrj */ 4000Sstevel@tonic-gate int 4010Sstevel@tonic-gate _init(void) 4020Sstevel@tonic-gate { 403509Smrj 404509Smrj rootnex_state = NULL; 405509Smrj return (mod_install(&rootnex_modlinkage)); 4060Sstevel@tonic-gate } 4070Sstevel@tonic-gate 408509Smrj 409509Smrj /* 410509Smrj * _info() 411509Smrj * 412509Smrj */ 413509Smrj int 414509Smrj _info(struct modinfo *modinfop) 415509Smrj { 416509Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 417509Smrj } 418509Smrj 419509Smrj 420509Smrj /* 421509Smrj * _fini() 422509Smrj * 423509Smrj */ 4240Sstevel@tonic-gate int 4250Sstevel@tonic-gate _fini(void) 4260Sstevel@tonic-gate { 4270Sstevel@tonic-gate return (EBUSY); 4280Sstevel@tonic-gate } 4290Sstevel@tonic-gate 4300Sstevel@tonic-gate 4310Sstevel@tonic-gate /* 432509Smrj * rootnex_attach() 4330Sstevel@tonic-gate * 4340Sstevel@tonic-gate */ 435509Smrj static int 436509Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 437509Smrj { 4381414Scindi int fmcap; 439509Smrj int e; 440509Smrj 441509Smrj switch (cmd) { 442509Smrj case DDI_ATTACH: 443509Smrj break; 444509Smrj case DDI_RESUME: 445509Smrj return (DDI_SUCCESS); 446509Smrj default: 447509Smrj return (DDI_FAILURE); 448509Smrj } 449509Smrj 450509Smrj /* 451509Smrj * We should only have one instance of rootnex. Save it away since we 452509Smrj * don't have an easy way to get it back later. 453509Smrj */ 454509Smrj ASSERT(rootnex_state == NULL); 455509Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 456509Smrj 457509Smrj rootnex_state->r_dip = dip; 4581414Scindi rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 459509Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 460509Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 4617589SVikram.Hegde@Sun.COM rootnex_state->r_intel_iommu_enabled = B_FALSE; 462509Smrj 4631414Scindi /* 4641414Scindi * Set minimum fm capability level for i86pc platforms and then 4651414Scindi * initialize error handling. Since we're the rootnex, we don't 4661414Scindi * care what's returned in the fmcap field. 4671414Scindi */ 4681865Sdilpreet ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 4691865Sdilpreet DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 4701414Scindi fmcap = ddi_system_fmcap; 4711414Scindi ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 4721414Scindi 473509Smrj /* initialize DMA related state */ 474509Smrj e = rootnex_dma_init(); 475509Smrj if (e != DDI_SUCCESS) { 476509Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 477509Smrj return (DDI_FAILURE); 478509Smrj } 479509Smrj 480509Smrj /* Add static root node properties */ 481509Smrj rootnex_add_props(dip); 482509Smrj 483509Smrj /* since we can't call ddi_report_dev() */ 484509Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 485509Smrj 486509Smrj /* Initialize rootnex event handle */ 487509Smrj i_ddi_rootnex_init_events(dip); 488509Smrj 4897613SVikram.Hegde@Sun.COM #if !defined(__xpv) 4907589SVikram.Hegde@Sun.COM #if defined(__amd64) 4917589SVikram.Hegde@Sun.COM /* probe intel iommu */ 4927589SVikram.Hegde@Sun.COM intel_iommu_probe_and_parse(); 4937589SVikram.Hegde@Sun.COM 4947589SVikram.Hegde@Sun.COM /* attach the iommu nodes */ 4957589SVikram.Hegde@Sun.COM if (intel_iommu_support) { 4967589SVikram.Hegde@Sun.COM if (intel_iommu_attach_dmar_nodes() == DDI_SUCCESS) { 4977589SVikram.Hegde@Sun.COM rootnex_state->r_intel_iommu_enabled = B_TRUE; 4987589SVikram.Hegde@Sun.COM } else { 4997589SVikram.Hegde@Sun.COM intel_iommu_release_dmar_info(); 5007589SVikram.Hegde@Sun.COM } 5017589SVikram.Hegde@Sun.COM } 5027589SVikram.Hegde@Sun.COM #endif 5037589SVikram.Hegde@Sun.COM 5047613SVikram.Hegde@Sun.COM e = iommulib_nexus_register(dip, &iommulib_nexops, 5057613SVikram.Hegde@Sun.COM &rootnex_state->r_iommulib_handle); 5067613SVikram.Hegde@Sun.COM 5077613SVikram.Hegde@Sun.COM ASSERT(e == DDI_SUCCESS); 5087613SVikram.Hegde@Sun.COM #endif 5097613SVikram.Hegde@Sun.COM 510509Smrj return (DDI_SUCCESS); 511509Smrj } 512509Smrj 513509Smrj 514509Smrj /* 515509Smrj * rootnex_detach() 516509Smrj * 517509Smrj */ 5180Sstevel@tonic-gate /*ARGSUSED*/ 5190Sstevel@tonic-gate static int 520509Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 521509Smrj { 522509Smrj switch (cmd) { 523509Smrj case DDI_SUSPEND: 524509Smrj break; 525509Smrj default: 526509Smrj return (DDI_FAILURE); 527509Smrj } 528509Smrj 529509Smrj return (DDI_SUCCESS); 530509Smrj } 531509Smrj 532509Smrj 533509Smrj /* 534509Smrj * rootnex_dma_init() 535509Smrj * 536509Smrj */ 537509Smrj /*ARGSUSED*/ 538509Smrj static int 539509Smrj rootnex_dma_init() 5400Sstevel@tonic-gate { 541509Smrj size_t bufsize; 542509Smrj 543509Smrj 544509Smrj /* 545509Smrj * size of our cookie/window/copybuf state needed in dma bind that we 546509Smrj * pre-alloc in dma_alloc_handle 547509Smrj */ 548509Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 549509Smrj rootnex_state->r_prealloc_size = 550509Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 551509Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 552509Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 553509Smrj 554509Smrj /* 555509Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 556509Smrj * allocate 16 extra bytes for struct pointer alignment 557509Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 558509Smrj */ 559509Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 560509Smrj rootnex_state->r_prealloc_size + 0x10; 561509Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 562509Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 563509Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 564509Smrj return (DDI_FAILURE); 565509Smrj } 5660Sstevel@tonic-gate 5670Sstevel@tonic-gate /* 5680Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 5690Sstevel@tonic-gate * for. 5700Sstevel@tonic-gate */ 5710Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 5720Sstevel@tonic-gate KM_SLEEP); 5730Sstevel@tonic-gate 5740Sstevel@tonic-gate return (DDI_SUCCESS); 5750Sstevel@tonic-gate } 5760Sstevel@tonic-gate 5770Sstevel@tonic-gate 5780Sstevel@tonic-gate /* 579509Smrj * rootnex_add_props() 580509Smrj * 5810Sstevel@tonic-gate */ 5820Sstevel@tonic-gate static void 583509Smrj rootnex_add_props(dev_info_t *dip) 5840Sstevel@tonic-gate { 585509Smrj rootnex_intprop_t *rpp; 5860Sstevel@tonic-gate int i; 587509Smrj 588509Smrj /* Add static integer/boolean properties to the root node */ 589509Smrj rpp = rootnex_intprp; 590509Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 591509Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 592509Smrj rpp[i].prop_name, rpp[i].prop_value); 5930Sstevel@tonic-gate } 5940Sstevel@tonic-gate } 5950Sstevel@tonic-gate 596509Smrj 597509Smrj 598509Smrj /* 599509Smrj * ************************* 600509Smrj * ctlops related routines 601509Smrj * ************************* 602509Smrj */ 603509Smrj 6040Sstevel@tonic-gate /* 605509Smrj * rootnex_ctlops() 606509Smrj * 6070Sstevel@tonic-gate */ 608693Sgovinda /*ARGSUSED*/ 609509Smrj static int 610509Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 611509Smrj void *arg, void *result) 612509Smrj { 613509Smrj int n, *ptr; 614509Smrj struct ddi_parent_private_data *pdp; 615509Smrj 616509Smrj switch (ctlop) { 617509Smrj case DDI_CTLOPS_DMAPMAPC: 618509Smrj /* 619509Smrj * Return 'partial' to indicate that dma mapping 620509Smrj * has to be done in the main MMU. 621509Smrj */ 622509Smrj return (DDI_DMA_PARTIAL); 623509Smrj 624509Smrj case DDI_CTLOPS_BTOP: 625509Smrj /* 626509Smrj * Convert byte count input to physical page units. 627509Smrj * (byte counts that are not a page-size multiple 628509Smrj * are rounded down) 629509Smrj */ 630509Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 631509Smrj return (DDI_SUCCESS); 632509Smrj 633509Smrj case DDI_CTLOPS_PTOB: 634509Smrj /* 635509Smrj * Convert size in physical pages to bytes 636509Smrj */ 637509Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 638509Smrj return (DDI_SUCCESS); 639509Smrj 640509Smrj case DDI_CTLOPS_BTOPR: 641509Smrj /* 642509Smrj * Convert byte count input to physical page units 643509Smrj * (byte counts that are not a page-size multiple 644509Smrj * are rounded up) 645509Smrj */ 646509Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 647509Smrj return (DDI_SUCCESS); 648509Smrj 649509Smrj case DDI_CTLOPS_INITCHILD: 650509Smrj return (impl_ddi_sunbus_initchild(arg)); 651509Smrj 652509Smrj case DDI_CTLOPS_UNINITCHILD: 653509Smrj impl_ddi_sunbus_removechild(arg); 654509Smrj return (DDI_SUCCESS); 655509Smrj 656509Smrj case DDI_CTLOPS_REPORTDEV: 657509Smrj return (rootnex_ctl_reportdev(rdip)); 658509Smrj 659509Smrj case DDI_CTLOPS_IOMIN: 660509Smrj /* 661509Smrj * Nothing to do here but reflect back.. 662509Smrj */ 663509Smrj return (DDI_SUCCESS); 664509Smrj 665509Smrj case DDI_CTLOPS_REGSIZE: 666509Smrj case DDI_CTLOPS_NREGS: 667509Smrj break; 668509Smrj 669509Smrj case DDI_CTLOPS_SIDDEV: 670509Smrj if (ndi_dev_is_prom_node(rdip)) 671509Smrj return (DDI_SUCCESS); 672509Smrj if (ndi_dev_is_persistent_node(rdip)) 673509Smrj return (DDI_SUCCESS); 674509Smrj return (DDI_FAILURE); 675509Smrj 676509Smrj case DDI_CTLOPS_POWER: 677509Smrj return ((*pm_platform_power)((power_req_t *)arg)); 678509Smrj 679693Sgovinda case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 680509Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 681509Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 682509Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 683693Sgovinda case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 684693Sgovinda case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 685509Smrj if (!rootnex_state->r_reserved_msg_printed) { 686509Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 687509Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 688509Smrj "1 or more reserved/obsolete operations."); 689509Smrj } 690509Smrj return (DDI_FAILURE); 691509Smrj 692509Smrj default: 693509Smrj return (DDI_FAILURE); 694509Smrj } 695509Smrj /* 696509Smrj * The rest are for "hardware" properties 697509Smrj */ 698509Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 699509Smrj return (DDI_FAILURE); 700509Smrj 701509Smrj if (ctlop == DDI_CTLOPS_NREGS) { 702509Smrj ptr = (int *)result; 703509Smrj *ptr = pdp->par_nreg; 704509Smrj } else { 705509Smrj off_t *size = (off_t *)result; 706509Smrj 707509Smrj ptr = (int *)arg; 708509Smrj n = *ptr; 709509Smrj if (n >= pdp->par_nreg) { 710509Smrj return (DDI_FAILURE); 711509Smrj } 712509Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 713509Smrj } 714509Smrj return (DDI_SUCCESS); 715509Smrj } 7160Sstevel@tonic-gate 7170Sstevel@tonic-gate 7180Sstevel@tonic-gate /* 719509Smrj * rootnex_ctl_reportdev() 720509Smrj * 7210Sstevel@tonic-gate */ 7220Sstevel@tonic-gate static int 723509Smrj rootnex_ctl_reportdev(dev_info_t *dev) 7240Sstevel@tonic-gate { 725509Smrj int i, n, len, f_len = 0; 726509Smrj char *buf; 727509Smrj 728509Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 729509Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 730509Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 731509Smrj len = strlen(buf); 732509Smrj 733509Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 734509Smrj 735509Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 736509Smrj 737509Smrj if (i == 0) 738509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 739509Smrj ": "); 740509Smrj else 741509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 742509Smrj " and "); 743509Smrj len = strlen(buf); 744509Smrj 745509Smrj switch (rp->regspec_bustype) { 746509Smrj 747509Smrj case BTEISA: 748509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 749509Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 7500Sstevel@tonic-gate break; 751509Smrj 752509Smrj case BTISA: 753509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 754509Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 7550Sstevel@tonic-gate break; 756509Smrj 757509Smrj default: 758509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 759509Smrj "space %x offset %x", 760509Smrj rp->regspec_bustype, rp->regspec_addr); 7610Sstevel@tonic-gate break; 7620Sstevel@tonic-gate } 763509Smrj len = strlen(buf); 7640Sstevel@tonic-gate } 765509Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 766509Smrj int pri; 767509Smrj 768509Smrj if (i != 0) { 769509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 770509Smrj ","); 771509Smrj len = strlen(buf); 772509Smrj } 773509Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 774509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 775509Smrj " sparc ipl %d", pri); 776509Smrj len = strlen(buf); 7770Sstevel@tonic-gate } 778509Smrj #ifdef DEBUG 779509Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 780509Smrj cmn_err(CE_NOTE, "next message is truncated: " 781509Smrj "printed length 1024, real length %d", f_len); 782509Smrj } 783509Smrj #endif /* DEBUG */ 784509Smrj cmn_err(CE_CONT, "?%s\n", buf); 785509Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 7860Sstevel@tonic-gate return (DDI_SUCCESS); 7870Sstevel@tonic-gate } 7880Sstevel@tonic-gate 789509Smrj 790509Smrj /* 791509Smrj * ****************** 792509Smrj * map related code 793509Smrj * ****************** 794509Smrj */ 795509Smrj 796509Smrj /* 797509Smrj * rootnex_map() 798509Smrj * 799509Smrj */ 8000Sstevel@tonic-gate static int 801509Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 802509Smrj off_t len, caddr_t *vaddrp) 8030Sstevel@tonic-gate { 8040Sstevel@tonic-gate struct regspec *rp, tmp_reg; 8050Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 8060Sstevel@tonic-gate int error; 8070Sstevel@tonic-gate 8080Sstevel@tonic-gate mp = &mr; 8090Sstevel@tonic-gate 8100Sstevel@tonic-gate switch (mp->map_op) { 8110Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8120Sstevel@tonic-gate case DDI_MO_UNMAP: 8130Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8140Sstevel@tonic-gate break; 8150Sstevel@tonic-gate default: 8160Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8170Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 8180Sstevel@tonic-gate mp->map_op); 8190Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8200Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8210Sstevel@tonic-gate } 8220Sstevel@tonic-gate 8230Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 8240Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8250Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 8260Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8270Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8280Sstevel@tonic-gate } 8290Sstevel@tonic-gate 8300Sstevel@tonic-gate /* 8310Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 8320Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 8330Sstevel@tonic-gate */ 8340Sstevel@tonic-gate 8350Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 8360Sstevel@tonic-gate 8370Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 8380Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8390Sstevel@tonic-gate static char *out_of_range = 8400Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 8410Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8420Sstevel@tonic-gate 8430Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 8440Sstevel@tonic-gate if (rp == NULL) { 8450Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8460Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 8470Sstevel@tonic-gate ddi_get_name(rdip)); 8480Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8490Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 8500Sstevel@tonic-gate } 8510Sstevel@tonic-gate 8520Sstevel@tonic-gate /* 8530Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 8540Sstevel@tonic-gate */ 8550Sstevel@tonic-gate 8560Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 8570Sstevel@tonic-gate mp->map_obj.rp = rp; 8580Sstevel@tonic-gate } 8590Sstevel@tonic-gate 8600Sstevel@tonic-gate /* 8610Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 8620Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 8630Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 8640Sstevel@tonic-gate */ 8650Sstevel@tonic-gate 8660Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 8670Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 8680Sstevel@tonic-gate 8690Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8705084Sjohnlev cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 8715084Sjohnlev "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 8725084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 8735084Sjohnlev len, mp->map_handlep); 8740Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8750Sstevel@tonic-gate 8760Sstevel@tonic-gate /* 8770Sstevel@tonic-gate * I/O or memory mapping: 8780Sstevel@tonic-gate * 8790Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 8800Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 8810Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 8820Sstevel@tonic-gate */ 8830Sstevel@tonic-gate 8840Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 8850Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 8860Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 8870Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 8880Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 8890Sstevel@tonic-gate return (DDI_ME_INVAL); 8900Sstevel@tonic-gate } 8910Sstevel@tonic-gate 8920Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 8930Sstevel@tonic-gate /* 8940Sstevel@tonic-gate * compatibility i/o mapping 8950Sstevel@tonic-gate */ 8960Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 8970Sstevel@tonic-gate } else { 8980Sstevel@tonic-gate /* 8990Sstevel@tonic-gate * Normal memory or i/o mapping 9000Sstevel@tonic-gate */ 9010Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 9020Sstevel@tonic-gate } 9030Sstevel@tonic-gate 9040Sstevel@tonic-gate if (len != 0) 9050Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 9060Sstevel@tonic-gate 9070Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9085084Sjohnlev cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 9095084Sjohnlev "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 9105084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 9115084Sjohnlev offset, len, mp->map_handlep); 9120Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9130Sstevel@tonic-gate 9140Sstevel@tonic-gate /* 9150Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 9160Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 9170Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 9180Sstevel@tonic-gate * provided via ddi_apply_range.) 9190Sstevel@tonic-gate */ 9200Sstevel@tonic-gate 9210Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9220Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 9230Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 9240Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9250Sstevel@tonic-gate 9260Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 9270Sstevel@tonic-gate return (error); 9280Sstevel@tonic-gate 9290Sstevel@tonic-gate switch (mp->map_op) { 9300Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 9310Sstevel@tonic-gate 9320Sstevel@tonic-gate /* 9330Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 9340Sstevel@tonic-gate */ 9350Sstevel@tonic-gate 9360Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 9370Sstevel@tonic-gate 9380Sstevel@tonic-gate case DDI_MO_UNMAP: 9390Sstevel@tonic-gate 9400Sstevel@tonic-gate /* 9410Sstevel@tonic-gate * Release mapping... 9420Sstevel@tonic-gate */ 9430Sstevel@tonic-gate 9440Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 9450Sstevel@tonic-gate 9460Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 9470Sstevel@tonic-gate 9480Sstevel@tonic-gate return (rootnex_map_handle(mp)); 9490Sstevel@tonic-gate 9500Sstevel@tonic-gate default: 9510Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 9520Sstevel@tonic-gate } 9530Sstevel@tonic-gate } 9540Sstevel@tonic-gate 9550Sstevel@tonic-gate 9560Sstevel@tonic-gate /* 957509Smrj * rootnex_map_fault() 9580Sstevel@tonic-gate * 9590Sstevel@tonic-gate * fault in mappings for requestors 9600Sstevel@tonic-gate */ 9610Sstevel@tonic-gate /*ARGSUSED*/ 9620Sstevel@tonic-gate static int 963509Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 964509Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 965509Smrj uint_t lock) 9660Sstevel@tonic-gate { 9670Sstevel@tonic-gate 9680Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9690Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 9700Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 9710Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 9720Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 9730Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9740Sstevel@tonic-gate 9750Sstevel@tonic-gate /* 9760Sstevel@tonic-gate * This is all terribly broken, but it is a start 9770Sstevel@tonic-gate * 9780Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 9790Sstevel@tonic-gate * must be exported from seg_dev.c. 9800Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 9810Sstevel@tonic-gate */ 9820Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 9835084Sjohnlev struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 9840Sstevel@tonic-gate 9850Sstevel@tonic-gate if (hat == NULL) { 9860Sstevel@tonic-gate /* 9870Sstevel@tonic-gate * This is one plausible interpretation of 9880Sstevel@tonic-gate * a null hat i.e. use the first hat on the 9890Sstevel@tonic-gate * address space hat list which by convention is 9900Sstevel@tonic-gate * the hat of the system MMU. At alternative 9910Sstevel@tonic-gate * would be to panic .. this might well be better .. 9920Sstevel@tonic-gate */ 9930Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 9940Sstevel@tonic-gate hat = seg->s_as->a_hat; 9950Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 9960Sstevel@tonic-gate } 9970Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 9980Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 9990Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 10000Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 10010Sstevel@tonic-gate HAT_LOAD_LOCK); 10020Sstevel@tonic-gate } else 10030Sstevel@tonic-gate return (DDI_FAILURE); 10040Sstevel@tonic-gate return (DDI_SUCCESS); 10050Sstevel@tonic-gate } 10060Sstevel@tonic-gate 10070Sstevel@tonic-gate 10080Sstevel@tonic-gate /* 1009509Smrj * rootnex_map_regspec() 1010509Smrj * we don't support mapping of I/O cards above 4Gb 10110Sstevel@tonic-gate */ 1012509Smrj static int 1013509Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1014509Smrj { 10155084Sjohnlev rootnex_addr_t rbase; 1016509Smrj void *cvaddr; 1017509Smrj uint_t npages, pgoffset; 1018509Smrj struct regspec *rp; 1019509Smrj ddi_acc_hdl_t *hp; 1020509Smrj ddi_acc_impl_t *ap; 1021509Smrj uint_t hat_acc_flags; 10225084Sjohnlev paddr_t pbase; 1023509Smrj 1024509Smrj rp = mp->map_obj.rp; 1025509Smrj hp = mp->map_handlep; 1026509Smrj 1027509Smrj #ifdef DDI_MAP_DEBUG 1028509Smrj ddi_map_debug( 1029509Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1030509Smrj rp->regspec_bustype, rp->regspec_addr, 1031509Smrj rp->regspec_size, mp->map_handlep); 1032509Smrj #endif /* DDI_MAP_DEBUG */ 1033509Smrj 1034509Smrj /* 1035509Smrj * I/O or memory mapping 1036509Smrj * 1037509Smrj * <bustype=0, addr=x, len=x>: memory 1038509Smrj * <bustype=1, addr=x, len=x>: i/o 1039509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1040509Smrj */ 1041509Smrj 1042509Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1043509Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 1044509Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 1045509Smrj rp->regspec_addr, rp->regspec_size); 1046509Smrj return (DDI_FAILURE); 1047509Smrj } 1048509Smrj 1049509Smrj if (rp->regspec_bustype != 0) { 1050509Smrj /* 1051509Smrj * I/O space - needs a handle. 1052509Smrj */ 1053509Smrj if (hp == NULL) { 1054509Smrj return (DDI_FAILURE); 1055509Smrj } 1056509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1057509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1058509Smrj impl_acc_hdl_init(hp); 1059509Smrj 1060509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1061509Smrj #ifdef DDI_MAP_DEBUG 10625084Sjohnlev ddi_map_debug("rootnex_map_regspec: mmap() " 10635084Sjohnlev "to I/O space is not supported.\n"); 1064509Smrj #endif /* DDI_MAP_DEBUG */ 1065509Smrj return (DDI_ME_INVAL); 1066509Smrj } else { 1067509Smrj /* 1068509Smrj * 1275-compliant vs. compatibility i/o mapping 1069509Smrj */ 1070509Smrj *vaddrp = 1071509Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 10725084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_bustype) : 10735084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_addr); 10745084Sjohnlev #ifdef __xpv 10755084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 10765084Sjohnlev hp->ah_pfn = xen_assign_pfn( 10775084Sjohnlev mmu_btop((ulong_t)rp->regspec_addr & 10785084Sjohnlev MMU_PAGEMASK)); 10795084Sjohnlev } else { 10805084Sjohnlev hp->ah_pfn = mmu_btop( 10815084Sjohnlev (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 10825084Sjohnlev } 10835084Sjohnlev #else 10841865Sdilpreet hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 10855084Sjohnlev MMU_PAGEMASK); 10865084Sjohnlev #endif 10871865Sdilpreet hp->ah_pnum = mmu_btopr(rp->regspec_size + 10881865Sdilpreet (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1089509Smrj } 1090509Smrj 1091509Smrj #ifdef DDI_MAP_DEBUG 1092509Smrj ddi_map_debug( 1093509Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1094509Smrj rp->regspec_size, *vaddrp); 1095509Smrj #endif /* DDI_MAP_DEBUG */ 1096509Smrj return (DDI_SUCCESS); 1097509Smrj } 1098509Smrj 1099509Smrj /* 1100509Smrj * Memory space 1101509Smrj */ 1102509Smrj 1103509Smrj if (hp != NULL) { 1104509Smrj /* 1105509Smrj * hat layer ignores 1106509Smrj * hp->ah_acc.devacc_attr_endian_flags. 1107509Smrj */ 1108509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1109509Smrj case DDI_STRICTORDER_ACC: 1110509Smrj hat_acc_flags = HAT_STRICTORDER; 1111509Smrj break; 1112509Smrj case DDI_UNORDERED_OK_ACC: 1113509Smrj hat_acc_flags = HAT_UNORDERED_OK; 1114509Smrj break; 1115509Smrj case DDI_MERGING_OK_ACC: 1116509Smrj hat_acc_flags = HAT_MERGING_OK; 1117509Smrj break; 1118509Smrj case DDI_LOADCACHING_OK_ACC: 1119509Smrj hat_acc_flags = HAT_LOADCACHING_OK; 1120509Smrj break; 1121509Smrj case DDI_STORECACHING_OK_ACC: 1122509Smrj hat_acc_flags = HAT_STORECACHING_OK; 1123509Smrj break; 1124509Smrj } 1125509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1126509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1127509Smrj impl_acc_hdl_init(hp); 1128509Smrj hp->ah_hat_flags = hat_acc_flags; 1129509Smrj } else { 1130509Smrj hat_acc_flags = HAT_STRICTORDER; 1131509Smrj } 1132509Smrj 11335084Sjohnlev rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 11345084Sjohnlev #ifdef __xpv 11355084Sjohnlev /* 11365084Sjohnlev * If we're dom0, we're using a real device so we need to translate 11375084Sjohnlev * the MA to a PA. 11385084Sjohnlev */ 11395084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 11405084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 11415084Sjohnlev } else { 11425084Sjohnlev pbase = rbase; 11435084Sjohnlev } 11445084Sjohnlev #else 11455084Sjohnlev pbase = rbase; 11465084Sjohnlev #endif 11475084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1148509Smrj 1149509Smrj if (rp->regspec_size == 0) { 1150509Smrj #ifdef DDI_MAP_DEBUG 1151509Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1152509Smrj #endif /* DDI_MAP_DEBUG */ 1153509Smrj return (DDI_ME_INVAL); 1154509Smrj } 1155509Smrj 1156509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 11575084Sjohnlev /* extra cast to make gcc happy */ 11585084Sjohnlev *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1159509Smrj } else { 1160509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1161509Smrj 1162509Smrj #ifdef DDI_MAP_DEBUG 11635084Sjohnlev ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 11645084Sjohnlev "physical %llx", npages, pbase); 1165509Smrj #endif /* DDI_MAP_DEBUG */ 1166509Smrj 1167509Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1168509Smrj if (cvaddr == NULL) 1169509Smrj return (DDI_ME_NORESOURCES); 1170509Smrj 1171509Smrj /* 1172509Smrj * Now map in the pages we've allocated... 1173509Smrj */ 11745084Sjohnlev hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 11755084Sjohnlev mmu_btop(pbase), mp->map_prot | hat_acc_flags, 11765084Sjohnlev HAT_LOAD_LOCK); 1177509Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 11781865Sdilpreet 11791865Sdilpreet /* save away pfn and npages for FMA */ 11801865Sdilpreet hp = mp->map_handlep; 11811865Sdilpreet if (hp) { 11825084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 11831865Sdilpreet hp->ah_pnum = npages; 11841865Sdilpreet } 1185509Smrj } 1186509Smrj 1187509Smrj #ifdef DDI_MAP_DEBUG 1188509Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1189509Smrj #endif /* DDI_MAP_DEBUG */ 1190509Smrj return (DDI_SUCCESS); 1191509Smrj } 1192509Smrj 11930Sstevel@tonic-gate 11940Sstevel@tonic-gate /* 1195509Smrj * rootnex_unmap_regspec() 1196509Smrj * 1197509Smrj */ 1198509Smrj static int 1199509Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1200509Smrj { 1201509Smrj caddr_t addr = (caddr_t)*vaddrp; 1202509Smrj uint_t npages, pgoffset; 1203509Smrj struct regspec *rp; 1204509Smrj 1205509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1206509Smrj return (0); 1207509Smrj 1208509Smrj rp = mp->map_obj.rp; 1209509Smrj 1210509Smrj if (rp->regspec_size == 0) { 1211509Smrj #ifdef DDI_MAP_DEBUG 1212509Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1213509Smrj #endif /* DDI_MAP_DEBUG */ 1214509Smrj return (DDI_ME_INVAL); 1215509Smrj } 1216509Smrj 1217509Smrj /* 1218509Smrj * I/O or memory mapping: 1219509Smrj * 1220509Smrj * <bustype=0, addr=x, len=x>: memory 1221509Smrj * <bustype=1, addr=x, len=x>: i/o 1222509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1223509Smrj */ 1224509Smrj if (rp->regspec_bustype != 0) { 1225509Smrj /* 1226509Smrj * This is I/O space, which requires no particular 1227509Smrj * processing on unmap since it isn't mapped in the 1228509Smrj * first place. 1229509Smrj */ 1230509Smrj return (DDI_SUCCESS); 1231509Smrj } 1232509Smrj 1233509Smrj /* 1234509Smrj * Memory space 1235509Smrj */ 1236509Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1237509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1238509Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1239509Smrj device_arena_free(addr - pgoffset, ptob(npages)); 1240509Smrj 1241509Smrj /* 1242509Smrj * Destroy the pointer - the mapping has logically gone 1243509Smrj */ 1244509Smrj *vaddrp = NULL; 1245509Smrj 1246509Smrj return (DDI_SUCCESS); 1247509Smrj } 1248509Smrj 1249509Smrj 1250509Smrj /* 1251509Smrj * rootnex_map_handle() 1252509Smrj * 12530Sstevel@tonic-gate */ 1254509Smrj static int 1255509Smrj rootnex_map_handle(ddi_map_req_t *mp) 1256509Smrj { 12575084Sjohnlev rootnex_addr_t rbase; 1258509Smrj ddi_acc_hdl_t *hp; 1259509Smrj uint_t pgoffset; 1260509Smrj struct regspec *rp; 12615084Sjohnlev paddr_t pbase; 1262509Smrj 1263509Smrj rp = mp->map_obj.rp; 1264509Smrj 1265509Smrj #ifdef DDI_MAP_DEBUG 1266509Smrj ddi_map_debug( 1267509Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1268509Smrj rp->regspec_bustype, rp->regspec_addr, 1269509Smrj rp->regspec_size, mp->map_handlep); 1270509Smrj #endif /* DDI_MAP_DEBUG */ 1271509Smrj 1272509Smrj /* 1273509Smrj * I/O or memory mapping: 1274509Smrj * 1275509Smrj * <bustype=0, addr=x, len=x>: memory 1276509Smrj * <bustype=1, addr=x, len=x>: i/o 1277509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1278509Smrj */ 1279509Smrj if (rp->regspec_bustype != 0) { 1280509Smrj /* 1281509Smrj * This refers to I/O space, and we don't support "mapping" 1282509Smrj * I/O space to a user. 1283509Smrj */ 1284509Smrj return (DDI_FAILURE); 1285509Smrj } 1286509Smrj 1287509Smrj /* 1288509Smrj * Set up the hat_flags for the mapping. 1289509Smrj */ 1290509Smrj hp = mp->map_handlep; 1291509Smrj 1292509Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 1293509Smrj case DDI_NEVERSWAP_ACC: 1294509Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1295509Smrj break; 1296509Smrj case DDI_STRUCTURE_LE_ACC: 1297509Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 1298509Smrj break; 1299509Smrj case DDI_STRUCTURE_BE_ACC: 1300509Smrj return (DDI_FAILURE); 1301509Smrj default: 1302509Smrj return (DDI_REGS_ACC_CONFLICT); 1303509Smrj } 1304509Smrj 1305509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1306509Smrj case DDI_STRICTORDER_ACC: 1307509Smrj break; 1308509Smrj case DDI_UNORDERED_OK_ACC: 1309509Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 1310509Smrj break; 1311509Smrj case DDI_MERGING_OK_ACC: 1312509Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 1313509Smrj break; 1314509Smrj case DDI_LOADCACHING_OK_ACC: 1315509Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1316509Smrj break; 1317509Smrj case DDI_STORECACHING_OK_ACC: 1318509Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 1319509Smrj break; 1320509Smrj default: 1321509Smrj return (DDI_FAILURE); 1322509Smrj } 1323509Smrj 13245084Sjohnlev rbase = (rootnex_addr_t)rp->regspec_addr & 13255084Sjohnlev (~(rootnex_addr_t)MMU_PAGEOFFSET); 13265084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1327509Smrj 1328509Smrj if (rp->regspec_size == 0) 1329509Smrj return (DDI_ME_INVAL); 1330509Smrj 13315084Sjohnlev #ifdef __xpv 13325084Sjohnlev /* 13335084Sjohnlev * If we're dom0, we're using a real device so we need to translate 13345084Sjohnlev * the MA to a PA. 13355084Sjohnlev */ 13365084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 13375084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 13385084Sjohnlev (rbase & MMU_PAGEOFFSET); 13395084Sjohnlev } else { 13405084Sjohnlev pbase = rbase; 13415084Sjohnlev } 13425084Sjohnlev #else 13435084Sjohnlev pbase = rbase; 13445084Sjohnlev #endif 13455084Sjohnlev 13465084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 1347509Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1348509Smrj 1349509Smrj return (DDI_SUCCESS); 1350509Smrj } 13510Sstevel@tonic-gate 13520Sstevel@tonic-gate 13530Sstevel@tonic-gate 13540Sstevel@tonic-gate /* 1355509Smrj * ************************ 1356509Smrj * interrupt related code 1357509Smrj * ************************ 13580Sstevel@tonic-gate */ 13590Sstevel@tonic-gate 13600Sstevel@tonic-gate /* 1361509Smrj * rootnex_intr_ops() 13620Sstevel@tonic-gate * bus_intr_op() function for interrupt support 13630Sstevel@tonic-gate */ 13640Sstevel@tonic-gate /* ARGSUSED */ 13650Sstevel@tonic-gate static int 13660Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 13670Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 13680Sstevel@tonic-gate { 13690Sstevel@tonic-gate struct intrspec *ispec; 13700Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 13710Sstevel@tonic-gate 13720Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 13730Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 13740Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 13750Sstevel@tonic-gate 13760Sstevel@tonic-gate /* Process the interrupt operation */ 13770Sstevel@tonic-gate switch (intr_op) { 13780Sstevel@tonic-gate case DDI_INTROP_GETCAP: 13790Sstevel@tonic-gate /* First check with pcplusmp */ 13800Sstevel@tonic-gate if (psm_intr_ops == NULL) 13810Sstevel@tonic-gate return (DDI_FAILURE); 13820Sstevel@tonic-gate 13830Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13840Sstevel@tonic-gate *(int *)result = 0; 13850Sstevel@tonic-gate return (DDI_FAILURE); 13860Sstevel@tonic-gate } 13870Sstevel@tonic-gate break; 13880Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13890Sstevel@tonic-gate if (psm_intr_ops == NULL) 13900Sstevel@tonic-gate return (DDI_FAILURE); 13910Sstevel@tonic-gate 13920Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13930Sstevel@tonic-gate return (DDI_FAILURE); 13940Sstevel@tonic-gate break; 13950Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13960Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13970Sstevel@tonic-gate return (DDI_FAILURE); 13980Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13990Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 14000Sstevel@tonic-gate break; 14010Sstevel@tonic-gate case DDI_INTROP_FREE: 14020Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 14030Sstevel@tonic-gate /* 14040Sstevel@tonic-gate * Special case for 'pcic' driver' only. 14050Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 14060Sstevel@tonic-gate * See detailed comments on this in the function 14070Sstevel@tonic-gate * rootnex_get_ispec(). 14080Sstevel@tonic-gate */ 14090Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 14100Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 14110Sstevel@tonic-gate pdp->par_nintr); 14120Sstevel@tonic-gate /* 14130Sstevel@tonic-gate * Set it to zero; so that 14140Sstevel@tonic-gate * DDI framework doesn't free it again 14150Sstevel@tonic-gate */ 14160Sstevel@tonic-gate pdp->par_intr = NULL; 14170Sstevel@tonic-gate pdp->par_nintr = 0; 14180Sstevel@tonic-gate } 14190Sstevel@tonic-gate break; 14200Sstevel@tonic-gate case DDI_INTROP_GETPRI: 14210Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14220Sstevel@tonic-gate return (DDI_FAILURE); 14230Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 14240Sstevel@tonic-gate break; 14250Sstevel@tonic-gate case DDI_INTROP_SETPRI: 14260Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 14270Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 14280Sstevel@tonic-gate return (DDI_FAILURE); 14290Sstevel@tonic-gate 14300Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 14310Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 14320Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 14330Sstevel@tonic-gate return (DDI_FAILURE); 14340Sstevel@tonic-gate 14350Sstevel@tonic-gate /* Change the priority */ 14360Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 14370Sstevel@tonic-gate PSM_FAILURE) 14380Sstevel@tonic-gate return (DDI_FAILURE); 14390Sstevel@tonic-gate 14400Sstevel@tonic-gate /* update the ispec with the new priority */ 14410Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 14420Sstevel@tonic-gate break; 14430Sstevel@tonic-gate case DDI_INTROP_ADDISR: 14440Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14450Sstevel@tonic-gate return (DDI_FAILURE); 14460Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 14470Sstevel@tonic-gate break; 14480Sstevel@tonic-gate case DDI_INTROP_REMISR: 14490Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14500Sstevel@tonic-gate return (DDI_FAILURE); 14510Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 14520Sstevel@tonic-gate break; 14530Sstevel@tonic-gate case DDI_INTROP_ENABLE: 14540Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14550Sstevel@tonic-gate return (DDI_FAILURE); 14560Sstevel@tonic-gate 14570Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 14580Sstevel@tonic-gate if (psm_intr_ops == NULL) 14590Sstevel@tonic-gate return (DDI_FAILURE); 14600Sstevel@tonic-gate 1461916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14620Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 14630Sstevel@tonic-gate (int *)&hdlp->ih_vector); 14640Sstevel@tonic-gate 14650Sstevel@tonic-gate /* Add the interrupt handler */ 14660Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 14670Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1468916Sschwartz hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 14690Sstevel@tonic-gate return (DDI_FAILURE); 14700Sstevel@tonic-gate break; 14710Sstevel@tonic-gate case DDI_INTROP_DISABLE: 14720Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14730Sstevel@tonic-gate return (DDI_FAILURE); 14740Sstevel@tonic-gate 14750Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 14760Sstevel@tonic-gate if (psm_intr_ops == NULL) 14770Sstevel@tonic-gate return (DDI_FAILURE); 14780Sstevel@tonic-gate 1479916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14800Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14810Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14820Sstevel@tonic-gate 14830Sstevel@tonic-gate /* Remove the interrupt handler */ 14840Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14850Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14860Sstevel@tonic-gate break; 14870Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14880Sstevel@tonic-gate if (psm_intr_ops == NULL) 14890Sstevel@tonic-gate return (DDI_FAILURE); 14900Sstevel@tonic-gate 14910Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14920Sstevel@tonic-gate return (DDI_FAILURE); 14930Sstevel@tonic-gate break; 14940Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14950Sstevel@tonic-gate if (psm_intr_ops == NULL) 14960Sstevel@tonic-gate return (DDI_FAILURE); 14970Sstevel@tonic-gate 14980Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14990Sstevel@tonic-gate return (DDI_FAILURE); 15000Sstevel@tonic-gate break; 15010Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 15020Sstevel@tonic-gate if (psm_intr_ops == NULL) 15030Sstevel@tonic-gate return (DDI_FAILURE); 15040Sstevel@tonic-gate 15050Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 15060Sstevel@tonic-gate result)) { 15070Sstevel@tonic-gate *(int *)result = 0; 15080Sstevel@tonic-gate return (DDI_FAILURE); 15090Sstevel@tonic-gate } 15100Sstevel@tonic-gate break; 15112580Sanish case DDI_INTROP_NAVAIL: 15120Sstevel@tonic-gate case DDI_INTROP_NINTRS: 15132580Sanish *(int *)result = i_ddi_get_intx_nintrs(rdip); 15142580Sanish if (*(int *)result == 0) { 15150Sstevel@tonic-gate /* 15160Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 15170Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 15180Sstevel@tonic-gate * 15190Sstevel@tonic-gate * See detailed comments on this in the function 15200Sstevel@tonic-gate * rootnex_get_ispec(). 15210Sstevel@tonic-gate * 15220Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 15230Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 15240Sstevel@tonic-gate * field may not initialized. So, we fake it here 15250Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 15260Sstevel@tonic-gate */ 15270Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 15280Sstevel@tonic-gate *(int *)result = 1; 15292580Sanish else 15302580Sanish return (DDI_FAILURE); 15310Sstevel@tonic-gate } 15320Sstevel@tonic-gate break; 15330Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 15342580Sanish *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 15350Sstevel@tonic-gate break; 15360Sstevel@tonic-gate default: 15370Sstevel@tonic-gate return (DDI_FAILURE); 15380Sstevel@tonic-gate } 15390Sstevel@tonic-gate 15400Sstevel@tonic-gate return (DDI_SUCCESS); 15410Sstevel@tonic-gate } 15420Sstevel@tonic-gate 15430Sstevel@tonic-gate 15440Sstevel@tonic-gate /* 1545509Smrj * rootnex_get_ispec() 1546509Smrj * convert an interrupt number to an interrupt specification. 1547509Smrj * The interrupt number determines which interrupt spec will be 1548509Smrj * returned if more than one exists. 1549509Smrj * 1550509Smrj * Look into the parent private data area of the 'rdip' to find out 1551509Smrj * the interrupt specification. First check to make sure there is 1552509Smrj * one that matchs "inumber" and then return a pointer to it. 1553509Smrj * 1554509Smrj * Return NULL if one could not be found. 1555509Smrj * 1556509Smrj * NOTE: This is needed for rootnex_intr_ops() 1557509Smrj */ 1558509Smrj static struct intrspec * 1559509Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 1560509Smrj { 1561509Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1562509Smrj 1563509Smrj /* 1564509Smrj * Special case handling for drivers that provide their own 1565509Smrj * intrspec structures instead of relying on the DDI framework. 1566509Smrj * 1567509Smrj * A broken hardware driver in ON could potentially provide its 1568509Smrj * own intrspec structure, instead of relying on the hardware. 1569509Smrj * If these drivers are children of 'rootnex' then we need to 1570509Smrj * continue to provide backward compatibility to them here. 1571509Smrj * 1572509Smrj * Following check is a special case for 'pcic' driver which 1573509Smrj * was found to have broken hardwre andby provides its own intrspec. 1574509Smrj * 1575509Smrj * Verbatim comments from this driver are shown here: 1576509Smrj * "Don't use the ddi_add_intr since we don't have a 1577509Smrj * default intrspec in all cases." 1578509Smrj * 1579509Smrj * Since an 'ispec' may not be always created for it, 1580509Smrj * check for that and create one if so. 1581509Smrj * 1582509Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 1583509Smrj */ 1584509Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1585509Smrj pdp->par_nintr = 1; 1586509Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1587509Smrj pdp->par_nintr, KM_SLEEP); 1588509Smrj } 1589509Smrj 1590509Smrj /* Validate the interrupt number */ 1591509Smrj if (inum >= pdp->par_nintr) 1592509Smrj return (NULL); 1593509Smrj 1594509Smrj /* Get the interrupt structure pointer and return that */ 1595509Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 1596509Smrj } 1597509Smrj 1598509Smrj 1599509Smrj /* 1600509Smrj * ****************** 1601509Smrj * dma related code 1602509Smrj * ****************** 1603509Smrj */ 1604509Smrj 1605509Smrj /*ARGSUSED*/ 1606509Smrj static int 16077613SVikram.Hegde@Sun.COM rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 16087613SVikram.Hegde@Sun.COM ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 16097613SVikram.Hegde@Sun.COM ddi_dma_handle_t *handlep) 1610509Smrj { 1611509Smrj uint64_t maxsegmentsize_ll; 1612509Smrj uint_t maxsegmentsize; 1613509Smrj ddi_dma_impl_t *hp; 1614509Smrj rootnex_dma_t *dma; 1615509Smrj uint64_t count_max; 1616509Smrj uint64_t seg; 1617509Smrj int kmflag; 1618509Smrj int e; 1619509Smrj 1620509Smrj 1621509Smrj /* convert our sleep flags */ 1622509Smrj if (waitfp == DDI_DMA_SLEEP) { 1623509Smrj kmflag = KM_SLEEP; 1624509Smrj } else { 1625509Smrj kmflag = KM_NOSLEEP; 1626509Smrj } 1627509Smrj 1628509Smrj /* 1629509Smrj * We try to do only one memory allocation here. We'll do a little 1630509Smrj * pointer manipulation later. If the bind ends up taking more than 1631509Smrj * our prealloc's space, we'll have to allocate more memory in the 1632509Smrj * bind operation. Not great, but much better than before and the 1633509Smrj * best we can do with the current bind interfaces. 1634509Smrj */ 1635509Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1636509Smrj if (hp == NULL) { 1637509Smrj if (waitfp != DDI_DMA_DONTWAIT) { 1638509Smrj ddi_set_callback(waitfp, arg, 1639509Smrj &rootnex_state->r_dvma_call_list_id); 1640509Smrj } 1641509Smrj return (DDI_DMA_NORESOURCES); 1642509Smrj } 1643509Smrj 1644509Smrj /* Do our pointer manipulation now, align the structures */ 1645509Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 1646509Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1647509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1648509Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1649509Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1650509Smrj 1651509Smrj /* setup the handle */ 1652509Smrj rootnex_clean_dmahdl(hp); 1653509Smrj dma->dp_dip = rdip; 1654509Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1655509Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1656509Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 1657509Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1658509Smrj hp->dmai_rdip = rdip; 1659509Smrj hp->dmai_attr = *attr; 1660509Smrj 1661509Smrj /* we don't need to worry about the SPL since we do a tryenter */ 1662509Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1663509Smrj 1664509Smrj /* 1665509Smrj * Figure out our maximum segment size. If the segment size is greater 1666509Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 1667509Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1668509Smrj * dma_attr_count_max are size-1 type values. 1669509Smrj * 1670509Smrj * Maximum segment size is the largest physically contiguous chunk of 1671509Smrj * memory that we can return from a bind (i.e. the maximum size of a 1672509Smrj * single cookie). 1673509Smrj */ 1674509Smrj 1675509Smrj /* handle the rollover cases */ 1676509Smrj seg = attr->dma_attr_seg + 1; 1677509Smrj if (seg < attr->dma_attr_seg) { 1678509Smrj seg = attr->dma_attr_seg; 1679509Smrj } 1680509Smrj count_max = attr->dma_attr_count_max + 1; 1681509Smrj if (count_max < attr->dma_attr_count_max) { 1682509Smrj count_max = attr->dma_attr_count_max; 1683509Smrj } 1684509Smrj 1685509Smrj /* 1686509Smrj * granularity may or may not be a power of two. If it isn't, we can't 1687509Smrj * use a simple mask. 1688509Smrj */ 1689509Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1690509Smrj dma->dp_granularity_power_2 = B_FALSE; 1691509Smrj } else { 1692509Smrj dma->dp_granularity_power_2 = B_TRUE; 1693509Smrj } 1694509Smrj 1695509Smrj /* 1696509Smrj * maxxfer should be a whole multiple of granularity. If we're going to 1697509Smrj * break up a window because we're greater than maxxfer, we might as 1698509Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 1699509Smrj * worry about triming the window later on for this case. 1700509Smrj */ 1701509Smrj if (attr->dma_attr_granular > 1) { 1702509Smrj if (dma->dp_granularity_power_2) { 1703509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1704509Smrj (attr->dma_attr_maxxfer & 1705509Smrj (attr->dma_attr_granular - 1)); 1706509Smrj } else { 1707509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1708509Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1709509Smrj } 1710509Smrj } else { 1711509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 1712509Smrj } 1713509Smrj 1714509Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1715509Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1716509Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1717509Smrj maxsegmentsize = 0xFFFFFFFF; 1718509Smrj } else { 1719509Smrj maxsegmentsize = maxsegmentsize_ll; 1720509Smrj } 1721509Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1722509Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1723509Smrj 1724509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1725509Smrj if (rootnex_alloc_check_parms) { 1726509Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1727509Smrj if (e != DDI_SUCCESS) { 1728509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1729509Smrj (void) rootnex_dma_freehdl(dip, rdip, 1730509Smrj (ddi_dma_handle_t)hp); 1731509Smrj return (e); 1732509Smrj } 1733509Smrj } 1734509Smrj 1735509Smrj *handlep = (ddi_dma_handle_t)hp; 1736509Smrj 1737509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1738509Smrj DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1739509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1740509Smrj 1741509Smrj return (DDI_SUCCESS); 1742509Smrj } 1743509Smrj 1744509Smrj 1745509Smrj /* 17467613SVikram.Hegde@Sun.COM * rootnex_dma_allochdl() 17477613SVikram.Hegde@Sun.COM * called from ddi_dma_alloc_handle(). 1748509Smrj */ 17497613SVikram.Hegde@Sun.COM static int 17507613SVikram.Hegde@Sun.COM rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 17517613SVikram.Hegde@Sun.COM int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 17527613SVikram.Hegde@Sun.COM { 17537613SVikram.Hegde@Sun.COM #if !defined(__xpv) 17547613SVikram.Hegde@Sun.COM uint_t error = ENOTSUP; 17557613SVikram.Hegde@Sun.COM int retval; 17567613SVikram.Hegde@Sun.COM 17577613SVikram.Hegde@Sun.COM retval = iommulib_nex_open(rdip, &error); 17587613SVikram.Hegde@Sun.COM 17597613SVikram.Hegde@Sun.COM if (retval != DDI_SUCCESS && error == ENOTSUP) { 17607613SVikram.Hegde@Sun.COM /* No IOMMU */ 17617613SVikram.Hegde@Sun.COM return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 17627613SVikram.Hegde@Sun.COM handlep)); 17637613SVikram.Hegde@Sun.COM } else if (retval != DDI_SUCCESS) { 17647613SVikram.Hegde@Sun.COM return (DDI_FAILURE); 17657613SVikram.Hegde@Sun.COM } 17667613SVikram.Hegde@Sun.COM 17677613SVikram.Hegde@Sun.COM ASSERT(IOMMU_USED(rdip)); 17687613SVikram.Hegde@Sun.COM 17697613SVikram.Hegde@Sun.COM /* has an IOMMU */ 17707613SVikram.Hegde@Sun.COM return (iommulib_nexdma_allochdl(dip, rdip, attr, 17717613SVikram.Hegde@Sun.COM waitfp, arg, handlep)); 17727613SVikram.Hegde@Sun.COM #else 17737613SVikram.Hegde@Sun.COM return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 17747613SVikram.Hegde@Sun.COM handlep)); 17757613SVikram.Hegde@Sun.COM #endif 17767613SVikram.Hegde@Sun.COM } 17777613SVikram.Hegde@Sun.COM 1778509Smrj /*ARGSUSED*/ 1779509Smrj static int 17807613SVikram.Hegde@Sun.COM rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 17817613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle) 1782509Smrj { 1783509Smrj ddi_dma_impl_t *hp; 1784509Smrj rootnex_dma_t *dma; 1785509Smrj 1786509Smrj 1787509Smrj hp = (ddi_dma_impl_t *)handle; 1788509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1789509Smrj 1790509Smrj /* unbind should have been called first */ 1791509Smrj ASSERT(!dma->dp_inuse); 1792509Smrj 1793509Smrj mutex_destroy(&dma->dp_mutex); 1794509Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1795509Smrj 1796509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1797509Smrj DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1798509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1799509Smrj 1800509Smrj if (rootnex_state->r_dvma_call_list_id) 1801509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1802509Smrj 1803509Smrj return (DDI_SUCCESS); 1804509Smrj } 1805509Smrj 1806509Smrj /* 18077613SVikram.Hegde@Sun.COM * rootnex_dma_freehdl() 18087613SVikram.Hegde@Sun.COM * called from ddi_dma_free_handle(). 1809509Smrj */ 18107613SVikram.Hegde@Sun.COM static int 18117613SVikram.Hegde@Sun.COM rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 18127613SVikram.Hegde@Sun.COM { 18137613SVikram.Hegde@Sun.COM #if !defined(__xpv) 18147613SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 18157613SVikram.Hegde@Sun.COM return (iommulib_nexdma_freehdl(dip, rdip, handle)); 18167613SVikram.Hegde@Sun.COM } 18177613SVikram.Hegde@Sun.COM #endif 18187613SVikram.Hegde@Sun.COM return (rootnex_coredma_freehdl(dip, rdip, handle)); 18197613SVikram.Hegde@Sun.COM } 18207613SVikram.Hegde@Sun.COM 18217613SVikram.Hegde@Sun.COM 1822509Smrj /*ARGSUSED*/ 1823509Smrj static int 18247613SVikram.Hegde@Sun.COM rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 18257613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 18267613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp) 18270Sstevel@tonic-gate { 1828509Smrj rootnex_sglinfo_t *sinfo; 1829509Smrj ddi_dma_attr_t *attr; 1830509Smrj ddi_dma_impl_t *hp; 1831509Smrj rootnex_dma_t *dma; 1832509Smrj int kmflag; 1833509Smrj int e; 1834509Smrj 1835509Smrj 1836509Smrj hp = (ddi_dma_impl_t *)handle; 1837509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1838509Smrj sinfo = &dma->dp_sglinfo; 1839509Smrj attr = &hp->dmai_attr; 1840509Smrj 1841*8215SVikram.Hegde@Sun.COM if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1842*8215SVikram.Hegde@Sun.COM dma->dp_sleep_flags = KM_SLEEP; 1843*8215SVikram.Hegde@Sun.COM } else { 1844*8215SVikram.Hegde@Sun.COM dma->dp_sleep_flags = KM_NOSLEEP; 1845*8215SVikram.Hegde@Sun.COM } 1846*8215SVikram.Hegde@Sun.COM 1847509Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1848509Smrj 1849509Smrj /* 1850509Smrj * This is useful for debugging a driver. Not as useful in a production 1851509Smrj * system. The only time this will fail is if you have a driver bug. 1852509Smrj */ 1853509Smrj if (rootnex_bind_check_inuse) { 1854509Smrj /* 1855509Smrj * No one else should ever have this lock unless someone else 1856509Smrj * is trying to use this handle. So contention on the lock 1857509Smrj * is the same as inuse being set. 1858509Smrj */ 1859509Smrj e = mutex_tryenter(&dma->dp_mutex); 1860509Smrj if (e == 0) { 1861509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1862509Smrj return (DDI_DMA_INUSE); 1863509Smrj } 1864509Smrj if (dma->dp_inuse) { 1865509Smrj mutex_exit(&dma->dp_mutex); 1866509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1867509Smrj return (DDI_DMA_INUSE); 1868509Smrj } 1869509Smrj dma->dp_inuse = B_TRUE; 1870509Smrj mutex_exit(&dma->dp_mutex); 1871509Smrj } 1872509Smrj 1873509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1874509Smrj if (rootnex_bind_check_parms) { 1875509Smrj e = rootnex_valid_bind_parms(dmareq, attr); 1876509Smrj if (e != DDI_SUCCESS) { 1877509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1878509Smrj rootnex_clean_dmahdl(hp); 1879509Smrj return (e); 1880509Smrj } 1881509Smrj } 1882509Smrj 1883509Smrj /* save away the original bind info */ 1884509Smrj dma->dp_dma = dmareq->dmar_object; 1885509Smrj 18867613SVikram.Hegde@Sun.COM #if !defined(__xpv) 18877589SVikram.Hegde@Sun.COM if (rootnex_state->r_intel_iommu_enabled) { 18887589SVikram.Hegde@Sun.COM e = intel_iommu_map_sgl(handle, dmareq, 18897589SVikram.Hegde@Sun.COM rootnex_state->r_prealloc_cookies); 18907589SVikram.Hegde@Sun.COM 18917589SVikram.Hegde@Sun.COM switch (e) { 18927589SVikram.Hegde@Sun.COM case IOMMU_SGL_SUCCESS: 18937589SVikram.Hegde@Sun.COM goto rootnex_sgl_end; 18947589SVikram.Hegde@Sun.COM 18957589SVikram.Hegde@Sun.COM case IOMMU_SGL_DISABLE: 18967589SVikram.Hegde@Sun.COM goto rootnex_sgl_start; 18977589SVikram.Hegde@Sun.COM 18987589SVikram.Hegde@Sun.COM case IOMMU_SGL_NORESOURCES: 18997589SVikram.Hegde@Sun.COM cmn_err(CE_WARN, "iommu map sgl failed for %s", 19007589SVikram.Hegde@Sun.COM ddi_node_name(dma->dp_dip)); 19017589SVikram.Hegde@Sun.COM rootnex_clean_dmahdl(hp); 19027589SVikram.Hegde@Sun.COM return (DDI_DMA_NORESOURCES); 19037589SVikram.Hegde@Sun.COM 19047589SVikram.Hegde@Sun.COM default: 19057589SVikram.Hegde@Sun.COM cmn_err(CE_WARN, 19067589SVikram.Hegde@Sun.COM "undefined value returned from" 19077589SVikram.Hegde@Sun.COM " intel_iommu_map_sgl: %d", 19087589SVikram.Hegde@Sun.COM e); 19097589SVikram.Hegde@Sun.COM rootnex_clean_dmahdl(hp); 19107589SVikram.Hegde@Sun.COM return (DDI_DMA_NORESOURCES); 19117589SVikram.Hegde@Sun.COM } 19127589SVikram.Hegde@Sun.COM } 19137613SVikram.Hegde@Sun.COM #endif 19147589SVikram.Hegde@Sun.COM 19157589SVikram.Hegde@Sun.COM rootnex_sgl_start: 1916509Smrj /* 1917509Smrj * Figure out a rough estimate of what maximum number of pages this 1918509Smrj * buffer could use (a high estimate of course). 1919509Smrj */ 1920509Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1921509Smrj 1922509Smrj /* 1923509Smrj * We'll use the pre-allocated cookies for any bind that will *always* 1924509Smrj * fit (more important to be consistent, we don't want to create 1925509Smrj * additional degenerate cases). 1926509Smrj */ 1927509Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1928509Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1929509Smrj dma->dp_need_to_free_cookie = B_FALSE; 1930509Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1931509Smrj uint_t, sinfo->si_max_pages); 1932509Smrj 1933509Smrj /* 1934509Smrj * For anything larger than that, we'll go ahead and allocate the 1935509Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 1936509Smrj * seeing this path in the fast path for high performance devices very 1937509Smrj * frequently. 1938509Smrj * 1939509Smrj * a ddi bind interface that allowed the driver to provide storage to 1940509Smrj * the bind interface would speed this case up. 1941509Smrj */ 1942509Smrj } else { 1943509Smrj /* convert the sleep flags */ 1944509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1945509Smrj kmflag = KM_SLEEP; 1946509Smrj } else { 1947509Smrj kmflag = KM_NOSLEEP; 1948509Smrj } 1949509Smrj 1950509Smrj /* 1951509Smrj * Save away how much memory we allocated. If we're doing a 1952509Smrj * nosleep, the alloc could fail... 1953509Smrj */ 1954509Smrj dma->dp_cookie_size = sinfo->si_max_pages * 1955509Smrj sizeof (ddi_dma_cookie_t); 1956509Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1957509Smrj if (dma->dp_cookies == NULL) { 1958509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1959509Smrj rootnex_clean_dmahdl(hp); 1960509Smrj return (DDI_DMA_NORESOURCES); 1961509Smrj } 1962509Smrj dma->dp_need_to_free_cookie = B_TRUE; 1963509Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1964509Smrj sinfo->si_max_pages); 1965509Smrj } 1966509Smrj hp->dmai_cookie = dma->dp_cookies; 1967509Smrj 1968509Smrj /* 1969509Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1970509Smrj * looking at the contraints in the dma structure. It will then put some 1971509Smrj * additional state about the sgl in the dma struct (i.e. is the sgl 1972509Smrj * clean, or do we need to do some munging; how many pages need to be 1973509Smrj * copied, etc.) 1974509Smrj */ 1975509Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1976509Smrj &dma->dp_sglinfo); 19777589SVikram.Hegde@Sun.COM 19787589SVikram.Hegde@Sun.COM rootnex_sgl_end: 1979509Smrj ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1980509Smrj /* if we don't need a copy buffer, we don't need to sync */ 1981509Smrj if (sinfo->si_copybuf_req == 0) { 1982509Smrj hp->dmai_rflags |= DMP_NOSYNC; 1983509Smrj } 1984509Smrj 1985509Smrj /* 1986509Smrj * if we don't need the copybuf and we don't need to do a partial, we 1987509Smrj * hit the fast path. All the high performance devices should be trying 1988509Smrj * to hit this path. To hit this path, a device should be able to reach 1989509Smrj * all of memory, shouldn't try to bind more than it can transfer, and 1990509Smrj * the buffer shouldn't require more cookies than the driver/device can 1991509Smrj * handle [sgllen]). 1992509Smrj */ 1993509Smrj if ((sinfo->si_copybuf_req == 0) && 1994509Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1995509Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1996509Smrj /* 19975591Sstephh * If the driver supports FMA, insert the handle in the FMA DMA 19985591Sstephh * handle cache. 19995591Sstephh */ 20005591Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 20015591Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 20025591Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 20035591Sstephh } 20045591Sstephh 20055591Sstephh /* 2006509Smrj * copy out the first cookie and ccountp, set the cookie 2007509Smrj * pointer to the second cookie. The first cookie is passed 2008509Smrj * back on the stack. Additional cookies are accessed via 2009509Smrj * ddi_dma_nextcookie() 2010509Smrj */ 2011509Smrj *cookiep = dma->dp_cookies[0]; 2012509Smrj *ccountp = sinfo->si_sgl_size; 2013509Smrj hp->dmai_cookie++; 2014509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2015509Smrj hp->dmai_nwin = 1; 2016509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2017509Smrj DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 2018509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2019509Smrj dma->dp_dma.dmao_size); 2020509Smrj return (DDI_DMA_MAPPED); 2021509Smrj } 2022509Smrj 2023509Smrj /* 2024509Smrj * go to the slow path, we may need to alloc more memory, create 2025509Smrj * multiple windows, and munge up a sgl to make the device happy. 2026509Smrj */ 2027509Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 2028509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 2029509Smrj if (dma->dp_need_to_free_cookie) { 2030509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2031509Smrj } 2032509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2033509Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 2034509Smrj return (e); 2035509Smrj } 2036509Smrj 20375591Sstephh /* 20385591Sstephh * If the driver supports FMA, insert the handle in the FMA DMA handle 20395591Sstephh * cache. 20405591Sstephh */ 20415591Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 20425591Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 20435591Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 20445591Sstephh } 20455591Sstephh 2046509Smrj /* if the first window uses the copy buffer, sync it for the device */ 2047509Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 2048509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 2049*8215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2050509Smrj DDI_DMA_SYNC_FORDEV); 2051509Smrj } 2052509Smrj 2053509Smrj /* 2054509Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 2055509Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 2056509Smrj * If we have a partial map (i.e. multiple windows), the number of 2057509Smrj * cookies we return is the number of cookies in the first window. 2058509Smrj */ 2059509Smrj if (e == DDI_DMA_MAPPED) { 2060509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2061509Smrj *ccountp = sinfo->si_sgl_size; 2062509Smrj } else { 2063509Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 2064509Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 2065509Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 2066509Smrj } 2067509Smrj *cookiep = dma->dp_cookies[0]; 2068509Smrj hp->dmai_cookie++; 2069509Smrj 2070509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2071509Smrj DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 2072509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2073509Smrj dma->dp_dma.dmao_size); 2074509Smrj return (e); 2075509Smrj } 2076509Smrj 2077509Smrj 2078509Smrj /* 20797613SVikram.Hegde@Sun.COM * rootnex_dma_bindhdl() 20807613SVikram.Hegde@Sun.COM * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 2081509Smrj */ 20827613SVikram.Hegde@Sun.COM static int 20837613SVikram.Hegde@Sun.COM rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 20847613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 20857613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp) 20867613SVikram.Hegde@Sun.COM { 20877613SVikram.Hegde@Sun.COM #if !defined(__xpv) 20887613SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 20897613SVikram.Hegde@Sun.COM return (iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq, 20907613SVikram.Hegde@Sun.COM cookiep, ccountp)); 20917613SVikram.Hegde@Sun.COM } 20927613SVikram.Hegde@Sun.COM #endif 20937613SVikram.Hegde@Sun.COM return (rootnex_coredma_bindhdl(dip, rdip, handle, dmareq, 20947613SVikram.Hegde@Sun.COM cookiep, ccountp)); 20957613SVikram.Hegde@Sun.COM } 20967613SVikram.Hegde@Sun.COM 2097509Smrj /*ARGSUSED*/ 2098509Smrj static int 20997613SVikram.Hegde@Sun.COM rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2100509Smrj ddi_dma_handle_t handle) 2101509Smrj { 2102509Smrj ddi_dma_impl_t *hp; 2103509Smrj rootnex_dma_t *dma; 2104509Smrj int e; 2105509Smrj 2106509Smrj hp = (ddi_dma_impl_t *)handle; 2107509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2108509Smrj 2109509Smrj /* make sure the buffer wasn't free'd before calling unbind */ 2110509Smrj if (rootnex_unbind_verify_buffer) { 2111509Smrj e = rootnex_verify_buffer(dma); 2112509Smrj if (e != DDI_SUCCESS) { 2113509Smrj ASSERT(0); 2114509Smrj return (DDI_FAILURE); 2115509Smrj } 2116509Smrj } 2117509Smrj 2118509Smrj /* sync the current window before unbinding the buffer */ 2119509Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 2120509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 2121*8215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2122509Smrj DDI_DMA_SYNC_FORCPU); 2123509Smrj } 2124509Smrj 2125509Smrj /* 21261865Sdilpreet * If the driver supports FMA, remove the handle in the FMA DMA handle 21271865Sdilpreet * cache. 21281865Sdilpreet */ 21291865Sdilpreet if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 21301865Sdilpreet if ((DEVI(rdip)->devi_fmhdl != NULL) && 21311865Sdilpreet (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) { 21321865Sdilpreet (void) ndi_fmc_remove(rdip, DMA_HANDLE, hp); 21331865Sdilpreet } 21341865Sdilpreet } 21351865Sdilpreet 21361865Sdilpreet /* 2137509Smrj * cleanup and copy buffer or window state. if we didn't use the copy 2138509Smrj * buffer or windows, there won't be much to do :-) 2139509Smrj */ 2140509Smrj rootnex_teardown_copybuf(dma); 2141509Smrj rootnex_teardown_windows(dma); 2142509Smrj 21437613SVikram.Hegde@Sun.COM #if !defined(__xpv) 2144509Smrj /* 21457589SVikram.Hegde@Sun.COM * If intel iommu enabled, clean up the page tables and free the dvma 21467589SVikram.Hegde@Sun.COM */ 21477589SVikram.Hegde@Sun.COM if (rootnex_state->r_intel_iommu_enabled) { 21487589SVikram.Hegde@Sun.COM intel_iommu_unmap_sgl(handle); 21497589SVikram.Hegde@Sun.COM } 21507613SVikram.Hegde@Sun.COM #endif 21517589SVikram.Hegde@Sun.COM 21527589SVikram.Hegde@Sun.COM /* 2153509Smrj * If we had to allocate space to for the worse case sgl (it didn't 2154509Smrj * fit into our pre-allocate buffer), free that up now 2155509Smrj */ 2156509Smrj if (dma->dp_need_to_free_cookie) { 2157509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2158509Smrj } 2159509Smrj 2160509Smrj /* 2161509Smrj * clean up the handle so it's ready for the next bind (i.e. if the 2162509Smrj * handle is reused). 2163509Smrj */ 2164509Smrj rootnex_clean_dmahdl(hp); 2165509Smrj 2166509Smrj if (rootnex_state->r_dvma_call_list_id) 2167509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2168509Smrj 2169509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2170509Smrj DTRACE_PROBE1(rootnex__unbind, uint64_t, 2171509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2172509Smrj 2173509Smrj return (DDI_SUCCESS); 2174509Smrj } 2175509Smrj 21767613SVikram.Hegde@Sun.COM /* 21777613SVikram.Hegde@Sun.COM * rootnex_dma_unbindhdl() 21787613SVikram.Hegde@Sun.COM * called from ddi_dma_unbind_handle() 21797613SVikram.Hegde@Sun.COM */ 21807613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 21817613SVikram.Hegde@Sun.COM static int 21827613SVikram.Hegde@Sun.COM rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 21837613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle) 21847613SVikram.Hegde@Sun.COM { 21857613SVikram.Hegde@Sun.COM #if !defined(__xpv) 21867613SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 21877613SVikram.Hegde@Sun.COM return (iommulib_nexdma_unbindhdl(dip, rdip, handle)); 21887613SVikram.Hegde@Sun.COM } 21897613SVikram.Hegde@Sun.COM #endif 21907613SVikram.Hegde@Sun.COM return (rootnex_coredma_unbindhdl(dip, rdip, handle)); 21917613SVikram.Hegde@Sun.COM } 21927613SVikram.Hegde@Sun.COM 21937617SVikram.Hegde@Sun.COM #if !defined(__xpv) 2194*8215SVikram.Hegde@Sun.COM 2195*8215SVikram.Hegde@Sun.COM static int 2196*8215SVikram.Hegde@Sun.COM rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle) 2197*8215SVikram.Hegde@Sun.COM { 2198*8215SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2199*8215SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2200*8215SVikram.Hegde@Sun.COM 2201*8215SVikram.Hegde@Sun.COM if (dma->dp_sleep_flags != KM_SLEEP && 2202*8215SVikram.Hegde@Sun.COM dma->dp_sleep_flags != KM_NOSLEEP) 2203*8215SVikram.Hegde@Sun.COM cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle"); 2204*8215SVikram.Hegde@Sun.COM return (dma->dp_sleep_flags); 2205*8215SVikram.Hegde@Sun.COM } 22067613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 22077613SVikram.Hegde@Sun.COM static void 22087613SVikram.Hegde@Sun.COM rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 22097613SVikram.Hegde@Sun.COM { 22107613SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 22117613SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2212*8215SVikram.Hegde@Sun.COM rootnex_window_t *window; 2213*8215SVikram.Hegde@Sun.COM 2214*8215SVikram.Hegde@Sun.COM if (dma->dp_window) { 2215*8215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 2216*8215SVikram.Hegde@Sun.COM hp->dmai_cookie = window->wd_first_cookie; 2217*8215SVikram.Hegde@Sun.COM } else { 2218*8215SVikram.Hegde@Sun.COM hp->dmai_cookie = dma->dp_cookies; 2219*8215SVikram.Hegde@Sun.COM } 22207613SVikram.Hegde@Sun.COM hp->dmai_cookie++; 22217613SVikram.Hegde@Sun.COM } 22227613SVikram.Hegde@Sun.COM 22237613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 22247613SVikram.Hegde@Sun.COM static int 22257613SVikram.Hegde@Sun.COM rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2226*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t **cookiepp, uint_t *ccountp) 2227*8215SVikram.Hegde@Sun.COM { 2228*8215SVikram.Hegde@Sun.COM int i; 2229*8215SVikram.Hegde@Sun.COM int km_flags; 2230*8215SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2231*8215SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2232*8215SVikram.Hegde@Sun.COM rootnex_window_t *window; 2233*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cp; 2234*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookie; 2235*8215SVikram.Hegde@Sun.COM 2236*8215SVikram.Hegde@Sun.COM ASSERT(*cookiepp == NULL); 2237*8215SVikram.Hegde@Sun.COM ASSERT(*ccountp == 0); 2238*8215SVikram.Hegde@Sun.COM 2239*8215SVikram.Hegde@Sun.COM if (dma->dp_window) { 2240*8215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 2241*8215SVikram.Hegde@Sun.COM cp = window->wd_first_cookie; 2242*8215SVikram.Hegde@Sun.COM *ccountp = window->wd_cookie_cnt; 2243*8215SVikram.Hegde@Sun.COM } else { 2244*8215SVikram.Hegde@Sun.COM cp = dma->dp_cookies; 2245*8215SVikram.Hegde@Sun.COM *ccountp = dma->dp_sglinfo.si_sgl_size; 2246*8215SVikram.Hegde@Sun.COM } 2247*8215SVikram.Hegde@Sun.COM 2248*8215SVikram.Hegde@Sun.COM km_flags = rootnex_coredma_get_sleep_flags(handle); 2249*8215SVikram.Hegde@Sun.COM cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags); 2250*8215SVikram.Hegde@Sun.COM if (cookie == NULL) { 2251*8215SVikram.Hegde@Sun.COM return (DDI_DMA_NORESOURCES); 2252*8215SVikram.Hegde@Sun.COM } 2253*8215SVikram.Hegde@Sun.COM 2254*8215SVikram.Hegde@Sun.COM for (i = 0; i < *ccountp; i++) { 2255*8215SVikram.Hegde@Sun.COM cookie[i].dmac_notused = cp[i].dmac_notused; 2256*8215SVikram.Hegde@Sun.COM cookie[i].dmac_type = cp[i].dmac_type; 2257*8215SVikram.Hegde@Sun.COM cookie[i].dmac_address = cp[i].dmac_address; 2258*8215SVikram.Hegde@Sun.COM cookie[i].dmac_size = cp[i].dmac_size; 2259*8215SVikram.Hegde@Sun.COM } 2260*8215SVikram.Hegde@Sun.COM 2261*8215SVikram.Hegde@Sun.COM *cookiepp = cookie; 2262*8215SVikram.Hegde@Sun.COM 2263*8215SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 2264*8215SVikram.Hegde@Sun.COM } 2265*8215SVikram.Hegde@Sun.COM 2266*8215SVikram.Hegde@Sun.COM /*ARGSUSED*/ 2267*8215SVikram.Hegde@Sun.COM static int 2268*8215SVikram.Hegde@Sun.COM rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2269*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t ccount) 22707613SVikram.Hegde@Sun.COM { 22717613SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 22727613SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2273*8215SVikram.Hegde@Sun.COM rootnex_window_t *window; 2274*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cur_cookiep; 2275*8215SVikram.Hegde@Sun.COM 2276*8215SVikram.Hegde@Sun.COM ASSERT(cookiep); 2277*8215SVikram.Hegde@Sun.COM ASSERT(ccount != 0); 2278*8215SVikram.Hegde@Sun.COM ASSERT(dma->dp_need_to_switch_cookies == B_FALSE); 2279*8215SVikram.Hegde@Sun.COM 2280*8215SVikram.Hegde@Sun.COM if (dma->dp_window) { 2281*8215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 2282*8215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = window->wd_first_cookie; 2283*8215SVikram.Hegde@Sun.COM window->wd_first_cookie = cookiep; 2284*8215SVikram.Hegde@Sun.COM ASSERT(ccount == window->wd_cookie_cnt); 2285*8215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2286*8215SVikram.Hegde@Sun.COM + window->wd_first_cookie; 22877613SVikram.Hegde@Sun.COM } else { 2288*8215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = dma->dp_cookies; 2289*8215SVikram.Hegde@Sun.COM dma->dp_cookies = cookiep; 2290*8215SVikram.Hegde@Sun.COM ASSERT(ccount == dma->dp_sglinfo.si_sgl_size); 2291*8215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2292*8215SVikram.Hegde@Sun.COM + dma->dp_cookies; 22937613SVikram.Hegde@Sun.COM } 2294*8215SVikram.Hegde@Sun.COM 2295*8215SVikram.Hegde@Sun.COM dma->dp_need_to_switch_cookies = B_TRUE; 2296*8215SVikram.Hegde@Sun.COM hp->dmai_cookie = cur_cookiep; 22977613SVikram.Hegde@Sun.COM 22987613SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 22997613SVikram.Hegde@Sun.COM } 2300*8215SVikram.Hegde@Sun.COM 2301*8215SVikram.Hegde@Sun.COM /*ARGSUSED*/ 2302*8215SVikram.Hegde@Sun.COM static int 2303*8215SVikram.Hegde@Sun.COM rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 2304*8215SVikram.Hegde@Sun.COM { 2305*8215SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2306*8215SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2307*8215SVikram.Hegde@Sun.COM rootnex_window_t *window; 2308*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cur_cookiep; 2309*8215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookie_array; 2310*8215SVikram.Hegde@Sun.COM uint_t ccount; 2311*8215SVikram.Hegde@Sun.COM 2312*8215SVikram.Hegde@Sun.COM /* check if cookies have not been switched */ 2313*8215SVikram.Hegde@Sun.COM if (dma->dp_need_to_switch_cookies == B_FALSE) 2314*8215SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 2315*8215SVikram.Hegde@Sun.COM 2316*8215SVikram.Hegde@Sun.COM ASSERT(dma->dp_saved_cookies); 2317*8215SVikram.Hegde@Sun.COM 2318*8215SVikram.Hegde@Sun.COM if (dma->dp_window) { 2319*8215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 2320*8215SVikram.Hegde@Sun.COM cookie_array = window->wd_first_cookie; 2321*8215SVikram.Hegde@Sun.COM window->wd_first_cookie = dma->dp_saved_cookies; 2322*8215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = NULL; 2323*8215SVikram.Hegde@Sun.COM ccount = window->wd_cookie_cnt; 2324*8215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - cookie_array) 2325*8215SVikram.Hegde@Sun.COM + window->wd_first_cookie; 2326*8215SVikram.Hegde@Sun.COM } else { 2327*8215SVikram.Hegde@Sun.COM cookie_array = dma->dp_cookies; 2328*8215SVikram.Hegde@Sun.COM dma->dp_cookies = dma->dp_saved_cookies; 2329*8215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = NULL; 2330*8215SVikram.Hegde@Sun.COM ccount = dma->dp_sglinfo.si_sgl_size; 2331*8215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - cookie_array) 2332*8215SVikram.Hegde@Sun.COM + dma->dp_cookies; 2333*8215SVikram.Hegde@Sun.COM } 2334*8215SVikram.Hegde@Sun.COM 2335*8215SVikram.Hegde@Sun.COM kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount); 2336*8215SVikram.Hegde@Sun.COM 2337*8215SVikram.Hegde@Sun.COM hp->dmai_cookie = cur_cookiep; 2338*8215SVikram.Hegde@Sun.COM 2339*8215SVikram.Hegde@Sun.COM dma->dp_need_to_switch_cookies = B_FALSE; 2340*8215SVikram.Hegde@Sun.COM 2341*8215SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 2342*8215SVikram.Hegde@Sun.COM } 2343*8215SVikram.Hegde@Sun.COM 23447617SVikram.Hegde@Sun.COM #endif 2345509Smrj 2346509Smrj /* 2347509Smrj * rootnex_verify_buffer() 2348509Smrj * verify buffer wasn't free'd 2349509Smrj */ 2350509Smrj static int 2351509Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 2352509Smrj { 2353509Smrj page_t **pplist; 2354509Smrj caddr_t vaddr; 2355509Smrj uint_t pcnt; 2356509Smrj uint_t poff; 2357509Smrj page_t *pp; 23581865Sdilpreet char b; 2359509Smrj int i; 2360509Smrj 2361509Smrj /* Figure out how many pages this buffer occupies */ 2362509Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2363509Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2364509Smrj } else { 2365509Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2366509Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2367509Smrj } 2368509Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2369509Smrj 2370509Smrj switch (dma->dp_dma.dmao_type) { 23710Sstevel@tonic-gate case DMA_OTYP_PAGES: 2372509Smrj /* 2373509Smrj * for a linked list of pp's walk through them to make sure 2374509Smrj * they're locked and not free. 2375509Smrj */ 2376509Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2377509Smrj for (i = 0; i < pcnt; i++) { 2378509Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2379509Smrj return (DDI_FAILURE); 23800Sstevel@tonic-gate } 2381509Smrj pp = pp->p_next; 23820Sstevel@tonic-gate } 23830Sstevel@tonic-gate break; 2384509Smrj 23850Sstevel@tonic-gate case DMA_OTYP_VADDR: 23860Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 2387509Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2388509Smrj /* 2389509Smrj * for an array of pp's walk through them to make sure they're 2390509Smrj * not free. It's possible that they may not be locked. 2391509Smrj */ 2392509Smrj if (pplist) { 2393509Smrj for (i = 0; i < pcnt; i++) { 2394509Smrj if (PP_ISFREE(pplist[i])) { 2395509Smrj return (DDI_FAILURE); 2396509Smrj } 2397509Smrj } 2398509Smrj 2399509Smrj /* For a virtual address, try to peek at each page */ 2400509Smrj } else { 2401509Smrj if (dma->dp_sglinfo.si_asp == &kas) { 2402509Smrj for (i = 0; i < pcnt; i++) { 24031865Sdilpreet if (ddi_peek8(NULL, vaddr, &b) == 24041865Sdilpreet DDI_FAILURE) 2405509Smrj return (DDI_FAILURE); 24061865Sdilpreet vaddr += MMU_PAGESIZE; 2407509Smrj } 2408509Smrj } 2409509Smrj } 2410509Smrj break; 2411509Smrj 2412509Smrj default: 2413509Smrj ASSERT(0); 2414509Smrj break; 2415509Smrj } 2416509Smrj 2417509Smrj return (DDI_SUCCESS); 2418509Smrj } 2419509Smrj 2420509Smrj 2421509Smrj /* 2422509Smrj * rootnex_clean_dmahdl() 2423509Smrj * Clean the dma handle. This should be called on a handle alloc and an 2424509Smrj * unbind handle. Set the handle state to the default settings. 2425509Smrj */ 2426509Smrj static void 2427509Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2428509Smrj { 2429509Smrj rootnex_dma_t *dma; 2430509Smrj 2431509Smrj 2432509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2433509Smrj 2434509Smrj hp->dmai_nwin = 0; 2435509Smrj dma->dp_current_cookie = 0; 2436509Smrj dma->dp_copybuf_size = 0; 2437509Smrj dma->dp_window = NULL; 2438509Smrj dma->dp_cbaddr = NULL; 2439509Smrj dma->dp_inuse = B_FALSE; 2440509Smrj dma->dp_need_to_free_cookie = B_FALSE; 2441*8215SVikram.Hegde@Sun.COM dma->dp_need_to_switch_cookies = B_FALSE; 2442*8215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = NULL; 2443*8215SVikram.Hegde@Sun.COM dma->dp_sleep_flags = KM_PANIC; 2444509Smrj dma->dp_need_to_free_window = B_FALSE; 2445509Smrj dma->dp_partial_required = B_FALSE; 2446509Smrj dma->dp_trim_required = B_FALSE; 2447509Smrj dma->dp_sglinfo.si_copybuf_req = 0; 2448509Smrj #if !defined(__amd64) 2449509Smrj dma->dp_cb_remaping = B_FALSE; 2450509Smrj dma->dp_kva = NULL; 2451509Smrj #endif 2452509Smrj 2453509Smrj /* FMA related initialization */ 2454509Smrj hp->dmai_fault = 0; 2455509Smrj hp->dmai_fault_check = NULL; 2456509Smrj hp->dmai_fault_notify = NULL; 2457509Smrj hp->dmai_error.err_ena = 0; 2458509Smrj hp->dmai_error.err_status = DDI_FM_OK; 2459509Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2460509Smrj hp->dmai_error.err_ontrap = NULL; 2461509Smrj hp->dmai_error.err_fep = NULL; 24621865Sdilpreet hp->dmai_error.err_cf = NULL; 2463509Smrj } 2464509Smrj 2465509Smrj 2466509Smrj /* 2467509Smrj * rootnex_valid_alloc_parms() 2468509Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 2469509Smrj */ 2470509Smrj static int 2471509Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2472509Smrj { 2473509Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2474509Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2475509Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 2476509Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2477509Smrj return (DDI_DMA_BADATTR); 2478509Smrj } 2479509Smrj 2480509Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2481509Smrj return (DDI_DMA_BADATTR); 2482509Smrj } 2483509Smrj 2484509Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2485509Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2486509Smrj attr->dma_attr_sgllen <= 0) { 2487509Smrj return (DDI_DMA_BADATTR); 2488509Smrj } 2489509Smrj 2490509Smrj /* We should be able to DMA into every byte offset in a page */ 2491509Smrj if (maxsegmentsize < MMU_PAGESIZE) { 2492509Smrj return (DDI_DMA_BADATTR); 2493509Smrj } 2494509Smrj 2495509Smrj return (DDI_SUCCESS); 2496509Smrj } 2497509Smrj 2498509Smrj 2499509Smrj /* 2500509Smrj * rootnex_valid_bind_parms() 2501509Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 2502509Smrj */ 2503509Smrj /* ARGSUSED */ 2504509Smrj static int 2505509Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2506509Smrj { 2507509Smrj #if !defined(__amd64) 2508509Smrj /* 2509509Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 2510509Smrj * we can track the offset for the obsoleted interfaces. 2511509Smrj */ 2512509Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2513509Smrj return (DDI_DMA_TOOBIG); 2514509Smrj } 2515509Smrj #endif 2516509Smrj 2517509Smrj return (DDI_SUCCESS); 2518509Smrj } 2519509Smrj 2520509Smrj 2521509Smrj /* 2522509Smrj * rootnex_get_sgl() 2523509Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 2524509Smrj * with a call to the vm layer when vm2.0 comes around... 2525509Smrj */ 2526509Smrj static void 2527509Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2528509Smrj rootnex_sglinfo_t *sglinfo) 2529509Smrj { 2530509Smrj ddi_dma_atyp_t buftype; 25315084Sjohnlev rootnex_addr_t raddr; 2532509Smrj uint64_t last_page; 2533509Smrj uint64_t offset; 2534509Smrj uint64_t addrhi; 2535509Smrj uint64_t addrlo; 2536509Smrj uint64_t maxseg; 2537509Smrj page_t **pplist; 2538509Smrj uint64_t paddr; 2539509Smrj uint32_t psize; 2540509Smrj uint32_t size; 2541509Smrj caddr_t vaddr; 2542509Smrj uint_t pcnt; 2543509Smrj page_t *pp; 2544509Smrj uint_t cnt; 2545509Smrj 2546509Smrj 2547509Smrj /* shortcuts */ 2548509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2549509Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2550509Smrj maxseg = sglinfo->si_max_cookie_size; 2551509Smrj buftype = dmar_object->dmao_type; 2552509Smrj addrhi = sglinfo->si_max_addr; 2553509Smrj addrlo = sglinfo->si_min_addr; 2554509Smrj size = dmar_object->dmao_size; 2555509Smrj 2556509Smrj pcnt = 0; 2557509Smrj cnt = 0; 2558509Smrj 2559509Smrj /* 2560509Smrj * if we were passed down a linked list of pages, i.e. pointer to 2561509Smrj * page_t, use this to get our physical address and buf offset. 2562509Smrj */ 2563509Smrj if (buftype == DMA_OTYP_PAGES) { 2564509Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2565509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2566509Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2567509Smrj MMU_PAGEOFFSET; 25685084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum) + offset; 2569509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2570509Smrj pp = pp->p_next; 2571509Smrj sglinfo->si_asp = NULL; 2572509Smrj 2573509Smrj /* 2574509Smrj * We weren't passed down a linked list of pages, but if we were passed 2575509Smrj * down an array of pages, use this to get our physical address and buf 2576509Smrj * offset. 2577509Smrj */ 2578509Smrj } else if (pplist != NULL) { 2579509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2580509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2581509Smrj 2582509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2583509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2584509Smrj if (sglinfo->si_asp == NULL) { 2585509Smrj sglinfo->si_asp = &kas; 2586509Smrj } 2587509Smrj 2588509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 25895084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2590509Smrj paddr += offset; 2591509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2592509Smrj pcnt++; 2593509Smrj 2594509Smrj /* 2595509Smrj * All we have is a virtual address, we'll need to call into the VM 2596509Smrj * to get the physical address. 2597509Smrj */ 2598509Smrj } else { 2599509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2600509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2601509Smrj 2602509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2603509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2604509Smrj if (sglinfo->si_asp == NULL) { 2605509Smrj sglinfo->si_asp = &kas; 2606509Smrj } 2607509Smrj 26085084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2609509Smrj paddr += offset; 2610509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2611509Smrj vaddr += psize; 2612509Smrj } 2613509Smrj 26145084Sjohnlev #ifdef __xpv 26155084Sjohnlev /* 26165084Sjohnlev * If we're dom0, we're using a real device so we need to load 26175084Sjohnlev * the cookies with MFNs instead of PFNs. 26185084Sjohnlev */ 26195084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 26205084Sjohnlev #else 26215084Sjohnlev raddr = paddr; 26225084Sjohnlev #endif 26235084Sjohnlev 2624509Smrj /* 2625509Smrj * Setup the first cookie with the physical address of the page and the 2626509Smrj * size of the page (which takes into account the initial offset into 2627509Smrj * the page. 2628509Smrj */ 26295084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2630509Smrj sgl[cnt].dmac_size = psize; 2631509Smrj sgl[cnt].dmac_type = 0; 2632509Smrj 2633509Smrj /* 2634509Smrj * Save away the buffer offset into the page. We'll need this later in 2635509Smrj * the copy buffer code to help figure out the page index within the 2636509Smrj * buffer and the offset into the current page. 2637509Smrj */ 2638509Smrj sglinfo->si_buf_offset = offset; 2639509Smrj 2640509Smrj /* 2641509Smrj * If the DMA engine can't reach the physical address, increase how 2642509Smrj * much copy buffer we need. We always increase by pagesize so we don't 2643509Smrj * have to worry about converting offsets. Set a flag in the cookies 2644509Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 2645509Smrj * last cookie, go to the next cookie (since we separate each page which 2646509Smrj * uses the copy buffer in case the copy buffer is not physically 2647509Smrj * contiguous. 2648509Smrj */ 26495084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2650509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2651509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2652509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2653509Smrj cnt++; 2654509Smrj sgl[cnt].dmac_laddress = 0; 2655509Smrj sgl[cnt].dmac_size = 0; 2656509Smrj sgl[cnt].dmac_type = 0; 2657509Smrj } 2658509Smrj } 2659509Smrj 2660509Smrj /* 2661509Smrj * save this page's physical address so we can figure out if the next 2662509Smrj * page is physically contiguous. Keep decrementing size until we are 2663509Smrj * done with the buffer. 2664509Smrj */ 26655084Sjohnlev last_page = raddr & MMU_PAGEMASK; 2666509Smrj size -= psize; 2667509Smrj 2668509Smrj while (size > 0) { 2669509Smrj /* Get the size for this page (i.e. partial or full page) */ 2670509Smrj psize = MIN(size, MMU_PAGESIZE); 2671509Smrj 2672509Smrj if (buftype == DMA_OTYP_PAGES) { 2673509Smrj /* get the paddr from the page_t */ 2674509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 26755084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum); 2676509Smrj pp = pp->p_next; 2677509Smrj } else if (pplist != NULL) { 2678509Smrj /* index into the array of page_t's to get the paddr */ 2679509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 26805084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2681509Smrj pcnt++; 26820Sstevel@tonic-gate } else { 2683509Smrj /* call into the VM to get the paddr */ 26845084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2685509Smrj vaddr)); 2686509Smrj vaddr += psize; 2687509Smrj } 2688509Smrj 26895084Sjohnlev #ifdef __xpv 26905084Sjohnlev /* 26915084Sjohnlev * If we're dom0, we're using a real device so we need to load 26925084Sjohnlev * the cookies with MFNs instead of PFNs. 26935084Sjohnlev */ 26945084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 26955084Sjohnlev #else 26965084Sjohnlev raddr = paddr; 26975084Sjohnlev #endif 2698509Smrj /* check to see if this page needs the copy buffer */ 26995084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2700509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2701509Smrj 27020Sstevel@tonic-gate /* 2703509Smrj * if there is something in the current cookie, go to 2704509Smrj * the next one. We only want one page in a cookie which 2705509Smrj * uses the copybuf since the copybuf doesn't have to 2706509Smrj * be physically contiguous. 2707509Smrj */ 2708509Smrj if (sgl[cnt].dmac_size != 0) { 2709509Smrj cnt++; 2710509Smrj } 27115084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2712509Smrj sgl[cnt].dmac_size = psize; 2713509Smrj #if defined(__amd64) 2714509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2715509Smrj #else 2716509Smrj /* 2717509Smrj * save the buf offset for 32-bit kernel. used in the 2718509Smrj * obsoleted interfaces. 2719509Smrj */ 2720509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2721509Smrj (dmar_object->dmao_size - size); 2722509Smrj #endif 2723509Smrj /* if this isn't the last cookie, go to the next one */ 2724509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2725509Smrj cnt++; 2726509Smrj sgl[cnt].dmac_laddress = 0; 2727509Smrj sgl[cnt].dmac_size = 0; 2728509Smrj sgl[cnt].dmac_type = 0; 2729509Smrj } 2730509Smrj 2731509Smrj /* 2732509Smrj * this page didn't need the copy buffer, if it's not physically 2733509Smrj * contiguous, or it would put us over a segment boundary, or it 2734509Smrj * puts us over the max cookie size, or the current sgl doesn't 2735509Smrj * have anything in it. 2736509Smrj */ 27375084Sjohnlev } else if (((last_page + MMU_PAGESIZE) != raddr) || 27385084Sjohnlev !(raddr & sglinfo->si_segmask) || 2739509Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 2740509Smrj (sgl[cnt].dmac_size == 0)) { 2741509Smrj /* 2742509Smrj * if we're not already in a new cookie, go to the next 2743509Smrj * cookie. 2744509Smrj */ 2745509Smrj if (sgl[cnt].dmac_size != 0) { 2746509Smrj cnt++; 2747509Smrj } 2748509Smrj 2749509Smrj /* save the cookie information */ 27505084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2751509Smrj sgl[cnt].dmac_size = psize; 2752509Smrj #if defined(__amd64) 2753509Smrj sgl[cnt].dmac_type = 0; 2754509Smrj #else 2755509Smrj /* 2756509Smrj * save the buf offset for 32-bit kernel. used in the 2757509Smrj * obsoleted interfaces. 2758509Smrj */ 2759509Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2760509Smrj #endif 2761509Smrj 2762509Smrj /* 2763509Smrj * this page didn't need the copy buffer, it is physically 2764509Smrj * contiguous with the last page, and it's <= the max cookie 2765509Smrj * size. 2766509Smrj */ 2767509Smrj } else { 2768509Smrj sgl[cnt].dmac_size += psize; 2769509Smrj 2770509Smrj /* 2771509Smrj * if this exactly == the maximum cookie size, and 2772509Smrj * it isn't the last cookie, go to the next cookie. 2773509Smrj */ 2774509Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 2775509Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 2776509Smrj cnt++; 2777509Smrj sgl[cnt].dmac_laddress = 0; 2778509Smrj sgl[cnt].dmac_size = 0; 2779509Smrj sgl[cnt].dmac_type = 0; 2780509Smrj } 2781509Smrj } 2782509Smrj 2783509Smrj /* 2784509Smrj * save this page's physical address so we can figure out if the 2785509Smrj * next page is physically contiguous. Keep decrementing size 2786509Smrj * until we are done with the buffer. 2787509Smrj */ 27885084Sjohnlev last_page = raddr; 2789509Smrj size -= psize; 2790509Smrj } 2791509Smrj 2792509Smrj /* we're done, save away how many cookies the sgl has */ 2793509Smrj if (sgl[cnt].dmac_size == 0) { 2794509Smrj ASSERT(cnt < sglinfo->si_max_pages); 2795509Smrj sglinfo->si_sgl_size = cnt; 2796509Smrj } else { 2797509Smrj sglinfo->si_sgl_size = cnt + 1; 2798509Smrj } 2799509Smrj } 2800509Smrj 2801509Smrj 2802509Smrj /* 2803509Smrj * rootnex_bind_slowpath() 2804509Smrj * Call in the bind path if the calling driver can't use the sgl without 2805509Smrj * modifying it. We either need to use the copy buffer and/or we will end up 2806509Smrj * with a partial bind. 2807509Smrj */ 2808509Smrj static int 2809509Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2810509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2811509Smrj { 2812509Smrj rootnex_sglinfo_t *sinfo; 2813509Smrj rootnex_window_t *window; 2814509Smrj ddi_dma_cookie_t *cookie; 2815509Smrj size_t copybuf_used; 2816509Smrj size_t dmac_size; 2817509Smrj boolean_t partial; 2818509Smrj off_t cur_offset; 2819509Smrj page_t *cur_pp; 2820509Smrj major_t mnum; 2821509Smrj int e; 2822509Smrj int i; 2823509Smrj 2824509Smrj 2825509Smrj sinfo = &dma->dp_sglinfo; 2826509Smrj copybuf_used = 0; 2827509Smrj partial = B_FALSE; 2828509Smrj 2829509Smrj /* 2830509Smrj * If we're using the copybuf, set the copybuf state in dma struct. 2831509Smrj * Needs to be first since it sets the copy buffer size. 2832509Smrj */ 2833509Smrj if (sinfo->si_copybuf_req != 0) { 2834509Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2835509Smrj if (e != DDI_SUCCESS) { 2836509Smrj return (e); 2837509Smrj } 2838509Smrj } else { 2839509Smrj dma->dp_copybuf_size = 0; 2840509Smrj } 2841509Smrj 2842509Smrj /* 2843509Smrj * Figure out if we need to do a partial mapping. If so, figure out 2844509Smrj * if we need to trim the buffers when we munge the sgl. 2845509Smrj */ 2846509Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2847509Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2848509Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2849509Smrj dma->dp_partial_required = B_TRUE; 2850509Smrj if (attr->dma_attr_granular != 1) { 2851509Smrj dma->dp_trim_required = B_TRUE; 2852509Smrj } 2853509Smrj } else { 2854509Smrj dma->dp_partial_required = B_FALSE; 2855509Smrj dma->dp_trim_required = B_FALSE; 2856509Smrj } 2857509Smrj 2858509Smrj /* If we need to do a partial bind, make sure the driver supports it */ 2859509Smrj if (dma->dp_partial_required && 2860509Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2861509Smrj 2862509Smrj mnum = ddi_driver_major(dma->dp_dip); 2863509Smrj /* 2864509Smrj * patchable which allows us to print one warning per major 2865509Smrj * number. 2866509Smrj */ 2867509Smrj if ((rootnex_bind_warn) && 2868509Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2869509Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2870509Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 2871509Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 2872509Smrj "There is a small risk of data corruption in " 2873509Smrj "particular with large I/Os. The driver should be " 2874509Smrj "replaced with a corrected version for proper " 2875509Smrj "system operation. To disable this warning, add " 2876509Smrj "'set rootnex:rootnex_bind_warn=0' to " 2877509Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2878509Smrj } 2879509Smrj return (DDI_DMA_TOOBIG); 2880509Smrj } 2881509Smrj 2882509Smrj /* 2883509Smrj * we might need multiple windows, setup state to handle them. In this 2884509Smrj * code path, we will have at least one window. 2885509Smrj */ 2886509Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 2887509Smrj if (e != DDI_SUCCESS) { 2888509Smrj rootnex_teardown_copybuf(dma); 2889509Smrj return (e); 2890509Smrj } 2891509Smrj 2892509Smrj window = &dma->dp_window[0]; 2893509Smrj cookie = &dma->dp_cookies[0]; 2894509Smrj cur_offset = 0; 2895509Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 2896509Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2897509Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2898509Smrj } 2899509Smrj 2900509Smrj /* loop though all the cookies we got back from get_sgl() */ 2901509Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 2902509Smrj /* 2903509Smrj * If we're using the copy buffer, check this cookie and setup 2904509Smrj * its associated copy buffer state. If this cookie uses the 2905509Smrj * copy buffer, make sure we sync this window during dma_sync. 2906509Smrj */ 2907509Smrj if (dma->dp_copybuf_size > 0) { 2908509Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2909509Smrj cur_offset, ©buf_used, &cur_pp); 2910509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2911509Smrj window->wd_dosync = B_TRUE; 2912509Smrj } 2913509Smrj } 2914509Smrj 2915509Smrj /* 2916509Smrj * save away the cookie size, since it could be modified in 2917509Smrj * the windowing code. 2918509Smrj */ 2919509Smrj dmac_size = cookie->dmac_size; 2920509Smrj 2921509Smrj /* if we went over max copybuf size */ 2922509Smrj if (dma->dp_copybuf_size && 2923509Smrj (copybuf_used > dma->dp_copybuf_size)) { 2924509Smrj partial = B_TRUE; 2925509Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 2926509Smrj cookie, cur_offset, ©buf_used); 2927509Smrj if (e != DDI_SUCCESS) { 2928509Smrj rootnex_teardown_copybuf(dma); 2929509Smrj rootnex_teardown_windows(dma); 2930509Smrj return (e); 2931509Smrj } 2932509Smrj 2933509Smrj /* 2934509Smrj * if the coookie uses the copy buffer, make sure the 2935509Smrj * new window we just moved to is set to sync. 2936509Smrj */ 2937509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2938509Smrj window->wd_dosync = B_TRUE; 2939509Smrj } 2940509Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2941509Smrj dma->dp_dip); 2942509Smrj 2943509Smrj /* if the cookie cnt == max sgllen, move to the next window */ 2944509Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2945509Smrj partial = B_TRUE; 2946509Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2947509Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 2948509Smrj cookie, attr, cur_offset); 2949509Smrj if (e != DDI_SUCCESS) { 2950509Smrj rootnex_teardown_copybuf(dma); 2951509Smrj rootnex_teardown_windows(dma); 2952509Smrj return (e); 2953509Smrj } 2954509Smrj 2955509Smrj /* 2956509Smrj * if the coookie uses the copy buffer, make sure the 2957509Smrj * new window we just moved to is set to sync. 2958509Smrj */ 2959509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2960509Smrj window->wd_dosync = B_TRUE; 2961509Smrj } 2962509Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2963509Smrj dma->dp_dip); 2964509Smrj 2965509Smrj /* else if we will be over maxxfer */ 2966509Smrj } else if ((window->wd_size + dmac_size) > 2967509Smrj dma->dp_maxxfer) { 2968509Smrj partial = B_TRUE; 2969509Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2970509Smrj cookie); 2971509Smrj if (e != DDI_SUCCESS) { 2972509Smrj rootnex_teardown_copybuf(dma); 2973509Smrj rootnex_teardown_windows(dma); 2974509Smrj return (e); 2975509Smrj } 2976509Smrj 2977509Smrj /* 2978509Smrj * if the coookie uses the copy buffer, make sure the 2979509Smrj * new window we just moved to is set to sync. 29800Sstevel@tonic-gate */ 2981509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2982509Smrj window->wd_dosync = B_TRUE; 2983509Smrj } 2984509Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2985509Smrj dma->dp_dip); 2986509Smrj 2987509Smrj /* else this cookie fits in the current window */ 2988509Smrj } else { 2989509Smrj window->wd_cookie_cnt++; 2990509Smrj window->wd_size += dmac_size; 2991509Smrj } 2992509Smrj 2993509Smrj /* track our offset into the buffer, go to the next cookie */ 2994509Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2995509Smrj ASSERT(cookie->dmac_size <= dmac_size); 2996509Smrj cur_offset += dmac_size; 2997509Smrj cookie++; 2998509Smrj } 2999509Smrj 3000509Smrj /* if we ended up with a zero sized window in the end, clean it up */ 3001509Smrj if (window->wd_size == 0) { 3002509Smrj hp->dmai_nwin--; 3003509Smrj window--; 3004509Smrj } 3005509Smrj 3006509Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 3007509Smrj 3008509Smrj if (!partial) { 3009509Smrj return (DDI_DMA_MAPPED); 3010509Smrj } 3011509Smrj 3012509Smrj ASSERT(dma->dp_partial_required); 3013509Smrj return (DDI_DMA_PARTIAL_MAP); 3014509Smrj } 3015509Smrj 3016509Smrj 3017509Smrj /* 3018509Smrj * rootnex_setup_copybuf() 3019509Smrj * Called in bind slowpath. Figures out if we're going to use the copy 3020509Smrj * buffer, and if we do, sets up the basic state to handle it. 3021509Smrj */ 3022509Smrj static int 3023509Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 3024509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 3025509Smrj { 3026509Smrj rootnex_sglinfo_t *sinfo; 3027509Smrj ddi_dma_attr_t lattr; 3028509Smrj size_t max_copybuf; 3029509Smrj int cansleep; 3030509Smrj int e; 3031509Smrj #if !defined(__amd64) 3032509Smrj int vmflag; 3033509Smrj #endif 3034509Smrj 3035509Smrj 3036509Smrj sinfo = &dma->dp_sglinfo; 3037509Smrj 30385251Smrj /* read this first so it's consistent through the routine */ 30395251Smrj max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 3040509Smrj 3041509Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 3042509Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 3043509Smrj 3044509Smrj /* make sure the copybuf size <= the max size */ 3045509Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 3046509Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 3047509Smrj 3048509Smrj #if !defined(__amd64) 3049509Smrj /* 3050509Smrj * if we don't have kva space to copy to/from, allocate the KVA space 3051509Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 3052509Smrj * the 64-bit kernel. 3053509Smrj */ 3054509Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 3055509Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 3056509Smrj 3057509Smrj /* convert the sleep flags */ 3058509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3059509Smrj vmflag = VM_SLEEP; 3060509Smrj } else { 3061509Smrj vmflag = VM_NOSLEEP; 3062509Smrj } 3063509Smrj 3064509Smrj /* allocate Kernel VA space that we can bcopy to/from */ 3065509Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 3066509Smrj vmflag); 3067509Smrj if (dma->dp_kva == NULL) { 3068509Smrj return (DDI_DMA_NORESOURCES); 3069509Smrj } 3070509Smrj } 3071509Smrj #endif 3072509Smrj 3073509Smrj /* convert the sleep flags */ 3074509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3075509Smrj cansleep = 1; 3076509Smrj } else { 3077509Smrj cansleep = 0; 3078509Smrj } 3079509Smrj 3080509Smrj /* 30817173Smrj * Allocate the actual copy buffer. This needs to fit within the DMA 30827173Smrj * engine limits, so we can't use kmem_alloc... We don't need 30837173Smrj * contiguous memory (sgllen) since we will be forcing windows on 30847173Smrj * sgllen anyway. 3085509Smrj */ 3086509Smrj lattr = *attr; 3087509Smrj lattr.dma_attr_align = MMU_PAGESIZE; 30887173Smrj /* 30897173Smrj * this should be < 0 to indicate no limit, but due to a bug in 30907173Smrj * the rootnex, we'll set it to the maximum positive int. 30917173Smrj */ 30927173Smrj lattr.dma_attr_sgllen = 0x7fffffff; 3093509Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 3094509Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 3095509Smrj if (e != DDI_SUCCESS) { 3096509Smrj #if !defined(__amd64) 3097509Smrj if (dma->dp_kva != NULL) { 3098509Smrj vmem_free(heap_arena, dma->dp_kva, 3099509Smrj dma->dp_copybuf_size); 3100509Smrj } 3101509Smrj #endif 3102509Smrj return (DDI_DMA_NORESOURCES); 3103509Smrj } 3104509Smrj 3105509Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 3106509Smrj size_t, dma->dp_copybuf_size); 3107509Smrj 3108509Smrj return (DDI_SUCCESS); 3109509Smrj } 3110509Smrj 3111509Smrj 3112509Smrj /* 3113509Smrj * rootnex_setup_windows() 3114509Smrj * Called in bind slowpath to setup the window state. We always have windows 3115509Smrj * in the slowpath. Even if the window count = 1. 3116509Smrj */ 3117509Smrj static int 3118509Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3119509Smrj ddi_dma_attr_t *attr, int kmflag) 3120509Smrj { 3121509Smrj rootnex_window_t *windowp; 3122509Smrj rootnex_sglinfo_t *sinfo; 3123509Smrj size_t copy_state_size; 3124509Smrj size_t win_state_size; 3125509Smrj size_t state_available; 3126509Smrj size_t space_needed; 3127509Smrj uint_t copybuf_win; 3128509Smrj uint_t maxxfer_win; 3129509Smrj size_t space_used; 3130509Smrj uint_t sglwin; 3131509Smrj 3132509Smrj 3133509Smrj sinfo = &dma->dp_sglinfo; 3134509Smrj 3135509Smrj dma->dp_current_win = 0; 3136509Smrj hp->dmai_nwin = 0; 3137509Smrj 3138509Smrj /* If we don't need to do a partial, we only have one window */ 3139509Smrj if (!dma->dp_partial_required) { 3140509Smrj dma->dp_max_win = 1; 3141509Smrj 3142509Smrj /* 3143509Smrj * we need multiple windows, need to figure out the worse case number 3144509Smrj * of windows. 3145509Smrj */ 3146509Smrj } else { 3147509Smrj /* 3148509Smrj * if we need windows because we need more copy buffer that 3149509Smrj * we allow, the worse case number of windows we could need 3150509Smrj * here would be (copybuf space required / copybuf space that 3151509Smrj * we have) plus one for remainder, and plus 2 to handle the 3152509Smrj * extra pages on the trim for the first and last pages of the 3153509Smrj * buffer (a page is the minimum window size so under the right 3154509Smrj * attr settings, you could have a window for each page). 3155509Smrj * The last page will only be hit here if the size is not a 3156509Smrj * multiple of the granularity (which theoretically shouldn't 3157509Smrj * be the case but never has been enforced, so we could have 3158509Smrj * broken things without it). 3159509Smrj */ 3160509Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 3161509Smrj ASSERT(dma->dp_copybuf_size > 0); 3162509Smrj copybuf_win = (sinfo->si_copybuf_req / 3163509Smrj dma->dp_copybuf_size) + 1 + 2; 3164509Smrj } else { 3165509Smrj copybuf_win = 0; 3166509Smrj } 3167509Smrj 3168509Smrj /* 3169509Smrj * if we need windows because we have more cookies than the H/W 3170509Smrj * can handle, the number of windows we would need here would 3171509Smrj * be (cookie count / cookies count H/W supports) plus one for 3172509Smrj * remainder, and plus 2 to handle the extra pages on the trim 3173509Smrj * (see above comment about trim) 3174509Smrj */ 3175509Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 3176509Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 3177509Smrj + 1) + 2; 3178509Smrj } else { 3179509Smrj sglwin = 0; 3180509Smrj } 3181509Smrj 3182509Smrj /* 3183509Smrj * if we need windows because we're binding more memory than the 3184509Smrj * H/W can transfer at once, the number of windows we would need 3185509Smrj * here would be (xfer count / max xfer H/W supports) plus one 3186509Smrj * for remainder, and plus 2 to handle the extra pages on the 3187509Smrj * trim (see above comment about trim) 3188509Smrj */ 3189509Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 3190509Smrj maxxfer_win = (dma->dp_dma.dmao_size / 3191509Smrj dma->dp_maxxfer) + 1 + 2; 3192509Smrj } else { 3193509Smrj maxxfer_win = 0; 3194509Smrj } 3195509Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 3196509Smrj ASSERT(dma->dp_max_win > 0); 3197509Smrj } 3198509Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 3199509Smrj 3200509Smrj /* 3201509Smrj * Get space for window and potential copy buffer state. Before we 3202509Smrj * go and allocate memory, see if we can get away with using what's 3203509Smrj * left in the pre-allocted state or the dynamically allocated sgl. 3204509Smrj */ 3205509Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 3206509Smrj sizeof (ddi_dma_cookie_t)); 3207509Smrj 3208509Smrj /* if we dynamically allocated space for the cookies */ 3209509Smrj if (dma->dp_need_to_free_cookie) { 3210509Smrj /* if we have more space in the pre-allocted buffer, use it */ 3211509Smrj ASSERT(space_used <= dma->dp_cookie_size); 3212509Smrj if ((dma->dp_cookie_size - space_used) <= 3213509Smrj rootnex_state->r_prealloc_size) { 3214509Smrj state_available = rootnex_state->r_prealloc_size; 3215509Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 3216509Smrj 3217509Smrj /* 3218509Smrj * else, we have more free space in the dynamically allocated 3219509Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 3220509Smrj * didn't need a lot of cookies. 3221509Smrj */ 3222509Smrj } else { 3223509Smrj state_available = dma->dp_cookie_size - space_used; 3224509Smrj windowp = (rootnex_window_t *) 3225509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 3226509Smrj } 3227509Smrj 3228509Smrj /* we used the pre-alloced buffer */ 3229509Smrj } else { 3230509Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 3231509Smrj state_available = rootnex_state->r_prealloc_size - space_used; 3232509Smrj windowp = (rootnex_window_t *) 3233509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 3234509Smrj } 3235509Smrj 3236509Smrj /* 3237509Smrj * figure out how much state we need to track the copy buffer. Add an 3238509Smrj * addition 8 bytes for pointer alignemnt later. 3239509Smrj */ 3240509Smrj if (dma->dp_copybuf_size > 0) { 3241509Smrj copy_state_size = sinfo->si_max_pages * 3242509Smrj sizeof (rootnex_pgmap_t); 3243509Smrj } else { 3244509Smrj copy_state_size = 0; 3245509Smrj } 3246509Smrj /* add an additional 8 bytes for pointer alignment */ 3247509Smrj space_needed = win_state_size + copy_state_size + 0x8; 3248509Smrj 3249509Smrj /* if we have enough space already, use it */ 3250509Smrj if (state_available >= space_needed) { 3251509Smrj dma->dp_window = windowp; 3252509Smrj dma->dp_need_to_free_window = B_FALSE; 3253509Smrj 3254509Smrj /* not enough space, need to allocate more. */ 3255509Smrj } else { 3256509Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 3257509Smrj if (dma->dp_window == NULL) { 3258509Smrj return (DDI_DMA_NORESOURCES); 3259509Smrj } 3260509Smrj dma->dp_need_to_free_window = B_TRUE; 3261509Smrj dma->dp_window_size = space_needed; 3262509Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 3263509Smrj dma->dp_dip, size_t, space_needed); 3264509Smrj } 3265509Smrj 3266509Smrj /* 3267509Smrj * we allocate copy buffer state and window state at the same time. 3268509Smrj * setup our copy buffer state pointers. Make sure it's aligned. 3269509Smrj */ 3270509Smrj if (dma->dp_copybuf_size > 0) { 3271509Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 3272509Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 3273509Smrj 3274509Smrj #if !defined(__amd64) 3275509Smrj /* 3276509Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 3277509Smrj * false/NULL. Should be quicker to bzero vs loop and set. 3278509Smrj */ 3279509Smrj bzero(dma->dp_pgmap, copy_state_size); 3280509Smrj #endif 3281509Smrj } else { 3282509Smrj dma->dp_pgmap = NULL; 3283509Smrj } 3284509Smrj 3285509Smrj return (DDI_SUCCESS); 3286509Smrj } 3287509Smrj 3288509Smrj 3289509Smrj /* 3290509Smrj * rootnex_teardown_copybuf() 3291509Smrj * cleans up after rootnex_setup_copybuf() 3292509Smrj */ 3293509Smrj static void 3294509Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 3295509Smrj { 3296509Smrj #if !defined(__amd64) 3297509Smrj int i; 3298509Smrj 3299509Smrj /* 3300509Smrj * if we allocated kernel heap VMEM space, go through all the pages and 3301509Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 3302509Smrj * arena. Then free the VMEM space. 3303509Smrj */ 3304509Smrj if (dma->dp_kva != NULL) { 3305509Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 3306509Smrj if (dma->dp_pgmap[i].pm_mapped) { 3307509Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 3308509Smrj MMU_PAGESIZE, HAT_UNLOAD); 3309509Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 3310509Smrj } 3311509Smrj } 3312509Smrj 3313509Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 3314509Smrj } 3315509Smrj 3316509Smrj #endif 3317509Smrj 3318509Smrj /* if we allocated a copy buffer, free it */ 3319509Smrj if (dma->dp_cbaddr != NULL) { 33201900Seota i_ddi_mem_free(dma->dp_cbaddr, NULL); 3321509Smrj } 3322509Smrj } 3323509Smrj 3324509Smrj 3325509Smrj /* 3326509Smrj * rootnex_teardown_windows() 3327509Smrj * cleans up after rootnex_setup_windows() 3328509Smrj */ 3329509Smrj static void 3330509Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 3331509Smrj { 3332509Smrj /* 3333509Smrj * if we had to allocate window state on the last bind (because we 3334509Smrj * didn't have enough pre-allocated space in the handle), free it. 3335509Smrj */ 3336509Smrj if (dma->dp_need_to_free_window) { 3337509Smrj kmem_free(dma->dp_window, dma->dp_window_size); 3338509Smrj } 3339509Smrj } 3340509Smrj 3341509Smrj 3342509Smrj /* 3343509Smrj * rootnex_init_win() 3344509Smrj * Called in bind slow path during creation of a new window. Initializes 3345509Smrj * window state to default values. 3346509Smrj */ 3347509Smrj /*ARGSUSED*/ 3348509Smrj static void 3349509Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3350509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3351509Smrj { 3352509Smrj hp->dmai_nwin++; 3353509Smrj window->wd_dosync = B_FALSE; 3354509Smrj window->wd_offset = cur_offset; 3355509Smrj window->wd_size = 0; 3356509Smrj window->wd_first_cookie = cookie; 3357509Smrj window->wd_cookie_cnt = 0; 3358509Smrj window->wd_trim.tr_trim_first = B_FALSE; 3359509Smrj window->wd_trim.tr_trim_last = B_FALSE; 3360509Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 3361509Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 3362509Smrj #if !defined(__amd64) 3363509Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 3364509Smrj #endif 3365509Smrj } 3366509Smrj 3367509Smrj 3368509Smrj /* 3369509Smrj * rootnex_setup_cookie() 3370509Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 3371509Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 3372509Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 3373509Smrj * need during sync. 3374509Smrj */ 3375509Smrj static void 3376509Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3377509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3378509Smrj page_t **cur_pp) 3379509Smrj { 3380509Smrj boolean_t copybuf_sz_power_2; 3381509Smrj rootnex_sglinfo_t *sinfo; 33825084Sjohnlev paddr_t paddr; 3383509Smrj uint_t pidx; 3384509Smrj uint_t pcnt; 3385509Smrj off_t poff; 3386509Smrj #if defined(__amd64) 3387509Smrj pfn_t pfn; 3388509Smrj #else 3389509Smrj page_t **pplist; 3390509Smrj #endif 3391509Smrj 3392509Smrj sinfo = &dma->dp_sglinfo; 3393509Smrj 3394509Smrj /* 3395509Smrj * Calculate the page index relative to the start of the buffer. The 3396509Smrj * index to the current page for our buffer is the offset into the 3397509Smrj * first page of the buffer plus our current offset into the buffer 3398509Smrj * itself, shifted of course... 3399509Smrj */ 3400509Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3401509Smrj ASSERT(pidx < sinfo->si_max_pages); 3402509Smrj 3403509Smrj /* if this cookie uses the copy buffer */ 3404509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3405509Smrj /* 3406509Smrj * NOTE: we know that since this cookie uses the copy buffer, it 3407509Smrj * is <= MMU_PAGESIZE. 3408509Smrj */ 3409509Smrj 3410509Smrj /* 3411509Smrj * get the offset into the page. For the 64-bit kernel, get the 3412509Smrj * pfn which we'll use with seg kpm. 3413509Smrj */ 34145084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3415509Smrj #if defined(__amd64) 34165084Sjohnlev /* mfn_to_pfn() is a NOP on i86pc */ 34175084Sjohnlev pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 34185084Sjohnlev #endif /* __amd64 */ 3419509Smrj 3420509Smrj /* figure out if the copybuf size is a power of 2 */ 3421509Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3422509Smrj copybuf_sz_power_2 = B_FALSE; 3423509Smrj } else { 3424509Smrj copybuf_sz_power_2 = B_TRUE; 3425509Smrj } 3426509Smrj 3427509Smrj /* This page uses the copy buffer */ 3428509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3429509Smrj 3430509Smrj /* 3431509Smrj * save the copy buffer KVA that we'll use with this page. 3432509Smrj * if we still fit within the copybuf, it's a simple add. 3433509Smrj * otherwise, we need to wrap over using & or % accordingly. 3434509Smrj */ 3435509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3436509Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3437509Smrj *copybuf_used; 3438509Smrj } else { 3439509Smrj if (copybuf_sz_power_2) { 3440509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3441509Smrj (uintptr_t)dma->dp_cbaddr + 3442509Smrj (*copybuf_used & 3443509Smrj (dma->dp_copybuf_size - 1))); 34440Sstevel@tonic-gate } else { 3445509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3446509Smrj (uintptr_t)dma->dp_cbaddr + 3447509Smrj (*copybuf_used % dma->dp_copybuf_size)); 34480Sstevel@tonic-gate } 3449509Smrj } 3450509Smrj 3451509Smrj /* 3452509Smrj * over write the cookie physical address with the address of 3453509Smrj * the physical address of the copy buffer page that we will 3454509Smrj * use. 3455509Smrj */ 34565084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3457509Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3458509Smrj 34595084Sjohnlev #ifdef __xpv 34605084Sjohnlev /* 34615084Sjohnlev * If we're dom0, we're using a real device so we need to load 34625084Sjohnlev * the cookies with MAs instead of PAs. 34635084Sjohnlev */ 34645084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 34655084Sjohnlev #else 34665084Sjohnlev cookie->dmac_laddress = paddr; 34675084Sjohnlev #endif 34685084Sjohnlev 3469509Smrj /* if we have a kernel VA, it's easy, just save that address */ 3470509Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3471509Smrj (sinfo->si_asp == &kas)) { 3472509Smrj /* 3473509Smrj * save away the page aligned virtual address of the 3474509Smrj * driver buffer. Offsets are handled in the sync code. 3475509Smrj */ 3476509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3477509Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3478509Smrj & MMU_PAGEMASK); 3479509Smrj #if !defined(__amd64) 3480509Smrj /* 3481509Smrj * we didn't need to, and will never need to map this 3482509Smrj * page. 3483509Smrj */ 3484509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3485509Smrj #endif 3486509Smrj 3487509Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 3488509Smrj } else { 3489509Smrj #if defined(__amd64) 3490509Smrj /* 3491509Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 3492509Smrj * get a Kernel VA for the corresponding pfn. 3493509Smrj */ 3494509Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3495509Smrj #else 3496509Smrj /* 3497509Smrj * for the 32-bit kernel, this is a pain. First we'll 3498509Smrj * save away the page_t or user VA for this page. This 3499509Smrj * is needed in rootnex_dma_win() when we switch to a 3500509Smrj * new window which requires us to re-map the copy 3501509Smrj * buffer. 3502509Smrj */ 3503509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3504509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3505509Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3506509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3507509Smrj } else if (pplist != NULL) { 3508509Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3509509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3510509Smrj } else { 3511509Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 3512509Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3513509Smrj (((uintptr_t) 3514509Smrj dmar_object->dmao_obj.virt_obj.v_addr + 3515509Smrj cur_offset) & MMU_PAGEMASK); 3516509Smrj } 3517509Smrj 3518509Smrj /* 3519509Smrj * save away the page aligned virtual address which was 3520509Smrj * allocated from the kernel heap arena (taking into 3521509Smrj * account if we need more copy buffer than we alloced 3522509Smrj * and use multiple windows to handle this, i.e. &,%). 3523509Smrj * NOTE: there isn't and physical memory backing up this 3524509Smrj * virtual address space currently. 3525509Smrj */ 3526509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 3527509Smrj dma->dp_copybuf_size) { 3528509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3529509Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 3530509Smrj MMU_PAGEMASK); 3531509Smrj } else { 3532509Smrj if (copybuf_sz_power_2) { 3533509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3534509Smrj (((uintptr_t)dma->dp_kva + 3535509Smrj (*copybuf_used & 3536509Smrj (dma->dp_copybuf_size - 1))) & 3537509Smrj MMU_PAGEMASK); 3538509Smrj } else { 3539509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3540509Smrj (((uintptr_t)dma->dp_kva + 3541509Smrj (*copybuf_used % 3542509Smrj dma->dp_copybuf_size)) & 3543509Smrj MMU_PAGEMASK); 3544509Smrj } 3545509Smrj } 3546509Smrj 3547509Smrj /* 3548509Smrj * if we haven't used up the available copy buffer yet, 3549509Smrj * map the kva to the physical page. 3550509Smrj */ 3551509Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 3552509Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3553509Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3554509Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3555509Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3556509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3557509Smrj } else { 3558509Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3559509Smrj sinfo->si_asp, 3560509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3561509Smrj } 3562509Smrj 3563509Smrj /* 3564509Smrj * we've used up the available copy buffer, this page 3565509Smrj * will have to be mapped during rootnex_dma_win() when 3566509Smrj * we switch to a new window which requires a re-map 3567509Smrj * the copy buffer. (32-bit kernel only) 3568509Smrj */ 3569509Smrj } else { 3570509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3571509Smrj } 3572509Smrj #endif 3573509Smrj /* go to the next page_t */ 3574509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3575509Smrj *cur_pp = (*cur_pp)->p_next; 3576509Smrj } 35770Sstevel@tonic-gate } 3578509Smrj 3579509Smrj /* add to the copy buffer count */ 3580509Smrj *copybuf_used += MMU_PAGESIZE; 3581509Smrj 3582509Smrj /* 3583509Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 3584509Smrj * cookie occupies to reflect this. 3585509Smrj */ 3586509Smrj } else { 3587509Smrj /* 3588509Smrj * figure out how many pages the cookie occupies. We need to 3589509Smrj * use the original page offset of the buffer and the cookies 3590509Smrj * offset in the buffer to do this. 3591509Smrj */ 3592509Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3593509Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 3594509Smrj 3595509Smrj while (pcnt > 0) { 3596509Smrj #if !defined(__amd64) 3597509Smrj /* 3598509Smrj * the 32-bit kernel doesn't have seg kpm, so we need 3599509Smrj * to map in the driver buffer (if it didn't come down 3600509Smrj * with a kernel VA) on the fly. Since this page doesn't 3601509Smrj * use the copy buffer, it's not, or will it ever, have 3602509Smrj * to be mapped in. 3603509Smrj */ 3604509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3605509Smrj #endif 3606509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3607509Smrj 3608509Smrj /* 3609509Smrj * we need to update pidx and cur_pp or we'll loose 3610509Smrj * track of where we are. 3611509Smrj */ 3612509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3613509Smrj *cur_pp = (*cur_pp)->p_next; 3614509Smrj } 3615509Smrj pidx++; 3616509Smrj pcnt--; 3617509Smrj } 3618509Smrj } 3619509Smrj } 3620509Smrj 3621509Smrj 3622509Smrj /* 3623509Smrj * rootnex_sgllen_window_boundary() 3624509Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 3625509Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3626509Smrj * length supported by the DMA H/W. 3627509Smrj */ 3628509Smrj static int 3629509Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3630509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3631509Smrj off_t cur_offset) 3632509Smrj { 3633509Smrj off_t new_offset; 3634509Smrj size_t trim_sz; 3635509Smrj off_t coffset; 3636509Smrj 3637509Smrj 3638509Smrj /* 3639509Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 3640509Smrj * the next window and init it. We're done. 3641509Smrj */ 3642509Smrj if (!dma->dp_trim_required) { 3643509Smrj (*windowp)++; 3644509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3645509Smrj (*windowp)->wd_cookie_cnt++; 3646509Smrj (*windowp)->wd_size = cookie->dmac_size; 3647509Smrj return (DDI_SUCCESS); 3648509Smrj } 3649509Smrj 3650509Smrj /* figure out how much we need to trim from the window */ 3651509Smrj ASSERT(attr->dma_attr_granular != 0); 3652509Smrj if (dma->dp_granularity_power_2) { 3653509Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3654509Smrj } else { 3655509Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3656509Smrj } 3657509Smrj 3658509Smrj /* The window's a whole multiple of granularity. We're done */ 3659509Smrj if (trim_sz == 0) { 3660509Smrj (*windowp)++; 3661509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3662509Smrj (*windowp)->wd_cookie_cnt++; 3663509Smrj (*windowp)->wd_size = cookie->dmac_size; 3664509Smrj return (DDI_SUCCESS); 3665509Smrj } 3666509Smrj 3667509Smrj /* 3668509Smrj * The window's not a whole multiple of granularity, since we know this 3669509Smrj * is due to the sgllen, we need to go back to the last cookie and trim 3670509Smrj * that one, add the left over part of the old cookie into the new 3671509Smrj * window, and then add in the new cookie into the new window. 3672509Smrj */ 3673509Smrj 3674509Smrj /* 3675509Smrj * make sure the driver isn't making us do something bad... Trimming and 3676509Smrj * sgllen == 1 don't go together. 3677509Smrj */ 3678509Smrj if (attr->dma_attr_sgllen == 1) { 3679509Smrj return (DDI_DMA_NOMAPPING); 3680509Smrj } 3681509Smrj 3682509Smrj /* 3683509Smrj * first, setup the current window to account for the trim. Need to go 3684509Smrj * back to the last cookie for this. 3685509Smrj */ 3686509Smrj cookie--; 3687509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3688509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 36895084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3690509Smrj ASSERT(cookie->dmac_size > trim_sz); 3691509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3692509Smrj (*windowp)->wd_size -= trim_sz; 3693509Smrj 3694509Smrj /* save the buffer offsets for the next window */ 3695509Smrj coffset = cookie->dmac_size - trim_sz; 3696509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3697509Smrj 3698509Smrj /* 3699509Smrj * set this now in case this is the first window. all other cases are 3700509Smrj * set in dma_win() 3701509Smrj */ 3702509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3703509Smrj 3704509Smrj /* 3705509Smrj * initialize the next window using what's left over in the previous 3706509Smrj * cookie. 3707509Smrj */ 3708509Smrj (*windowp)++; 3709509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3710509Smrj (*windowp)->wd_cookie_cnt++; 3711509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 37125084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3713509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3714509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3715509Smrj (*windowp)->wd_dosync = B_TRUE; 3716509Smrj } 3717509Smrj 3718509Smrj /* 3719509Smrj * now go back to the current cookie and add it to the new window. set 3720509Smrj * the new window size to the what was left over from the previous 3721509Smrj * cookie and what's in the current cookie. 3722509Smrj */ 3723509Smrj cookie++; 3724509Smrj (*windowp)->wd_cookie_cnt++; 3725509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3726509Smrj 3727509Smrj /* 3728509Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 3729509Smrj * a max size of maxxfer). Handle that case. 3730509Smrj */ 3731509Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 3732509Smrj /* 3733509Smrj * maxxfer is already a whole multiple of granularity, and this 3734509Smrj * trim will be <= the previous trim (since a cookie can't be 3735509Smrj * larger than maxxfer). Make things simple here. 3736509Smrj */ 3737509Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3738509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3739509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 37405084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3741509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3742509Smrj (*windowp)->wd_size -= trim_sz; 3743509Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3744509Smrj 3745509Smrj /* save the buffer offsets for the next window */ 3746509Smrj coffset = cookie->dmac_size - trim_sz; 3747509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3748509Smrj 3749509Smrj /* setup the next window */ 3750509Smrj (*windowp)++; 3751509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3752509Smrj (*windowp)->wd_cookie_cnt++; 3753509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 37545084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3755509Smrj coffset; 3756509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3757509Smrj } 3758509Smrj 3759509Smrj return (DDI_SUCCESS); 3760509Smrj } 3761509Smrj 3762509Smrj 3763509Smrj /* 3764509Smrj * rootnex_copybuf_window_boundary() 3765509Smrj * Called in bind slowpath when we get to a window boundary because we used 3766509Smrj * up all the copy buffer that we have. 3767509Smrj */ 3768509Smrj static int 3769509Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3770509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3771509Smrj size_t *copybuf_used) 3772509Smrj { 3773509Smrj rootnex_sglinfo_t *sinfo; 3774509Smrj off_t new_offset; 3775509Smrj size_t trim_sz; 37765084Sjohnlev paddr_t paddr; 3777509Smrj off_t coffset; 3778509Smrj uint_t pidx; 3779509Smrj off_t poff; 3780509Smrj 3781509Smrj 3782509Smrj sinfo = &dma->dp_sglinfo; 3783509Smrj 3784509Smrj /* 3785509Smrj * the copy buffer should be a whole multiple of page size. We know that 3786509Smrj * this cookie is <= MMU_PAGESIZE. 3787509Smrj */ 3788509Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3789509Smrj 3790509Smrj /* 3791509Smrj * from now on, all new windows in this bind need to be re-mapped during 3792509Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3793509Smrj * space... 3794509Smrj */ 3795509Smrj #if !defined(__amd64) 3796509Smrj dma->dp_cb_remaping = B_TRUE; 3797509Smrj #endif 3798509Smrj 3799509Smrj /* reset copybuf used */ 3800509Smrj *copybuf_used = 0; 3801509Smrj 3802509Smrj /* 3803509Smrj * if we don't have to trim (since granularity is set to 1), go to the 3804509Smrj * next window and add the current cookie to it. We know the current 3805509Smrj * cookie uses the copy buffer since we're in this code path. 3806509Smrj */ 3807509Smrj if (!dma->dp_trim_required) { 3808509Smrj (*windowp)++; 3809509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3810509Smrj 3811509Smrj /* Add this cookie to the new window */ 3812509Smrj (*windowp)->wd_cookie_cnt++; 3813509Smrj (*windowp)->wd_size += cookie->dmac_size; 3814509Smrj *copybuf_used += MMU_PAGESIZE; 3815509Smrj return (DDI_SUCCESS); 3816509Smrj } 3817509Smrj 3818509Smrj /* 3819509Smrj * *** may need to trim, figure it out. 3820509Smrj */ 3821509Smrj 3822509Smrj /* figure out how much we need to trim from the window */ 3823509Smrj if (dma->dp_granularity_power_2) { 3824509Smrj trim_sz = (*windowp)->wd_size & 3825509Smrj (hp->dmai_attr.dma_attr_granular - 1); 3826509Smrj } else { 3827509Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3828509Smrj } 3829509Smrj 3830509Smrj /* 3831509Smrj * if the window's a whole multiple of granularity, go to the next 3832509Smrj * window, init it, then add in the current cookie. We know the current 3833509Smrj * cookie uses the copy buffer since we're in this code path. 3834509Smrj */ 3835509Smrj if (trim_sz == 0) { 3836509Smrj (*windowp)++; 3837509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3838509Smrj 3839509Smrj /* Add this cookie to the new window */ 3840509Smrj (*windowp)->wd_cookie_cnt++; 3841509Smrj (*windowp)->wd_size += cookie->dmac_size; 3842509Smrj *copybuf_used += MMU_PAGESIZE; 3843509Smrj return (DDI_SUCCESS); 3844509Smrj } 3845509Smrj 3846509Smrj /* 3847509Smrj * *** We figured it out, we definitly need to trim 3848509Smrj */ 3849509Smrj 3850509Smrj /* 3851509Smrj * make sure the driver isn't making us do something bad... 3852509Smrj * Trimming and sgllen == 1 don't go together. 3853509Smrj */ 3854509Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 3855509Smrj return (DDI_DMA_NOMAPPING); 3856509Smrj } 3857509Smrj 3858509Smrj /* 3859509Smrj * first, setup the current window to account for the trim. Need to go 3860509Smrj * back to the last cookie for this. Some of the last cookie will be in 3861509Smrj * the current window, and some of the last cookie will be in the new 3862509Smrj * window. All of the current cookie will be in the new window. 3863509Smrj */ 3864509Smrj cookie--; 3865509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3866509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 38675084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3868509Smrj ASSERT(cookie->dmac_size > trim_sz); 3869509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3870509Smrj (*windowp)->wd_size -= trim_sz; 3871509Smrj 3872509Smrj /* 3873509Smrj * we're trimming the last cookie (not the current cookie). So that 3874509Smrj * last cookie may have or may not have been using the copy buffer ( 3875509Smrj * we know the cookie passed in uses the copy buffer since we're in 3876509Smrj * this code path). 3877509Smrj * 3878509Smrj * If the last cookie doesn't use the copy buffer, nothing special to 3879509Smrj * do. However, if it does uses the copy buffer, it will be both the 3880509Smrj * last page in the current window and the first page in the next 3881509Smrj * window. Since we are reusing the copy buffer (and KVA space on the 3882509Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 3883509Smrj * current window, and the start of the copy buffer in the next window. 3884509Smrj * Track that info... The cookie physical address was already set to 3885509Smrj * the copy buffer physical address in setup_cookie.. 3886509Smrj */ 3887509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3888509Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3889509Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 3890509Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3891509Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 3892509Smrj (*windowp)->wd_trim.tr_last_cbaddr = 3893509Smrj dma->dp_pgmap[pidx].pm_cbaddr; 3894509Smrj #if !defined(__amd64) 3895509Smrj (*windowp)->wd_trim.tr_last_kaddr = 3896509Smrj dma->dp_pgmap[pidx].pm_kaddr; 3897509Smrj #endif 3898509Smrj } 3899509Smrj 3900509Smrj /* save the buffer offsets for the next window */ 3901509Smrj coffset = cookie->dmac_size - trim_sz; 3902509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3903509Smrj 3904509Smrj /* 3905509Smrj * set this now in case this is the first window. all other cases are 3906509Smrj * set in dma_win() 3907509Smrj */ 3908509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3909509Smrj 3910509Smrj /* 3911509Smrj * initialize the next window using what's left over in the previous 3912509Smrj * cookie. 3913509Smrj */ 3914509Smrj (*windowp)++; 3915509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3916509Smrj (*windowp)->wd_cookie_cnt++; 3917509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 39185084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3919509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3920509Smrj 3921509Smrj /* 3922509Smrj * again, we're tracking if the last cookie uses the copy buffer. 3923509Smrj * read the comment above for more info on why we need to track 3924509Smrj * additional state. 3925509Smrj * 3926509Smrj * For the first cookie in the new window, we need reset the physical 3927509Smrj * address to DMA into to the start of the copy buffer plus any 3928509Smrj * initial page offset which may be present. 3929509Smrj */ 3930509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3931509Smrj (*windowp)->wd_dosync = B_TRUE; 3932509Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3933509Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 3934509Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3935509Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 39365084Sjohnlev 39375084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 39385084Sjohnlev poff; 39395084Sjohnlev #ifdef __xpv 39405084Sjohnlev /* 39415084Sjohnlev * If we're dom0, we're using a real device so we need to load 39425084Sjohnlev * the cookies with MAs instead of PAs. 39435084Sjohnlev */ 39445084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = 39455084Sjohnlev ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 39465084Sjohnlev #else 39475084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = paddr; 39485084Sjohnlev #endif 39495084Sjohnlev 3950509Smrj #if !defined(__amd64) 3951509Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3952509Smrj #endif 3953509Smrj /* account for the cookie copybuf usage in the new window */ 3954509Smrj *copybuf_used += MMU_PAGESIZE; 3955509Smrj 3956509Smrj /* 3957509Smrj * every piece of code has to have a hack, and here is this 3958509Smrj * ones :-) 3959509Smrj * 3960509Smrj * There is a complex interaction between setup_cookie and the 3961509Smrj * copybuf window boundary. The complexity had to be in either 3962509Smrj * the maxxfer window, or the copybuf window, and I chose the 3963509Smrj * copybuf code. 3964509Smrj * 3965509Smrj * So in this code path, we have taken the last cookie, 3966509Smrj * virtually broken it in half due to the trim, and it happens 3967509Smrj * to use the copybuf which further complicates life. At the 3968509Smrj * same time, we have already setup the current cookie, which 3969509Smrj * is now wrong. More background info: the current cookie uses 3970509Smrj * the copybuf, so it is only a page long max. So we need to 3971509Smrj * fix the current cookies copy buffer address, physical 3972509Smrj * address, and kva for the 32-bit kernel. We due this by 3973509Smrj * bumping them by page size (of course, we can't due this on 3974509Smrj * the physical address since the copy buffer may not be 3975509Smrj * physically contiguous). 3976509Smrj */ 3977509Smrj cookie++; 3978509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 39795084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 39805084Sjohnlev 39815084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3982509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 39835084Sjohnlev #ifdef __xpv 39845084Sjohnlev /* 39855084Sjohnlev * If we're dom0, we're using a real device so we need to load 39865084Sjohnlev * the cookies with MAs instead of PAs. 39875084Sjohnlev */ 39885084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 39895084Sjohnlev #else 39905084Sjohnlev cookie->dmac_laddress = paddr; 39915084Sjohnlev #endif 39925084Sjohnlev 3993509Smrj #if !defined(__amd64) 3994509Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3995509Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3996509Smrj #endif 3997509Smrj } else { 3998509Smrj /* go back to the current cookie */ 3999509Smrj cookie++; 4000509Smrj } 4001509Smrj 4002509Smrj /* 4003509Smrj * add the current cookie to the new window. set the new window size to 4004509Smrj * the what was left over from the previous cookie and what's in the 4005509Smrj * current cookie. 4006509Smrj */ 4007509Smrj (*windowp)->wd_cookie_cnt++; 4008509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 4009509Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 4010509Smrj 4011509Smrj /* 4012509Smrj * we know that the cookie passed in always uses the copy buffer. We 4013509Smrj * wouldn't be here if it didn't. 4014509Smrj */ 4015509Smrj *copybuf_used += MMU_PAGESIZE; 4016509Smrj 4017509Smrj return (DDI_SUCCESS); 4018509Smrj } 4019509Smrj 4020509Smrj 4021509Smrj /* 4022509Smrj * rootnex_maxxfer_window_boundary() 4023509Smrj * Called in bind slowpath when we get to a window boundary because we will 4024509Smrj * go over maxxfer. 4025509Smrj */ 4026509Smrj static int 4027509Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4028509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 4029509Smrj { 4030509Smrj size_t dmac_size; 4031509Smrj off_t new_offset; 4032509Smrj size_t trim_sz; 4033509Smrj off_t coffset; 4034509Smrj 4035509Smrj 4036509Smrj /* 4037509Smrj * calculate how much we have to trim off of the current cookie to equal 4038509Smrj * maxxfer. We don't have to account for granularity here since our 4039509Smrj * maxxfer already takes that into account. 4040509Smrj */ 4041509Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 4042509Smrj ASSERT(trim_sz <= cookie->dmac_size); 4043509Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 4044509Smrj 4045509Smrj /* save cookie size since we need it later and we might change it */ 4046509Smrj dmac_size = cookie->dmac_size; 4047509Smrj 4048509Smrj /* 4049509Smrj * if we're not trimming the entire cookie, setup the current window to 4050509Smrj * account for the trim. 4051509Smrj */ 4052509Smrj if (trim_sz < cookie->dmac_size) { 4053509Smrj (*windowp)->wd_cookie_cnt++; 4054509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4055509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 40565084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4057509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4058509Smrj (*windowp)->wd_size = dma->dp_maxxfer; 4059509Smrj 4060509Smrj /* 4061509Smrj * set the adjusted cookie size now in case this is the first 4062509Smrj * window. All other windows are taken care of in get win 4063509Smrj */ 4064509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4065509Smrj } 4066509Smrj 4067509Smrj /* 4068509Smrj * coffset is the current offset within the cookie, new_offset is the 4069509Smrj * current offset with the entire buffer. 4070509Smrj */ 4071509Smrj coffset = dmac_size - trim_sz; 4072509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4073509Smrj 4074509Smrj /* initialize the next window */ 4075509Smrj (*windowp)++; 4076509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4077509Smrj (*windowp)->wd_cookie_cnt++; 4078509Smrj (*windowp)->wd_size = trim_sz; 4079509Smrj if (trim_sz < dmac_size) { 4080509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 40815084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 4082509Smrj coffset; 4083509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 4084509Smrj } 4085509Smrj 4086509Smrj return (DDI_SUCCESS); 4087509Smrj } 4088509Smrj 4089509Smrj 4090509Smrj /*ARGSUSED*/ 4091509Smrj static int 40927613SVikram.Hegde@Sun.COM rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4093509Smrj off_t off, size_t len, uint_t cache_flags) 4094509Smrj { 4095509Smrj rootnex_sglinfo_t *sinfo; 4096509Smrj rootnex_pgmap_t *cbpage; 4097509Smrj rootnex_window_t *win; 4098509Smrj ddi_dma_impl_t *hp; 4099509Smrj rootnex_dma_t *dma; 4100509Smrj caddr_t fromaddr; 4101509Smrj caddr_t toaddr; 4102509Smrj uint_t psize; 4103509Smrj off_t offset; 4104509Smrj uint_t pidx; 4105509Smrj size_t size; 4106509Smrj off_t poff; 4107509Smrj int e; 4108509Smrj 4109509Smrj 4110509Smrj hp = (ddi_dma_impl_t *)handle; 4111509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4112509Smrj sinfo = &dma->dp_sglinfo; 4113509Smrj 4114509Smrj /* 4115509Smrj * if we don't have any windows, we don't need to sync. A copybuf 4116509Smrj * will cause us to have at least one window. 4117509Smrj */ 4118509Smrj if (dma->dp_window == NULL) { 4119509Smrj return (DDI_SUCCESS); 4120509Smrj } 4121509Smrj 4122509Smrj /* This window may not need to be sync'd */ 4123509Smrj win = &dma->dp_window[dma->dp_current_win]; 4124509Smrj if (!win->wd_dosync) { 4125509Smrj return (DDI_SUCCESS); 4126509Smrj } 4127509Smrj 4128*8215SVikram.Hegde@Sun.COM if (strcmp(ddi_driver_name(rdip), "bnx") == 0 || 4129*8215SVikram.Hegde@Sun.COM strcmp(ddi_driver_name(rdip), "ohci") == 0) 4130*8215SVikram.Hegde@Sun.COM cmn_err(CE_WARN, "%s: syncing DMA ...", 4131*8215SVikram.Hegde@Sun.COM ddi_driver_name(rdip)); 4132*8215SVikram.Hegde@Sun.COM 4133509Smrj /* handle off and len special cases */ 4134509Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 4135509Smrj offset = win->wd_offset; 4136509Smrj } else { 4137509Smrj offset = off; 4138509Smrj } 4139509Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 4140509Smrj size = win->wd_size; 4141509Smrj } else { 4142509Smrj size = len; 4143509Smrj } 4144509Smrj 4145509Smrj /* check the sync args to make sure they make a little sense */ 4146509Smrj if (rootnex_sync_check_parms) { 4147509Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 4148509Smrj cache_flags); 4149509Smrj if (e != DDI_SUCCESS) { 4150509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 4151509Smrj return (DDI_FAILURE); 4152509Smrj } 4153509Smrj } 4154509Smrj 4155509Smrj /* 4156509Smrj * special case the first page to handle the offset into the page. The 4157509Smrj * offset to the current page for our buffer is the offset into the 4158509Smrj * first page of the buffer plus our current offset into the buffer 4159509Smrj * itself, masked of course. 4160509Smrj */ 4161509Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 4162509Smrj psize = MIN((MMU_PAGESIZE - poff), size); 4163509Smrj 4164509Smrj /* go through all the pages that we want to sync */ 4165509Smrj while (size > 0) { 4166509Smrj /* 4167509Smrj * Calculate the page index relative to the start of the buffer. 4168509Smrj * The index to the current page for our buffer is the offset 4169509Smrj * into the first page of the buffer plus our current offset 4170509Smrj * into the buffer itself, shifted of course... 4171509Smrj */ 4172509Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 4173509Smrj ASSERT(pidx < sinfo->si_max_pages); 4174509Smrj 4175509Smrj /* 4176509Smrj * if this page uses the copy buffer, we need to sync it, 4177509Smrj * otherwise, go on to the next page. 4178509Smrj */ 4179509Smrj cbpage = &dma->dp_pgmap[pidx]; 4180509Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 4181509Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 4182509Smrj if (cbpage->pm_uses_copybuf) { 4183509Smrj /* cbaddr and kaddr should be page aligned */ 4184509Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 4185509Smrj MMU_PAGEOFFSET) == 0); 4186509Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 4187509Smrj MMU_PAGEOFFSET) == 0); 4188509Smrj 4189509Smrj /* 4190509Smrj * if we're copying for the device, we are going to 4191509Smrj * copy from the drivers buffer and to the rootnex 4192509Smrj * allocated copy buffer. 4193509Smrj */ 4194509Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 4195509Smrj fromaddr = cbpage->pm_kaddr + poff; 4196509Smrj toaddr = cbpage->pm_cbaddr + poff; 4197509Smrj DTRACE_PROBE2(rootnex__sync__dev, 4198509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 4199509Smrj 4200509Smrj /* 4201509Smrj * if we're copying for the cpu/kernel, we are going to 4202509Smrj * copy from the rootnex allocated copy buffer to the 4203509Smrj * drivers buffer. 4204509Smrj */ 4205509Smrj } else { 4206509Smrj fromaddr = cbpage->pm_cbaddr + poff; 4207509Smrj toaddr = cbpage->pm_kaddr + poff; 4208509Smrj DTRACE_PROBE2(rootnex__sync__cpu, 4209509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 4210509Smrj } 4211509Smrj 4212509Smrj bcopy(fromaddr, toaddr, psize); 4213509Smrj } 4214509Smrj 4215509Smrj /* 4216509Smrj * decrement size until we're done, update our offset into the 4217509Smrj * buffer, and get the next page size. 4218509Smrj */ 4219509Smrj size -= psize; 4220509Smrj offset += psize; 4221509Smrj psize = MIN(MMU_PAGESIZE, size); 4222509Smrj 4223509Smrj /* page offset is zero for the rest of this loop */ 4224509Smrj poff = 0; 4225509Smrj } 4226509Smrj 4227509Smrj return (DDI_SUCCESS); 4228509Smrj } 4229509Smrj 42307613SVikram.Hegde@Sun.COM /* 42317613SVikram.Hegde@Sun.COM * rootnex_dma_sync() 42327613SVikram.Hegde@Sun.COM * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 42337613SVikram.Hegde@Sun.COM * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 42347613SVikram.Hegde@Sun.COM * is set, ddi_dma_sync() returns immediately passing back success. 42357613SVikram.Hegde@Sun.COM */ 42367613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 42377613SVikram.Hegde@Sun.COM static int 42387613SVikram.Hegde@Sun.COM rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 42397613SVikram.Hegde@Sun.COM off_t off, size_t len, uint_t cache_flags) 42407613SVikram.Hegde@Sun.COM { 42417613SVikram.Hegde@Sun.COM #if !defined(__xpv) 42427613SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 42437613SVikram.Hegde@Sun.COM return (iommulib_nexdma_sync(dip, rdip, handle, off, len, 42447613SVikram.Hegde@Sun.COM cache_flags)); 42457613SVikram.Hegde@Sun.COM } 42467613SVikram.Hegde@Sun.COM #endif 42477613SVikram.Hegde@Sun.COM return (rootnex_coredma_sync(dip, rdip, handle, off, len, 42487613SVikram.Hegde@Sun.COM cache_flags)); 42497613SVikram.Hegde@Sun.COM } 4250509Smrj 4251509Smrj /* 4252509Smrj * rootnex_valid_sync_parms() 4253509Smrj * checks the parameters passed to sync to verify they are correct. 4254509Smrj */ 4255509Smrj static int 4256509Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 4257509Smrj off_t offset, size_t size, uint_t cache_flags) 4258509Smrj { 4259509Smrj off_t woffset; 4260509Smrj 4261509Smrj 4262509Smrj /* 4263509Smrj * the first part of the test to make sure the offset passed in is 4264509Smrj * within the window. 4265509Smrj */ 4266509Smrj if (offset < win->wd_offset) { 4267509Smrj return (DDI_FAILURE); 4268509Smrj } 4269509Smrj 4270509Smrj /* 4271509Smrj * second and last part of the test to make sure the offset and length 4272509Smrj * passed in is within the window. 4273509Smrj */ 4274509Smrj woffset = offset - win->wd_offset; 4275509Smrj if ((woffset + size) > win->wd_size) { 4276509Smrj return (DDI_FAILURE); 4277509Smrj } 4278509Smrj 4279509Smrj /* 4280509Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 4281509Smrj * be set too. 4282509Smrj */ 4283509Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 4284509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 4285509Smrj return (DDI_SUCCESS); 4286509Smrj } 4287509Smrj 4288509Smrj /* 4289509Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 4290509Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 4291509Smrj */ 4292509Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 4293509Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 4294509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 4295509Smrj return (DDI_SUCCESS); 4296509Smrj } 4297509Smrj 4298509Smrj return (DDI_FAILURE); 4299509Smrj } 4300509Smrj 4301509Smrj 4302509Smrj /*ARGSUSED*/ 4303509Smrj static int 43047613SVikram.Hegde@Sun.COM rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4305509Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4306509Smrj uint_t *ccountp) 4307509Smrj { 4308509Smrj rootnex_window_t *window; 4309509Smrj rootnex_trim_t *trim; 4310509Smrj ddi_dma_impl_t *hp; 4311509Smrj rootnex_dma_t *dma; 4312509Smrj #if !defined(__amd64) 4313509Smrj rootnex_sglinfo_t *sinfo; 4314509Smrj rootnex_pgmap_t *pmap; 4315509Smrj uint_t pidx; 4316509Smrj uint_t pcnt; 4317509Smrj off_t poff; 4318509Smrj int i; 4319509Smrj #endif 4320509Smrj 4321509Smrj 4322509Smrj hp = (ddi_dma_impl_t *)handle; 4323509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4324509Smrj #if !defined(__amd64) 4325509Smrj sinfo = &dma->dp_sglinfo; 4326509Smrj #endif 4327509Smrj 4328509Smrj /* If we try and get a window which doesn't exist, return failure */ 4329509Smrj if (win >= hp->dmai_nwin) { 4330509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4331509Smrj return (DDI_FAILURE); 4332509Smrj } 4333509Smrj 4334509Smrj /* 4335509Smrj * if we don't have any windows, and they're asking for the first 4336509Smrj * window, setup the cookie pointer to the first cookie in the bind. 4337509Smrj * setup our return values, then increment the cookie since we return 4338509Smrj * the first cookie on the stack. 4339509Smrj */ 4340509Smrj if (dma->dp_window == NULL) { 4341509Smrj if (win != 0) { 4342509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4343509Smrj return (DDI_FAILURE); 4344509Smrj } 4345509Smrj hp->dmai_cookie = dma->dp_cookies; 4346509Smrj *offp = 0; 4347509Smrj *lenp = dma->dp_dma.dmao_size; 4348509Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 4349509Smrj *cookiep = hp->dmai_cookie[0]; 4350509Smrj hp->dmai_cookie++; 4351509Smrj return (DDI_SUCCESS); 4352509Smrj } 4353509Smrj 4354509Smrj /* sync the old window before moving on to the new one */ 4355509Smrj window = &dma->dp_window[dma->dp_current_win]; 4356509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 4357*8215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4358509Smrj DDI_DMA_SYNC_FORCPU); 4359509Smrj } 4360509Smrj 4361509Smrj #if !defined(__amd64) 4362509Smrj /* 4363509Smrj * before we move to the next window, if we need to re-map, unmap all 4364509Smrj * the pages in this window. 4365509Smrj */ 4366509Smrj if (dma->dp_cb_remaping) { 4367509Smrj /* 4368509Smrj * If we switch to this window again, we'll need to map in 4369509Smrj * on the fly next time. 4370509Smrj */ 4371509Smrj window->wd_remap_copybuf = B_TRUE; 4372509Smrj 4373509Smrj /* 4374509Smrj * calculate the page index into the buffer where this window 4375509Smrj * starts, and the number of pages this window takes up. 4376509Smrj */ 4377509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4378509Smrj MMU_PAGESHIFT; 4379509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4380509Smrj MMU_PAGEOFFSET; 4381509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4382509Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4383509Smrj 4384509Smrj /* unmap pages which are currently mapped in this window */ 4385509Smrj for (i = 0; i < pcnt; i++) { 4386509Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 4387509Smrj hat_unload(kas.a_hat, 4388509Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4389509Smrj HAT_UNLOAD); 4390509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4391509Smrj } 4392509Smrj pidx++; 4393509Smrj } 4394509Smrj } 4395509Smrj #endif 4396509Smrj 4397509Smrj /* 4398509Smrj * Move to the new window. 4399509Smrj * NOTE: current_win must be set for sync to work right 4400509Smrj */ 4401509Smrj dma->dp_current_win = win; 4402509Smrj window = &dma->dp_window[win]; 4403509Smrj 4404509Smrj /* if needed, adjust the first and/or last cookies for trim */ 4405509Smrj trim = &window->wd_trim; 4406509Smrj if (trim->tr_trim_first) { 44075084Sjohnlev window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4408509Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 4409509Smrj #if !defined(__amd64) 4410509Smrj window->wd_first_cookie->dmac_type = 4411509Smrj (window->wd_first_cookie->dmac_type & 4412509Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 4413509Smrj #endif 4414509Smrj if (trim->tr_first_copybuf_win) { 4415509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4416509Smrj trim->tr_first_cbaddr; 4417509Smrj #if !defined(__amd64) 4418509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4419509Smrj trim->tr_first_kaddr; 4420509Smrj #endif 4421509Smrj } 4422509Smrj } 4423509Smrj if (trim->tr_trim_last) { 44245084Sjohnlev trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4425509Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4426509Smrj if (trim->tr_last_copybuf_win) { 4427509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4428509Smrj trim->tr_last_cbaddr; 4429509Smrj #if !defined(__amd64) 4430509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4431509Smrj trim->tr_last_kaddr; 4432509Smrj #endif 4433509Smrj } 4434509Smrj } 4435509Smrj 4436509Smrj /* 4437509Smrj * setup the cookie pointer to the first cookie in the window. setup 4438509Smrj * our return values, then increment the cookie since we return the 4439509Smrj * first cookie on the stack. 4440509Smrj */ 4441509Smrj hp->dmai_cookie = window->wd_first_cookie; 4442509Smrj *offp = window->wd_offset; 4443509Smrj *lenp = window->wd_size; 4444509Smrj *ccountp = window->wd_cookie_cnt; 4445509Smrj *cookiep = hp->dmai_cookie[0]; 4446509Smrj hp->dmai_cookie++; 4447509Smrj 4448509Smrj #if !defined(__amd64) 4449509Smrj /* re-map copybuf if required for this window */ 4450509Smrj if (dma->dp_cb_remaping) { 4451509Smrj /* 4452509Smrj * calculate the page index into the buffer where this 4453509Smrj * window starts. 4454509Smrj */ 4455509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4456509Smrj MMU_PAGESHIFT; 4457509Smrj ASSERT(pidx < sinfo->si_max_pages); 4458509Smrj 4459509Smrj /* 4460509Smrj * the first page can get unmapped if it's shared with the 4461509Smrj * previous window. Even if the rest of this window is already 4462509Smrj * mapped in, we need to still check this one. 4463509Smrj */ 4464509Smrj pmap = &dma->dp_pgmap[pidx]; 4465509Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4466509Smrj if (pmap->pm_pp != NULL) { 4467509Smrj pmap->pm_mapped = B_TRUE; 4468509Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4469509Smrj } else if (pmap->pm_vaddr != NULL) { 4470509Smrj pmap->pm_mapped = B_TRUE; 4471509Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4472509Smrj pmap->pm_kaddr); 4473509Smrj } 4474509Smrj } 4475509Smrj pidx++; 4476509Smrj 4477509Smrj /* map in the rest of the pages if required */ 4478509Smrj if (window->wd_remap_copybuf) { 4479509Smrj window->wd_remap_copybuf = B_FALSE; 4480509Smrj 4481509Smrj /* figure out many pages this window takes up */ 4482509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4483509Smrj MMU_PAGEOFFSET; 4484509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4485509Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4486509Smrj 4487509Smrj /* map pages which require it */ 4488509Smrj for (i = 1; i < pcnt; i++) { 4489509Smrj pmap = &dma->dp_pgmap[pidx]; 4490509Smrj if (pmap->pm_uses_copybuf) { 4491509Smrj ASSERT(pmap->pm_mapped == B_FALSE); 4492509Smrj if (pmap->pm_pp != NULL) { 4493509Smrj pmap->pm_mapped = B_TRUE; 4494509Smrj i86_pp_map(pmap->pm_pp, 4495509Smrj pmap->pm_kaddr); 4496509Smrj } else if (pmap->pm_vaddr != NULL) { 4497509Smrj pmap->pm_mapped = B_TRUE; 4498509Smrj i86_va_map(pmap->pm_vaddr, 4499509Smrj sinfo->si_asp, 4500509Smrj pmap->pm_kaddr); 4501509Smrj } 4502509Smrj } 4503509Smrj pidx++; 4504509Smrj } 4505509Smrj } 4506509Smrj } 4507509Smrj #endif 4508509Smrj 4509509Smrj /* if the new window uses the copy buffer, sync it for the device */ 4510509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4511*8215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4512509Smrj DDI_DMA_SYNC_FORDEV); 4513509Smrj } 4514509Smrj 4515509Smrj return (DDI_SUCCESS); 4516509Smrj } 4517509Smrj 45187613SVikram.Hegde@Sun.COM /* 45197613SVikram.Hegde@Sun.COM * rootnex_dma_win() 45207613SVikram.Hegde@Sun.COM * called from ddi_dma_getwin() 45217613SVikram.Hegde@Sun.COM */ 45227613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 45237613SVikram.Hegde@Sun.COM static int 45247613SVikram.Hegde@Sun.COM rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 45257613SVikram.Hegde@Sun.COM uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 45267613SVikram.Hegde@Sun.COM uint_t *ccountp) 45277613SVikram.Hegde@Sun.COM { 45287613SVikram.Hegde@Sun.COM #if !defined(__xpv) 45297613SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 45307613SVikram.Hegde@Sun.COM return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp, 45317613SVikram.Hegde@Sun.COM cookiep, ccountp)); 45327613SVikram.Hegde@Sun.COM } 45337613SVikram.Hegde@Sun.COM #endif 45347613SVikram.Hegde@Sun.COM 45357613SVikram.Hegde@Sun.COM return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp, 45367613SVikram.Hegde@Sun.COM cookiep, ccountp)); 45377613SVikram.Hegde@Sun.COM } 4538509Smrj 4539509Smrj /* 4540509Smrj * ************************ 4541509Smrj * obsoleted dma routines 4542509Smrj * ************************ 4543509Smrj */ 4544509Smrj 4545509Smrj /* ARGSUSED */ 4546509Smrj static int 45477613SVikram.Hegde@Sun.COM rootnex_coredma_map(dev_info_t *dip, dev_info_t *rdip, 45487613SVikram.Hegde@Sun.COM struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep) 4549509Smrj { 4550509Smrj #if defined(__amd64) 4551509Smrj /* 4552509Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 4553509Smrj * rootnex_dma_mctl() 4554509Smrj */ 4555509Smrj return (DDI_DMA_NORESOURCES); 4556509Smrj 4557509Smrj #else /* 32-bit x86 kernel */ 4558509Smrj ddi_dma_handle_t *lhandlep; 4559509Smrj ddi_dma_handle_t lhandle; 4560509Smrj ddi_dma_cookie_t cookie; 4561509Smrj ddi_dma_attr_t dma_attr; 4562509Smrj ddi_dma_lim_t *dma_lim; 4563509Smrj uint_t ccnt; 4564509Smrj int e; 4565509Smrj 4566509Smrj 4567509Smrj /* 4568509Smrj * if the driver is just testing to see if it's possible to do the bind, 4569509Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 4570509Smrj */ 4571509Smrj if (handlep == NULL) { 4572509Smrj lhandlep = &lhandle; 4573509Smrj } else { 4574509Smrj lhandlep = handlep; 4575509Smrj } 4576509Smrj 4577509Smrj /* convert the limit structure to a dma_attr one */ 4578509Smrj dma_lim = dmareq->dmar_limits; 4579509Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 4580509Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4581509Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4582509Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4583509Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4584509Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4585509Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4586509Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4587509Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4588509Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4589509Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 4590509Smrj dma_attr.dma_attr_flags = 0; 4591509Smrj 4592509Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4593509Smrj dmareq->dmar_arg, lhandlep); 4594509Smrj if (e != DDI_SUCCESS) { 4595509Smrj return (e); 4596509Smrj } 4597509Smrj 4598509Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4599509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4600509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4601509Smrj return (e); 4602509Smrj } 4603509Smrj 4604509Smrj /* 4605509Smrj * if the driver is just testing to see if it's possible to do the bind, 4606509Smrj * free up the local state and return the result. 4607509Smrj */ 4608509Smrj if (handlep == NULL) { 4609509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4610509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4611509Smrj if (e == DDI_DMA_MAPPED) { 4612509Smrj return (DDI_DMA_MAPOK); 46130Sstevel@tonic-gate } else { 4614509Smrj return (DDI_DMA_NOMAPPING); 4615509Smrj } 4616509Smrj } 4617509Smrj 4618509Smrj return (e); 4619509Smrj #endif /* defined(__amd64) */ 4620509Smrj } 4621509Smrj 46227613SVikram.Hegde@Sun.COM /* 46237613SVikram.Hegde@Sun.COM * rootnex_dma_map() 46247613SVikram.Hegde@Sun.COM * called from ddi_dma_setup() 46257613SVikram.Hegde@Sun.COM */ 46267613SVikram.Hegde@Sun.COM /* ARGSUSED */ 46277613SVikram.Hegde@Sun.COM static int 46287613SVikram.Hegde@Sun.COM rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 46297613SVikram.Hegde@Sun.COM struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep) 46307613SVikram.Hegde@Sun.COM { 46317613SVikram.Hegde@Sun.COM #if !defined(__xpv) 46327613SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 46337613SVikram.Hegde@Sun.COM return (iommulib_nexdma_map(dip, rdip, dmareq, handlep)); 46347613SVikram.Hegde@Sun.COM } 46357613SVikram.Hegde@Sun.COM #endif 46367613SVikram.Hegde@Sun.COM return (rootnex_coredma_map(dip, rdip, dmareq, handlep)); 46377613SVikram.Hegde@Sun.COM } 4638509Smrj 4639509Smrj /* 4640509Smrj * rootnex_dma_mctl() 4641509Smrj * 4642509Smrj */ 4643509Smrj /* ARGSUSED */ 4644509Smrj static int 46457613SVikram.Hegde@Sun.COM rootnex_coredma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4646509Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4647509Smrj uint_t cache_flags) 4648509Smrj { 4649509Smrj #if defined(__amd64) 4650509Smrj /* 4651509Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4652509Smrj * common implementation in genunix, so they no longer have x86 4653509Smrj * specific functionality which called into dma_ctl. 4654509Smrj * 4655509Smrj * The rest of the obsoleted interfaces were never supported in the 4656509Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4657509Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4658509Smrj * implementation issues. 4659509Smrj * 4660509Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4661509Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4662509Smrj * reflect that now too... 4663509Smrj * 4664509Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4665509Smrj * not going to put this functionality into the 64-bit x86 kernel now. 4666509Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 4667509Smrj * that in a future release. 4668509Smrj */ 4669509Smrj return (DDI_FAILURE); 4670509Smrj 4671509Smrj #else /* 32-bit x86 kernel */ 4672509Smrj ddi_dma_cookie_t lcookie; 4673509Smrj ddi_dma_cookie_t *cookie; 4674509Smrj rootnex_window_t *window; 4675509Smrj ddi_dma_impl_t *hp; 4676509Smrj rootnex_dma_t *dma; 4677509Smrj uint_t nwin; 4678509Smrj uint_t ccnt; 4679509Smrj size_t len; 4680509Smrj off_t off; 4681509Smrj int e; 4682509Smrj 4683509Smrj 4684509Smrj /* 4685509Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4686509Smrj * hacky since were optimizing for the current interfaces and so we can 4687509Smrj * cleanup the mess in genunix. Hopefully we will remove the this 4688509Smrj * obsoleted routines someday soon. 4689509Smrj */ 4690509Smrj 4691509Smrj switch (request) { 4692509Smrj 4693509Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4694509Smrj hp = (ddi_dma_impl_t *)handle; 4695509Smrj cookie = (ddi_dma_cookie_t *)objpp; 4696509Smrj 4697509Smrj /* 4698509Smrj * convert segment to cookie. We don't distinguish between the 4699509Smrj * two :-) 4700509Smrj */ 4701509Smrj *cookie = *hp->dmai_cookie; 4702509Smrj *lenp = cookie->dmac_size; 4703509Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4704509Smrj return (DDI_SUCCESS); 4705509Smrj 4706509Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4707509Smrj hp = (ddi_dma_impl_t *)handle; 4708509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4709509Smrj 4710509Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4711509Smrj return (DDI_DMA_STALE); 47120Sstevel@tonic-gate } 4713509Smrj 4714509Smrj /* handle the case where we don't have any windows */ 4715509Smrj if (dma->dp_window == NULL) { 4716509Smrj /* 4717509Smrj * if seg == NULL, and we don't have any windows, 4718509Smrj * return the first cookie in the sgl. 4719509Smrj */ 4720509Smrj if (*lenp == NULL) { 4721509Smrj dma->dp_current_cookie = 0; 4722509Smrj hp->dmai_cookie = dma->dp_cookies; 4723509Smrj *objpp = (caddr_t)handle; 4724509Smrj return (DDI_SUCCESS); 4725509Smrj 4726509Smrj /* if we have more cookies, go to the next cookie */ 4727509Smrj } else { 4728509Smrj if ((dma->dp_current_cookie + 1) >= 4729509Smrj dma->dp_sglinfo.si_sgl_size) { 4730509Smrj return (DDI_DMA_DONE); 4731509Smrj } 4732509Smrj dma->dp_current_cookie++; 4733509Smrj hp->dmai_cookie++; 4734509Smrj return (DDI_SUCCESS); 4735509Smrj } 4736509Smrj } 4737509Smrj 4738509Smrj /* We have one or more windows */ 4739509Smrj window = &dma->dp_window[dma->dp_current_win]; 4740509Smrj 4741509Smrj /* 4742509Smrj * if seg == NULL, return the first cookie in the current 4743509Smrj * window 4744509Smrj */ 4745509Smrj if (*lenp == NULL) { 4746509Smrj dma->dp_current_cookie = 0; 4747683Smrj hp->dmai_cookie = window->wd_first_cookie; 4748509Smrj 4749509Smrj /* 4750509Smrj * go to the next cookie in the window then see if we done with 4751509Smrj * this window. 4752509Smrj */ 4753509Smrj } else { 4754509Smrj if ((dma->dp_current_cookie + 1) >= 4755509Smrj window->wd_cookie_cnt) { 4756509Smrj return (DDI_DMA_DONE); 4757509Smrj } 4758509Smrj dma->dp_current_cookie++; 4759509Smrj hp->dmai_cookie++; 4760509Smrj } 4761509Smrj *objpp = (caddr_t)handle; 4762509Smrj return (DDI_SUCCESS); 4763509Smrj 4764509Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4765509Smrj hp = (ddi_dma_impl_t *)handle; 4766509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4767509Smrj 4768509Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4769509Smrj return (DDI_DMA_STALE); 4770509Smrj } 4771509Smrj 4772509Smrj /* if win == NULL, return the first window in the bind */ 4773509Smrj if (*offp == NULL) { 4774509Smrj nwin = 0; 4775509Smrj 4776509Smrj /* 4777509Smrj * else, go to the next window then see if we're done with all 4778509Smrj * the windows. 4779509Smrj */ 4780509Smrj } else { 4781509Smrj nwin = dma->dp_current_win + 1; 4782509Smrj if (nwin >= hp->dmai_nwin) { 4783509Smrj return (DDI_DMA_DONE); 4784509Smrj } 4785509Smrj } 4786509Smrj 4787509Smrj /* switch to the next window */ 4788509Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4789509Smrj &lcookie, &ccnt); 4790509Smrj ASSERT(e == DDI_SUCCESS); 4791509Smrj if (e != DDI_SUCCESS) { 4792509Smrj return (DDI_DMA_STALE); 4793509Smrj } 4794509Smrj 4795509Smrj /* reset the cookie back to the first cookie in the window */ 4796509Smrj if (dma->dp_window != NULL) { 4797509Smrj window = &dma->dp_window[dma->dp_current_win]; 4798509Smrj hp->dmai_cookie = window->wd_first_cookie; 4799509Smrj } else { 4800509Smrj hp->dmai_cookie = dma->dp_cookies; 4801509Smrj } 4802509Smrj 4803509Smrj *objpp = (caddr_t)handle; 4804509Smrj return (DDI_SUCCESS); 4805509Smrj 4806509Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 4807509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4808509Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 4809509Smrj if (rootnex_state->r_dvma_call_list_id) { 4810509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4811509Smrj } 4812509Smrj return (DDI_SUCCESS); 4813509Smrj 4814509Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4815509Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4816509Smrj /* should never get here, handled in genunix */ 4817509Smrj ASSERT(0); 4818509Smrj return (DDI_FAILURE); 4819509Smrj 4820509Smrj case DDI_DMA_KVADDR: 4821509Smrj case DDI_DMA_GETERR: 4822509Smrj case DDI_DMA_COFF: 4823509Smrj return (DDI_FAILURE); 48240Sstevel@tonic-gate } 4825509Smrj 4826509Smrj return (DDI_FAILURE); 4827509Smrj #endif /* defined(__amd64) */ 48280Sstevel@tonic-gate } 48291414Scindi 48307613SVikram.Hegde@Sun.COM /* 48317613SVikram.Hegde@Sun.COM * rootnex_dma_mctl() 48327613SVikram.Hegde@Sun.COM * 48337613SVikram.Hegde@Sun.COM */ 48347613SVikram.Hegde@Sun.COM /* ARGSUSED */ 48357613SVikram.Hegde@Sun.COM static int 48367613SVikram.Hegde@Sun.COM rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 48377613SVikram.Hegde@Sun.COM enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 48387613SVikram.Hegde@Sun.COM uint_t cache_flags) 48397613SVikram.Hegde@Sun.COM { 48407613SVikram.Hegde@Sun.COM #if !defined(__xpv) 48417613SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 48427613SVikram.Hegde@Sun.COM return (iommulib_nexdma_mctl(dip, rdip, handle, request, offp, 48437613SVikram.Hegde@Sun.COM lenp, objpp, cache_flags)); 48447613SVikram.Hegde@Sun.COM } 48457613SVikram.Hegde@Sun.COM #endif 48467613SVikram.Hegde@Sun.COM 48477613SVikram.Hegde@Sun.COM return (rootnex_coredma_mctl(dip, rdip, handle, request, offp, 48487613SVikram.Hegde@Sun.COM lenp, objpp, cache_flags)); 48497613SVikram.Hegde@Sun.COM } 48501865Sdilpreet 48511865Sdilpreet /* 48521865Sdilpreet * ********* 48531865Sdilpreet * FMA Code 48541865Sdilpreet * ********* 48551865Sdilpreet */ 48561865Sdilpreet 48571865Sdilpreet /* 48581865Sdilpreet * rootnex_fm_init() 48591865Sdilpreet * FMA init busop 48601865Sdilpreet */ 48611865Sdilpreet /* ARGSUSED */ 48621865Sdilpreet static int 48631865Sdilpreet rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 48641865Sdilpreet ddi_iblock_cookie_t *ibc) 48651865Sdilpreet { 48661865Sdilpreet *ibc = rootnex_state->r_err_ibc; 48671865Sdilpreet 48681865Sdilpreet return (ddi_system_fmcap); 48691865Sdilpreet } 48701865Sdilpreet 48711865Sdilpreet /* 48721865Sdilpreet * rootnex_dma_check() 48731865Sdilpreet * Function called after a dma fault occurred to find out whether the 48741865Sdilpreet * fault address is associated with a driver that is able to handle faults 48751865Sdilpreet * and recover from faults. 48761865Sdilpreet */ 48771865Sdilpreet /* ARGSUSED */ 48781414Scindi static int 48791865Sdilpreet rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 48801865Sdilpreet const void *not_used) 48811414Scindi { 48821865Sdilpreet rootnex_window_t *window; 48831865Sdilpreet uint64_t start_addr; 48841865Sdilpreet uint64_t fault_addr; 48851865Sdilpreet ddi_dma_impl_t *hp; 48861865Sdilpreet rootnex_dma_t *dma; 48871865Sdilpreet uint64_t end_addr; 48881865Sdilpreet size_t csize; 48891865Sdilpreet int i; 48901865Sdilpreet int j; 48911865Sdilpreet 48921865Sdilpreet 48931865Sdilpreet /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 48941865Sdilpreet hp = (ddi_dma_impl_t *)handle; 48951865Sdilpreet ASSERT(hp); 48961865Sdilpreet 48971865Sdilpreet dma = (rootnex_dma_t *)hp->dmai_private; 48981865Sdilpreet 48991865Sdilpreet /* Get the address that we need to search for */ 49001865Sdilpreet fault_addr = *(uint64_t *)addr; 49011865Sdilpreet 49021865Sdilpreet /* 49031865Sdilpreet * if we don't have any windows, we can just walk through all the 49041865Sdilpreet * cookies. 49051865Sdilpreet */ 49061865Sdilpreet if (dma->dp_window == NULL) { 49071865Sdilpreet /* for each cookie */ 49081865Sdilpreet for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 49091865Sdilpreet /* 49101865Sdilpreet * if the faulted address is within the physical address 49111865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 49121865Sdilpreet */ 49131865Sdilpreet if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 49141865Sdilpreet (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 49151865Sdilpreet dma->dp_cookies[i].dmac_size))) { 49161865Sdilpreet return (DDI_FM_NONFATAL); 49171865Sdilpreet } 49181865Sdilpreet } 49191865Sdilpreet 49201865Sdilpreet /* fault_addr not within this DMA handle */ 49211865Sdilpreet return (DDI_FM_UNKNOWN); 49221865Sdilpreet } 49231865Sdilpreet 49241865Sdilpreet /* we have mutiple windows, walk through each window */ 49251865Sdilpreet for (i = 0; i < hp->dmai_nwin; i++) { 49261865Sdilpreet window = &dma->dp_window[i]; 49271865Sdilpreet 49281865Sdilpreet /* Go through all the cookies in the window */ 49291865Sdilpreet for (j = 0; j < window->wd_cookie_cnt; j++) { 49301865Sdilpreet 49311865Sdilpreet start_addr = window->wd_first_cookie[j].dmac_laddress; 49321865Sdilpreet csize = window->wd_first_cookie[j].dmac_size; 49331865Sdilpreet 49341865Sdilpreet /* 49351865Sdilpreet * if we are trimming the first cookie in the window, 49361865Sdilpreet * and this is the first cookie, adjust the start 49371865Sdilpreet * address and size of the cookie to account for the 49381865Sdilpreet * trim. 49391865Sdilpreet */ 49401865Sdilpreet if (window->wd_trim.tr_trim_first && (j == 0)) { 49411865Sdilpreet start_addr = window->wd_trim.tr_first_paddr; 49421865Sdilpreet csize = window->wd_trim.tr_first_size; 49431865Sdilpreet } 49441865Sdilpreet 49451865Sdilpreet /* 49461865Sdilpreet * if we are trimming the last cookie in the window, 49471865Sdilpreet * and this is the last cookie, adjust the start 49481865Sdilpreet * address and size of the cookie to account for the 49491865Sdilpreet * trim. 49501865Sdilpreet */ 49511865Sdilpreet if (window->wd_trim.tr_trim_last && 49521865Sdilpreet (j == (window->wd_cookie_cnt - 1))) { 49531865Sdilpreet start_addr = window->wd_trim.tr_last_paddr; 49541865Sdilpreet csize = window->wd_trim.tr_last_size; 49551865Sdilpreet } 49561865Sdilpreet 49571865Sdilpreet end_addr = start_addr + csize; 49581865Sdilpreet 49591865Sdilpreet /* 49601865Sdilpreet * if the faulted address is within the physical address 49611865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 49621865Sdilpreet */ 49631865Sdilpreet if ((fault_addr >= start_addr) && 49641865Sdilpreet (fault_addr <= end_addr)) { 49651865Sdilpreet return (DDI_FM_NONFATAL); 49661865Sdilpreet } 49671865Sdilpreet } 49681865Sdilpreet } 49691865Sdilpreet 49701865Sdilpreet /* fault_addr not within this DMA handle */ 49711865Sdilpreet return (DDI_FM_UNKNOWN); 49721414Scindi } 4973