10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51865Sdilpreet * Common Development and Distribution License (the "License"). 61865Sdilpreet * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 227173Smrj * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate /* 27509Smrj * x86 root nexus driver 280Sstevel@tonic-gate */ 290Sstevel@tonic-gate 300Sstevel@tonic-gate #include <sys/sysmacros.h> 310Sstevel@tonic-gate #include <sys/conf.h> 320Sstevel@tonic-gate #include <sys/autoconf.h> 330Sstevel@tonic-gate #include <sys/sysmacros.h> 340Sstevel@tonic-gate #include <sys/debug.h> 350Sstevel@tonic-gate #include <sys/psw.h> 360Sstevel@tonic-gate #include <sys/ddidmareq.h> 370Sstevel@tonic-gate #include <sys/promif.h> 380Sstevel@tonic-gate #include <sys/devops.h> 390Sstevel@tonic-gate #include <sys/kmem.h> 400Sstevel@tonic-gate #include <sys/cmn_err.h> 410Sstevel@tonic-gate #include <vm/seg.h> 420Sstevel@tonic-gate #include <vm/seg_kmem.h> 430Sstevel@tonic-gate #include <vm/seg_dev.h> 440Sstevel@tonic-gate #include <sys/vmem.h> 450Sstevel@tonic-gate #include <sys/mman.h> 460Sstevel@tonic-gate #include <vm/hat.h> 470Sstevel@tonic-gate #include <vm/as.h> 480Sstevel@tonic-gate #include <vm/page.h> 490Sstevel@tonic-gate #include <sys/avintr.h> 500Sstevel@tonic-gate #include <sys/errno.h> 510Sstevel@tonic-gate #include <sys/modctl.h> 520Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 530Sstevel@tonic-gate #include <sys/sunddi.h> 540Sstevel@tonic-gate #include <sys/sunndi.h> 55916Sschwartz #include <sys/mach_intr.h> 560Sstevel@tonic-gate #include <sys/psm.h> 570Sstevel@tonic-gate #include <sys/ontrap.h> 58509Smrj #include <sys/atomic.h> 59509Smrj #include <sys/sdt.h> 60509Smrj #include <sys/rootnex.h> 61509Smrj #include <vm/hat_i86.h> 621865Sdilpreet #include <sys/ddifm.h> 635251Smrj #include <sys/ddi_isa.h> 64509Smrj 655084Sjohnlev #ifdef __xpv 665084Sjohnlev #include <sys/bootinfo.h> 675084Sjohnlev #include <sys/hypervisor.h> 685084Sjohnlev #include <sys/bootconf.h> 695084Sjohnlev #include <vm/kboot_mmu.h> 705084Sjohnlev #endif 715084Sjohnlev 72509Smrj /* 73509Smrj * enable/disable extra checking of function parameters. Useful for debugging 74509Smrj * drivers. 75509Smrj */ 76509Smrj #ifdef DEBUG 77509Smrj int rootnex_alloc_check_parms = 1; 78509Smrj int rootnex_bind_check_parms = 1; 79509Smrj int rootnex_bind_check_inuse = 1; 80509Smrj int rootnex_unbind_verify_buffer = 0; 81509Smrj int rootnex_sync_check_parms = 1; 82509Smrj #else 83509Smrj int rootnex_alloc_check_parms = 0; 84509Smrj int rootnex_bind_check_parms = 0; 85509Smrj int rootnex_bind_check_inuse = 0; 86509Smrj int rootnex_unbind_verify_buffer = 0; 87509Smrj int rootnex_sync_check_parms = 0; 88509Smrj #endif 89509Smrj 901414Scindi /* Master Abort and Target Abort panic flag */ 911414Scindi int rootnex_fm_ma_ta_panic_flag = 0; 921414Scindi 93509Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 940Sstevel@tonic-gate int rootnex_bind_fail = 1; 950Sstevel@tonic-gate int rootnex_bind_warn = 1; 960Sstevel@tonic-gate uint8_t *rootnex_warn_list; 970Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 980Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 990Sstevel@tonic-gate 1000Sstevel@tonic-gate /* 101509Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 102509Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 103509Smrj * the offset and size into ddi_dma_sync(). 1040Sstevel@tonic-gate */ 105509Smrj int rootnex_sync_ignore_params = 0; 1060Sstevel@tonic-gate 1070Sstevel@tonic-gate /* 108509Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 109509Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 110509Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 111509Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 112509Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 113509Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 114509Smrj * (if we need one). These can only be modified in /etc/system before rootnex 115509Smrj * attach. 1160Sstevel@tonic-gate */ 117509Smrj #if defined(__amd64) 118509Smrj int rootnex_prealloc_cookies = 65; 119509Smrj int rootnex_prealloc_windows = 4; 120509Smrj int rootnex_prealloc_copybuf = 2; 121509Smrj #else 122509Smrj int rootnex_prealloc_cookies = 33; 123509Smrj int rootnex_prealloc_windows = 4; 124509Smrj int rootnex_prealloc_copybuf = 2; 125509Smrj #endif 126509Smrj 127509Smrj /* driver global state */ 128509Smrj static rootnex_state_t *rootnex_state; 129509Smrj 130509Smrj /* shortcut to rootnex counters */ 131509Smrj static uint64_t *rootnex_cnt; 1320Sstevel@tonic-gate 1330Sstevel@tonic-gate /* 134509Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1350Sstevel@tonic-gate */ 136509Smrj /* statically defined integer/boolean properties for the root node */ 137509Smrj static rootnex_intprop_t rootnex_intprp[] = { 138509Smrj { "PAGESIZE", PAGESIZE }, 139509Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 140509Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 141509Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 142509Smrj }; 143509Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 144509Smrj 1455084Sjohnlev #ifdef __xpv 1465084Sjohnlev typedef maddr_t rootnex_addr_t; 1475084Sjohnlev #define ROOTNEX_PADDR_TO_RBASE(xinfo, pa) \ 1485084Sjohnlev (DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa)) 1495084Sjohnlev #else 1505084Sjohnlev typedef paddr_t rootnex_addr_t; 1515084Sjohnlev #endif 1525084Sjohnlev 153509Smrj 154509Smrj static struct cb_ops rootnex_cb_ops = { 155509Smrj nodev, /* open */ 156509Smrj nodev, /* close */ 157509Smrj nodev, /* strategy */ 158509Smrj nodev, /* print */ 159509Smrj nodev, /* dump */ 160509Smrj nodev, /* read */ 161509Smrj nodev, /* write */ 162509Smrj nodev, /* ioctl */ 163509Smrj nodev, /* devmap */ 164509Smrj nodev, /* mmap */ 165509Smrj nodev, /* segmap */ 166509Smrj nochpoll, /* chpoll */ 167509Smrj ddi_prop_op, /* cb_prop_op */ 168509Smrj NULL, /* struct streamtab */ 169509Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 170509Smrj CB_REV, /* Rev */ 171509Smrj nodev, /* cb_aread */ 172509Smrj nodev /* cb_awrite */ 173509Smrj }; 174509Smrj 175509Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1760Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 177509Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1780Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1790Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 180509Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1810Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 182509Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 183509Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 184509Smrj ddi_dma_handle_t *handlep); 185509Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 186509Smrj ddi_dma_handle_t handle); 187509Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 188509Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 189509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 190509Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 191509Smrj ddi_dma_handle_t handle); 192509Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 193509Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 194509Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 195509Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 196509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 197509Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 1980Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 1990Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 200509Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 201509Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 2021865Sdilpreet static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 2031865Sdilpreet ddi_iblock_cookie_t *ibc); 204509Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 205509Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 206509Smrj 2070Sstevel@tonic-gate 2080Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 2090Sstevel@tonic-gate BUSO_REV, 2100Sstevel@tonic-gate rootnex_map, 2110Sstevel@tonic-gate NULL, 2120Sstevel@tonic-gate NULL, 2130Sstevel@tonic-gate NULL, 2140Sstevel@tonic-gate rootnex_map_fault, 2150Sstevel@tonic-gate rootnex_dma_map, 2160Sstevel@tonic-gate rootnex_dma_allochdl, 2170Sstevel@tonic-gate rootnex_dma_freehdl, 2180Sstevel@tonic-gate rootnex_dma_bindhdl, 2190Sstevel@tonic-gate rootnex_dma_unbindhdl, 220509Smrj rootnex_dma_sync, 2210Sstevel@tonic-gate rootnex_dma_win, 2220Sstevel@tonic-gate rootnex_dma_mctl, 2230Sstevel@tonic-gate rootnex_ctlops, 2240Sstevel@tonic-gate ddi_bus_prop_op, 2250Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2260Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2270Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2280Sstevel@tonic-gate i_ddi_rootnex_post_event, 2290Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2300Sstevel@tonic-gate 0, /* bus_config */ 2310Sstevel@tonic-gate 0, /* bus_unconfig */ 2321865Sdilpreet rootnex_fm_init, /* bus_fm_init */ 2330Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2340Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2350Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2360Sstevel@tonic-gate NULL, /* bus_powr */ 2370Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2380Sstevel@tonic-gate }; 2390Sstevel@tonic-gate 240509Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 241509Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 2420Sstevel@tonic-gate 2430Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2440Sstevel@tonic-gate DEVO_REV, 245509Smrj 0, 246509Smrj ddi_no_info, 247509Smrj nulldev, 2480Sstevel@tonic-gate nulldev, 2490Sstevel@tonic-gate rootnex_attach, 250509Smrj rootnex_detach, 251509Smrj nulldev, 252509Smrj &rootnex_cb_ops, 2530Sstevel@tonic-gate &rootnex_bus_ops 2540Sstevel@tonic-gate }; 2550Sstevel@tonic-gate 256509Smrj static struct modldrv rootnex_modldrv = { 257509Smrj &mod_driverops, 258*7542SRichard.Bean@Sun.COM "i86pc root nexus", 259509Smrj &rootnex_ops 260509Smrj }; 261509Smrj 262509Smrj static struct modlinkage rootnex_modlinkage = { 263509Smrj MODREV_1, 264509Smrj (void *)&rootnex_modldrv, 265509Smrj NULL 266509Smrj }; 267509Smrj 268509Smrj 269509Smrj /* 270509Smrj * extern hacks 271509Smrj */ 272509Smrj extern struct seg_ops segdev_ops; 273509Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 274509Smrj #ifdef DDI_MAP_DEBUG 275509Smrj extern int ddi_map_debug_flag; 276509Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 277509Smrj #endif 278509Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 279509Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 280509Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 281509Smrj psm_intr_op_t, int *); 282509Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 283509Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 2845251Smrj 285509Smrj /* 286509Smrj * Use device arena to use for device control register mappings. 287509Smrj * Various kernel memory walkers (debugger, dtrace) need to know 288509Smrj * to avoid this address range to prevent undesired device activity. 289509Smrj */ 290509Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 291509Smrj extern void device_arena_free(void * vaddr, size_t size); 292509Smrj 293509Smrj 2940Sstevel@tonic-gate /* 295509Smrj * Internal functions 2960Sstevel@tonic-gate */ 297509Smrj static int rootnex_dma_init(); 298509Smrj static void rootnex_add_props(dev_info_t *); 299509Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 300509Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 301509Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 302509Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 303509Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 304509Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 305509Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 306509Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 307509Smrj ddi_dma_attr_t *attr); 308509Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 309509Smrj rootnex_sglinfo_t *sglinfo); 310509Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 311509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 312509Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 313509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 314509Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 315509Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 316509Smrj ddi_dma_attr_t *attr, int kmflag); 317509Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 318509Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 319509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 320509Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 321509Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 322509Smrj size_t *copybuf_used, page_t **cur_pp); 323509Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 324509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 325509Smrj ddi_dma_attr_t *attr, off_t cur_offset); 326509Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 327509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 328509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 329509Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 330509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 331509Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 332509Smrj off_t offset, size_t size, uint_t cache_flags); 333509Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 3341865Sdilpreet static int rootnex_dma_check(dev_info_t *dip, const void *handle, 3351865Sdilpreet const void *comp_addr, const void *not_used); 336509Smrj 337509Smrj /* 338509Smrj * _init() 339509Smrj * 340509Smrj */ 3410Sstevel@tonic-gate int 3420Sstevel@tonic-gate _init(void) 3430Sstevel@tonic-gate { 344509Smrj 345509Smrj rootnex_state = NULL; 346509Smrj return (mod_install(&rootnex_modlinkage)); 3470Sstevel@tonic-gate } 3480Sstevel@tonic-gate 349509Smrj 350509Smrj /* 351509Smrj * _info() 352509Smrj * 353509Smrj */ 354509Smrj int 355509Smrj _info(struct modinfo *modinfop) 356509Smrj { 357509Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 358509Smrj } 359509Smrj 360509Smrj 361509Smrj /* 362509Smrj * _fini() 363509Smrj * 364509Smrj */ 3650Sstevel@tonic-gate int 3660Sstevel@tonic-gate _fini(void) 3670Sstevel@tonic-gate { 3680Sstevel@tonic-gate return (EBUSY); 3690Sstevel@tonic-gate } 3700Sstevel@tonic-gate 3710Sstevel@tonic-gate 3720Sstevel@tonic-gate /* 373509Smrj * rootnex_attach() 3740Sstevel@tonic-gate * 3750Sstevel@tonic-gate */ 376509Smrj static int 377509Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 378509Smrj { 3791414Scindi int fmcap; 380509Smrj int e; 381509Smrj 382509Smrj switch (cmd) { 383509Smrj case DDI_ATTACH: 384509Smrj break; 385509Smrj case DDI_RESUME: 386509Smrj return (DDI_SUCCESS); 387509Smrj default: 388509Smrj return (DDI_FAILURE); 389509Smrj } 390509Smrj 391509Smrj /* 392509Smrj * We should only have one instance of rootnex. Save it away since we 393509Smrj * don't have an easy way to get it back later. 394509Smrj */ 395509Smrj ASSERT(rootnex_state == NULL); 396509Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 397509Smrj 398509Smrj rootnex_state->r_dip = dip; 3991414Scindi rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 400509Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 401509Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 402509Smrj 4031414Scindi /* 4041414Scindi * Set minimum fm capability level for i86pc platforms and then 4051414Scindi * initialize error handling. Since we're the rootnex, we don't 4061414Scindi * care what's returned in the fmcap field. 4071414Scindi */ 4081865Sdilpreet ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 4091865Sdilpreet DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 4101414Scindi fmcap = ddi_system_fmcap; 4111414Scindi ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 4121414Scindi 413509Smrj /* initialize DMA related state */ 414509Smrj e = rootnex_dma_init(); 415509Smrj if (e != DDI_SUCCESS) { 416509Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 417509Smrj return (DDI_FAILURE); 418509Smrj } 419509Smrj 420509Smrj /* Add static root node properties */ 421509Smrj rootnex_add_props(dip); 422509Smrj 423509Smrj /* since we can't call ddi_report_dev() */ 424509Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 425509Smrj 426509Smrj /* Initialize rootnex event handle */ 427509Smrj i_ddi_rootnex_init_events(dip); 428509Smrj 429509Smrj return (DDI_SUCCESS); 430509Smrj } 431509Smrj 432509Smrj 433509Smrj /* 434509Smrj * rootnex_detach() 435509Smrj * 436509Smrj */ 4370Sstevel@tonic-gate /*ARGSUSED*/ 4380Sstevel@tonic-gate static int 439509Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 440509Smrj { 441509Smrj switch (cmd) { 442509Smrj case DDI_SUSPEND: 443509Smrj break; 444509Smrj default: 445509Smrj return (DDI_FAILURE); 446509Smrj } 447509Smrj 448509Smrj return (DDI_SUCCESS); 449509Smrj } 450509Smrj 451509Smrj 452509Smrj /* 453509Smrj * rootnex_dma_init() 454509Smrj * 455509Smrj */ 456509Smrj /*ARGSUSED*/ 457509Smrj static int 458509Smrj rootnex_dma_init() 4590Sstevel@tonic-gate { 460509Smrj size_t bufsize; 461509Smrj 462509Smrj 463509Smrj /* 464509Smrj * size of our cookie/window/copybuf state needed in dma bind that we 465509Smrj * pre-alloc in dma_alloc_handle 466509Smrj */ 467509Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 468509Smrj rootnex_state->r_prealloc_size = 469509Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 470509Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 471509Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 472509Smrj 473509Smrj /* 474509Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 475509Smrj * allocate 16 extra bytes for struct pointer alignment 476509Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 477509Smrj */ 478509Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 479509Smrj rootnex_state->r_prealloc_size + 0x10; 480509Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 481509Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 482509Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 483509Smrj return (DDI_FAILURE); 484509Smrj } 4850Sstevel@tonic-gate 4860Sstevel@tonic-gate /* 4870Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 4880Sstevel@tonic-gate * for. 4890Sstevel@tonic-gate */ 4900Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 4910Sstevel@tonic-gate KM_SLEEP); 4920Sstevel@tonic-gate 4930Sstevel@tonic-gate return (DDI_SUCCESS); 4940Sstevel@tonic-gate } 4950Sstevel@tonic-gate 4960Sstevel@tonic-gate 4970Sstevel@tonic-gate /* 498509Smrj * rootnex_add_props() 499509Smrj * 5000Sstevel@tonic-gate */ 5010Sstevel@tonic-gate static void 502509Smrj rootnex_add_props(dev_info_t *dip) 5030Sstevel@tonic-gate { 504509Smrj rootnex_intprop_t *rpp; 5050Sstevel@tonic-gate int i; 506509Smrj 507509Smrj /* Add static integer/boolean properties to the root node */ 508509Smrj rpp = rootnex_intprp; 509509Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 510509Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 511509Smrj rpp[i].prop_name, rpp[i].prop_value); 5120Sstevel@tonic-gate } 5130Sstevel@tonic-gate } 5140Sstevel@tonic-gate 515509Smrj 516509Smrj 517509Smrj /* 518509Smrj * ************************* 519509Smrj * ctlops related routines 520509Smrj * ************************* 521509Smrj */ 522509Smrj 5230Sstevel@tonic-gate /* 524509Smrj * rootnex_ctlops() 525509Smrj * 5260Sstevel@tonic-gate */ 527693Sgovinda /*ARGSUSED*/ 528509Smrj static int 529509Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 530509Smrj void *arg, void *result) 531509Smrj { 532509Smrj int n, *ptr; 533509Smrj struct ddi_parent_private_data *pdp; 534509Smrj 535509Smrj switch (ctlop) { 536509Smrj case DDI_CTLOPS_DMAPMAPC: 537509Smrj /* 538509Smrj * Return 'partial' to indicate that dma mapping 539509Smrj * has to be done in the main MMU. 540509Smrj */ 541509Smrj return (DDI_DMA_PARTIAL); 542509Smrj 543509Smrj case DDI_CTLOPS_BTOP: 544509Smrj /* 545509Smrj * Convert byte count input to physical page units. 546509Smrj * (byte counts that are not a page-size multiple 547509Smrj * are rounded down) 548509Smrj */ 549509Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 550509Smrj return (DDI_SUCCESS); 551509Smrj 552509Smrj case DDI_CTLOPS_PTOB: 553509Smrj /* 554509Smrj * Convert size in physical pages to bytes 555509Smrj */ 556509Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 557509Smrj return (DDI_SUCCESS); 558509Smrj 559509Smrj case DDI_CTLOPS_BTOPR: 560509Smrj /* 561509Smrj * Convert byte count input to physical page units 562509Smrj * (byte counts that are not a page-size multiple 563509Smrj * are rounded up) 564509Smrj */ 565509Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 566509Smrj return (DDI_SUCCESS); 567509Smrj 568509Smrj case DDI_CTLOPS_INITCHILD: 569509Smrj return (impl_ddi_sunbus_initchild(arg)); 570509Smrj 571509Smrj case DDI_CTLOPS_UNINITCHILD: 572509Smrj impl_ddi_sunbus_removechild(arg); 573509Smrj return (DDI_SUCCESS); 574509Smrj 575509Smrj case DDI_CTLOPS_REPORTDEV: 576509Smrj return (rootnex_ctl_reportdev(rdip)); 577509Smrj 578509Smrj case DDI_CTLOPS_IOMIN: 579509Smrj /* 580509Smrj * Nothing to do here but reflect back.. 581509Smrj */ 582509Smrj return (DDI_SUCCESS); 583509Smrj 584509Smrj case DDI_CTLOPS_REGSIZE: 585509Smrj case DDI_CTLOPS_NREGS: 586509Smrj break; 587509Smrj 588509Smrj case DDI_CTLOPS_SIDDEV: 589509Smrj if (ndi_dev_is_prom_node(rdip)) 590509Smrj return (DDI_SUCCESS); 591509Smrj if (ndi_dev_is_persistent_node(rdip)) 592509Smrj return (DDI_SUCCESS); 593509Smrj return (DDI_FAILURE); 594509Smrj 595509Smrj case DDI_CTLOPS_POWER: 596509Smrj return ((*pm_platform_power)((power_req_t *)arg)); 597509Smrj 598693Sgovinda case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 599509Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 600509Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 601509Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 602693Sgovinda case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 603693Sgovinda case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 604509Smrj if (!rootnex_state->r_reserved_msg_printed) { 605509Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 606509Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 607509Smrj "1 or more reserved/obsolete operations."); 608509Smrj } 609509Smrj return (DDI_FAILURE); 610509Smrj 611509Smrj default: 612509Smrj return (DDI_FAILURE); 613509Smrj } 614509Smrj /* 615509Smrj * The rest are for "hardware" properties 616509Smrj */ 617509Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 618509Smrj return (DDI_FAILURE); 619509Smrj 620509Smrj if (ctlop == DDI_CTLOPS_NREGS) { 621509Smrj ptr = (int *)result; 622509Smrj *ptr = pdp->par_nreg; 623509Smrj } else { 624509Smrj off_t *size = (off_t *)result; 625509Smrj 626509Smrj ptr = (int *)arg; 627509Smrj n = *ptr; 628509Smrj if (n >= pdp->par_nreg) { 629509Smrj return (DDI_FAILURE); 630509Smrj } 631509Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 632509Smrj } 633509Smrj return (DDI_SUCCESS); 634509Smrj } 6350Sstevel@tonic-gate 6360Sstevel@tonic-gate 6370Sstevel@tonic-gate /* 638509Smrj * rootnex_ctl_reportdev() 639509Smrj * 6400Sstevel@tonic-gate */ 6410Sstevel@tonic-gate static int 642509Smrj rootnex_ctl_reportdev(dev_info_t *dev) 6430Sstevel@tonic-gate { 644509Smrj int i, n, len, f_len = 0; 645509Smrj char *buf; 646509Smrj 647509Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 648509Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 649509Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 650509Smrj len = strlen(buf); 651509Smrj 652509Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 653509Smrj 654509Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 655509Smrj 656509Smrj if (i == 0) 657509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 658509Smrj ": "); 659509Smrj else 660509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 661509Smrj " and "); 662509Smrj len = strlen(buf); 663509Smrj 664509Smrj switch (rp->regspec_bustype) { 665509Smrj 666509Smrj case BTEISA: 667509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 668509Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 6690Sstevel@tonic-gate break; 670509Smrj 671509Smrj case BTISA: 672509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 673509Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 6740Sstevel@tonic-gate break; 675509Smrj 676509Smrj default: 677509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 678509Smrj "space %x offset %x", 679509Smrj rp->regspec_bustype, rp->regspec_addr); 6800Sstevel@tonic-gate break; 6810Sstevel@tonic-gate } 682509Smrj len = strlen(buf); 6830Sstevel@tonic-gate } 684509Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 685509Smrj int pri; 686509Smrj 687509Smrj if (i != 0) { 688509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 689509Smrj ","); 690509Smrj len = strlen(buf); 691509Smrj } 692509Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 693509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 694509Smrj " sparc ipl %d", pri); 695509Smrj len = strlen(buf); 6960Sstevel@tonic-gate } 697509Smrj #ifdef DEBUG 698509Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 699509Smrj cmn_err(CE_NOTE, "next message is truncated: " 700509Smrj "printed length 1024, real length %d", f_len); 701509Smrj } 702509Smrj #endif /* DEBUG */ 703509Smrj cmn_err(CE_CONT, "?%s\n", buf); 704509Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 7050Sstevel@tonic-gate return (DDI_SUCCESS); 7060Sstevel@tonic-gate } 7070Sstevel@tonic-gate 708509Smrj 709509Smrj /* 710509Smrj * ****************** 711509Smrj * map related code 712509Smrj * ****************** 713509Smrj */ 714509Smrj 715509Smrj /* 716509Smrj * rootnex_map() 717509Smrj * 718509Smrj */ 7190Sstevel@tonic-gate static int 720509Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 721509Smrj off_t len, caddr_t *vaddrp) 7220Sstevel@tonic-gate { 7230Sstevel@tonic-gate struct regspec *rp, tmp_reg; 7240Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 7250Sstevel@tonic-gate int error; 7260Sstevel@tonic-gate 7270Sstevel@tonic-gate mp = &mr; 7280Sstevel@tonic-gate 7290Sstevel@tonic-gate switch (mp->map_op) { 7300Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 7310Sstevel@tonic-gate case DDI_MO_UNMAP: 7320Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 7330Sstevel@tonic-gate break; 7340Sstevel@tonic-gate default: 7350Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7360Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 7370Sstevel@tonic-gate mp->map_op); 7380Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7390Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 7400Sstevel@tonic-gate } 7410Sstevel@tonic-gate 7420Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 7430Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7440Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 7450Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7460Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 7470Sstevel@tonic-gate } 7480Sstevel@tonic-gate 7490Sstevel@tonic-gate /* 7500Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 7510Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 7520Sstevel@tonic-gate */ 7530Sstevel@tonic-gate 7540Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 7550Sstevel@tonic-gate 7560Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 7570Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7580Sstevel@tonic-gate static char *out_of_range = 7590Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 7600Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7610Sstevel@tonic-gate 7620Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 7630Sstevel@tonic-gate if (rp == NULL) { 7640Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7650Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 7660Sstevel@tonic-gate ddi_get_name(rdip)); 7670Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7680Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 7690Sstevel@tonic-gate } 7700Sstevel@tonic-gate 7710Sstevel@tonic-gate /* 7720Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 7730Sstevel@tonic-gate */ 7740Sstevel@tonic-gate 7750Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 7760Sstevel@tonic-gate mp->map_obj.rp = rp; 7770Sstevel@tonic-gate } 7780Sstevel@tonic-gate 7790Sstevel@tonic-gate /* 7800Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 7810Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 7820Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 7830Sstevel@tonic-gate */ 7840Sstevel@tonic-gate 7850Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 7860Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 7870Sstevel@tonic-gate 7880Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7895084Sjohnlev cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 7905084Sjohnlev "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 7915084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 7925084Sjohnlev len, mp->map_handlep); 7930Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7940Sstevel@tonic-gate 7950Sstevel@tonic-gate /* 7960Sstevel@tonic-gate * I/O or memory mapping: 7970Sstevel@tonic-gate * 7980Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 7990Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 8000Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 8010Sstevel@tonic-gate */ 8020Sstevel@tonic-gate 8030Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 8040Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 8050Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 8060Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 8070Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 8080Sstevel@tonic-gate return (DDI_ME_INVAL); 8090Sstevel@tonic-gate } 8100Sstevel@tonic-gate 8110Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 8120Sstevel@tonic-gate /* 8130Sstevel@tonic-gate * compatibility i/o mapping 8140Sstevel@tonic-gate */ 8150Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 8160Sstevel@tonic-gate } else { 8170Sstevel@tonic-gate /* 8180Sstevel@tonic-gate * Normal memory or i/o mapping 8190Sstevel@tonic-gate */ 8200Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 8210Sstevel@tonic-gate } 8220Sstevel@tonic-gate 8230Sstevel@tonic-gate if (len != 0) 8240Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 8250Sstevel@tonic-gate 8260Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8275084Sjohnlev cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 8285084Sjohnlev "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 8295084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 8305084Sjohnlev offset, len, mp->map_handlep); 8310Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8320Sstevel@tonic-gate 8330Sstevel@tonic-gate /* 8340Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 8350Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 8360Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 8370Sstevel@tonic-gate * provided via ddi_apply_range.) 8380Sstevel@tonic-gate */ 8390Sstevel@tonic-gate 8400Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8410Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 8420Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 8430Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8440Sstevel@tonic-gate 8450Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 8460Sstevel@tonic-gate return (error); 8470Sstevel@tonic-gate 8480Sstevel@tonic-gate switch (mp->map_op) { 8490Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8500Sstevel@tonic-gate 8510Sstevel@tonic-gate /* 8520Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 8530Sstevel@tonic-gate */ 8540Sstevel@tonic-gate 8550Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 8560Sstevel@tonic-gate 8570Sstevel@tonic-gate case DDI_MO_UNMAP: 8580Sstevel@tonic-gate 8590Sstevel@tonic-gate /* 8600Sstevel@tonic-gate * Release mapping... 8610Sstevel@tonic-gate */ 8620Sstevel@tonic-gate 8630Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 8640Sstevel@tonic-gate 8650Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8660Sstevel@tonic-gate 8670Sstevel@tonic-gate return (rootnex_map_handle(mp)); 8680Sstevel@tonic-gate 8690Sstevel@tonic-gate default: 8700Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8710Sstevel@tonic-gate } 8720Sstevel@tonic-gate } 8730Sstevel@tonic-gate 8740Sstevel@tonic-gate 8750Sstevel@tonic-gate /* 876509Smrj * rootnex_map_fault() 8770Sstevel@tonic-gate * 8780Sstevel@tonic-gate * fault in mappings for requestors 8790Sstevel@tonic-gate */ 8800Sstevel@tonic-gate /*ARGSUSED*/ 8810Sstevel@tonic-gate static int 882509Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 883509Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 884509Smrj uint_t lock) 8850Sstevel@tonic-gate { 8860Sstevel@tonic-gate 8870Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8880Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 8890Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 8900Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 8910Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 8920Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8930Sstevel@tonic-gate 8940Sstevel@tonic-gate /* 8950Sstevel@tonic-gate * This is all terribly broken, but it is a start 8960Sstevel@tonic-gate * 8970Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 8980Sstevel@tonic-gate * must be exported from seg_dev.c. 8990Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 9000Sstevel@tonic-gate */ 9010Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 9025084Sjohnlev struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 9030Sstevel@tonic-gate 9040Sstevel@tonic-gate if (hat == NULL) { 9050Sstevel@tonic-gate /* 9060Sstevel@tonic-gate * This is one plausible interpretation of 9070Sstevel@tonic-gate * a null hat i.e. use the first hat on the 9080Sstevel@tonic-gate * address space hat list which by convention is 9090Sstevel@tonic-gate * the hat of the system MMU. At alternative 9100Sstevel@tonic-gate * would be to panic .. this might well be better .. 9110Sstevel@tonic-gate */ 9120Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 9130Sstevel@tonic-gate hat = seg->s_as->a_hat; 9140Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 9150Sstevel@tonic-gate } 9160Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 9170Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 9180Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 9190Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 9200Sstevel@tonic-gate HAT_LOAD_LOCK); 9210Sstevel@tonic-gate } else 9220Sstevel@tonic-gate return (DDI_FAILURE); 9230Sstevel@tonic-gate return (DDI_SUCCESS); 9240Sstevel@tonic-gate } 9250Sstevel@tonic-gate 9260Sstevel@tonic-gate 9270Sstevel@tonic-gate /* 928509Smrj * rootnex_map_regspec() 929509Smrj * we don't support mapping of I/O cards above 4Gb 9300Sstevel@tonic-gate */ 931509Smrj static int 932509Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 933509Smrj { 9345084Sjohnlev rootnex_addr_t rbase; 935509Smrj void *cvaddr; 936509Smrj uint_t npages, pgoffset; 937509Smrj struct regspec *rp; 938509Smrj ddi_acc_hdl_t *hp; 939509Smrj ddi_acc_impl_t *ap; 940509Smrj uint_t hat_acc_flags; 9415084Sjohnlev paddr_t pbase; 942509Smrj 943509Smrj rp = mp->map_obj.rp; 944509Smrj hp = mp->map_handlep; 945509Smrj 946509Smrj #ifdef DDI_MAP_DEBUG 947509Smrj ddi_map_debug( 948509Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 949509Smrj rp->regspec_bustype, rp->regspec_addr, 950509Smrj rp->regspec_size, mp->map_handlep); 951509Smrj #endif /* DDI_MAP_DEBUG */ 952509Smrj 953509Smrj /* 954509Smrj * I/O or memory mapping 955509Smrj * 956509Smrj * <bustype=0, addr=x, len=x>: memory 957509Smrj * <bustype=1, addr=x, len=x>: i/o 958509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 959509Smrj */ 960509Smrj 961509Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 962509Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 963509Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 964509Smrj rp->regspec_addr, rp->regspec_size); 965509Smrj return (DDI_FAILURE); 966509Smrj } 967509Smrj 968509Smrj if (rp->regspec_bustype != 0) { 969509Smrj /* 970509Smrj * I/O space - needs a handle. 971509Smrj */ 972509Smrj if (hp == NULL) { 973509Smrj return (DDI_FAILURE); 974509Smrj } 975509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 976509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 977509Smrj impl_acc_hdl_init(hp); 978509Smrj 979509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 980509Smrj #ifdef DDI_MAP_DEBUG 9815084Sjohnlev ddi_map_debug("rootnex_map_regspec: mmap() " 9825084Sjohnlev "to I/O space is not supported.\n"); 983509Smrj #endif /* DDI_MAP_DEBUG */ 984509Smrj return (DDI_ME_INVAL); 985509Smrj } else { 986509Smrj /* 987509Smrj * 1275-compliant vs. compatibility i/o mapping 988509Smrj */ 989509Smrj *vaddrp = 990509Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 9915084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_bustype) : 9925084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_addr); 9935084Sjohnlev #ifdef __xpv 9945084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 9955084Sjohnlev hp->ah_pfn = xen_assign_pfn( 9965084Sjohnlev mmu_btop((ulong_t)rp->regspec_addr & 9975084Sjohnlev MMU_PAGEMASK)); 9985084Sjohnlev } else { 9995084Sjohnlev hp->ah_pfn = mmu_btop( 10005084Sjohnlev (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 10015084Sjohnlev } 10025084Sjohnlev #else 10031865Sdilpreet hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 10045084Sjohnlev MMU_PAGEMASK); 10055084Sjohnlev #endif 10061865Sdilpreet hp->ah_pnum = mmu_btopr(rp->regspec_size + 10071865Sdilpreet (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1008509Smrj } 1009509Smrj 1010509Smrj #ifdef DDI_MAP_DEBUG 1011509Smrj ddi_map_debug( 1012509Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1013509Smrj rp->regspec_size, *vaddrp); 1014509Smrj #endif /* DDI_MAP_DEBUG */ 1015509Smrj return (DDI_SUCCESS); 1016509Smrj } 1017509Smrj 1018509Smrj /* 1019509Smrj * Memory space 1020509Smrj */ 1021509Smrj 1022509Smrj if (hp != NULL) { 1023509Smrj /* 1024509Smrj * hat layer ignores 1025509Smrj * hp->ah_acc.devacc_attr_endian_flags. 1026509Smrj */ 1027509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1028509Smrj case DDI_STRICTORDER_ACC: 1029509Smrj hat_acc_flags = HAT_STRICTORDER; 1030509Smrj break; 1031509Smrj case DDI_UNORDERED_OK_ACC: 1032509Smrj hat_acc_flags = HAT_UNORDERED_OK; 1033509Smrj break; 1034509Smrj case DDI_MERGING_OK_ACC: 1035509Smrj hat_acc_flags = HAT_MERGING_OK; 1036509Smrj break; 1037509Smrj case DDI_LOADCACHING_OK_ACC: 1038509Smrj hat_acc_flags = HAT_LOADCACHING_OK; 1039509Smrj break; 1040509Smrj case DDI_STORECACHING_OK_ACC: 1041509Smrj hat_acc_flags = HAT_STORECACHING_OK; 1042509Smrj break; 1043509Smrj } 1044509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1045509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1046509Smrj impl_acc_hdl_init(hp); 1047509Smrj hp->ah_hat_flags = hat_acc_flags; 1048509Smrj } else { 1049509Smrj hat_acc_flags = HAT_STRICTORDER; 1050509Smrj } 1051509Smrj 10525084Sjohnlev rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 10535084Sjohnlev #ifdef __xpv 10545084Sjohnlev /* 10555084Sjohnlev * If we're dom0, we're using a real device so we need to translate 10565084Sjohnlev * the MA to a PA. 10575084Sjohnlev */ 10585084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 10595084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 10605084Sjohnlev } else { 10615084Sjohnlev pbase = rbase; 10625084Sjohnlev } 10635084Sjohnlev #else 10645084Sjohnlev pbase = rbase; 10655084Sjohnlev #endif 10665084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1067509Smrj 1068509Smrj if (rp->regspec_size == 0) { 1069509Smrj #ifdef DDI_MAP_DEBUG 1070509Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1071509Smrj #endif /* DDI_MAP_DEBUG */ 1072509Smrj return (DDI_ME_INVAL); 1073509Smrj } 1074509Smrj 1075509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 10765084Sjohnlev /* extra cast to make gcc happy */ 10775084Sjohnlev *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1078509Smrj } else { 1079509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1080509Smrj 1081509Smrj #ifdef DDI_MAP_DEBUG 10825084Sjohnlev ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 10835084Sjohnlev "physical %llx", npages, pbase); 1084509Smrj #endif /* DDI_MAP_DEBUG */ 1085509Smrj 1086509Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1087509Smrj if (cvaddr == NULL) 1088509Smrj return (DDI_ME_NORESOURCES); 1089509Smrj 1090509Smrj /* 1091509Smrj * Now map in the pages we've allocated... 1092509Smrj */ 10935084Sjohnlev hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 10945084Sjohnlev mmu_btop(pbase), mp->map_prot | hat_acc_flags, 10955084Sjohnlev HAT_LOAD_LOCK); 1096509Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 10971865Sdilpreet 10981865Sdilpreet /* save away pfn and npages for FMA */ 10991865Sdilpreet hp = mp->map_handlep; 11001865Sdilpreet if (hp) { 11015084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 11021865Sdilpreet hp->ah_pnum = npages; 11031865Sdilpreet } 1104509Smrj } 1105509Smrj 1106509Smrj #ifdef DDI_MAP_DEBUG 1107509Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1108509Smrj #endif /* DDI_MAP_DEBUG */ 1109509Smrj return (DDI_SUCCESS); 1110509Smrj } 1111509Smrj 11120Sstevel@tonic-gate 11130Sstevel@tonic-gate /* 1114509Smrj * rootnex_unmap_regspec() 1115509Smrj * 1116509Smrj */ 1117509Smrj static int 1118509Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1119509Smrj { 1120509Smrj caddr_t addr = (caddr_t)*vaddrp; 1121509Smrj uint_t npages, pgoffset; 1122509Smrj struct regspec *rp; 1123509Smrj 1124509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1125509Smrj return (0); 1126509Smrj 1127509Smrj rp = mp->map_obj.rp; 1128509Smrj 1129509Smrj if (rp->regspec_size == 0) { 1130509Smrj #ifdef DDI_MAP_DEBUG 1131509Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1132509Smrj #endif /* DDI_MAP_DEBUG */ 1133509Smrj return (DDI_ME_INVAL); 1134509Smrj } 1135509Smrj 1136509Smrj /* 1137509Smrj * I/O or memory mapping: 1138509Smrj * 1139509Smrj * <bustype=0, addr=x, len=x>: memory 1140509Smrj * <bustype=1, addr=x, len=x>: i/o 1141509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1142509Smrj */ 1143509Smrj if (rp->regspec_bustype != 0) { 1144509Smrj /* 1145509Smrj * This is I/O space, which requires no particular 1146509Smrj * processing on unmap since it isn't mapped in the 1147509Smrj * first place. 1148509Smrj */ 1149509Smrj return (DDI_SUCCESS); 1150509Smrj } 1151509Smrj 1152509Smrj /* 1153509Smrj * Memory space 1154509Smrj */ 1155509Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1156509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1157509Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1158509Smrj device_arena_free(addr - pgoffset, ptob(npages)); 1159509Smrj 1160509Smrj /* 1161509Smrj * Destroy the pointer - the mapping has logically gone 1162509Smrj */ 1163509Smrj *vaddrp = NULL; 1164509Smrj 1165509Smrj return (DDI_SUCCESS); 1166509Smrj } 1167509Smrj 1168509Smrj 1169509Smrj /* 1170509Smrj * rootnex_map_handle() 1171509Smrj * 11720Sstevel@tonic-gate */ 1173509Smrj static int 1174509Smrj rootnex_map_handle(ddi_map_req_t *mp) 1175509Smrj { 11765084Sjohnlev rootnex_addr_t rbase; 1177509Smrj ddi_acc_hdl_t *hp; 1178509Smrj uint_t pgoffset; 1179509Smrj struct regspec *rp; 11805084Sjohnlev paddr_t pbase; 1181509Smrj 1182509Smrj rp = mp->map_obj.rp; 1183509Smrj 1184509Smrj #ifdef DDI_MAP_DEBUG 1185509Smrj ddi_map_debug( 1186509Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1187509Smrj rp->regspec_bustype, rp->regspec_addr, 1188509Smrj rp->regspec_size, mp->map_handlep); 1189509Smrj #endif /* DDI_MAP_DEBUG */ 1190509Smrj 1191509Smrj /* 1192509Smrj * I/O or memory mapping: 1193509Smrj * 1194509Smrj * <bustype=0, addr=x, len=x>: memory 1195509Smrj * <bustype=1, addr=x, len=x>: i/o 1196509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1197509Smrj */ 1198509Smrj if (rp->regspec_bustype != 0) { 1199509Smrj /* 1200509Smrj * This refers to I/O space, and we don't support "mapping" 1201509Smrj * I/O space to a user. 1202509Smrj */ 1203509Smrj return (DDI_FAILURE); 1204509Smrj } 1205509Smrj 1206509Smrj /* 1207509Smrj * Set up the hat_flags for the mapping. 1208509Smrj */ 1209509Smrj hp = mp->map_handlep; 1210509Smrj 1211509Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 1212509Smrj case DDI_NEVERSWAP_ACC: 1213509Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1214509Smrj break; 1215509Smrj case DDI_STRUCTURE_LE_ACC: 1216509Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 1217509Smrj break; 1218509Smrj case DDI_STRUCTURE_BE_ACC: 1219509Smrj return (DDI_FAILURE); 1220509Smrj default: 1221509Smrj return (DDI_REGS_ACC_CONFLICT); 1222509Smrj } 1223509Smrj 1224509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1225509Smrj case DDI_STRICTORDER_ACC: 1226509Smrj break; 1227509Smrj case DDI_UNORDERED_OK_ACC: 1228509Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 1229509Smrj break; 1230509Smrj case DDI_MERGING_OK_ACC: 1231509Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 1232509Smrj break; 1233509Smrj case DDI_LOADCACHING_OK_ACC: 1234509Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1235509Smrj break; 1236509Smrj case DDI_STORECACHING_OK_ACC: 1237509Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 1238509Smrj break; 1239509Smrj default: 1240509Smrj return (DDI_FAILURE); 1241509Smrj } 1242509Smrj 12435084Sjohnlev rbase = (rootnex_addr_t)rp->regspec_addr & 12445084Sjohnlev (~(rootnex_addr_t)MMU_PAGEOFFSET); 12455084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1246509Smrj 1247509Smrj if (rp->regspec_size == 0) 1248509Smrj return (DDI_ME_INVAL); 1249509Smrj 12505084Sjohnlev #ifdef __xpv 12515084Sjohnlev /* 12525084Sjohnlev * If we're dom0, we're using a real device so we need to translate 12535084Sjohnlev * the MA to a PA. 12545084Sjohnlev */ 12555084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 12565084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 12575084Sjohnlev (rbase & MMU_PAGEOFFSET); 12585084Sjohnlev } else { 12595084Sjohnlev pbase = rbase; 12605084Sjohnlev } 12615084Sjohnlev #else 12625084Sjohnlev pbase = rbase; 12635084Sjohnlev #endif 12645084Sjohnlev 12655084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 1266509Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1267509Smrj 1268509Smrj return (DDI_SUCCESS); 1269509Smrj } 12700Sstevel@tonic-gate 12710Sstevel@tonic-gate 12720Sstevel@tonic-gate 12730Sstevel@tonic-gate /* 1274509Smrj * ************************ 1275509Smrj * interrupt related code 1276509Smrj * ************************ 12770Sstevel@tonic-gate */ 12780Sstevel@tonic-gate 12790Sstevel@tonic-gate /* 1280509Smrj * rootnex_intr_ops() 12810Sstevel@tonic-gate * bus_intr_op() function for interrupt support 12820Sstevel@tonic-gate */ 12830Sstevel@tonic-gate /* ARGSUSED */ 12840Sstevel@tonic-gate static int 12850Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 12860Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 12870Sstevel@tonic-gate { 12880Sstevel@tonic-gate struct intrspec *ispec; 12890Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 12900Sstevel@tonic-gate 12910Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 12920Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 12930Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 12940Sstevel@tonic-gate 12950Sstevel@tonic-gate /* Process the interrupt operation */ 12960Sstevel@tonic-gate switch (intr_op) { 12970Sstevel@tonic-gate case DDI_INTROP_GETCAP: 12980Sstevel@tonic-gate /* First check with pcplusmp */ 12990Sstevel@tonic-gate if (psm_intr_ops == NULL) 13000Sstevel@tonic-gate return (DDI_FAILURE); 13010Sstevel@tonic-gate 13020Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13030Sstevel@tonic-gate *(int *)result = 0; 13040Sstevel@tonic-gate return (DDI_FAILURE); 13050Sstevel@tonic-gate } 13060Sstevel@tonic-gate break; 13070Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13080Sstevel@tonic-gate if (psm_intr_ops == NULL) 13090Sstevel@tonic-gate return (DDI_FAILURE); 13100Sstevel@tonic-gate 13110Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13120Sstevel@tonic-gate return (DDI_FAILURE); 13130Sstevel@tonic-gate break; 13140Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13150Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13160Sstevel@tonic-gate return (DDI_FAILURE); 13170Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13180Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 13190Sstevel@tonic-gate break; 13200Sstevel@tonic-gate case DDI_INTROP_FREE: 13210Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 13220Sstevel@tonic-gate /* 13230Sstevel@tonic-gate * Special case for 'pcic' driver' only. 13240Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 13250Sstevel@tonic-gate * See detailed comments on this in the function 13260Sstevel@tonic-gate * rootnex_get_ispec(). 13270Sstevel@tonic-gate */ 13280Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 13290Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 13300Sstevel@tonic-gate pdp->par_nintr); 13310Sstevel@tonic-gate /* 13320Sstevel@tonic-gate * Set it to zero; so that 13330Sstevel@tonic-gate * DDI framework doesn't free it again 13340Sstevel@tonic-gate */ 13350Sstevel@tonic-gate pdp->par_intr = NULL; 13360Sstevel@tonic-gate pdp->par_nintr = 0; 13370Sstevel@tonic-gate } 13380Sstevel@tonic-gate break; 13390Sstevel@tonic-gate case DDI_INTROP_GETPRI: 13400Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13410Sstevel@tonic-gate return (DDI_FAILURE); 13420Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 13430Sstevel@tonic-gate break; 13440Sstevel@tonic-gate case DDI_INTROP_SETPRI: 13450Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 13460Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 13470Sstevel@tonic-gate return (DDI_FAILURE); 13480Sstevel@tonic-gate 13490Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 13500Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 13510Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 13520Sstevel@tonic-gate return (DDI_FAILURE); 13530Sstevel@tonic-gate 13540Sstevel@tonic-gate /* Change the priority */ 13550Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 13560Sstevel@tonic-gate PSM_FAILURE) 13570Sstevel@tonic-gate return (DDI_FAILURE); 13580Sstevel@tonic-gate 13590Sstevel@tonic-gate /* update the ispec with the new priority */ 13600Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 13610Sstevel@tonic-gate break; 13620Sstevel@tonic-gate case DDI_INTROP_ADDISR: 13630Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13640Sstevel@tonic-gate return (DDI_FAILURE); 13650Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 13660Sstevel@tonic-gate break; 13670Sstevel@tonic-gate case DDI_INTROP_REMISR: 13680Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13690Sstevel@tonic-gate return (DDI_FAILURE); 13700Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 13710Sstevel@tonic-gate break; 13720Sstevel@tonic-gate case DDI_INTROP_ENABLE: 13730Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13740Sstevel@tonic-gate return (DDI_FAILURE); 13750Sstevel@tonic-gate 13760Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 13770Sstevel@tonic-gate if (psm_intr_ops == NULL) 13780Sstevel@tonic-gate return (DDI_FAILURE); 13790Sstevel@tonic-gate 1380916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 13810Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 13820Sstevel@tonic-gate (int *)&hdlp->ih_vector); 13830Sstevel@tonic-gate 13840Sstevel@tonic-gate /* Add the interrupt handler */ 13850Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 13860Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1387916Sschwartz hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 13880Sstevel@tonic-gate return (DDI_FAILURE); 13890Sstevel@tonic-gate break; 13900Sstevel@tonic-gate case DDI_INTROP_DISABLE: 13910Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13920Sstevel@tonic-gate return (DDI_FAILURE); 13930Sstevel@tonic-gate 13940Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 13950Sstevel@tonic-gate if (psm_intr_ops == NULL) 13960Sstevel@tonic-gate return (DDI_FAILURE); 13970Sstevel@tonic-gate 1398916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 13990Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14000Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14010Sstevel@tonic-gate 14020Sstevel@tonic-gate /* Remove the interrupt handler */ 14030Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14040Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14050Sstevel@tonic-gate break; 14060Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14070Sstevel@tonic-gate if (psm_intr_ops == NULL) 14080Sstevel@tonic-gate return (DDI_FAILURE); 14090Sstevel@tonic-gate 14100Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14110Sstevel@tonic-gate return (DDI_FAILURE); 14120Sstevel@tonic-gate break; 14130Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14140Sstevel@tonic-gate if (psm_intr_ops == NULL) 14150Sstevel@tonic-gate return (DDI_FAILURE); 14160Sstevel@tonic-gate 14170Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14180Sstevel@tonic-gate return (DDI_FAILURE); 14190Sstevel@tonic-gate break; 14200Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 14210Sstevel@tonic-gate if (psm_intr_ops == NULL) 14220Sstevel@tonic-gate return (DDI_FAILURE); 14230Sstevel@tonic-gate 14240Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 14250Sstevel@tonic-gate result)) { 14260Sstevel@tonic-gate *(int *)result = 0; 14270Sstevel@tonic-gate return (DDI_FAILURE); 14280Sstevel@tonic-gate } 14290Sstevel@tonic-gate break; 14302580Sanish case DDI_INTROP_NAVAIL: 14310Sstevel@tonic-gate case DDI_INTROP_NINTRS: 14322580Sanish *(int *)result = i_ddi_get_intx_nintrs(rdip); 14332580Sanish if (*(int *)result == 0) { 14340Sstevel@tonic-gate /* 14350Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 14360Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 14370Sstevel@tonic-gate * 14380Sstevel@tonic-gate * See detailed comments on this in the function 14390Sstevel@tonic-gate * rootnex_get_ispec(). 14400Sstevel@tonic-gate * 14410Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 14420Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 14430Sstevel@tonic-gate * field may not initialized. So, we fake it here 14440Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 14450Sstevel@tonic-gate */ 14460Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 14470Sstevel@tonic-gate *(int *)result = 1; 14482580Sanish else 14492580Sanish return (DDI_FAILURE); 14500Sstevel@tonic-gate } 14510Sstevel@tonic-gate break; 14520Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 14532580Sanish *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 14540Sstevel@tonic-gate break; 14550Sstevel@tonic-gate default: 14560Sstevel@tonic-gate return (DDI_FAILURE); 14570Sstevel@tonic-gate } 14580Sstevel@tonic-gate 14590Sstevel@tonic-gate return (DDI_SUCCESS); 14600Sstevel@tonic-gate } 14610Sstevel@tonic-gate 14620Sstevel@tonic-gate 14630Sstevel@tonic-gate /* 1464509Smrj * rootnex_get_ispec() 1465509Smrj * convert an interrupt number to an interrupt specification. 1466509Smrj * The interrupt number determines which interrupt spec will be 1467509Smrj * returned if more than one exists. 1468509Smrj * 1469509Smrj * Look into the parent private data area of the 'rdip' to find out 1470509Smrj * the interrupt specification. First check to make sure there is 1471509Smrj * one that matchs "inumber" and then return a pointer to it. 1472509Smrj * 1473509Smrj * Return NULL if one could not be found. 1474509Smrj * 1475509Smrj * NOTE: This is needed for rootnex_intr_ops() 1476509Smrj */ 1477509Smrj static struct intrspec * 1478509Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 1479509Smrj { 1480509Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1481509Smrj 1482509Smrj /* 1483509Smrj * Special case handling for drivers that provide their own 1484509Smrj * intrspec structures instead of relying on the DDI framework. 1485509Smrj * 1486509Smrj * A broken hardware driver in ON could potentially provide its 1487509Smrj * own intrspec structure, instead of relying on the hardware. 1488509Smrj * If these drivers are children of 'rootnex' then we need to 1489509Smrj * continue to provide backward compatibility to them here. 1490509Smrj * 1491509Smrj * Following check is a special case for 'pcic' driver which 1492509Smrj * was found to have broken hardwre andby provides its own intrspec. 1493509Smrj * 1494509Smrj * Verbatim comments from this driver are shown here: 1495509Smrj * "Don't use the ddi_add_intr since we don't have a 1496509Smrj * default intrspec in all cases." 1497509Smrj * 1498509Smrj * Since an 'ispec' may not be always created for it, 1499509Smrj * check for that and create one if so. 1500509Smrj * 1501509Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 1502509Smrj */ 1503509Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1504509Smrj pdp->par_nintr = 1; 1505509Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1506509Smrj pdp->par_nintr, KM_SLEEP); 1507509Smrj } 1508509Smrj 1509509Smrj /* Validate the interrupt number */ 1510509Smrj if (inum >= pdp->par_nintr) 1511509Smrj return (NULL); 1512509Smrj 1513509Smrj /* Get the interrupt structure pointer and return that */ 1514509Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 1515509Smrj } 1516509Smrj 1517509Smrj 1518509Smrj /* 1519509Smrj * ****************** 1520509Smrj * dma related code 1521509Smrj * ****************** 1522509Smrj */ 1523509Smrj 1524509Smrj /* 1525509Smrj * rootnex_dma_allochdl() 1526509Smrj * called from ddi_dma_alloc_handle(). 15270Sstevel@tonic-gate */ 1528509Smrj /*ARGSUSED*/ 1529509Smrj static int 1530509Smrj rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1531509Smrj int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1532509Smrj { 1533509Smrj uint64_t maxsegmentsize_ll; 1534509Smrj uint_t maxsegmentsize; 1535509Smrj ddi_dma_impl_t *hp; 1536509Smrj rootnex_dma_t *dma; 1537509Smrj uint64_t count_max; 1538509Smrj uint64_t seg; 1539509Smrj int kmflag; 1540509Smrj int e; 1541509Smrj 1542509Smrj 1543509Smrj /* convert our sleep flags */ 1544509Smrj if (waitfp == DDI_DMA_SLEEP) { 1545509Smrj kmflag = KM_SLEEP; 1546509Smrj } else { 1547509Smrj kmflag = KM_NOSLEEP; 1548509Smrj } 1549509Smrj 1550509Smrj /* 1551509Smrj * We try to do only one memory allocation here. We'll do a little 1552509Smrj * pointer manipulation later. If the bind ends up taking more than 1553509Smrj * our prealloc's space, we'll have to allocate more memory in the 1554509Smrj * bind operation. Not great, but much better than before and the 1555509Smrj * best we can do with the current bind interfaces. 1556509Smrj */ 1557509Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1558509Smrj if (hp == NULL) { 1559509Smrj if (waitfp != DDI_DMA_DONTWAIT) { 1560509Smrj ddi_set_callback(waitfp, arg, 1561509Smrj &rootnex_state->r_dvma_call_list_id); 1562509Smrj } 1563509Smrj return (DDI_DMA_NORESOURCES); 1564509Smrj } 1565509Smrj 1566509Smrj /* Do our pointer manipulation now, align the structures */ 1567509Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 1568509Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1569509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1570509Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1571509Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1572509Smrj 1573509Smrj /* setup the handle */ 1574509Smrj rootnex_clean_dmahdl(hp); 1575509Smrj dma->dp_dip = rdip; 1576509Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1577509Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1578509Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 1579509Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1580509Smrj hp->dmai_rdip = rdip; 1581509Smrj hp->dmai_attr = *attr; 1582509Smrj 1583509Smrj /* we don't need to worry about the SPL since we do a tryenter */ 1584509Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1585509Smrj 1586509Smrj /* 1587509Smrj * Figure out our maximum segment size. If the segment size is greater 1588509Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 1589509Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1590509Smrj * dma_attr_count_max are size-1 type values. 1591509Smrj * 1592509Smrj * Maximum segment size is the largest physically contiguous chunk of 1593509Smrj * memory that we can return from a bind (i.e. the maximum size of a 1594509Smrj * single cookie). 1595509Smrj */ 1596509Smrj 1597509Smrj /* handle the rollover cases */ 1598509Smrj seg = attr->dma_attr_seg + 1; 1599509Smrj if (seg < attr->dma_attr_seg) { 1600509Smrj seg = attr->dma_attr_seg; 1601509Smrj } 1602509Smrj count_max = attr->dma_attr_count_max + 1; 1603509Smrj if (count_max < attr->dma_attr_count_max) { 1604509Smrj count_max = attr->dma_attr_count_max; 1605509Smrj } 1606509Smrj 1607509Smrj /* 1608509Smrj * granularity may or may not be a power of two. If it isn't, we can't 1609509Smrj * use a simple mask. 1610509Smrj */ 1611509Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1612509Smrj dma->dp_granularity_power_2 = B_FALSE; 1613509Smrj } else { 1614509Smrj dma->dp_granularity_power_2 = B_TRUE; 1615509Smrj } 1616509Smrj 1617509Smrj /* 1618509Smrj * maxxfer should be a whole multiple of granularity. If we're going to 1619509Smrj * break up a window because we're greater than maxxfer, we might as 1620509Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 1621509Smrj * worry about triming the window later on for this case. 1622509Smrj */ 1623509Smrj if (attr->dma_attr_granular > 1) { 1624509Smrj if (dma->dp_granularity_power_2) { 1625509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1626509Smrj (attr->dma_attr_maxxfer & 1627509Smrj (attr->dma_attr_granular - 1)); 1628509Smrj } else { 1629509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1630509Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1631509Smrj } 1632509Smrj } else { 1633509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 1634509Smrj } 1635509Smrj 1636509Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1637509Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1638509Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1639509Smrj maxsegmentsize = 0xFFFFFFFF; 1640509Smrj } else { 1641509Smrj maxsegmentsize = maxsegmentsize_ll; 1642509Smrj } 1643509Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1644509Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1645509Smrj 1646509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1647509Smrj if (rootnex_alloc_check_parms) { 1648509Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1649509Smrj if (e != DDI_SUCCESS) { 1650509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1651509Smrj (void) rootnex_dma_freehdl(dip, rdip, 1652509Smrj (ddi_dma_handle_t)hp); 1653509Smrj return (e); 1654509Smrj } 1655509Smrj } 1656509Smrj 1657509Smrj *handlep = (ddi_dma_handle_t)hp; 1658509Smrj 1659509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1660509Smrj DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1661509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1662509Smrj 1663509Smrj return (DDI_SUCCESS); 1664509Smrj } 1665509Smrj 1666509Smrj 1667509Smrj /* 1668509Smrj * rootnex_dma_freehdl() 1669509Smrj * called from ddi_dma_free_handle(). 1670509Smrj */ 1671509Smrj /*ARGSUSED*/ 1672509Smrj static int 1673509Smrj rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1674509Smrj { 1675509Smrj ddi_dma_impl_t *hp; 1676509Smrj rootnex_dma_t *dma; 1677509Smrj 1678509Smrj 1679509Smrj hp = (ddi_dma_impl_t *)handle; 1680509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1681509Smrj 1682509Smrj /* unbind should have been called first */ 1683509Smrj ASSERT(!dma->dp_inuse); 1684509Smrj 1685509Smrj mutex_destroy(&dma->dp_mutex); 1686509Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1687509Smrj 1688509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1689509Smrj DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1690509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1691509Smrj 1692509Smrj if (rootnex_state->r_dvma_call_list_id) 1693509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1694509Smrj 1695509Smrj return (DDI_SUCCESS); 1696509Smrj } 1697509Smrj 1698509Smrj 1699509Smrj /* 1700509Smrj * rootnex_dma_bindhdl() 1701509Smrj * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 1702509Smrj */ 1703509Smrj /*ARGSUSED*/ 1704509Smrj static int 1705509Smrj rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 1706509Smrj struct ddi_dma_req *dmareq, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 17070Sstevel@tonic-gate { 1708509Smrj rootnex_sglinfo_t *sinfo; 1709509Smrj ddi_dma_attr_t *attr; 1710509Smrj ddi_dma_impl_t *hp; 1711509Smrj rootnex_dma_t *dma; 1712509Smrj int kmflag; 1713509Smrj int e; 1714509Smrj 1715509Smrj 1716509Smrj hp = (ddi_dma_impl_t *)handle; 1717509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1718509Smrj sinfo = &dma->dp_sglinfo; 1719509Smrj attr = &hp->dmai_attr; 1720509Smrj 1721509Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1722509Smrj 1723509Smrj /* 1724509Smrj * This is useful for debugging a driver. Not as useful in a production 1725509Smrj * system. The only time this will fail is if you have a driver bug. 1726509Smrj */ 1727509Smrj if (rootnex_bind_check_inuse) { 1728509Smrj /* 1729509Smrj * No one else should ever have this lock unless someone else 1730509Smrj * is trying to use this handle. So contention on the lock 1731509Smrj * is the same as inuse being set. 1732509Smrj */ 1733509Smrj e = mutex_tryenter(&dma->dp_mutex); 1734509Smrj if (e == 0) { 1735509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1736509Smrj return (DDI_DMA_INUSE); 1737509Smrj } 1738509Smrj if (dma->dp_inuse) { 1739509Smrj mutex_exit(&dma->dp_mutex); 1740509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1741509Smrj return (DDI_DMA_INUSE); 1742509Smrj } 1743509Smrj dma->dp_inuse = B_TRUE; 1744509Smrj mutex_exit(&dma->dp_mutex); 1745509Smrj } 1746509Smrj 1747509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1748509Smrj if (rootnex_bind_check_parms) { 1749509Smrj e = rootnex_valid_bind_parms(dmareq, attr); 1750509Smrj if (e != DDI_SUCCESS) { 1751509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1752509Smrj rootnex_clean_dmahdl(hp); 1753509Smrj return (e); 1754509Smrj } 1755509Smrj } 1756509Smrj 1757509Smrj /* save away the original bind info */ 1758509Smrj dma->dp_dma = dmareq->dmar_object; 1759509Smrj 1760509Smrj /* 1761509Smrj * Figure out a rough estimate of what maximum number of pages this 1762509Smrj * buffer could use (a high estimate of course). 1763509Smrj */ 1764509Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1765509Smrj 1766509Smrj /* 1767509Smrj * We'll use the pre-allocated cookies for any bind that will *always* 1768509Smrj * fit (more important to be consistent, we don't want to create 1769509Smrj * additional degenerate cases). 1770509Smrj */ 1771509Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1772509Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1773509Smrj dma->dp_need_to_free_cookie = B_FALSE; 1774509Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1775509Smrj uint_t, sinfo->si_max_pages); 1776509Smrj 1777509Smrj /* 1778509Smrj * For anything larger than that, we'll go ahead and allocate the 1779509Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 1780509Smrj * seeing this path in the fast path for high performance devices very 1781509Smrj * frequently. 1782509Smrj * 1783509Smrj * a ddi bind interface that allowed the driver to provide storage to 1784509Smrj * the bind interface would speed this case up. 1785509Smrj */ 1786509Smrj } else { 1787509Smrj /* convert the sleep flags */ 1788509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1789509Smrj kmflag = KM_SLEEP; 1790509Smrj } else { 1791509Smrj kmflag = KM_NOSLEEP; 1792509Smrj } 1793509Smrj 1794509Smrj /* 1795509Smrj * Save away how much memory we allocated. If we're doing a 1796509Smrj * nosleep, the alloc could fail... 1797509Smrj */ 1798509Smrj dma->dp_cookie_size = sinfo->si_max_pages * 1799509Smrj sizeof (ddi_dma_cookie_t); 1800509Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1801509Smrj if (dma->dp_cookies == NULL) { 1802509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1803509Smrj rootnex_clean_dmahdl(hp); 1804509Smrj return (DDI_DMA_NORESOURCES); 1805509Smrj } 1806509Smrj dma->dp_need_to_free_cookie = B_TRUE; 1807509Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1808509Smrj sinfo->si_max_pages); 1809509Smrj } 1810509Smrj hp->dmai_cookie = dma->dp_cookies; 1811509Smrj 1812509Smrj /* 1813509Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1814509Smrj * looking at the contraints in the dma structure. It will then put some 1815509Smrj * additional state about the sgl in the dma struct (i.e. is the sgl 1816509Smrj * clean, or do we need to do some munging; how many pages need to be 1817509Smrj * copied, etc.) 1818509Smrj */ 1819509Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1820509Smrj &dma->dp_sglinfo); 1821509Smrj ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1822509Smrj 1823509Smrj /* if we don't need a copy buffer, we don't need to sync */ 1824509Smrj if (sinfo->si_copybuf_req == 0) { 1825509Smrj hp->dmai_rflags |= DMP_NOSYNC; 1826509Smrj } 1827509Smrj 1828509Smrj /* 1829509Smrj * if we don't need the copybuf and we don't need to do a partial, we 1830509Smrj * hit the fast path. All the high performance devices should be trying 1831509Smrj * to hit this path. To hit this path, a device should be able to reach 1832509Smrj * all of memory, shouldn't try to bind more than it can transfer, and 1833509Smrj * the buffer shouldn't require more cookies than the driver/device can 1834509Smrj * handle [sgllen]). 1835509Smrj */ 1836509Smrj if ((sinfo->si_copybuf_req == 0) && 1837509Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1838509Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1839509Smrj /* 18405591Sstephh * If the driver supports FMA, insert the handle in the FMA DMA 18415591Sstephh * handle cache. 18425591Sstephh */ 18435591Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 18445591Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 18455591Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 18465591Sstephh } 18475591Sstephh 18485591Sstephh /* 1849509Smrj * copy out the first cookie and ccountp, set the cookie 1850509Smrj * pointer to the second cookie. The first cookie is passed 1851509Smrj * back on the stack. Additional cookies are accessed via 1852509Smrj * ddi_dma_nextcookie() 1853509Smrj */ 1854509Smrj *cookiep = dma->dp_cookies[0]; 1855509Smrj *ccountp = sinfo->si_sgl_size; 1856509Smrj hp->dmai_cookie++; 1857509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1858509Smrj hp->dmai_nwin = 1; 1859509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1860509Smrj DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 1861509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1862509Smrj dma->dp_dma.dmao_size); 1863509Smrj return (DDI_DMA_MAPPED); 1864509Smrj } 1865509Smrj 1866509Smrj /* 1867509Smrj * go to the slow path, we may need to alloc more memory, create 1868509Smrj * multiple windows, and munge up a sgl to make the device happy. 1869509Smrj */ 1870509Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 1871509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 1872509Smrj if (dma->dp_need_to_free_cookie) { 1873509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 1874509Smrj } 1875509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1876509Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 1877509Smrj return (e); 1878509Smrj } 1879509Smrj 18805591Sstephh /* 18815591Sstephh * If the driver supports FMA, insert the handle in the FMA DMA handle 18825591Sstephh * cache. 18835591Sstephh */ 18845591Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 18855591Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 18865591Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 18875591Sstephh } 18885591Sstephh 1889509Smrj /* if the first window uses the copy buffer, sync it for the device */ 1890509Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 1891509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 1892509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1893509Smrj DDI_DMA_SYNC_FORDEV); 1894509Smrj } 1895509Smrj 1896509Smrj /* 1897509Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 1898509Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 1899509Smrj * If we have a partial map (i.e. multiple windows), the number of 1900509Smrj * cookies we return is the number of cookies in the first window. 1901509Smrj */ 1902509Smrj if (e == DDI_DMA_MAPPED) { 1903509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1904509Smrj *ccountp = sinfo->si_sgl_size; 1905509Smrj } else { 1906509Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 1907509Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 1908509Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 1909509Smrj } 1910509Smrj *cookiep = dma->dp_cookies[0]; 1911509Smrj hp->dmai_cookie++; 1912509Smrj 1913509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1914509Smrj DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 1915509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1916509Smrj dma->dp_dma.dmao_size); 1917509Smrj return (e); 1918509Smrj } 1919509Smrj 1920509Smrj 1921509Smrj /* 1922509Smrj * rootnex_dma_unbindhdl() 1923509Smrj * called from ddi_dma_unbind_handle() 1924509Smrj */ 1925509Smrj /*ARGSUSED*/ 1926509Smrj static int 1927509Smrj rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 1928509Smrj ddi_dma_handle_t handle) 1929509Smrj { 1930509Smrj ddi_dma_impl_t *hp; 1931509Smrj rootnex_dma_t *dma; 1932509Smrj int e; 1933509Smrj 1934509Smrj 1935509Smrj hp = (ddi_dma_impl_t *)handle; 1936509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1937509Smrj 1938509Smrj /* make sure the buffer wasn't free'd before calling unbind */ 1939509Smrj if (rootnex_unbind_verify_buffer) { 1940509Smrj e = rootnex_verify_buffer(dma); 1941509Smrj if (e != DDI_SUCCESS) { 1942509Smrj ASSERT(0); 1943509Smrj return (DDI_FAILURE); 1944509Smrj } 1945509Smrj } 1946509Smrj 1947509Smrj /* sync the current window before unbinding the buffer */ 1948509Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 1949509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 1950509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1951509Smrj DDI_DMA_SYNC_FORCPU); 1952509Smrj } 1953509Smrj 1954509Smrj /* 19551865Sdilpreet * If the driver supports FMA, remove the handle in the FMA DMA handle 19561865Sdilpreet * cache. 19571865Sdilpreet */ 19581865Sdilpreet if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 19591865Sdilpreet if ((DEVI(rdip)->devi_fmhdl != NULL) && 19601865Sdilpreet (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) { 19611865Sdilpreet (void) ndi_fmc_remove(rdip, DMA_HANDLE, hp); 19621865Sdilpreet } 19631865Sdilpreet } 19641865Sdilpreet 19651865Sdilpreet /* 1966509Smrj * cleanup and copy buffer or window state. if we didn't use the copy 1967509Smrj * buffer or windows, there won't be much to do :-) 1968509Smrj */ 1969509Smrj rootnex_teardown_copybuf(dma); 1970509Smrj rootnex_teardown_windows(dma); 1971509Smrj 1972509Smrj /* 1973509Smrj * If we had to allocate space to for the worse case sgl (it didn't 1974509Smrj * fit into our pre-allocate buffer), free that up now 1975509Smrj */ 1976509Smrj if (dma->dp_need_to_free_cookie) { 1977509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 1978509Smrj } 1979509Smrj 1980509Smrj /* 1981509Smrj * clean up the handle so it's ready for the next bind (i.e. if the 1982509Smrj * handle is reused). 1983509Smrj */ 1984509Smrj rootnex_clean_dmahdl(hp); 1985509Smrj 1986509Smrj if (rootnex_state->r_dvma_call_list_id) 1987509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1988509Smrj 1989509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1990509Smrj DTRACE_PROBE1(rootnex__unbind, uint64_t, 1991509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1992509Smrj 1993509Smrj return (DDI_SUCCESS); 1994509Smrj } 1995509Smrj 1996509Smrj 1997509Smrj /* 1998509Smrj * rootnex_verify_buffer() 1999509Smrj * verify buffer wasn't free'd 2000509Smrj */ 2001509Smrj static int 2002509Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 2003509Smrj { 2004509Smrj page_t **pplist; 2005509Smrj caddr_t vaddr; 2006509Smrj uint_t pcnt; 2007509Smrj uint_t poff; 2008509Smrj page_t *pp; 20091865Sdilpreet char b; 2010509Smrj int i; 2011509Smrj 2012509Smrj /* Figure out how many pages this buffer occupies */ 2013509Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2014509Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2015509Smrj } else { 2016509Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2017509Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2018509Smrj } 2019509Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2020509Smrj 2021509Smrj switch (dma->dp_dma.dmao_type) { 20220Sstevel@tonic-gate case DMA_OTYP_PAGES: 2023509Smrj /* 2024509Smrj * for a linked list of pp's walk through them to make sure 2025509Smrj * they're locked and not free. 2026509Smrj */ 2027509Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2028509Smrj for (i = 0; i < pcnt; i++) { 2029509Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2030509Smrj return (DDI_FAILURE); 20310Sstevel@tonic-gate } 2032509Smrj pp = pp->p_next; 20330Sstevel@tonic-gate } 20340Sstevel@tonic-gate break; 2035509Smrj 20360Sstevel@tonic-gate case DMA_OTYP_VADDR: 20370Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 2038509Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2039509Smrj /* 2040509Smrj * for an array of pp's walk through them to make sure they're 2041509Smrj * not free. It's possible that they may not be locked. 2042509Smrj */ 2043509Smrj if (pplist) { 2044509Smrj for (i = 0; i < pcnt; i++) { 2045509Smrj if (PP_ISFREE(pplist[i])) { 2046509Smrj return (DDI_FAILURE); 2047509Smrj } 2048509Smrj } 2049509Smrj 2050509Smrj /* For a virtual address, try to peek at each page */ 2051509Smrj } else { 2052509Smrj if (dma->dp_sglinfo.si_asp == &kas) { 2053509Smrj for (i = 0; i < pcnt; i++) { 20541865Sdilpreet if (ddi_peek8(NULL, vaddr, &b) == 20551865Sdilpreet DDI_FAILURE) 2056509Smrj return (DDI_FAILURE); 20571865Sdilpreet vaddr += MMU_PAGESIZE; 2058509Smrj } 2059509Smrj } 2060509Smrj } 2061509Smrj break; 2062509Smrj 2063509Smrj default: 2064509Smrj ASSERT(0); 2065509Smrj break; 2066509Smrj } 2067509Smrj 2068509Smrj return (DDI_SUCCESS); 2069509Smrj } 2070509Smrj 2071509Smrj 2072509Smrj /* 2073509Smrj * rootnex_clean_dmahdl() 2074509Smrj * Clean the dma handle. This should be called on a handle alloc and an 2075509Smrj * unbind handle. Set the handle state to the default settings. 2076509Smrj */ 2077509Smrj static void 2078509Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2079509Smrj { 2080509Smrj rootnex_dma_t *dma; 2081509Smrj 2082509Smrj 2083509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2084509Smrj 2085509Smrj hp->dmai_nwin = 0; 2086509Smrj dma->dp_current_cookie = 0; 2087509Smrj dma->dp_copybuf_size = 0; 2088509Smrj dma->dp_window = NULL; 2089509Smrj dma->dp_cbaddr = NULL; 2090509Smrj dma->dp_inuse = B_FALSE; 2091509Smrj dma->dp_need_to_free_cookie = B_FALSE; 2092509Smrj dma->dp_need_to_free_window = B_FALSE; 2093509Smrj dma->dp_partial_required = B_FALSE; 2094509Smrj dma->dp_trim_required = B_FALSE; 2095509Smrj dma->dp_sglinfo.si_copybuf_req = 0; 2096509Smrj #if !defined(__amd64) 2097509Smrj dma->dp_cb_remaping = B_FALSE; 2098509Smrj dma->dp_kva = NULL; 2099509Smrj #endif 2100509Smrj 2101509Smrj /* FMA related initialization */ 2102509Smrj hp->dmai_fault = 0; 2103509Smrj hp->dmai_fault_check = NULL; 2104509Smrj hp->dmai_fault_notify = NULL; 2105509Smrj hp->dmai_error.err_ena = 0; 2106509Smrj hp->dmai_error.err_status = DDI_FM_OK; 2107509Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2108509Smrj hp->dmai_error.err_ontrap = NULL; 2109509Smrj hp->dmai_error.err_fep = NULL; 21101865Sdilpreet hp->dmai_error.err_cf = NULL; 2111509Smrj } 2112509Smrj 2113509Smrj 2114509Smrj /* 2115509Smrj * rootnex_valid_alloc_parms() 2116509Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 2117509Smrj */ 2118509Smrj static int 2119509Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2120509Smrj { 2121509Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2122509Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2123509Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 2124509Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2125509Smrj return (DDI_DMA_BADATTR); 2126509Smrj } 2127509Smrj 2128509Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2129509Smrj return (DDI_DMA_BADATTR); 2130509Smrj } 2131509Smrj 2132509Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2133509Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2134509Smrj attr->dma_attr_sgllen <= 0) { 2135509Smrj return (DDI_DMA_BADATTR); 2136509Smrj } 2137509Smrj 2138509Smrj /* We should be able to DMA into every byte offset in a page */ 2139509Smrj if (maxsegmentsize < MMU_PAGESIZE) { 2140509Smrj return (DDI_DMA_BADATTR); 2141509Smrj } 2142509Smrj 2143509Smrj return (DDI_SUCCESS); 2144509Smrj } 2145509Smrj 2146509Smrj 2147509Smrj /* 2148509Smrj * rootnex_valid_bind_parms() 2149509Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 2150509Smrj */ 2151509Smrj /* ARGSUSED */ 2152509Smrj static int 2153509Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2154509Smrj { 2155509Smrj #if !defined(__amd64) 2156509Smrj /* 2157509Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 2158509Smrj * we can track the offset for the obsoleted interfaces. 2159509Smrj */ 2160509Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2161509Smrj return (DDI_DMA_TOOBIG); 2162509Smrj } 2163509Smrj #endif 2164509Smrj 2165509Smrj return (DDI_SUCCESS); 2166509Smrj } 2167509Smrj 2168509Smrj 2169509Smrj /* 2170509Smrj * rootnex_get_sgl() 2171509Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 2172509Smrj * with a call to the vm layer when vm2.0 comes around... 2173509Smrj */ 2174509Smrj static void 2175509Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2176509Smrj rootnex_sglinfo_t *sglinfo) 2177509Smrj { 2178509Smrj ddi_dma_atyp_t buftype; 21795084Sjohnlev rootnex_addr_t raddr; 2180509Smrj uint64_t last_page; 2181509Smrj uint64_t offset; 2182509Smrj uint64_t addrhi; 2183509Smrj uint64_t addrlo; 2184509Smrj uint64_t maxseg; 2185509Smrj page_t **pplist; 2186509Smrj uint64_t paddr; 2187509Smrj uint32_t psize; 2188509Smrj uint32_t size; 2189509Smrj caddr_t vaddr; 2190509Smrj uint_t pcnt; 2191509Smrj page_t *pp; 2192509Smrj uint_t cnt; 2193509Smrj 2194509Smrj 2195509Smrj /* shortcuts */ 2196509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2197509Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2198509Smrj maxseg = sglinfo->si_max_cookie_size; 2199509Smrj buftype = dmar_object->dmao_type; 2200509Smrj addrhi = sglinfo->si_max_addr; 2201509Smrj addrlo = sglinfo->si_min_addr; 2202509Smrj size = dmar_object->dmao_size; 2203509Smrj 2204509Smrj pcnt = 0; 2205509Smrj cnt = 0; 2206509Smrj 2207509Smrj /* 2208509Smrj * if we were passed down a linked list of pages, i.e. pointer to 2209509Smrj * page_t, use this to get our physical address and buf offset. 2210509Smrj */ 2211509Smrj if (buftype == DMA_OTYP_PAGES) { 2212509Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2213509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2214509Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2215509Smrj MMU_PAGEOFFSET; 22165084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum) + offset; 2217509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2218509Smrj pp = pp->p_next; 2219509Smrj sglinfo->si_asp = NULL; 2220509Smrj 2221509Smrj /* 2222509Smrj * We weren't passed down a linked list of pages, but if we were passed 2223509Smrj * down an array of pages, use this to get our physical address and buf 2224509Smrj * offset. 2225509Smrj */ 2226509Smrj } else if (pplist != NULL) { 2227509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2228509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2229509Smrj 2230509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2231509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2232509Smrj if (sglinfo->si_asp == NULL) { 2233509Smrj sglinfo->si_asp = &kas; 2234509Smrj } 2235509Smrj 2236509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 22375084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2238509Smrj paddr += offset; 2239509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2240509Smrj pcnt++; 2241509Smrj 2242509Smrj /* 2243509Smrj * All we have is a virtual address, we'll need to call into the VM 2244509Smrj * to get the physical address. 2245509Smrj */ 2246509Smrj } else { 2247509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2248509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2249509Smrj 2250509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2251509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2252509Smrj if (sglinfo->si_asp == NULL) { 2253509Smrj sglinfo->si_asp = &kas; 2254509Smrj } 2255509Smrj 22565084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2257509Smrj paddr += offset; 2258509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2259509Smrj vaddr += psize; 2260509Smrj } 2261509Smrj 22625084Sjohnlev #ifdef __xpv 22635084Sjohnlev /* 22645084Sjohnlev * If we're dom0, we're using a real device so we need to load 22655084Sjohnlev * the cookies with MFNs instead of PFNs. 22665084Sjohnlev */ 22675084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 22685084Sjohnlev #else 22695084Sjohnlev raddr = paddr; 22705084Sjohnlev #endif 22715084Sjohnlev 2272509Smrj /* 2273509Smrj * Setup the first cookie with the physical address of the page and the 2274509Smrj * size of the page (which takes into account the initial offset into 2275509Smrj * the page. 2276509Smrj */ 22775084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2278509Smrj sgl[cnt].dmac_size = psize; 2279509Smrj sgl[cnt].dmac_type = 0; 2280509Smrj 2281509Smrj /* 2282509Smrj * Save away the buffer offset into the page. We'll need this later in 2283509Smrj * the copy buffer code to help figure out the page index within the 2284509Smrj * buffer and the offset into the current page. 2285509Smrj */ 2286509Smrj sglinfo->si_buf_offset = offset; 2287509Smrj 2288509Smrj /* 2289509Smrj * If the DMA engine can't reach the physical address, increase how 2290509Smrj * much copy buffer we need. We always increase by pagesize so we don't 2291509Smrj * have to worry about converting offsets. Set a flag in the cookies 2292509Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 2293509Smrj * last cookie, go to the next cookie (since we separate each page which 2294509Smrj * uses the copy buffer in case the copy buffer is not physically 2295509Smrj * contiguous. 2296509Smrj */ 22975084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2298509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2299509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2300509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2301509Smrj cnt++; 2302509Smrj sgl[cnt].dmac_laddress = 0; 2303509Smrj sgl[cnt].dmac_size = 0; 2304509Smrj sgl[cnt].dmac_type = 0; 2305509Smrj } 2306509Smrj } 2307509Smrj 2308509Smrj /* 2309509Smrj * save this page's physical address so we can figure out if the next 2310509Smrj * page is physically contiguous. Keep decrementing size until we are 2311509Smrj * done with the buffer. 2312509Smrj */ 23135084Sjohnlev last_page = raddr & MMU_PAGEMASK; 2314509Smrj size -= psize; 2315509Smrj 2316509Smrj while (size > 0) { 2317509Smrj /* Get the size for this page (i.e. partial or full page) */ 2318509Smrj psize = MIN(size, MMU_PAGESIZE); 2319509Smrj 2320509Smrj if (buftype == DMA_OTYP_PAGES) { 2321509Smrj /* get the paddr from the page_t */ 2322509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 23235084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum); 2324509Smrj pp = pp->p_next; 2325509Smrj } else if (pplist != NULL) { 2326509Smrj /* index into the array of page_t's to get the paddr */ 2327509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 23285084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2329509Smrj pcnt++; 23300Sstevel@tonic-gate } else { 2331509Smrj /* call into the VM to get the paddr */ 23325084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2333509Smrj vaddr)); 2334509Smrj vaddr += psize; 2335509Smrj } 2336509Smrj 23375084Sjohnlev #ifdef __xpv 23385084Sjohnlev /* 23395084Sjohnlev * If we're dom0, we're using a real device so we need to load 23405084Sjohnlev * the cookies with MFNs instead of PFNs. 23415084Sjohnlev */ 23425084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 23435084Sjohnlev #else 23445084Sjohnlev raddr = paddr; 23455084Sjohnlev #endif 23465084Sjohnlev 2347509Smrj /* check to see if this page needs the copy buffer */ 23485084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2349509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2350509Smrj 23510Sstevel@tonic-gate /* 2352509Smrj * if there is something in the current cookie, go to 2353509Smrj * the next one. We only want one page in a cookie which 2354509Smrj * uses the copybuf since the copybuf doesn't have to 2355509Smrj * be physically contiguous. 2356509Smrj */ 2357509Smrj if (sgl[cnt].dmac_size != 0) { 2358509Smrj cnt++; 2359509Smrj } 23605084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2361509Smrj sgl[cnt].dmac_size = psize; 2362509Smrj #if defined(__amd64) 2363509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2364509Smrj #else 2365509Smrj /* 2366509Smrj * save the buf offset for 32-bit kernel. used in the 2367509Smrj * obsoleted interfaces. 2368509Smrj */ 2369509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2370509Smrj (dmar_object->dmao_size - size); 2371509Smrj #endif 2372509Smrj /* if this isn't the last cookie, go to the next one */ 2373509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2374509Smrj cnt++; 2375509Smrj sgl[cnt].dmac_laddress = 0; 2376509Smrj sgl[cnt].dmac_size = 0; 2377509Smrj sgl[cnt].dmac_type = 0; 2378509Smrj } 2379509Smrj 2380509Smrj /* 2381509Smrj * this page didn't need the copy buffer, if it's not physically 2382509Smrj * contiguous, or it would put us over a segment boundary, or it 2383509Smrj * puts us over the max cookie size, or the current sgl doesn't 2384509Smrj * have anything in it. 2385509Smrj */ 23865084Sjohnlev } else if (((last_page + MMU_PAGESIZE) != raddr) || 23875084Sjohnlev !(raddr & sglinfo->si_segmask) || 2388509Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 2389509Smrj (sgl[cnt].dmac_size == 0)) { 2390509Smrj /* 2391509Smrj * if we're not already in a new cookie, go to the next 2392509Smrj * cookie. 2393509Smrj */ 2394509Smrj if (sgl[cnt].dmac_size != 0) { 2395509Smrj cnt++; 2396509Smrj } 2397509Smrj 2398509Smrj /* save the cookie information */ 23995084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2400509Smrj sgl[cnt].dmac_size = psize; 2401509Smrj #if defined(__amd64) 2402509Smrj sgl[cnt].dmac_type = 0; 2403509Smrj #else 2404509Smrj /* 2405509Smrj * save the buf offset for 32-bit kernel. used in the 2406509Smrj * obsoleted interfaces. 2407509Smrj */ 2408509Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2409509Smrj #endif 2410509Smrj 2411509Smrj /* 2412509Smrj * this page didn't need the copy buffer, it is physically 2413509Smrj * contiguous with the last page, and it's <= the max cookie 2414509Smrj * size. 2415509Smrj */ 2416509Smrj } else { 2417509Smrj sgl[cnt].dmac_size += psize; 2418509Smrj 2419509Smrj /* 2420509Smrj * if this exactly == the maximum cookie size, and 2421509Smrj * it isn't the last cookie, go to the next cookie. 2422509Smrj */ 2423509Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 2424509Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 2425509Smrj cnt++; 2426509Smrj sgl[cnt].dmac_laddress = 0; 2427509Smrj sgl[cnt].dmac_size = 0; 2428509Smrj sgl[cnt].dmac_type = 0; 2429509Smrj } 2430509Smrj } 2431509Smrj 2432509Smrj /* 2433509Smrj * save this page's physical address so we can figure out if the 2434509Smrj * next page is physically contiguous. Keep decrementing size 2435509Smrj * until we are done with the buffer. 2436509Smrj */ 24375084Sjohnlev last_page = raddr; 2438509Smrj size -= psize; 2439509Smrj } 2440509Smrj 2441509Smrj /* we're done, save away how many cookies the sgl has */ 2442509Smrj if (sgl[cnt].dmac_size == 0) { 2443509Smrj ASSERT(cnt < sglinfo->si_max_pages); 2444509Smrj sglinfo->si_sgl_size = cnt; 2445509Smrj } else { 2446509Smrj sglinfo->si_sgl_size = cnt + 1; 2447509Smrj } 2448509Smrj } 2449509Smrj 2450509Smrj 2451509Smrj /* 2452509Smrj * rootnex_bind_slowpath() 2453509Smrj * Call in the bind path if the calling driver can't use the sgl without 2454509Smrj * modifying it. We either need to use the copy buffer and/or we will end up 2455509Smrj * with a partial bind. 2456509Smrj */ 2457509Smrj static int 2458509Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2459509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2460509Smrj { 2461509Smrj rootnex_sglinfo_t *sinfo; 2462509Smrj rootnex_window_t *window; 2463509Smrj ddi_dma_cookie_t *cookie; 2464509Smrj size_t copybuf_used; 2465509Smrj size_t dmac_size; 2466509Smrj boolean_t partial; 2467509Smrj off_t cur_offset; 2468509Smrj page_t *cur_pp; 2469509Smrj major_t mnum; 2470509Smrj int e; 2471509Smrj int i; 2472509Smrj 2473509Smrj 2474509Smrj sinfo = &dma->dp_sglinfo; 2475509Smrj copybuf_used = 0; 2476509Smrj partial = B_FALSE; 2477509Smrj 2478509Smrj /* 2479509Smrj * If we're using the copybuf, set the copybuf state in dma struct. 2480509Smrj * Needs to be first since it sets the copy buffer size. 2481509Smrj */ 2482509Smrj if (sinfo->si_copybuf_req != 0) { 2483509Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2484509Smrj if (e != DDI_SUCCESS) { 2485509Smrj return (e); 2486509Smrj } 2487509Smrj } else { 2488509Smrj dma->dp_copybuf_size = 0; 2489509Smrj } 2490509Smrj 2491509Smrj /* 2492509Smrj * Figure out if we need to do a partial mapping. If so, figure out 2493509Smrj * if we need to trim the buffers when we munge the sgl. 2494509Smrj */ 2495509Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2496509Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2497509Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2498509Smrj dma->dp_partial_required = B_TRUE; 2499509Smrj if (attr->dma_attr_granular != 1) { 2500509Smrj dma->dp_trim_required = B_TRUE; 2501509Smrj } 2502509Smrj } else { 2503509Smrj dma->dp_partial_required = B_FALSE; 2504509Smrj dma->dp_trim_required = B_FALSE; 2505509Smrj } 2506509Smrj 2507509Smrj /* If we need to do a partial bind, make sure the driver supports it */ 2508509Smrj if (dma->dp_partial_required && 2509509Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2510509Smrj 2511509Smrj mnum = ddi_driver_major(dma->dp_dip); 2512509Smrj /* 2513509Smrj * patchable which allows us to print one warning per major 2514509Smrj * number. 2515509Smrj */ 2516509Smrj if ((rootnex_bind_warn) && 2517509Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2518509Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2519509Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 2520509Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 2521509Smrj "There is a small risk of data corruption in " 2522509Smrj "particular with large I/Os. The driver should be " 2523509Smrj "replaced with a corrected version for proper " 2524509Smrj "system operation. To disable this warning, add " 2525509Smrj "'set rootnex:rootnex_bind_warn=0' to " 2526509Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2527509Smrj } 2528509Smrj return (DDI_DMA_TOOBIG); 2529509Smrj } 2530509Smrj 2531509Smrj /* 2532509Smrj * we might need multiple windows, setup state to handle them. In this 2533509Smrj * code path, we will have at least one window. 2534509Smrj */ 2535509Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 2536509Smrj if (e != DDI_SUCCESS) { 2537509Smrj rootnex_teardown_copybuf(dma); 2538509Smrj return (e); 2539509Smrj } 2540509Smrj 2541509Smrj window = &dma->dp_window[0]; 2542509Smrj cookie = &dma->dp_cookies[0]; 2543509Smrj cur_offset = 0; 2544509Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 2545509Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2546509Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2547509Smrj } 2548509Smrj 2549509Smrj /* loop though all the cookies we got back from get_sgl() */ 2550509Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 2551509Smrj /* 2552509Smrj * If we're using the copy buffer, check this cookie and setup 2553509Smrj * its associated copy buffer state. If this cookie uses the 2554509Smrj * copy buffer, make sure we sync this window during dma_sync. 2555509Smrj */ 2556509Smrj if (dma->dp_copybuf_size > 0) { 2557509Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2558509Smrj cur_offset, ©buf_used, &cur_pp); 2559509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2560509Smrj window->wd_dosync = B_TRUE; 2561509Smrj } 2562509Smrj } 2563509Smrj 2564509Smrj /* 2565509Smrj * save away the cookie size, since it could be modified in 2566509Smrj * the windowing code. 2567509Smrj */ 2568509Smrj dmac_size = cookie->dmac_size; 2569509Smrj 2570509Smrj /* if we went over max copybuf size */ 2571509Smrj if (dma->dp_copybuf_size && 2572509Smrj (copybuf_used > dma->dp_copybuf_size)) { 2573509Smrj partial = B_TRUE; 2574509Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 2575509Smrj cookie, cur_offset, ©buf_used); 2576509Smrj if (e != DDI_SUCCESS) { 2577509Smrj rootnex_teardown_copybuf(dma); 2578509Smrj rootnex_teardown_windows(dma); 2579509Smrj return (e); 2580509Smrj } 2581509Smrj 2582509Smrj /* 2583509Smrj * if the coookie uses the copy buffer, make sure the 2584509Smrj * new window we just moved to is set to sync. 2585509Smrj */ 2586509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2587509Smrj window->wd_dosync = B_TRUE; 2588509Smrj } 2589509Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2590509Smrj dma->dp_dip); 2591509Smrj 2592509Smrj /* if the cookie cnt == max sgllen, move to the next window */ 2593509Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2594509Smrj partial = B_TRUE; 2595509Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2596509Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 2597509Smrj cookie, attr, cur_offset); 2598509Smrj if (e != DDI_SUCCESS) { 2599509Smrj rootnex_teardown_copybuf(dma); 2600509Smrj rootnex_teardown_windows(dma); 2601509Smrj return (e); 2602509Smrj } 2603509Smrj 2604509Smrj /* 2605509Smrj * if the coookie uses the copy buffer, make sure the 2606509Smrj * new window we just moved to is set to sync. 2607509Smrj */ 2608509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2609509Smrj window->wd_dosync = B_TRUE; 2610509Smrj } 2611509Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2612509Smrj dma->dp_dip); 2613509Smrj 2614509Smrj /* else if we will be over maxxfer */ 2615509Smrj } else if ((window->wd_size + dmac_size) > 2616509Smrj dma->dp_maxxfer) { 2617509Smrj partial = B_TRUE; 2618509Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2619509Smrj cookie); 2620509Smrj if (e != DDI_SUCCESS) { 2621509Smrj rootnex_teardown_copybuf(dma); 2622509Smrj rootnex_teardown_windows(dma); 2623509Smrj return (e); 2624509Smrj } 2625509Smrj 2626509Smrj /* 2627509Smrj * if the coookie uses the copy buffer, make sure the 2628509Smrj * new window we just moved to is set to sync. 26290Sstevel@tonic-gate */ 2630509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2631509Smrj window->wd_dosync = B_TRUE; 2632509Smrj } 2633509Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2634509Smrj dma->dp_dip); 2635509Smrj 2636509Smrj /* else this cookie fits in the current window */ 2637509Smrj } else { 2638509Smrj window->wd_cookie_cnt++; 2639509Smrj window->wd_size += dmac_size; 2640509Smrj } 2641509Smrj 2642509Smrj /* track our offset into the buffer, go to the next cookie */ 2643509Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2644509Smrj ASSERT(cookie->dmac_size <= dmac_size); 2645509Smrj cur_offset += dmac_size; 2646509Smrj cookie++; 2647509Smrj } 2648509Smrj 2649509Smrj /* if we ended up with a zero sized window in the end, clean it up */ 2650509Smrj if (window->wd_size == 0) { 2651509Smrj hp->dmai_nwin--; 2652509Smrj window--; 2653509Smrj } 2654509Smrj 2655509Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 2656509Smrj 2657509Smrj if (!partial) { 2658509Smrj return (DDI_DMA_MAPPED); 2659509Smrj } 2660509Smrj 2661509Smrj ASSERT(dma->dp_partial_required); 2662509Smrj return (DDI_DMA_PARTIAL_MAP); 2663509Smrj } 2664509Smrj 2665509Smrj 2666509Smrj /* 2667509Smrj * rootnex_setup_copybuf() 2668509Smrj * Called in bind slowpath. Figures out if we're going to use the copy 2669509Smrj * buffer, and if we do, sets up the basic state to handle it. 2670509Smrj */ 2671509Smrj static int 2672509Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2673509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 2674509Smrj { 2675509Smrj rootnex_sglinfo_t *sinfo; 2676509Smrj ddi_dma_attr_t lattr; 2677509Smrj size_t max_copybuf; 2678509Smrj int cansleep; 2679509Smrj int e; 2680509Smrj #if !defined(__amd64) 2681509Smrj int vmflag; 2682509Smrj #endif 2683509Smrj 2684509Smrj 2685509Smrj sinfo = &dma->dp_sglinfo; 2686509Smrj 26875251Smrj /* read this first so it's consistent through the routine */ 26885251Smrj max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 2689509Smrj 2690509Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 2691509Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 2692509Smrj 2693509Smrj /* make sure the copybuf size <= the max size */ 2694509Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 2695509Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 2696509Smrj 2697509Smrj #if !defined(__amd64) 2698509Smrj /* 2699509Smrj * if we don't have kva space to copy to/from, allocate the KVA space 2700509Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 2701509Smrj * the 64-bit kernel. 2702509Smrj */ 2703509Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 2704509Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 2705509Smrj 2706509Smrj /* convert the sleep flags */ 2707509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2708509Smrj vmflag = VM_SLEEP; 2709509Smrj } else { 2710509Smrj vmflag = VM_NOSLEEP; 2711509Smrj } 2712509Smrj 2713509Smrj /* allocate Kernel VA space that we can bcopy to/from */ 2714509Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 2715509Smrj vmflag); 2716509Smrj if (dma->dp_kva == NULL) { 2717509Smrj return (DDI_DMA_NORESOURCES); 2718509Smrj } 2719509Smrj } 2720509Smrj #endif 2721509Smrj 2722509Smrj /* convert the sleep flags */ 2723509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2724509Smrj cansleep = 1; 2725509Smrj } else { 2726509Smrj cansleep = 0; 2727509Smrj } 2728509Smrj 2729509Smrj /* 27307173Smrj * Allocate the actual copy buffer. This needs to fit within the DMA 27317173Smrj * engine limits, so we can't use kmem_alloc... We don't need 27327173Smrj * contiguous memory (sgllen) since we will be forcing windows on 27337173Smrj * sgllen anyway. 2734509Smrj */ 2735509Smrj lattr = *attr; 2736509Smrj lattr.dma_attr_align = MMU_PAGESIZE; 27377173Smrj /* 27387173Smrj * this should be < 0 to indicate no limit, but due to a bug in 27397173Smrj * the rootnex, we'll set it to the maximum positive int. 27407173Smrj */ 27417173Smrj lattr.dma_attr_sgllen = 0x7fffffff; 2742509Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 2743509Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 2744509Smrj if (e != DDI_SUCCESS) { 2745509Smrj #if !defined(__amd64) 2746509Smrj if (dma->dp_kva != NULL) { 2747509Smrj vmem_free(heap_arena, dma->dp_kva, 2748509Smrj dma->dp_copybuf_size); 2749509Smrj } 2750509Smrj #endif 2751509Smrj return (DDI_DMA_NORESOURCES); 2752509Smrj } 2753509Smrj 2754509Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 2755509Smrj size_t, dma->dp_copybuf_size); 2756509Smrj 2757509Smrj return (DDI_SUCCESS); 2758509Smrj } 2759509Smrj 2760509Smrj 2761509Smrj /* 2762509Smrj * rootnex_setup_windows() 2763509Smrj * Called in bind slowpath to setup the window state. We always have windows 2764509Smrj * in the slowpath. Even if the window count = 1. 2765509Smrj */ 2766509Smrj static int 2767509Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2768509Smrj ddi_dma_attr_t *attr, int kmflag) 2769509Smrj { 2770509Smrj rootnex_window_t *windowp; 2771509Smrj rootnex_sglinfo_t *sinfo; 2772509Smrj size_t copy_state_size; 2773509Smrj size_t win_state_size; 2774509Smrj size_t state_available; 2775509Smrj size_t space_needed; 2776509Smrj uint_t copybuf_win; 2777509Smrj uint_t maxxfer_win; 2778509Smrj size_t space_used; 2779509Smrj uint_t sglwin; 2780509Smrj 2781509Smrj 2782509Smrj sinfo = &dma->dp_sglinfo; 2783509Smrj 2784509Smrj dma->dp_current_win = 0; 2785509Smrj hp->dmai_nwin = 0; 2786509Smrj 2787509Smrj /* If we don't need to do a partial, we only have one window */ 2788509Smrj if (!dma->dp_partial_required) { 2789509Smrj dma->dp_max_win = 1; 2790509Smrj 2791509Smrj /* 2792509Smrj * we need multiple windows, need to figure out the worse case number 2793509Smrj * of windows. 2794509Smrj */ 2795509Smrj } else { 2796509Smrj /* 2797509Smrj * if we need windows because we need more copy buffer that 2798509Smrj * we allow, the worse case number of windows we could need 2799509Smrj * here would be (copybuf space required / copybuf space that 2800509Smrj * we have) plus one for remainder, and plus 2 to handle the 2801509Smrj * extra pages on the trim for the first and last pages of the 2802509Smrj * buffer (a page is the minimum window size so under the right 2803509Smrj * attr settings, you could have a window for each page). 2804509Smrj * The last page will only be hit here if the size is not a 2805509Smrj * multiple of the granularity (which theoretically shouldn't 2806509Smrj * be the case but never has been enforced, so we could have 2807509Smrj * broken things without it). 2808509Smrj */ 2809509Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 2810509Smrj ASSERT(dma->dp_copybuf_size > 0); 2811509Smrj copybuf_win = (sinfo->si_copybuf_req / 2812509Smrj dma->dp_copybuf_size) + 1 + 2; 2813509Smrj } else { 2814509Smrj copybuf_win = 0; 2815509Smrj } 2816509Smrj 2817509Smrj /* 2818509Smrj * if we need windows because we have more cookies than the H/W 2819509Smrj * can handle, the number of windows we would need here would 2820509Smrj * be (cookie count / cookies count H/W supports) plus one for 2821509Smrj * remainder, and plus 2 to handle the extra pages on the trim 2822509Smrj * (see above comment about trim) 2823509Smrj */ 2824509Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 2825509Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 2826509Smrj + 1) + 2; 2827509Smrj } else { 2828509Smrj sglwin = 0; 2829509Smrj } 2830509Smrj 2831509Smrj /* 2832509Smrj * if we need windows because we're binding more memory than the 2833509Smrj * H/W can transfer at once, the number of windows we would need 2834509Smrj * here would be (xfer count / max xfer H/W supports) plus one 2835509Smrj * for remainder, and plus 2 to handle the extra pages on the 2836509Smrj * trim (see above comment about trim) 2837509Smrj */ 2838509Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 2839509Smrj maxxfer_win = (dma->dp_dma.dmao_size / 2840509Smrj dma->dp_maxxfer) + 1 + 2; 2841509Smrj } else { 2842509Smrj maxxfer_win = 0; 2843509Smrj } 2844509Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 2845509Smrj ASSERT(dma->dp_max_win > 0); 2846509Smrj } 2847509Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 2848509Smrj 2849509Smrj /* 2850509Smrj * Get space for window and potential copy buffer state. Before we 2851509Smrj * go and allocate memory, see if we can get away with using what's 2852509Smrj * left in the pre-allocted state or the dynamically allocated sgl. 2853509Smrj */ 2854509Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 2855509Smrj sizeof (ddi_dma_cookie_t)); 2856509Smrj 2857509Smrj /* if we dynamically allocated space for the cookies */ 2858509Smrj if (dma->dp_need_to_free_cookie) { 2859509Smrj /* if we have more space in the pre-allocted buffer, use it */ 2860509Smrj ASSERT(space_used <= dma->dp_cookie_size); 2861509Smrj if ((dma->dp_cookie_size - space_used) <= 2862509Smrj rootnex_state->r_prealloc_size) { 2863509Smrj state_available = rootnex_state->r_prealloc_size; 2864509Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 2865509Smrj 2866509Smrj /* 2867509Smrj * else, we have more free space in the dynamically allocated 2868509Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 2869509Smrj * didn't need a lot of cookies. 2870509Smrj */ 2871509Smrj } else { 2872509Smrj state_available = dma->dp_cookie_size - space_used; 2873509Smrj windowp = (rootnex_window_t *) 2874509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2875509Smrj } 2876509Smrj 2877509Smrj /* we used the pre-alloced buffer */ 2878509Smrj } else { 2879509Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 2880509Smrj state_available = rootnex_state->r_prealloc_size - space_used; 2881509Smrj windowp = (rootnex_window_t *) 2882509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2883509Smrj } 2884509Smrj 2885509Smrj /* 2886509Smrj * figure out how much state we need to track the copy buffer. Add an 2887509Smrj * addition 8 bytes for pointer alignemnt later. 2888509Smrj */ 2889509Smrj if (dma->dp_copybuf_size > 0) { 2890509Smrj copy_state_size = sinfo->si_max_pages * 2891509Smrj sizeof (rootnex_pgmap_t); 2892509Smrj } else { 2893509Smrj copy_state_size = 0; 2894509Smrj } 2895509Smrj /* add an additional 8 bytes for pointer alignment */ 2896509Smrj space_needed = win_state_size + copy_state_size + 0x8; 2897509Smrj 2898509Smrj /* if we have enough space already, use it */ 2899509Smrj if (state_available >= space_needed) { 2900509Smrj dma->dp_window = windowp; 2901509Smrj dma->dp_need_to_free_window = B_FALSE; 2902509Smrj 2903509Smrj /* not enough space, need to allocate more. */ 2904509Smrj } else { 2905509Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 2906509Smrj if (dma->dp_window == NULL) { 2907509Smrj return (DDI_DMA_NORESOURCES); 2908509Smrj } 2909509Smrj dma->dp_need_to_free_window = B_TRUE; 2910509Smrj dma->dp_window_size = space_needed; 2911509Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 2912509Smrj dma->dp_dip, size_t, space_needed); 2913509Smrj } 2914509Smrj 2915509Smrj /* 2916509Smrj * we allocate copy buffer state and window state at the same time. 2917509Smrj * setup our copy buffer state pointers. Make sure it's aligned. 2918509Smrj */ 2919509Smrj if (dma->dp_copybuf_size > 0) { 2920509Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 2921509Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 2922509Smrj 2923509Smrj #if !defined(__amd64) 2924509Smrj /* 2925509Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 2926509Smrj * false/NULL. Should be quicker to bzero vs loop and set. 2927509Smrj */ 2928509Smrj bzero(dma->dp_pgmap, copy_state_size); 2929509Smrj #endif 2930509Smrj } else { 2931509Smrj dma->dp_pgmap = NULL; 2932509Smrj } 2933509Smrj 2934509Smrj return (DDI_SUCCESS); 2935509Smrj } 2936509Smrj 2937509Smrj 2938509Smrj /* 2939509Smrj * rootnex_teardown_copybuf() 2940509Smrj * cleans up after rootnex_setup_copybuf() 2941509Smrj */ 2942509Smrj static void 2943509Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 2944509Smrj { 2945509Smrj #if !defined(__amd64) 2946509Smrj int i; 2947509Smrj 2948509Smrj /* 2949509Smrj * if we allocated kernel heap VMEM space, go through all the pages and 2950509Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 2951509Smrj * arena. Then free the VMEM space. 2952509Smrj */ 2953509Smrj if (dma->dp_kva != NULL) { 2954509Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 2955509Smrj if (dma->dp_pgmap[i].pm_mapped) { 2956509Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 2957509Smrj MMU_PAGESIZE, HAT_UNLOAD); 2958509Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 2959509Smrj } 2960509Smrj } 2961509Smrj 2962509Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 2963509Smrj } 2964509Smrj 2965509Smrj #endif 2966509Smrj 2967509Smrj /* if we allocated a copy buffer, free it */ 2968509Smrj if (dma->dp_cbaddr != NULL) { 29691900Seota i_ddi_mem_free(dma->dp_cbaddr, NULL); 2970509Smrj } 2971509Smrj } 2972509Smrj 2973509Smrj 2974509Smrj /* 2975509Smrj * rootnex_teardown_windows() 2976509Smrj * cleans up after rootnex_setup_windows() 2977509Smrj */ 2978509Smrj static void 2979509Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 2980509Smrj { 2981509Smrj /* 2982509Smrj * if we had to allocate window state on the last bind (because we 2983509Smrj * didn't have enough pre-allocated space in the handle), free it. 2984509Smrj */ 2985509Smrj if (dma->dp_need_to_free_window) { 2986509Smrj kmem_free(dma->dp_window, dma->dp_window_size); 2987509Smrj } 2988509Smrj } 2989509Smrj 2990509Smrj 2991509Smrj /* 2992509Smrj * rootnex_init_win() 2993509Smrj * Called in bind slow path during creation of a new window. Initializes 2994509Smrj * window state to default values. 2995509Smrj */ 2996509Smrj /*ARGSUSED*/ 2997509Smrj static void 2998509Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2999509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3000509Smrj { 3001509Smrj hp->dmai_nwin++; 3002509Smrj window->wd_dosync = B_FALSE; 3003509Smrj window->wd_offset = cur_offset; 3004509Smrj window->wd_size = 0; 3005509Smrj window->wd_first_cookie = cookie; 3006509Smrj window->wd_cookie_cnt = 0; 3007509Smrj window->wd_trim.tr_trim_first = B_FALSE; 3008509Smrj window->wd_trim.tr_trim_last = B_FALSE; 3009509Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 3010509Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 3011509Smrj #if !defined(__amd64) 3012509Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 3013509Smrj #endif 3014509Smrj } 3015509Smrj 3016509Smrj 3017509Smrj /* 3018509Smrj * rootnex_setup_cookie() 3019509Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 3020509Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 3021509Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 3022509Smrj * need during sync. 3023509Smrj */ 3024509Smrj static void 3025509Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3026509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3027509Smrj page_t **cur_pp) 3028509Smrj { 3029509Smrj boolean_t copybuf_sz_power_2; 3030509Smrj rootnex_sglinfo_t *sinfo; 30315084Sjohnlev paddr_t paddr; 3032509Smrj uint_t pidx; 3033509Smrj uint_t pcnt; 3034509Smrj off_t poff; 3035509Smrj #if defined(__amd64) 3036509Smrj pfn_t pfn; 3037509Smrj #else 3038509Smrj page_t **pplist; 3039509Smrj #endif 3040509Smrj 3041509Smrj sinfo = &dma->dp_sglinfo; 3042509Smrj 3043509Smrj /* 3044509Smrj * Calculate the page index relative to the start of the buffer. The 3045509Smrj * index to the current page for our buffer is the offset into the 3046509Smrj * first page of the buffer plus our current offset into the buffer 3047509Smrj * itself, shifted of course... 3048509Smrj */ 3049509Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3050509Smrj ASSERT(pidx < sinfo->si_max_pages); 3051509Smrj 3052509Smrj /* if this cookie uses the copy buffer */ 3053509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3054509Smrj /* 3055509Smrj * NOTE: we know that since this cookie uses the copy buffer, it 3056509Smrj * is <= MMU_PAGESIZE. 3057509Smrj */ 3058509Smrj 3059509Smrj /* 3060509Smrj * get the offset into the page. For the 64-bit kernel, get the 3061509Smrj * pfn which we'll use with seg kpm. 3062509Smrj */ 30635084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3064509Smrj #if defined(__amd64) 30655084Sjohnlev /* mfn_to_pfn() is a NOP on i86pc */ 30665084Sjohnlev pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 30675084Sjohnlev #endif /* __amd64 */ 3068509Smrj 3069509Smrj /* figure out if the copybuf size is a power of 2 */ 3070509Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3071509Smrj copybuf_sz_power_2 = B_FALSE; 3072509Smrj } else { 3073509Smrj copybuf_sz_power_2 = B_TRUE; 3074509Smrj } 3075509Smrj 3076509Smrj /* This page uses the copy buffer */ 3077509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3078509Smrj 3079509Smrj /* 3080509Smrj * save the copy buffer KVA that we'll use with this page. 3081509Smrj * if we still fit within the copybuf, it's a simple add. 3082509Smrj * otherwise, we need to wrap over using & or % accordingly. 3083509Smrj */ 3084509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3085509Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3086509Smrj *copybuf_used; 3087509Smrj } else { 3088509Smrj if (copybuf_sz_power_2) { 3089509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3090509Smrj (uintptr_t)dma->dp_cbaddr + 3091509Smrj (*copybuf_used & 3092509Smrj (dma->dp_copybuf_size - 1))); 30930Sstevel@tonic-gate } else { 3094509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3095509Smrj (uintptr_t)dma->dp_cbaddr + 3096509Smrj (*copybuf_used % dma->dp_copybuf_size)); 30970Sstevel@tonic-gate } 3098509Smrj } 3099509Smrj 3100509Smrj /* 3101509Smrj * over write the cookie physical address with the address of 3102509Smrj * the physical address of the copy buffer page that we will 3103509Smrj * use. 3104509Smrj */ 31055084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3106509Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3107509Smrj 31085084Sjohnlev #ifdef __xpv 31095084Sjohnlev /* 31105084Sjohnlev * If we're dom0, we're using a real device so we need to load 31115084Sjohnlev * the cookies with MAs instead of PAs. 31125084Sjohnlev */ 31135084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 31145084Sjohnlev #else 31155084Sjohnlev cookie->dmac_laddress = paddr; 31165084Sjohnlev #endif 31175084Sjohnlev 3118509Smrj /* if we have a kernel VA, it's easy, just save that address */ 3119509Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3120509Smrj (sinfo->si_asp == &kas)) { 3121509Smrj /* 3122509Smrj * save away the page aligned virtual address of the 3123509Smrj * driver buffer. Offsets are handled in the sync code. 3124509Smrj */ 3125509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3126509Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3127509Smrj & MMU_PAGEMASK); 3128509Smrj #if !defined(__amd64) 3129509Smrj /* 3130509Smrj * we didn't need to, and will never need to map this 3131509Smrj * page. 3132509Smrj */ 3133509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3134509Smrj #endif 3135509Smrj 3136509Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 3137509Smrj } else { 3138509Smrj #if defined(__amd64) 3139509Smrj /* 3140509Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 3141509Smrj * get a Kernel VA for the corresponding pfn. 3142509Smrj */ 3143509Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3144509Smrj #else 3145509Smrj /* 3146509Smrj * for the 32-bit kernel, this is a pain. First we'll 3147509Smrj * save away the page_t or user VA for this page. This 3148509Smrj * is needed in rootnex_dma_win() when we switch to a 3149509Smrj * new window which requires us to re-map the copy 3150509Smrj * buffer. 3151509Smrj */ 3152509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3153509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3154509Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3155509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3156509Smrj } else if (pplist != NULL) { 3157509Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3158509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3159509Smrj } else { 3160509Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 3161509Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3162509Smrj (((uintptr_t) 3163509Smrj dmar_object->dmao_obj.virt_obj.v_addr + 3164509Smrj cur_offset) & MMU_PAGEMASK); 3165509Smrj } 3166509Smrj 3167509Smrj /* 3168509Smrj * save away the page aligned virtual address which was 3169509Smrj * allocated from the kernel heap arena (taking into 3170509Smrj * account if we need more copy buffer than we alloced 3171509Smrj * and use multiple windows to handle this, i.e. &,%). 3172509Smrj * NOTE: there isn't and physical memory backing up this 3173509Smrj * virtual address space currently. 3174509Smrj */ 3175509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 3176509Smrj dma->dp_copybuf_size) { 3177509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3178509Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 3179509Smrj MMU_PAGEMASK); 3180509Smrj } else { 3181509Smrj if (copybuf_sz_power_2) { 3182509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3183509Smrj (((uintptr_t)dma->dp_kva + 3184509Smrj (*copybuf_used & 3185509Smrj (dma->dp_copybuf_size - 1))) & 3186509Smrj MMU_PAGEMASK); 3187509Smrj } else { 3188509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3189509Smrj (((uintptr_t)dma->dp_kva + 3190509Smrj (*copybuf_used % 3191509Smrj dma->dp_copybuf_size)) & 3192509Smrj MMU_PAGEMASK); 3193509Smrj } 3194509Smrj } 3195509Smrj 3196509Smrj /* 3197509Smrj * if we haven't used up the available copy buffer yet, 3198509Smrj * map the kva to the physical page. 3199509Smrj */ 3200509Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 3201509Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3202509Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3203509Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3204509Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3205509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3206509Smrj } else { 3207509Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3208509Smrj sinfo->si_asp, 3209509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3210509Smrj } 3211509Smrj 3212509Smrj /* 3213509Smrj * we've used up the available copy buffer, this page 3214509Smrj * will have to be mapped during rootnex_dma_win() when 3215509Smrj * we switch to a new window which requires a re-map 3216509Smrj * the copy buffer. (32-bit kernel only) 3217509Smrj */ 3218509Smrj } else { 3219509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3220509Smrj } 3221509Smrj #endif 3222509Smrj /* go to the next page_t */ 3223509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3224509Smrj *cur_pp = (*cur_pp)->p_next; 3225509Smrj } 32260Sstevel@tonic-gate } 3227509Smrj 3228509Smrj /* add to the copy buffer count */ 3229509Smrj *copybuf_used += MMU_PAGESIZE; 3230509Smrj 3231509Smrj /* 3232509Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 3233509Smrj * cookie occupies to reflect this. 3234509Smrj */ 3235509Smrj } else { 3236509Smrj /* 3237509Smrj * figure out how many pages the cookie occupies. We need to 3238509Smrj * use the original page offset of the buffer and the cookies 3239509Smrj * offset in the buffer to do this. 3240509Smrj */ 3241509Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3242509Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 3243509Smrj 3244509Smrj while (pcnt > 0) { 3245509Smrj #if !defined(__amd64) 3246509Smrj /* 3247509Smrj * the 32-bit kernel doesn't have seg kpm, so we need 3248509Smrj * to map in the driver buffer (if it didn't come down 3249509Smrj * with a kernel VA) on the fly. Since this page doesn't 3250509Smrj * use the copy buffer, it's not, or will it ever, have 3251509Smrj * to be mapped in. 3252509Smrj */ 3253509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3254509Smrj #endif 3255509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3256509Smrj 3257509Smrj /* 3258509Smrj * we need to update pidx and cur_pp or we'll loose 3259509Smrj * track of where we are. 3260509Smrj */ 3261509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3262509Smrj *cur_pp = (*cur_pp)->p_next; 3263509Smrj } 3264509Smrj pidx++; 3265509Smrj pcnt--; 3266509Smrj } 3267509Smrj } 3268509Smrj } 3269509Smrj 3270509Smrj 3271509Smrj /* 3272509Smrj * rootnex_sgllen_window_boundary() 3273509Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 3274509Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3275509Smrj * length supported by the DMA H/W. 3276509Smrj */ 3277509Smrj static int 3278509Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3279509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3280509Smrj off_t cur_offset) 3281509Smrj { 3282509Smrj off_t new_offset; 3283509Smrj size_t trim_sz; 3284509Smrj off_t coffset; 3285509Smrj 3286509Smrj 3287509Smrj /* 3288509Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 3289509Smrj * the next window and init it. We're done. 3290509Smrj */ 3291509Smrj if (!dma->dp_trim_required) { 3292509Smrj (*windowp)++; 3293509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3294509Smrj (*windowp)->wd_cookie_cnt++; 3295509Smrj (*windowp)->wd_size = cookie->dmac_size; 3296509Smrj return (DDI_SUCCESS); 3297509Smrj } 3298509Smrj 3299509Smrj /* figure out how much we need to trim from the window */ 3300509Smrj ASSERT(attr->dma_attr_granular != 0); 3301509Smrj if (dma->dp_granularity_power_2) { 3302509Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3303509Smrj } else { 3304509Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3305509Smrj } 3306509Smrj 3307509Smrj /* The window's a whole multiple of granularity. We're done */ 3308509Smrj if (trim_sz == 0) { 3309509Smrj (*windowp)++; 3310509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3311509Smrj (*windowp)->wd_cookie_cnt++; 3312509Smrj (*windowp)->wd_size = cookie->dmac_size; 3313509Smrj return (DDI_SUCCESS); 3314509Smrj } 3315509Smrj 3316509Smrj /* 3317509Smrj * The window's not a whole multiple of granularity, since we know this 3318509Smrj * is due to the sgllen, we need to go back to the last cookie and trim 3319509Smrj * that one, add the left over part of the old cookie into the new 3320509Smrj * window, and then add in the new cookie into the new window. 3321509Smrj */ 3322509Smrj 3323509Smrj /* 3324509Smrj * make sure the driver isn't making us do something bad... Trimming and 3325509Smrj * sgllen == 1 don't go together. 3326509Smrj */ 3327509Smrj if (attr->dma_attr_sgllen == 1) { 3328509Smrj return (DDI_DMA_NOMAPPING); 3329509Smrj } 3330509Smrj 3331509Smrj /* 3332509Smrj * first, setup the current window to account for the trim. Need to go 3333509Smrj * back to the last cookie for this. 3334509Smrj */ 3335509Smrj cookie--; 3336509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3337509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 33385084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3339509Smrj ASSERT(cookie->dmac_size > trim_sz); 3340509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3341509Smrj (*windowp)->wd_size -= trim_sz; 3342509Smrj 3343509Smrj /* save the buffer offsets for the next window */ 3344509Smrj coffset = cookie->dmac_size - trim_sz; 3345509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3346509Smrj 3347509Smrj /* 3348509Smrj * set this now in case this is the first window. all other cases are 3349509Smrj * set in dma_win() 3350509Smrj */ 3351509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3352509Smrj 3353509Smrj /* 3354509Smrj * initialize the next window using what's left over in the previous 3355509Smrj * cookie. 3356509Smrj */ 3357509Smrj (*windowp)++; 3358509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3359509Smrj (*windowp)->wd_cookie_cnt++; 3360509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 33615084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3362509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3363509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3364509Smrj (*windowp)->wd_dosync = B_TRUE; 3365509Smrj } 3366509Smrj 3367509Smrj /* 3368509Smrj * now go back to the current cookie and add it to the new window. set 3369509Smrj * the new window size to the what was left over from the previous 3370509Smrj * cookie and what's in the current cookie. 3371509Smrj */ 3372509Smrj cookie++; 3373509Smrj (*windowp)->wd_cookie_cnt++; 3374509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3375509Smrj 3376509Smrj /* 3377509Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 3378509Smrj * a max size of maxxfer). Handle that case. 3379509Smrj */ 3380509Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 3381509Smrj /* 3382509Smrj * maxxfer is already a whole multiple of granularity, and this 3383509Smrj * trim will be <= the previous trim (since a cookie can't be 3384509Smrj * larger than maxxfer). Make things simple here. 3385509Smrj */ 3386509Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3387509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3388509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 33895084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3390509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3391509Smrj (*windowp)->wd_size -= trim_sz; 3392509Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3393509Smrj 3394509Smrj /* save the buffer offsets for the next window */ 3395509Smrj coffset = cookie->dmac_size - trim_sz; 3396509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3397509Smrj 3398509Smrj /* setup the next window */ 3399509Smrj (*windowp)++; 3400509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3401509Smrj (*windowp)->wd_cookie_cnt++; 3402509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 34035084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3404509Smrj coffset; 3405509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3406509Smrj } 3407509Smrj 3408509Smrj return (DDI_SUCCESS); 3409509Smrj } 3410509Smrj 3411509Smrj 3412509Smrj /* 3413509Smrj * rootnex_copybuf_window_boundary() 3414509Smrj * Called in bind slowpath when we get to a window boundary because we used 3415509Smrj * up all the copy buffer that we have. 3416509Smrj */ 3417509Smrj static int 3418509Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3419509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3420509Smrj size_t *copybuf_used) 3421509Smrj { 3422509Smrj rootnex_sglinfo_t *sinfo; 3423509Smrj off_t new_offset; 3424509Smrj size_t trim_sz; 34255084Sjohnlev paddr_t paddr; 3426509Smrj off_t coffset; 3427509Smrj uint_t pidx; 3428509Smrj off_t poff; 3429509Smrj 3430509Smrj 3431509Smrj sinfo = &dma->dp_sglinfo; 3432509Smrj 3433509Smrj /* 3434509Smrj * the copy buffer should be a whole multiple of page size. We know that 3435509Smrj * this cookie is <= MMU_PAGESIZE. 3436509Smrj */ 3437509Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3438509Smrj 3439509Smrj /* 3440509Smrj * from now on, all new windows in this bind need to be re-mapped during 3441509Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3442509Smrj * space... 3443509Smrj */ 3444509Smrj #if !defined(__amd64) 3445509Smrj dma->dp_cb_remaping = B_TRUE; 3446509Smrj #endif 3447509Smrj 3448509Smrj /* reset copybuf used */ 3449509Smrj *copybuf_used = 0; 3450509Smrj 3451509Smrj /* 3452509Smrj * if we don't have to trim (since granularity is set to 1), go to the 3453509Smrj * next window and add the current cookie to it. We know the current 3454509Smrj * cookie uses the copy buffer since we're in this code path. 3455509Smrj */ 3456509Smrj if (!dma->dp_trim_required) { 3457509Smrj (*windowp)++; 3458509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3459509Smrj 3460509Smrj /* Add this cookie to the new window */ 3461509Smrj (*windowp)->wd_cookie_cnt++; 3462509Smrj (*windowp)->wd_size += cookie->dmac_size; 3463509Smrj *copybuf_used += MMU_PAGESIZE; 3464509Smrj return (DDI_SUCCESS); 3465509Smrj } 3466509Smrj 3467509Smrj /* 3468509Smrj * *** may need to trim, figure it out. 3469509Smrj */ 3470509Smrj 3471509Smrj /* figure out how much we need to trim from the window */ 3472509Smrj if (dma->dp_granularity_power_2) { 3473509Smrj trim_sz = (*windowp)->wd_size & 3474509Smrj (hp->dmai_attr.dma_attr_granular - 1); 3475509Smrj } else { 3476509Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3477509Smrj } 3478509Smrj 3479509Smrj /* 3480509Smrj * if the window's a whole multiple of granularity, go to the next 3481509Smrj * window, init it, then add in the current cookie. We know the current 3482509Smrj * cookie uses the copy buffer since we're in this code path. 3483509Smrj */ 3484509Smrj if (trim_sz == 0) { 3485509Smrj (*windowp)++; 3486509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3487509Smrj 3488509Smrj /* Add this cookie to the new window */ 3489509Smrj (*windowp)->wd_cookie_cnt++; 3490509Smrj (*windowp)->wd_size += cookie->dmac_size; 3491509Smrj *copybuf_used += MMU_PAGESIZE; 3492509Smrj return (DDI_SUCCESS); 3493509Smrj } 3494509Smrj 3495509Smrj /* 3496509Smrj * *** We figured it out, we definitly need to trim 3497509Smrj */ 3498509Smrj 3499509Smrj /* 3500509Smrj * make sure the driver isn't making us do something bad... 3501509Smrj * Trimming and sgllen == 1 don't go together. 3502509Smrj */ 3503509Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 3504509Smrj return (DDI_DMA_NOMAPPING); 3505509Smrj } 3506509Smrj 3507509Smrj /* 3508509Smrj * first, setup the current window to account for the trim. Need to go 3509509Smrj * back to the last cookie for this. Some of the last cookie will be in 3510509Smrj * the current window, and some of the last cookie will be in the new 3511509Smrj * window. All of the current cookie will be in the new window. 3512509Smrj */ 3513509Smrj cookie--; 3514509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3515509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 35165084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3517509Smrj ASSERT(cookie->dmac_size > trim_sz); 3518509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3519509Smrj (*windowp)->wd_size -= trim_sz; 3520509Smrj 3521509Smrj /* 3522509Smrj * we're trimming the last cookie (not the current cookie). So that 3523509Smrj * last cookie may have or may not have been using the copy buffer ( 3524509Smrj * we know the cookie passed in uses the copy buffer since we're in 3525509Smrj * this code path). 3526509Smrj * 3527509Smrj * If the last cookie doesn't use the copy buffer, nothing special to 3528509Smrj * do. However, if it does uses the copy buffer, it will be both the 3529509Smrj * last page in the current window and the first page in the next 3530509Smrj * window. Since we are reusing the copy buffer (and KVA space on the 3531509Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 3532509Smrj * current window, and the start of the copy buffer in the next window. 3533509Smrj * Track that info... The cookie physical address was already set to 3534509Smrj * the copy buffer physical address in setup_cookie.. 3535509Smrj */ 3536509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3537509Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3538509Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 3539509Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3540509Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 3541509Smrj (*windowp)->wd_trim.tr_last_cbaddr = 3542509Smrj dma->dp_pgmap[pidx].pm_cbaddr; 3543509Smrj #if !defined(__amd64) 3544509Smrj (*windowp)->wd_trim.tr_last_kaddr = 3545509Smrj dma->dp_pgmap[pidx].pm_kaddr; 3546509Smrj #endif 3547509Smrj } 3548509Smrj 3549509Smrj /* save the buffer offsets for the next window */ 3550509Smrj coffset = cookie->dmac_size - trim_sz; 3551509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3552509Smrj 3553509Smrj /* 3554509Smrj * set this now in case this is the first window. all other cases are 3555509Smrj * set in dma_win() 3556509Smrj */ 3557509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3558509Smrj 3559509Smrj /* 3560509Smrj * initialize the next window using what's left over in the previous 3561509Smrj * cookie. 3562509Smrj */ 3563509Smrj (*windowp)++; 3564509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3565509Smrj (*windowp)->wd_cookie_cnt++; 3566509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 35675084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3568509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3569509Smrj 3570509Smrj /* 3571509Smrj * again, we're tracking if the last cookie uses the copy buffer. 3572509Smrj * read the comment above for more info on why we need to track 3573509Smrj * additional state. 3574509Smrj * 3575509Smrj * For the first cookie in the new window, we need reset the physical 3576509Smrj * address to DMA into to the start of the copy buffer plus any 3577509Smrj * initial page offset which may be present. 3578509Smrj */ 3579509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3580509Smrj (*windowp)->wd_dosync = B_TRUE; 3581509Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3582509Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 3583509Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3584509Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 35855084Sjohnlev 35865084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 35875084Sjohnlev poff; 35885084Sjohnlev #ifdef __xpv 35895084Sjohnlev /* 35905084Sjohnlev * If we're dom0, we're using a real device so we need to load 35915084Sjohnlev * the cookies with MAs instead of PAs. 35925084Sjohnlev */ 35935084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = 35945084Sjohnlev ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 35955084Sjohnlev #else 35965084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = paddr; 35975084Sjohnlev #endif 35985084Sjohnlev 3599509Smrj #if !defined(__amd64) 3600509Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3601509Smrj #endif 3602509Smrj /* account for the cookie copybuf usage in the new window */ 3603509Smrj *copybuf_used += MMU_PAGESIZE; 3604509Smrj 3605509Smrj /* 3606509Smrj * every piece of code has to have a hack, and here is this 3607509Smrj * ones :-) 3608509Smrj * 3609509Smrj * There is a complex interaction between setup_cookie and the 3610509Smrj * copybuf window boundary. The complexity had to be in either 3611509Smrj * the maxxfer window, or the copybuf window, and I chose the 3612509Smrj * copybuf code. 3613509Smrj * 3614509Smrj * So in this code path, we have taken the last cookie, 3615509Smrj * virtually broken it in half due to the trim, and it happens 3616509Smrj * to use the copybuf which further complicates life. At the 3617509Smrj * same time, we have already setup the current cookie, which 3618509Smrj * is now wrong. More background info: the current cookie uses 3619509Smrj * the copybuf, so it is only a page long max. So we need to 3620509Smrj * fix the current cookies copy buffer address, physical 3621509Smrj * address, and kva for the 32-bit kernel. We due this by 3622509Smrj * bumping them by page size (of course, we can't due this on 3623509Smrj * the physical address since the copy buffer may not be 3624509Smrj * physically contiguous). 3625509Smrj */ 3626509Smrj cookie++; 3627509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 36285084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 36295084Sjohnlev 36305084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3631509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 36325084Sjohnlev #ifdef __xpv 36335084Sjohnlev /* 36345084Sjohnlev * If we're dom0, we're using a real device so we need to load 36355084Sjohnlev * the cookies with MAs instead of PAs. 36365084Sjohnlev */ 36375084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 36385084Sjohnlev #else 36395084Sjohnlev cookie->dmac_laddress = paddr; 36405084Sjohnlev #endif 36415084Sjohnlev 3642509Smrj #if !defined(__amd64) 3643509Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3644509Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3645509Smrj #endif 3646509Smrj } else { 3647509Smrj /* go back to the current cookie */ 3648509Smrj cookie++; 3649509Smrj } 3650509Smrj 3651509Smrj /* 3652509Smrj * add the current cookie to the new window. set the new window size to 3653509Smrj * the what was left over from the previous cookie and what's in the 3654509Smrj * current cookie. 3655509Smrj */ 3656509Smrj (*windowp)->wd_cookie_cnt++; 3657509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3658509Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 3659509Smrj 3660509Smrj /* 3661509Smrj * we know that the cookie passed in always uses the copy buffer. We 3662509Smrj * wouldn't be here if it didn't. 3663509Smrj */ 3664509Smrj *copybuf_used += MMU_PAGESIZE; 3665509Smrj 3666509Smrj return (DDI_SUCCESS); 3667509Smrj } 3668509Smrj 3669509Smrj 3670509Smrj /* 3671509Smrj * rootnex_maxxfer_window_boundary() 3672509Smrj * Called in bind slowpath when we get to a window boundary because we will 3673509Smrj * go over maxxfer. 3674509Smrj */ 3675509Smrj static int 3676509Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3677509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 3678509Smrj { 3679509Smrj size_t dmac_size; 3680509Smrj off_t new_offset; 3681509Smrj size_t trim_sz; 3682509Smrj off_t coffset; 3683509Smrj 3684509Smrj 3685509Smrj /* 3686509Smrj * calculate how much we have to trim off of the current cookie to equal 3687509Smrj * maxxfer. We don't have to account for granularity here since our 3688509Smrj * maxxfer already takes that into account. 3689509Smrj */ 3690509Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 3691509Smrj ASSERT(trim_sz <= cookie->dmac_size); 3692509Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 3693509Smrj 3694509Smrj /* save cookie size since we need it later and we might change it */ 3695509Smrj dmac_size = cookie->dmac_size; 3696509Smrj 3697509Smrj /* 3698509Smrj * if we're not trimming the entire cookie, setup the current window to 3699509Smrj * account for the trim. 3700509Smrj */ 3701509Smrj if (trim_sz < cookie->dmac_size) { 3702509Smrj (*windowp)->wd_cookie_cnt++; 3703509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3704509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 37055084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3706509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3707509Smrj (*windowp)->wd_size = dma->dp_maxxfer; 3708509Smrj 3709509Smrj /* 3710509Smrj * set the adjusted cookie size now in case this is the first 3711509Smrj * window. All other windows are taken care of in get win 3712509Smrj */ 3713509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3714509Smrj } 3715509Smrj 3716509Smrj /* 3717509Smrj * coffset is the current offset within the cookie, new_offset is the 3718509Smrj * current offset with the entire buffer. 3719509Smrj */ 3720509Smrj coffset = dmac_size - trim_sz; 3721509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3722509Smrj 3723509Smrj /* initialize the next window */ 3724509Smrj (*windowp)++; 3725509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3726509Smrj (*windowp)->wd_cookie_cnt++; 3727509Smrj (*windowp)->wd_size = trim_sz; 3728509Smrj if (trim_sz < dmac_size) { 3729509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 37305084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3731509Smrj coffset; 3732509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3733509Smrj } 3734509Smrj 3735509Smrj return (DDI_SUCCESS); 3736509Smrj } 3737509Smrj 3738509Smrj 3739509Smrj /* 3740509Smrj * rootnex_dma_sync() 3741509Smrj * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 3742509Smrj * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 3743509Smrj * is set, ddi_dma_sync() returns immediately passing back success. 3744509Smrj */ 3745509Smrj /*ARGSUSED*/ 3746509Smrj static int 3747509Smrj rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3748509Smrj off_t off, size_t len, uint_t cache_flags) 3749509Smrj { 3750509Smrj rootnex_sglinfo_t *sinfo; 3751509Smrj rootnex_pgmap_t *cbpage; 3752509Smrj rootnex_window_t *win; 3753509Smrj ddi_dma_impl_t *hp; 3754509Smrj rootnex_dma_t *dma; 3755509Smrj caddr_t fromaddr; 3756509Smrj caddr_t toaddr; 3757509Smrj uint_t psize; 3758509Smrj off_t offset; 3759509Smrj uint_t pidx; 3760509Smrj size_t size; 3761509Smrj off_t poff; 3762509Smrj int e; 3763509Smrj 3764509Smrj 3765509Smrj hp = (ddi_dma_impl_t *)handle; 3766509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3767509Smrj sinfo = &dma->dp_sglinfo; 3768509Smrj 3769509Smrj /* 3770509Smrj * if we don't have any windows, we don't need to sync. A copybuf 3771509Smrj * will cause us to have at least one window. 3772509Smrj */ 3773509Smrj if (dma->dp_window == NULL) { 3774509Smrj return (DDI_SUCCESS); 3775509Smrj } 3776509Smrj 3777509Smrj /* This window may not need to be sync'd */ 3778509Smrj win = &dma->dp_window[dma->dp_current_win]; 3779509Smrj if (!win->wd_dosync) { 3780509Smrj return (DDI_SUCCESS); 3781509Smrj } 3782509Smrj 3783509Smrj /* handle off and len special cases */ 3784509Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 3785509Smrj offset = win->wd_offset; 3786509Smrj } else { 3787509Smrj offset = off; 3788509Smrj } 3789509Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 3790509Smrj size = win->wd_size; 3791509Smrj } else { 3792509Smrj size = len; 3793509Smrj } 3794509Smrj 3795509Smrj /* check the sync args to make sure they make a little sense */ 3796509Smrj if (rootnex_sync_check_parms) { 3797509Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 3798509Smrj cache_flags); 3799509Smrj if (e != DDI_SUCCESS) { 3800509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 3801509Smrj return (DDI_FAILURE); 3802509Smrj } 3803509Smrj } 3804509Smrj 3805509Smrj /* 3806509Smrj * special case the first page to handle the offset into the page. The 3807509Smrj * offset to the current page for our buffer is the offset into the 3808509Smrj * first page of the buffer plus our current offset into the buffer 3809509Smrj * itself, masked of course. 3810509Smrj */ 3811509Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 3812509Smrj psize = MIN((MMU_PAGESIZE - poff), size); 3813509Smrj 3814509Smrj /* go through all the pages that we want to sync */ 3815509Smrj while (size > 0) { 3816509Smrj /* 3817509Smrj * Calculate the page index relative to the start of the buffer. 3818509Smrj * The index to the current page for our buffer is the offset 3819509Smrj * into the first page of the buffer plus our current offset 3820509Smrj * into the buffer itself, shifted of course... 3821509Smrj */ 3822509Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 3823509Smrj ASSERT(pidx < sinfo->si_max_pages); 3824509Smrj 3825509Smrj /* 3826509Smrj * if this page uses the copy buffer, we need to sync it, 3827509Smrj * otherwise, go on to the next page. 3828509Smrj */ 3829509Smrj cbpage = &dma->dp_pgmap[pidx]; 3830509Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 3831509Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 3832509Smrj if (cbpage->pm_uses_copybuf) { 3833509Smrj /* cbaddr and kaddr should be page aligned */ 3834509Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 3835509Smrj MMU_PAGEOFFSET) == 0); 3836509Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 3837509Smrj MMU_PAGEOFFSET) == 0); 3838509Smrj 3839509Smrj /* 3840509Smrj * if we're copying for the device, we are going to 3841509Smrj * copy from the drivers buffer and to the rootnex 3842509Smrj * allocated copy buffer. 3843509Smrj */ 3844509Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 3845509Smrj fromaddr = cbpage->pm_kaddr + poff; 3846509Smrj toaddr = cbpage->pm_cbaddr + poff; 3847509Smrj DTRACE_PROBE2(rootnex__sync__dev, 3848509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3849509Smrj 3850509Smrj /* 3851509Smrj * if we're copying for the cpu/kernel, we are going to 3852509Smrj * copy from the rootnex allocated copy buffer to the 3853509Smrj * drivers buffer. 3854509Smrj */ 3855509Smrj } else { 3856509Smrj fromaddr = cbpage->pm_cbaddr + poff; 3857509Smrj toaddr = cbpage->pm_kaddr + poff; 3858509Smrj DTRACE_PROBE2(rootnex__sync__cpu, 3859509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3860509Smrj } 3861509Smrj 3862509Smrj bcopy(fromaddr, toaddr, psize); 3863509Smrj } 3864509Smrj 3865509Smrj /* 3866509Smrj * decrement size until we're done, update our offset into the 3867509Smrj * buffer, and get the next page size. 3868509Smrj */ 3869509Smrj size -= psize; 3870509Smrj offset += psize; 3871509Smrj psize = MIN(MMU_PAGESIZE, size); 3872509Smrj 3873509Smrj /* page offset is zero for the rest of this loop */ 3874509Smrj poff = 0; 3875509Smrj } 3876509Smrj 3877509Smrj return (DDI_SUCCESS); 3878509Smrj } 3879509Smrj 3880509Smrj 3881509Smrj /* 3882509Smrj * rootnex_valid_sync_parms() 3883509Smrj * checks the parameters passed to sync to verify they are correct. 3884509Smrj */ 3885509Smrj static int 3886509Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 3887509Smrj off_t offset, size_t size, uint_t cache_flags) 3888509Smrj { 3889509Smrj off_t woffset; 3890509Smrj 3891509Smrj 3892509Smrj /* 3893509Smrj * the first part of the test to make sure the offset passed in is 3894509Smrj * within the window. 3895509Smrj */ 3896509Smrj if (offset < win->wd_offset) { 3897509Smrj return (DDI_FAILURE); 3898509Smrj } 3899509Smrj 3900509Smrj /* 3901509Smrj * second and last part of the test to make sure the offset and length 3902509Smrj * passed in is within the window. 3903509Smrj */ 3904509Smrj woffset = offset - win->wd_offset; 3905509Smrj if ((woffset + size) > win->wd_size) { 3906509Smrj return (DDI_FAILURE); 3907509Smrj } 3908509Smrj 3909509Smrj /* 3910509Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 3911509Smrj * be set too. 3912509Smrj */ 3913509Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 3914509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 3915509Smrj return (DDI_SUCCESS); 3916509Smrj } 3917509Smrj 3918509Smrj /* 3919509Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 3920509Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 3921509Smrj */ 3922509Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 3923509Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 3924509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 3925509Smrj return (DDI_SUCCESS); 3926509Smrj } 3927509Smrj 3928509Smrj return (DDI_FAILURE); 3929509Smrj } 3930509Smrj 3931509Smrj 3932509Smrj /* 3933509Smrj * rootnex_dma_win() 3934509Smrj * called from ddi_dma_getwin() 3935509Smrj */ 3936509Smrj /*ARGSUSED*/ 3937509Smrj static int 3938509Smrj rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3939509Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 3940509Smrj uint_t *ccountp) 3941509Smrj { 3942509Smrj rootnex_window_t *window; 3943509Smrj rootnex_trim_t *trim; 3944509Smrj ddi_dma_impl_t *hp; 3945509Smrj rootnex_dma_t *dma; 3946509Smrj #if !defined(__amd64) 3947509Smrj rootnex_sglinfo_t *sinfo; 3948509Smrj rootnex_pgmap_t *pmap; 3949509Smrj uint_t pidx; 3950509Smrj uint_t pcnt; 3951509Smrj off_t poff; 3952509Smrj int i; 3953509Smrj #endif 3954509Smrj 3955509Smrj 3956509Smrj hp = (ddi_dma_impl_t *)handle; 3957509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3958509Smrj #if !defined(__amd64) 3959509Smrj sinfo = &dma->dp_sglinfo; 3960509Smrj #endif 3961509Smrj 3962509Smrj /* If we try and get a window which doesn't exist, return failure */ 3963509Smrj if (win >= hp->dmai_nwin) { 3964509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3965509Smrj return (DDI_FAILURE); 3966509Smrj } 3967509Smrj 3968509Smrj /* 3969509Smrj * if we don't have any windows, and they're asking for the first 3970509Smrj * window, setup the cookie pointer to the first cookie in the bind. 3971509Smrj * setup our return values, then increment the cookie since we return 3972509Smrj * the first cookie on the stack. 3973509Smrj */ 3974509Smrj if (dma->dp_window == NULL) { 3975509Smrj if (win != 0) { 3976509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3977509Smrj return (DDI_FAILURE); 3978509Smrj } 3979509Smrj hp->dmai_cookie = dma->dp_cookies; 3980509Smrj *offp = 0; 3981509Smrj *lenp = dma->dp_dma.dmao_size; 3982509Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 3983509Smrj *cookiep = hp->dmai_cookie[0]; 3984509Smrj hp->dmai_cookie++; 3985509Smrj return (DDI_SUCCESS); 3986509Smrj } 3987509Smrj 3988509Smrj /* sync the old window before moving on to the new one */ 3989509Smrj window = &dma->dp_window[dma->dp_current_win]; 3990509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 3991509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 3992509Smrj DDI_DMA_SYNC_FORCPU); 3993509Smrj } 3994509Smrj 3995509Smrj #if !defined(__amd64) 3996509Smrj /* 3997509Smrj * before we move to the next window, if we need to re-map, unmap all 3998509Smrj * the pages in this window. 3999509Smrj */ 4000509Smrj if (dma->dp_cb_remaping) { 4001509Smrj /* 4002509Smrj * If we switch to this window again, we'll need to map in 4003509Smrj * on the fly next time. 4004509Smrj */ 4005509Smrj window->wd_remap_copybuf = B_TRUE; 4006509Smrj 4007509Smrj /* 4008509Smrj * calculate the page index into the buffer where this window 4009509Smrj * starts, and the number of pages this window takes up. 4010509Smrj */ 4011509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4012509Smrj MMU_PAGESHIFT; 4013509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4014509Smrj MMU_PAGEOFFSET; 4015509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4016509Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4017509Smrj 4018509Smrj /* unmap pages which are currently mapped in this window */ 4019509Smrj for (i = 0; i < pcnt; i++) { 4020509Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 4021509Smrj hat_unload(kas.a_hat, 4022509Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4023509Smrj HAT_UNLOAD); 4024509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4025509Smrj } 4026509Smrj pidx++; 4027509Smrj } 4028509Smrj } 4029509Smrj #endif 4030509Smrj 4031509Smrj /* 4032509Smrj * Move to the new window. 4033509Smrj * NOTE: current_win must be set for sync to work right 4034509Smrj */ 4035509Smrj dma->dp_current_win = win; 4036509Smrj window = &dma->dp_window[win]; 4037509Smrj 4038509Smrj /* if needed, adjust the first and/or last cookies for trim */ 4039509Smrj trim = &window->wd_trim; 4040509Smrj if (trim->tr_trim_first) { 40415084Sjohnlev window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4042509Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 4043509Smrj #if !defined(__amd64) 4044509Smrj window->wd_first_cookie->dmac_type = 4045509Smrj (window->wd_first_cookie->dmac_type & 4046509Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 4047509Smrj #endif 4048509Smrj if (trim->tr_first_copybuf_win) { 4049509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4050509Smrj trim->tr_first_cbaddr; 4051509Smrj #if !defined(__amd64) 4052509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4053509Smrj trim->tr_first_kaddr; 4054509Smrj #endif 4055509Smrj } 4056509Smrj } 4057509Smrj if (trim->tr_trim_last) { 40585084Sjohnlev trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4059509Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4060509Smrj if (trim->tr_last_copybuf_win) { 4061509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4062509Smrj trim->tr_last_cbaddr; 4063509Smrj #if !defined(__amd64) 4064509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4065509Smrj trim->tr_last_kaddr; 4066509Smrj #endif 4067509Smrj } 4068509Smrj } 4069509Smrj 4070509Smrj /* 4071509Smrj * setup the cookie pointer to the first cookie in the window. setup 4072509Smrj * our return values, then increment the cookie since we return the 4073509Smrj * first cookie on the stack. 4074509Smrj */ 4075509Smrj hp->dmai_cookie = window->wd_first_cookie; 4076509Smrj *offp = window->wd_offset; 4077509Smrj *lenp = window->wd_size; 4078509Smrj *ccountp = window->wd_cookie_cnt; 4079509Smrj *cookiep = hp->dmai_cookie[0]; 4080509Smrj hp->dmai_cookie++; 4081509Smrj 4082509Smrj #if !defined(__amd64) 4083509Smrj /* re-map copybuf if required for this window */ 4084509Smrj if (dma->dp_cb_remaping) { 4085509Smrj /* 4086509Smrj * calculate the page index into the buffer where this 4087509Smrj * window starts. 4088509Smrj */ 4089509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4090509Smrj MMU_PAGESHIFT; 4091509Smrj ASSERT(pidx < sinfo->si_max_pages); 4092509Smrj 4093509Smrj /* 4094509Smrj * the first page can get unmapped if it's shared with the 4095509Smrj * previous window. Even if the rest of this window is already 4096509Smrj * mapped in, we need to still check this one. 4097509Smrj */ 4098509Smrj pmap = &dma->dp_pgmap[pidx]; 4099509Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4100509Smrj if (pmap->pm_pp != NULL) { 4101509Smrj pmap->pm_mapped = B_TRUE; 4102509Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4103509Smrj } else if (pmap->pm_vaddr != NULL) { 4104509Smrj pmap->pm_mapped = B_TRUE; 4105509Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4106509Smrj pmap->pm_kaddr); 4107509Smrj } 4108509Smrj } 4109509Smrj pidx++; 4110509Smrj 4111509Smrj /* map in the rest of the pages if required */ 4112509Smrj if (window->wd_remap_copybuf) { 4113509Smrj window->wd_remap_copybuf = B_FALSE; 4114509Smrj 4115509Smrj /* figure out many pages this window takes up */ 4116509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4117509Smrj MMU_PAGEOFFSET; 4118509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4119509Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4120509Smrj 4121509Smrj /* map pages which require it */ 4122509Smrj for (i = 1; i < pcnt; i++) { 4123509Smrj pmap = &dma->dp_pgmap[pidx]; 4124509Smrj if (pmap->pm_uses_copybuf) { 4125509Smrj ASSERT(pmap->pm_mapped == B_FALSE); 4126509Smrj if (pmap->pm_pp != NULL) { 4127509Smrj pmap->pm_mapped = B_TRUE; 4128509Smrj i86_pp_map(pmap->pm_pp, 4129509Smrj pmap->pm_kaddr); 4130509Smrj } else if (pmap->pm_vaddr != NULL) { 4131509Smrj pmap->pm_mapped = B_TRUE; 4132509Smrj i86_va_map(pmap->pm_vaddr, 4133509Smrj sinfo->si_asp, 4134509Smrj pmap->pm_kaddr); 4135509Smrj } 4136509Smrj } 4137509Smrj pidx++; 4138509Smrj } 4139509Smrj } 4140509Smrj } 4141509Smrj #endif 4142509Smrj 4143509Smrj /* if the new window uses the copy buffer, sync it for the device */ 4144509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4145509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4146509Smrj DDI_DMA_SYNC_FORDEV); 4147509Smrj } 4148509Smrj 4149509Smrj return (DDI_SUCCESS); 4150509Smrj } 4151509Smrj 4152509Smrj 4153509Smrj 4154509Smrj /* 4155509Smrj * ************************ 4156509Smrj * obsoleted dma routines 4157509Smrj * ************************ 4158509Smrj */ 4159509Smrj 4160509Smrj /* 4161509Smrj * rootnex_dma_map() 4162509Smrj * called from ddi_dma_setup() 4163509Smrj */ 4164509Smrj /* ARGSUSED */ 4165509Smrj static int 4166509Smrj rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, struct ddi_dma_req *dmareq, 4167509Smrj ddi_dma_handle_t *handlep) 4168509Smrj { 4169509Smrj #if defined(__amd64) 4170509Smrj /* 4171509Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 4172509Smrj * rootnex_dma_mctl() 4173509Smrj */ 4174509Smrj return (DDI_DMA_NORESOURCES); 4175509Smrj 4176509Smrj #else /* 32-bit x86 kernel */ 4177509Smrj ddi_dma_handle_t *lhandlep; 4178509Smrj ddi_dma_handle_t lhandle; 4179509Smrj ddi_dma_cookie_t cookie; 4180509Smrj ddi_dma_attr_t dma_attr; 4181509Smrj ddi_dma_lim_t *dma_lim; 4182509Smrj uint_t ccnt; 4183509Smrj int e; 4184509Smrj 4185509Smrj 4186509Smrj /* 4187509Smrj * if the driver is just testing to see if it's possible to do the bind, 4188509Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 4189509Smrj */ 4190509Smrj if (handlep == NULL) { 4191509Smrj lhandlep = &lhandle; 4192509Smrj } else { 4193509Smrj lhandlep = handlep; 4194509Smrj } 4195509Smrj 4196509Smrj /* convert the limit structure to a dma_attr one */ 4197509Smrj dma_lim = dmareq->dmar_limits; 4198509Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 4199509Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4200509Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4201509Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4202509Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4203509Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4204509Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4205509Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4206509Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4207509Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4208509Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 4209509Smrj dma_attr.dma_attr_flags = 0; 4210509Smrj 4211509Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4212509Smrj dmareq->dmar_arg, lhandlep); 4213509Smrj if (e != DDI_SUCCESS) { 4214509Smrj return (e); 4215509Smrj } 4216509Smrj 4217509Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4218509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4219509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4220509Smrj return (e); 4221509Smrj } 4222509Smrj 4223509Smrj /* 4224509Smrj * if the driver is just testing to see if it's possible to do the bind, 4225509Smrj * free up the local state and return the result. 4226509Smrj */ 4227509Smrj if (handlep == NULL) { 4228509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4229509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4230509Smrj if (e == DDI_DMA_MAPPED) { 4231509Smrj return (DDI_DMA_MAPOK); 42320Sstevel@tonic-gate } else { 4233509Smrj return (DDI_DMA_NOMAPPING); 4234509Smrj } 4235509Smrj } 4236509Smrj 4237509Smrj return (e); 4238509Smrj #endif /* defined(__amd64) */ 4239509Smrj } 4240509Smrj 4241509Smrj 4242509Smrj /* 4243509Smrj * rootnex_dma_mctl() 4244509Smrj * 4245509Smrj */ 4246509Smrj /* ARGSUSED */ 4247509Smrj static int 4248509Smrj rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4249509Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4250509Smrj uint_t cache_flags) 4251509Smrj { 4252509Smrj #if defined(__amd64) 4253509Smrj /* 4254509Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4255509Smrj * common implementation in genunix, so they no longer have x86 4256509Smrj * specific functionality which called into dma_ctl. 4257509Smrj * 4258509Smrj * The rest of the obsoleted interfaces were never supported in the 4259509Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4260509Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4261509Smrj * implementation issues. 4262509Smrj * 4263509Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4264509Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4265509Smrj * reflect that now too... 4266509Smrj * 4267509Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4268509Smrj * not going to put this functionality into the 64-bit x86 kernel now. 4269509Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 4270509Smrj * that in a future release. 4271509Smrj */ 4272509Smrj return (DDI_FAILURE); 4273509Smrj 4274509Smrj #else /* 32-bit x86 kernel */ 4275509Smrj ddi_dma_cookie_t lcookie; 4276509Smrj ddi_dma_cookie_t *cookie; 4277509Smrj rootnex_window_t *window; 4278509Smrj ddi_dma_impl_t *hp; 4279509Smrj rootnex_dma_t *dma; 4280509Smrj uint_t nwin; 4281509Smrj uint_t ccnt; 4282509Smrj size_t len; 4283509Smrj off_t off; 4284509Smrj int e; 4285509Smrj 4286509Smrj 4287509Smrj /* 4288509Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4289509Smrj * hacky since were optimizing for the current interfaces and so we can 4290509Smrj * cleanup the mess in genunix. Hopefully we will remove the this 4291509Smrj * obsoleted routines someday soon. 4292509Smrj */ 4293509Smrj 4294509Smrj switch (request) { 4295509Smrj 4296509Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4297509Smrj hp = (ddi_dma_impl_t *)handle; 4298509Smrj cookie = (ddi_dma_cookie_t *)objpp; 4299509Smrj 4300509Smrj /* 4301509Smrj * convert segment to cookie. We don't distinguish between the 4302509Smrj * two :-) 4303509Smrj */ 4304509Smrj *cookie = *hp->dmai_cookie; 4305509Smrj *lenp = cookie->dmac_size; 4306509Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4307509Smrj return (DDI_SUCCESS); 4308509Smrj 4309509Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4310509Smrj hp = (ddi_dma_impl_t *)handle; 4311509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4312509Smrj 4313509Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4314509Smrj return (DDI_DMA_STALE); 43150Sstevel@tonic-gate } 4316509Smrj 4317509Smrj /* handle the case where we don't have any windows */ 4318509Smrj if (dma->dp_window == NULL) { 4319509Smrj /* 4320509Smrj * if seg == NULL, and we don't have any windows, 4321509Smrj * return the first cookie in the sgl. 4322509Smrj */ 4323509Smrj if (*lenp == NULL) { 4324509Smrj dma->dp_current_cookie = 0; 4325509Smrj hp->dmai_cookie = dma->dp_cookies; 4326509Smrj *objpp = (caddr_t)handle; 4327509Smrj return (DDI_SUCCESS); 4328509Smrj 4329509Smrj /* if we have more cookies, go to the next cookie */ 4330509Smrj } else { 4331509Smrj if ((dma->dp_current_cookie + 1) >= 4332509Smrj dma->dp_sglinfo.si_sgl_size) { 4333509Smrj return (DDI_DMA_DONE); 4334509Smrj } 4335509Smrj dma->dp_current_cookie++; 4336509Smrj hp->dmai_cookie++; 4337509Smrj return (DDI_SUCCESS); 4338509Smrj } 4339509Smrj } 4340509Smrj 4341509Smrj /* We have one or more windows */ 4342509Smrj window = &dma->dp_window[dma->dp_current_win]; 4343509Smrj 4344509Smrj /* 4345509Smrj * if seg == NULL, return the first cookie in the current 4346509Smrj * window 4347509Smrj */ 4348509Smrj if (*lenp == NULL) { 4349509Smrj dma->dp_current_cookie = 0; 4350683Smrj hp->dmai_cookie = window->wd_first_cookie; 4351509Smrj 4352509Smrj /* 4353509Smrj * go to the next cookie in the window then see if we done with 4354509Smrj * this window. 4355509Smrj */ 4356509Smrj } else { 4357509Smrj if ((dma->dp_current_cookie + 1) >= 4358509Smrj window->wd_cookie_cnt) { 4359509Smrj return (DDI_DMA_DONE); 4360509Smrj } 4361509Smrj dma->dp_current_cookie++; 4362509Smrj hp->dmai_cookie++; 4363509Smrj } 4364509Smrj *objpp = (caddr_t)handle; 4365509Smrj return (DDI_SUCCESS); 4366509Smrj 4367509Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4368509Smrj hp = (ddi_dma_impl_t *)handle; 4369509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4370509Smrj 4371509Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4372509Smrj return (DDI_DMA_STALE); 4373509Smrj } 4374509Smrj 4375509Smrj /* if win == NULL, return the first window in the bind */ 4376509Smrj if (*offp == NULL) { 4377509Smrj nwin = 0; 4378509Smrj 4379509Smrj /* 4380509Smrj * else, go to the next window then see if we're done with all 4381509Smrj * the windows. 4382509Smrj */ 4383509Smrj } else { 4384509Smrj nwin = dma->dp_current_win + 1; 4385509Smrj if (nwin >= hp->dmai_nwin) { 4386509Smrj return (DDI_DMA_DONE); 4387509Smrj } 4388509Smrj } 4389509Smrj 4390509Smrj /* switch to the next window */ 4391509Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4392509Smrj &lcookie, &ccnt); 4393509Smrj ASSERT(e == DDI_SUCCESS); 4394509Smrj if (e != DDI_SUCCESS) { 4395509Smrj return (DDI_DMA_STALE); 4396509Smrj } 4397509Smrj 4398509Smrj /* reset the cookie back to the first cookie in the window */ 4399509Smrj if (dma->dp_window != NULL) { 4400509Smrj window = &dma->dp_window[dma->dp_current_win]; 4401509Smrj hp->dmai_cookie = window->wd_first_cookie; 4402509Smrj } else { 4403509Smrj hp->dmai_cookie = dma->dp_cookies; 4404509Smrj } 4405509Smrj 4406509Smrj *objpp = (caddr_t)handle; 4407509Smrj return (DDI_SUCCESS); 4408509Smrj 4409509Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 4410509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4411509Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 4412509Smrj if (rootnex_state->r_dvma_call_list_id) { 4413509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4414509Smrj } 4415509Smrj return (DDI_SUCCESS); 4416509Smrj 4417509Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4418509Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4419509Smrj /* should never get here, handled in genunix */ 4420509Smrj ASSERT(0); 4421509Smrj return (DDI_FAILURE); 4422509Smrj 4423509Smrj case DDI_DMA_KVADDR: 4424509Smrj case DDI_DMA_GETERR: 4425509Smrj case DDI_DMA_COFF: 4426509Smrj return (DDI_FAILURE); 44270Sstevel@tonic-gate } 4428509Smrj 4429509Smrj return (DDI_FAILURE); 4430509Smrj #endif /* defined(__amd64) */ 44310Sstevel@tonic-gate } 44321414Scindi 44331865Sdilpreet 44341865Sdilpreet /* 44351865Sdilpreet * ********* 44361865Sdilpreet * FMA Code 44371865Sdilpreet * ********* 44381865Sdilpreet */ 44391865Sdilpreet 44401865Sdilpreet /* 44411865Sdilpreet * rootnex_fm_init() 44421865Sdilpreet * FMA init busop 44431865Sdilpreet */ 44441865Sdilpreet /* ARGSUSED */ 44451865Sdilpreet static int 44461865Sdilpreet rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 44471865Sdilpreet ddi_iblock_cookie_t *ibc) 44481865Sdilpreet { 44491865Sdilpreet *ibc = rootnex_state->r_err_ibc; 44501865Sdilpreet 44511865Sdilpreet return (ddi_system_fmcap); 44521865Sdilpreet } 44531865Sdilpreet 44541865Sdilpreet /* 44551865Sdilpreet * rootnex_dma_check() 44561865Sdilpreet * Function called after a dma fault occurred to find out whether the 44571865Sdilpreet * fault address is associated with a driver that is able to handle faults 44581865Sdilpreet * and recover from faults. 44591865Sdilpreet */ 44601865Sdilpreet /* ARGSUSED */ 44611414Scindi static int 44621865Sdilpreet rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 44631865Sdilpreet const void *not_used) 44641414Scindi { 44651865Sdilpreet rootnex_window_t *window; 44661865Sdilpreet uint64_t start_addr; 44671865Sdilpreet uint64_t fault_addr; 44681865Sdilpreet ddi_dma_impl_t *hp; 44691865Sdilpreet rootnex_dma_t *dma; 44701865Sdilpreet uint64_t end_addr; 44711865Sdilpreet size_t csize; 44721865Sdilpreet int i; 44731865Sdilpreet int j; 44741865Sdilpreet 44751865Sdilpreet 44761865Sdilpreet /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 44771865Sdilpreet hp = (ddi_dma_impl_t *)handle; 44781865Sdilpreet ASSERT(hp); 44791865Sdilpreet 44801865Sdilpreet dma = (rootnex_dma_t *)hp->dmai_private; 44811865Sdilpreet 44821865Sdilpreet /* Get the address that we need to search for */ 44831865Sdilpreet fault_addr = *(uint64_t *)addr; 44841865Sdilpreet 44851865Sdilpreet /* 44861865Sdilpreet * if we don't have any windows, we can just walk through all the 44871865Sdilpreet * cookies. 44881865Sdilpreet */ 44891865Sdilpreet if (dma->dp_window == NULL) { 44901865Sdilpreet /* for each cookie */ 44911865Sdilpreet for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 44921865Sdilpreet /* 44931865Sdilpreet * if the faulted address is within the physical address 44941865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 44951865Sdilpreet */ 44961865Sdilpreet if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 44971865Sdilpreet (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 44981865Sdilpreet dma->dp_cookies[i].dmac_size))) { 44991865Sdilpreet return (DDI_FM_NONFATAL); 45001865Sdilpreet } 45011865Sdilpreet } 45021865Sdilpreet 45031865Sdilpreet /* fault_addr not within this DMA handle */ 45041865Sdilpreet return (DDI_FM_UNKNOWN); 45051865Sdilpreet } 45061865Sdilpreet 45071865Sdilpreet /* we have mutiple windows, walk through each window */ 45081865Sdilpreet for (i = 0; i < hp->dmai_nwin; i++) { 45091865Sdilpreet window = &dma->dp_window[i]; 45101865Sdilpreet 45111865Sdilpreet /* Go through all the cookies in the window */ 45121865Sdilpreet for (j = 0; j < window->wd_cookie_cnt; j++) { 45131865Sdilpreet 45141865Sdilpreet start_addr = window->wd_first_cookie[j].dmac_laddress; 45151865Sdilpreet csize = window->wd_first_cookie[j].dmac_size; 45161865Sdilpreet 45171865Sdilpreet /* 45181865Sdilpreet * if we are trimming the first cookie in the window, 45191865Sdilpreet * and this is the first cookie, adjust the start 45201865Sdilpreet * address and size of the cookie to account for the 45211865Sdilpreet * trim. 45221865Sdilpreet */ 45231865Sdilpreet if (window->wd_trim.tr_trim_first && (j == 0)) { 45241865Sdilpreet start_addr = window->wd_trim.tr_first_paddr; 45251865Sdilpreet csize = window->wd_trim.tr_first_size; 45261865Sdilpreet } 45271865Sdilpreet 45281865Sdilpreet /* 45291865Sdilpreet * if we are trimming the last cookie in the window, 45301865Sdilpreet * and this is the last cookie, adjust the start 45311865Sdilpreet * address and size of the cookie to account for the 45321865Sdilpreet * trim. 45331865Sdilpreet */ 45341865Sdilpreet if (window->wd_trim.tr_trim_last && 45351865Sdilpreet (j == (window->wd_cookie_cnt - 1))) { 45361865Sdilpreet start_addr = window->wd_trim.tr_last_paddr; 45371865Sdilpreet csize = window->wd_trim.tr_last_size; 45381865Sdilpreet } 45391865Sdilpreet 45401865Sdilpreet end_addr = start_addr + csize; 45411865Sdilpreet 45421865Sdilpreet /* 45431865Sdilpreet * if the faulted address is within the physical address 45441865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 45451865Sdilpreet */ 45461865Sdilpreet if ((fault_addr >= start_addr) && 45471865Sdilpreet (fault_addr <= end_addr)) { 45481865Sdilpreet return (DDI_FM_NONFATAL); 45491865Sdilpreet } 45501865Sdilpreet } 45511865Sdilpreet } 45521865Sdilpreet 45531865Sdilpreet /* fault_addr not within this DMA handle */ 45541865Sdilpreet return (DDI_FM_UNKNOWN); 45551414Scindi } 4556