10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 50Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 60Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 70Sstevel@tonic-gate * with the License. 80Sstevel@tonic-gate * 90Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 100Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 110Sstevel@tonic-gate * See the License for the specific language governing permissions 120Sstevel@tonic-gate * and limitations under the License. 130Sstevel@tonic-gate * 140Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 150Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 160Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 170Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 180Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 190Sstevel@tonic-gate * 200Sstevel@tonic-gate * CDDL HEADER END 210Sstevel@tonic-gate */ 220Sstevel@tonic-gate /* 230Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 280Sstevel@tonic-gate 290Sstevel@tonic-gate /* 30509Smrj * x86 root nexus driver 310Sstevel@tonic-gate */ 320Sstevel@tonic-gate 330Sstevel@tonic-gate #include <sys/sysmacros.h> 340Sstevel@tonic-gate #include <sys/conf.h> 350Sstevel@tonic-gate #include <sys/autoconf.h> 360Sstevel@tonic-gate #include <sys/sysmacros.h> 370Sstevel@tonic-gate #include <sys/debug.h> 380Sstevel@tonic-gate #include <sys/psw.h> 390Sstevel@tonic-gate #include <sys/ddidmareq.h> 400Sstevel@tonic-gate #include <sys/promif.h> 410Sstevel@tonic-gate #include <sys/devops.h> 420Sstevel@tonic-gate #include <sys/kmem.h> 430Sstevel@tonic-gate #include <sys/cmn_err.h> 440Sstevel@tonic-gate #include <vm/seg.h> 450Sstevel@tonic-gate #include <vm/seg_kmem.h> 460Sstevel@tonic-gate #include <vm/seg_dev.h> 470Sstevel@tonic-gate #include <sys/vmem.h> 480Sstevel@tonic-gate #include <sys/mman.h> 490Sstevel@tonic-gate #include <vm/hat.h> 500Sstevel@tonic-gate #include <vm/as.h> 510Sstevel@tonic-gate #include <vm/page.h> 520Sstevel@tonic-gate #include <sys/avintr.h> 530Sstevel@tonic-gate #include <sys/errno.h> 540Sstevel@tonic-gate #include <sys/modctl.h> 550Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 560Sstevel@tonic-gate #include <sys/sunddi.h> 570Sstevel@tonic-gate #include <sys/sunndi.h> 580Sstevel@tonic-gate #include <sys/psm.h> 590Sstevel@tonic-gate #include <sys/ontrap.h> 60509Smrj #include <sys/atomic.h> 61509Smrj #include <sys/sdt.h> 62509Smrj #include <sys/rootnex.h> 63509Smrj #include <vm/hat_i86.h> 64509Smrj 65509Smrj 66509Smrj /* 67509Smrj * enable/disable extra checking of function parameters. Useful for debugging 68509Smrj * drivers. 69509Smrj */ 70509Smrj #ifdef DEBUG 71509Smrj int rootnex_alloc_check_parms = 1; 72509Smrj int rootnex_bind_check_parms = 1; 73509Smrj int rootnex_bind_check_inuse = 1; 74509Smrj int rootnex_unbind_verify_buffer = 0; 75509Smrj int rootnex_sync_check_parms = 1; 76509Smrj #else 77509Smrj int rootnex_alloc_check_parms = 0; 78509Smrj int rootnex_bind_check_parms = 0; 79509Smrj int rootnex_bind_check_inuse = 0; 80509Smrj int rootnex_unbind_verify_buffer = 0; 81509Smrj int rootnex_sync_check_parms = 0; 82509Smrj #endif 83509Smrj 84509Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 850Sstevel@tonic-gate int rootnex_bind_fail = 1; 860Sstevel@tonic-gate int rootnex_bind_warn = 1; 870Sstevel@tonic-gate uint8_t *rootnex_warn_list; 880Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 890Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 900Sstevel@tonic-gate 910Sstevel@tonic-gate /* 92509Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 93509Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 94509Smrj * the offset and size into ddi_dma_sync(). 950Sstevel@tonic-gate */ 96509Smrj int rootnex_sync_ignore_params = 0; 970Sstevel@tonic-gate 980Sstevel@tonic-gate /* 99509Smrj * maximum size that we will allow for a copy buffer. Can be patched on the 100509Smrj * fly 1010Sstevel@tonic-gate */ 102509Smrj size_t rootnex_max_copybuf_size = 0x100000; 1030Sstevel@tonic-gate 1040Sstevel@tonic-gate /* 105509Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 106509Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 107509Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 108509Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 109509Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 110509Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 111509Smrj * (if we need one). These can only be modified in /etc/system before rootnex 112509Smrj * attach. 1130Sstevel@tonic-gate */ 114509Smrj #if defined(__amd64) 115509Smrj int rootnex_prealloc_cookies = 65; 116509Smrj int rootnex_prealloc_windows = 4; 117509Smrj int rootnex_prealloc_copybuf = 2; 118509Smrj #else 119509Smrj int rootnex_prealloc_cookies = 33; 120509Smrj int rootnex_prealloc_windows = 4; 121509Smrj int rootnex_prealloc_copybuf = 2; 122509Smrj #endif 123509Smrj 124509Smrj /* driver global state */ 125509Smrj static rootnex_state_t *rootnex_state; 126509Smrj 127509Smrj /* shortcut to rootnex counters */ 128509Smrj static uint64_t *rootnex_cnt; 1290Sstevel@tonic-gate 1300Sstevel@tonic-gate /* 131509Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1320Sstevel@tonic-gate */ 133509Smrj /* statically defined integer/boolean properties for the root node */ 134509Smrj static rootnex_intprop_t rootnex_intprp[] = { 135509Smrj { "PAGESIZE", PAGESIZE }, 136509Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 137509Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 138509Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 139509Smrj }; 140509Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 141509Smrj 142509Smrj 143509Smrj static struct cb_ops rootnex_cb_ops = { 144509Smrj nodev, /* open */ 145509Smrj nodev, /* close */ 146509Smrj nodev, /* strategy */ 147509Smrj nodev, /* print */ 148509Smrj nodev, /* dump */ 149509Smrj nodev, /* read */ 150509Smrj nodev, /* write */ 151509Smrj nodev, /* ioctl */ 152509Smrj nodev, /* devmap */ 153509Smrj nodev, /* mmap */ 154509Smrj nodev, /* segmap */ 155509Smrj nochpoll, /* chpoll */ 156509Smrj ddi_prop_op, /* cb_prop_op */ 157509Smrj NULL, /* struct streamtab */ 158509Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 159509Smrj CB_REV, /* Rev */ 160509Smrj nodev, /* cb_aread */ 161509Smrj nodev /* cb_awrite */ 162509Smrj }; 163509Smrj 164509Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1650Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 166509Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1670Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1680Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 169509Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1700Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 171509Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 172509Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 173509Smrj ddi_dma_handle_t *handlep); 174509Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 175509Smrj ddi_dma_handle_t handle); 176509Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 177509Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 178509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 179509Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 180509Smrj ddi_dma_handle_t handle); 181509Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 182509Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 183509Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 184509Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 185509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 186509Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 1870Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 1880Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 189509Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 190509Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 191509Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 192509Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 193509Smrj 1940Sstevel@tonic-gate 1950Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 1960Sstevel@tonic-gate BUSO_REV, 1970Sstevel@tonic-gate rootnex_map, 1980Sstevel@tonic-gate NULL, 1990Sstevel@tonic-gate NULL, 2000Sstevel@tonic-gate NULL, 2010Sstevel@tonic-gate rootnex_map_fault, 2020Sstevel@tonic-gate rootnex_dma_map, 2030Sstevel@tonic-gate rootnex_dma_allochdl, 2040Sstevel@tonic-gate rootnex_dma_freehdl, 2050Sstevel@tonic-gate rootnex_dma_bindhdl, 2060Sstevel@tonic-gate rootnex_dma_unbindhdl, 207509Smrj rootnex_dma_sync, 2080Sstevel@tonic-gate rootnex_dma_win, 2090Sstevel@tonic-gate rootnex_dma_mctl, 2100Sstevel@tonic-gate rootnex_ctlops, 2110Sstevel@tonic-gate ddi_bus_prop_op, 2120Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2130Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2140Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2150Sstevel@tonic-gate i_ddi_rootnex_post_event, 2160Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2170Sstevel@tonic-gate 0, /* bus_config */ 2180Sstevel@tonic-gate 0, /* bus_unconfig */ 2190Sstevel@tonic-gate NULL, /* bus_fm_init */ 2200Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2210Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2220Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2230Sstevel@tonic-gate NULL, /* bus_powr */ 2240Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2250Sstevel@tonic-gate }; 2260Sstevel@tonic-gate 227509Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 228509Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 2290Sstevel@tonic-gate 2300Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2310Sstevel@tonic-gate DEVO_REV, 232509Smrj 0, 233509Smrj ddi_no_info, 234509Smrj nulldev, 2350Sstevel@tonic-gate nulldev, 2360Sstevel@tonic-gate rootnex_attach, 237509Smrj rootnex_detach, 238509Smrj nulldev, 239509Smrj &rootnex_cb_ops, 2400Sstevel@tonic-gate &rootnex_bus_ops 2410Sstevel@tonic-gate }; 2420Sstevel@tonic-gate 243509Smrj static struct modldrv rootnex_modldrv = { 244509Smrj &mod_driverops, 245509Smrj "i86pc root nexus %I%", 246509Smrj &rootnex_ops 247509Smrj }; 248509Smrj 249509Smrj static struct modlinkage rootnex_modlinkage = { 250509Smrj MODREV_1, 251509Smrj (void *)&rootnex_modldrv, 252509Smrj NULL 253509Smrj }; 254509Smrj 255509Smrj 256509Smrj /* 257509Smrj * extern hacks 258509Smrj */ 259509Smrj extern struct seg_ops segdev_ops; 260509Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 261509Smrj #ifdef DDI_MAP_DEBUG 262509Smrj extern int ddi_map_debug_flag; 263509Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 264509Smrj #endif 265509Smrj #define ptob64(x) (((uint64_t)(x)) << MMU_PAGESHIFT) 266509Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 267509Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 268509Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 269509Smrj psm_intr_op_t, int *); 270509Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 271509Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 272509Smrj /* 273509Smrj * Use device arena to use for device control register mappings. 274509Smrj * Various kernel memory walkers (debugger, dtrace) need to know 275509Smrj * to avoid this address range to prevent undesired device activity. 276509Smrj */ 277509Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 278509Smrj extern void device_arena_free(void * vaddr, size_t size); 279509Smrj 280509Smrj 2810Sstevel@tonic-gate /* 282509Smrj * Internal functions 2830Sstevel@tonic-gate */ 284509Smrj static int rootnex_dma_init(); 285509Smrj static void rootnex_add_props(dev_info_t *); 286509Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 287509Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 288509Smrj static int rootnex_ctlops_poke(peekpoke_ctlops_t *in_args); 289509Smrj static int rootnex_ctlops_peek(peekpoke_ctlops_t *in_args, void *result); 290509Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 291509Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 292509Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 293509Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 294509Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 295509Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 296509Smrj ddi_dma_attr_t *attr); 297509Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 298509Smrj rootnex_sglinfo_t *sglinfo); 299509Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 300509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 301509Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 302509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 303509Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 304509Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 305509Smrj ddi_dma_attr_t *attr, int kmflag); 306509Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 307509Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 308509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 309509Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 310509Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 311509Smrj size_t *copybuf_used, page_t **cur_pp); 312509Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 313509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 314509Smrj ddi_dma_attr_t *attr, off_t cur_offset); 315509Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 316509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 317509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 318509Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 319509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 320509Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 321509Smrj off_t offset, size_t size, uint_t cache_flags); 322509Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 323509Smrj 324509Smrj 325509Smrj /* 326509Smrj * _init() 327509Smrj * 328509Smrj */ 3290Sstevel@tonic-gate int 3300Sstevel@tonic-gate _init(void) 3310Sstevel@tonic-gate { 332509Smrj 333509Smrj rootnex_state = NULL; 334509Smrj return (mod_install(&rootnex_modlinkage)); 3350Sstevel@tonic-gate } 3360Sstevel@tonic-gate 337509Smrj 338509Smrj /* 339509Smrj * _info() 340509Smrj * 341509Smrj */ 342509Smrj int 343509Smrj _info(struct modinfo *modinfop) 344509Smrj { 345509Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 346509Smrj } 347509Smrj 348509Smrj 349509Smrj /* 350509Smrj * _fini() 351509Smrj * 352509Smrj */ 3530Sstevel@tonic-gate int 3540Sstevel@tonic-gate _fini(void) 3550Sstevel@tonic-gate { 3560Sstevel@tonic-gate return (EBUSY); 3570Sstevel@tonic-gate } 3580Sstevel@tonic-gate 3590Sstevel@tonic-gate 3600Sstevel@tonic-gate /* 361509Smrj * rootnex_attach() 3620Sstevel@tonic-gate * 3630Sstevel@tonic-gate */ 364509Smrj static int 365509Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 366509Smrj { 367509Smrj int e; 368509Smrj 369509Smrj 370509Smrj switch (cmd) { 371509Smrj case DDI_ATTACH: 372509Smrj break; 373509Smrj case DDI_RESUME: 374509Smrj return (DDI_SUCCESS); 375509Smrj default: 376509Smrj return (DDI_FAILURE); 377509Smrj } 378509Smrj 379509Smrj /* 380509Smrj * We should only have one instance of rootnex. Save it away since we 381509Smrj * don't have an easy way to get it back later. 382509Smrj */ 383509Smrj ASSERT(rootnex_state == NULL); 384509Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 385509Smrj 386509Smrj rootnex_state->r_dip = dip; 387509Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 388509Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 389509Smrj 390509Smrj mutex_init(&rootnex_state->r_peekpoke_mutex, NULL, MUTEX_SPIN, 391509Smrj (void *)ipltospl(15)); 392509Smrj 393509Smrj /* initialize DMA related state */ 394509Smrj e = rootnex_dma_init(); 395509Smrj if (e != DDI_SUCCESS) { 396509Smrj mutex_destroy(&rootnex_state->r_peekpoke_mutex); 397509Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 398509Smrj return (DDI_FAILURE); 399509Smrj } 400509Smrj 401509Smrj /* Add static root node properties */ 402509Smrj rootnex_add_props(dip); 403509Smrj 404509Smrj /* since we can't call ddi_report_dev() */ 405509Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 406509Smrj 407509Smrj /* Initialize rootnex event handle */ 408509Smrj i_ddi_rootnex_init_events(dip); 409509Smrj 410509Smrj return (DDI_SUCCESS); 411509Smrj } 412509Smrj 413509Smrj 414509Smrj /* 415509Smrj * rootnex_detach() 416509Smrj * 417509Smrj */ 4180Sstevel@tonic-gate /*ARGSUSED*/ 4190Sstevel@tonic-gate static int 420509Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 421509Smrj { 422509Smrj switch (cmd) { 423509Smrj case DDI_SUSPEND: 424509Smrj break; 425509Smrj default: 426509Smrj return (DDI_FAILURE); 427509Smrj } 428509Smrj 429509Smrj return (DDI_SUCCESS); 430509Smrj } 431509Smrj 432509Smrj 433509Smrj /* 434509Smrj * rootnex_dma_init() 435509Smrj * 436509Smrj */ 437509Smrj /*ARGSUSED*/ 438509Smrj static int 439509Smrj rootnex_dma_init() 4400Sstevel@tonic-gate { 441509Smrj size_t bufsize; 442509Smrj 443509Smrj 444509Smrj /* 445509Smrj * size of our cookie/window/copybuf state needed in dma bind that we 446509Smrj * pre-alloc in dma_alloc_handle 447509Smrj */ 448509Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 449509Smrj rootnex_state->r_prealloc_size = 450509Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 451509Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 452509Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 453509Smrj 454509Smrj /* 455509Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 456509Smrj * allocate 16 extra bytes for struct pointer alignment 457509Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 458509Smrj */ 459509Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 460509Smrj rootnex_state->r_prealloc_size + 0x10; 461509Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 462509Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 463509Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 464509Smrj return (DDI_FAILURE); 465509Smrj } 4660Sstevel@tonic-gate 4670Sstevel@tonic-gate /* 4680Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 4690Sstevel@tonic-gate * for. 4700Sstevel@tonic-gate */ 4710Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 4720Sstevel@tonic-gate KM_SLEEP); 4730Sstevel@tonic-gate 4740Sstevel@tonic-gate return (DDI_SUCCESS); 4750Sstevel@tonic-gate } 4760Sstevel@tonic-gate 4770Sstevel@tonic-gate 4780Sstevel@tonic-gate /* 479509Smrj * rootnex_add_props() 480509Smrj * 4810Sstevel@tonic-gate */ 4820Sstevel@tonic-gate static void 483509Smrj rootnex_add_props(dev_info_t *dip) 4840Sstevel@tonic-gate { 485509Smrj rootnex_intprop_t *rpp; 4860Sstevel@tonic-gate int i; 487509Smrj 488509Smrj /* Add static integer/boolean properties to the root node */ 489509Smrj rpp = rootnex_intprp; 490509Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 491509Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 492509Smrj rpp[i].prop_name, rpp[i].prop_value); 4930Sstevel@tonic-gate } 4940Sstevel@tonic-gate } 4950Sstevel@tonic-gate 496509Smrj 497509Smrj 498509Smrj /* 499509Smrj * ************************* 500509Smrj * ctlops related routines 501509Smrj * ************************* 502509Smrj */ 503509Smrj 5040Sstevel@tonic-gate /* 505509Smrj * rootnex_ctlops() 506509Smrj * 5070Sstevel@tonic-gate */ 508*693Sgovinda /*ARGSUSED*/ 509509Smrj static int 510509Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 511509Smrj void *arg, void *result) 512509Smrj { 513509Smrj int n, *ptr; 514509Smrj struct ddi_parent_private_data *pdp; 515509Smrj 516509Smrj switch (ctlop) { 517509Smrj case DDI_CTLOPS_DMAPMAPC: 518509Smrj /* 519509Smrj * Return 'partial' to indicate that dma mapping 520509Smrj * has to be done in the main MMU. 521509Smrj */ 522509Smrj return (DDI_DMA_PARTIAL); 523509Smrj 524509Smrj case DDI_CTLOPS_BTOP: 525509Smrj /* 526509Smrj * Convert byte count input to physical page units. 527509Smrj * (byte counts that are not a page-size multiple 528509Smrj * are rounded down) 529509Smrj */ 530509Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 531509Smrj return (DDI_SUCCESS); 532509Smrj 533509Smrj case DDI_CTLOPS_PTOB: 534509Smrj /* 535509Smrj * Convert size in physical pages to bytes 536509Smrj */ 537509Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 538509Smrj return (DDI_SUCCESS); 539509Smrj 540509Smrj case DDI_CTLOPS_BTOPR: 541509Smrj /* 542509Smrj * Convert byte count input to physical page units 543509Smrj * (byte counts that are not a page-size multiple 544509Smrj * are rounded up) 545509Smrj */ 546509Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 547509Smrj return (DDI_SUCCESS); 548509Smrj 549509Smrj case DDI_CTLOPS_POKE: 550509Smrj return (rootnex_ctlops_poke((peekpoke_ctlops_t *)arg)); 551509Smrj 552509Smrj case DDI_CTLOPS_PEEK: 553509Smrj return (rootnex_ctlops_peek((peekpoke_ctlops_t *)arg, result)); 554509Smrj 555509Smrj case DDI_CTLOPS_INITCHILD: 556509Smrj return (impl_ddi_sunbus_initchild(arg)); 557509Smrj 558509Smrj case DDI_CTLOPS_UNINITCHILD: 559509Smrj impl_ddi_sunbus_removechild(arg); 560509Smrj return (DDI_SUCCESS); 561509Smrj 562509Smrj case DDI_CTLOPS_REPORTDEV: 563509Smrj return (rootnex_ctl_reportdev(rdip)); 564509Smrj 565509Smrj case DDI_CTLOPS_IOMIN: 566509Smrj /* 567509Smrj * Nothing to do here but reflect back.. 568509Smrj */ 569509Smrj return (DDI_SUCCESS); 570509Smrj 571509Smrj case DDI_CTLOPS_REGSIZE: 572509Smrj case DDI_CTLOPS_NREGS: 573509Smrj break; 574509Smrj 575509Smrj case DDI_CTLOPS_SIDDEV: 576509Smrj if (ndi_dev_is_prom_node(rdip)) 577509Smrj return (DDI_SUCCESS); 578509Smrj if (ndi_dev_is_persistent_node(rdip)) 579509Smrj return (DDI_SUCCESS); 580509Smrj return (DDI_FAILURE); 581509Smrj 582509Smrj case DDI_CTLOPS_POWER: 583509Smrj return ((*pm_platform_power)((power_req_t *)arg)); 584509Smrj 585*693Sgovinda case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 586509Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 587509Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 588509Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 589*693Sgovinda case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 590*693Sgovinda case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 591509Smrj if (!rootnex_state->r_reserved_msg_printed) { 592509Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 593509Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 594509Smrj "1 or more reserved/obsolete operations."); 595509Smrj } 596509Smrj return (DDI_FAILURE); 597509Smrj 598509Smrj default: 599509Smrj return (DDI_FAILURE); 600509Smrj } 601509Smrj /* 602509Smrj * The rest are for "hardware" properties 603509Smrj */ 604509Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 605509Smrj return (DDI_FAILURE); 606509Smrj 607509Smrj if (ctlop == DDI_CTLOPS_NREGS) { 608509Smrj ptr = (int *)result; 609509Smrj *ptr = pdp->par_nreg; 610509Smrj } else { 611509Smrj off_t *size = (off_t *)result; 612509Smrj 613509Smrj ptr = (int *)arg; 614509Smrj n = *ptr; 615509Smrj if (n >= pdp->par_nreg) { 616509Smrj return (DDI_FAILURE); 617509Smrj } 618509Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 619509Smrj } 620509Smrj return (DDI_SUCCESS); 621509Smrj } 6220Sstevel@tonic-gate 6230Sstevel@tonic-gate 6240Sstevel@tonic-gate /* 625509Smrj * rootnex_ctl_reportdev() 626509Smrj * 6270Sstevel@tonic-gate */ 6280Sstevel@tonic-gate static int 629509Smrj rootnex_ctl_reportdev(dev_info_t *dev) 6300Sstevel@tonic-gate { 631509Smrj int i, n, len, f_len = 0; 632509Smrj char *buf; 633509Smrj 634509Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 635509Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 636509Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 637509Smrj len = strlen(buf); 638509Smrj 639509Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 640509Smrj 641509Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 642509Smrj 643509Smrj if (i == 0) 644509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 645509Smrj ": "); 646509Smrj else 647509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 648509Smrj " and "); 649509Smrj len = strlen(buf); 650509Smrj 651509Smrj switch (rp->regspec_bustype) { 652509Smrj 653509Smrj case BTEISA: 654509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 655509Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 6560Sstevel@tonic-gate break; 657509Smrj 658509Smrj case BTISA: 659509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 660509Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 6610Sstevel@tonic-gate break; 662509Smrj 663509Smrj default: 664509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 665509Smrj "space %x offset %x", 666509Smrj rp->regspec_bustype, rp->regspec_addr); 6670Sstevel@tonic-gate break; 6680Sstevel@tonic-gate } 669509Smrj len = strlen(buf); 6700Sstevel@tonic-gate } 671509Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 672509Smrj int pri; 673509Smrj 674509Smrj if (i != 0) { 675509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 676509Smrj ","); 677509Smrj len = strlen(buf); 678509Smrj } 679509Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 680509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 681509Smrj " sparc ipl %d", pri); 682509Smrj len = strlen(buf); 6830Sstevel@tonic-gate } 684509Smrj #ifdef DEBUG 685509Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 686509Smrj cmn_err(CE_NOTE, "next message is truncated: " 687509Smrj "printed length 1024, real length %d", f_len); 688509Smrj } 689509Smrj #endif /* DEBUG */ 690509Smrj cmn_err(CE_CONT, "?%s\n", buf); 691509Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 6920Sstevel@tonic-gate return (DDI_SUCCESS); 6930Sstevel@tonic-gate } 6940Sstevel@tonic-gate 695509Smrj 696509Smrj /* 697509Smrj * rootnex_ctlops_poke() 698509Smrj * 699509Smrj */ 7000Sstevel@tonic-gate static int 701509Smrj rootnex_ctlops_poke(peekpoke_ctlops_t *in_args) 7020Sstevel@tonic-gate { 703509Smrj int err = DDI_SUCCESS; 704509Smrj on_trap_data_t otd; 705509Smrj 706509Smrj /* Cautious access not supported. */ 707509Smrj if (in_args->handle != NULL) 7080Sstevel@tonic-gate return (DDI_FAILURE); 709509Smrj 710509Smrj mutex_enter(&rootnex_state->r_peekpoke_mutex); 711509Smrj 712509Smrj /* Set up protected environment. */ 713509Smrj if (!on_trap(&otd, OT_DATA_ACCESS)) { 714509Smrj switch (in_args->size) { 715509Smrj case sizeof (uint8_t): 716509Smrj *(uint8_t *)in_args->dev_addr = *(uint8_t *) 717509Smrj in_args->host_addr; 718509Smrj break; 719509Smrj 720509Smrj case sizeof (uint16_t): 721509Smrj *(uint16_t *)in_args->dev_addr = 722509Smrj *(uint16_t *)in_args->host_addr; 723509Smrj break; 724509Smrj 725509Smrj case sizeof (uint32_t): 726509Smrj *(uint32_t *)in_args->dev_addr = 727509Smrj *(uint32_t *)in_args->host_addr; 728509Smrj break; 729509Smrj 730509Smrj case sizeof (uint64_t): 731509Smrj *(uint64_t *)in_args->dev_addr = 732509Smrj *(uint64_t *)in_args->host_addr; 733509Smrj break; 734509Smrj 735509Smrj default: 736509Smrj err = DDI_FAILURE; 737509Smrj break; 738509Smrj } 739509Smrj } else 740509Smrj err = DDI_FAILURE; 741509Smrj 742509Smrj /* Take down protected environment. */ 743509Smrj no_trap(); 744509Smrj mutex_exit(&rootnex_state->r_peekpoke_mutex); 745509Smrj 746509Smrj return (err); 747509Smrj } 748509Smrj 749509Smrj 750509Smrj /* 751509Smrj * rootnex_ctlops_peek() 752509Smrj * 753509Smrj */ 754509Smrj static int 755509Smrj rootnex_ctlops_peek(peekpoke_ctlops_t *in_args, void *result) 756509Smrj { 757509Smrj int err = DDI_SUCCESS; 758509Smrj on_trap_data_t otd; 759509Smrj 760509Smrj /* Cautious access not supported. */ 761509Smrj if (in_args->handle != NULL) 7620Sstevel@tonic-gate return (DDI_FAILURE); 763509Smrj 764509Smrj mutex_enter(&rootnex_state->r_peekpoke_mutex); 765509Smrj 766509Smrj if (!on_trap(&otd, OT_DATA_ACCESS)) { 767509Smrj switch (in_args->size) { 768509Smrj case sizeof (uint8_t): 769509Smrj *(uint8_t *)in_args->host_addr = 770509Smrj *(uint8_t *)in_args->dev_addr; 771509Smrj break; 772509Smrj 773509Smrj case sizeof (uint16_t): 774509Smrj *(uint16_t *)in_args->host_addr = 775509Smrj *(uint16_t *)in_args->dev_addr; 776509Smrj break; 777509Smrj 778509Smrj case sizeof (uint32_t): 779509Smrj *(uint32_t *)in_args->host_addr = 780509Smrj *(uint32_t *)in_args->dev_addr; 781509Smrj break; 782509Smrj 783509Smrj case sizeof (uint64_t): 784509Smrj *(uint64_t *)in_args->host_addr = 785509Smrj *(uint64_t *)in_args->dev_addr; 786509Smrj break; 787509Smrj 788509Smrj default: 789509Smrj err = DDI_FAILURE; 790509Smrj break; 791509Smrj } 792509Smrj result = (void *)in_args->host_addr; 793509Smrj } else 794509Smrj err = DDI_FAILURE; 795509Smrj 796509Smrj no_trap(); 797509Smrj mutex_exit(&rootnex_state->r_peekpoke_mutex); 798509Smrj 799509Smrj return (err); 8000Sstevel@tonic-gate } 8010Sstevel@tonic-gate 802509Smrj 803509Smrj 804509Smrj /* 805509Smrj * ****************** 806509Smrj * map related code 807509Smrj * ****************** 808509Smrj */ 809509Smrj 810509Smrj /* 811509Smrj * rootnex_map() 812509Smrj * 813509Smrj */ 8140Sstevel@tonic-gate static int 815509Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 816509Smrj off_t len, caddr_t *vaddrp) 8170Sstevel@tonic-gate { 8180Sstevel@tonic-gate struct regspec *rp, tmp_reg; 8190Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 8200Sstevel@tonic-gate int error; 8210Sstevel@tonic-gate 8220Sstevel@tonic-gate mp = &mr; 8230Sstevel@tonic-gate 8240Sstevel@tonic-gate switch (mp->map_op) { 8250Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8260Sstevel@tonic-gate case DDI_MO_UNMAP: 8270Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8280Sstevel@tonic-gate break; 8290Sstevel@tonic-gate default: 8300Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8310Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 8320Sstevel@tonic-gate mp->map_op); 8330Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8340Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8350Sstevel@tonic-gate } 8360Sstevel@tonic-gate 8370Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 8380Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8390Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 8400Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8410Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8420Sstevel@tonic-gate } 8430Sstevel@tonic-gate 8440Sstevel@tonic-gate /* 8450Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 8460Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 8470Sstevel@tonic-gate */ 8480Sstevel@tonic-gate 8490Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 8500Sstevel@tonic-gate 8510Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 8520Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8530Sstevel@tonic-gate static char *out_of_range = 8540Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 8550Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8560Sstevel@tonic-gate 8570Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 8580Sstevel@tonic-gate if (rp == NULL) { 8590Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8600Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 8610Sstevel@tonic-gate ddi_get_name(rdip)); 8620Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8630Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 8640Sstevel@tonic-gate } 8650Sstevel@tonic-gate 8660Sstevel@tonic-gate /* 8670Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 8680Sstevel@tonic-gate */ 8690Sstevel@tonic-gate 8700Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 8710Sstevel@tonic-gate mp->map_obj.rp = rp; 8720Sstevel@tonic-gate } 8730Sstevel@tonic-gate 8740Sstevel@tonic-gate /* 8750Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 8760Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 8770Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 8780Sstevel@tonic-gate */ 8790Sstevel@tonic-gate 8800Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 8810Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 8820Sstevel@tonic-gate 8830Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8840Sstevel@tonic-gate cmn_err(CE_CONT, 8850Sstevel@tonic-gate "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d>" 8860Sstevel@tonic-gate " offset %d len %d handle 0x%x\n", 8870Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip), 8880Sstevel@tonic-gate rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 8890Sstevel@tonic-gate offset, len, mp->map_handlep); 8900Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8910Sstevel@tonic-gate 8920Sstevel@tonic-gate /* 8930Sstevel@tonic-gate * I/O or memory mapping: 8940Sstevel@tonic-gate * 8950Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 8960Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 8970Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 8980Sstevel@tonic-gate */ 8990Sstevel@tonic-gate 9000Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 9010Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 9020Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 9030Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 9040Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 9050Sstevel@tonic-gate return (DDI_ME_INVAL); 9060Sstevel@tonic-gate } 9070Sstevel@tonic-gate 9080Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 9090Sstevel@tonic-gate /* 9100Sstevel@tonic-gate * compatibility i/o mapping 9110Sstevel@tonic-gate */ 9120Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 9130Sstevel@tonic-gate } else { 9140Sstevel@tonic-gate /* 9150Sstevel@tonic-gate * Normal memory or i/o mapping 9160Sstevel@tonic-gate */ 9170Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 9180Sstevel@tonic-gate } 9190Sstevel@tonic-gate 9200Sstevel@tonic-gate if (len != 0) 9210Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 9220Sstevel@tonic-gate 9230Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9240Sstevel@tonic-gate cmn_err(CE_CONT, 9250Sstevel@tonic-gate " <%s,%s> <0x%x, 0x%x, 0x%d>" 9260Sstevel@tonic-gate " offset %d len %d handle 0x%x\n", 9270Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip), 9280Sstevel@tonic-gate rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 9290Sstevel@tonic-gate offset, len, mp->map_handlep); 9300Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9310Sstevel@tonic-gate 9320Sstevel@tonic-gate /* 9330Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 9340Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 9350Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 9360Sstevel@tonic-gate * provided via ddi_apply_range.) 9370Sstevel@tonic-gate */ 9380Sstevel@tonic-gate 9390Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9400Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 9410Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 9420Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9430Sstevel@tonic-gate 9440Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 9450Sstevel@tonic-gate return (error); 9460Sstevel@tonic-gate 9470Sstevel@tonic-gate switch (mp->map_op) { 9480Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 9490Sstevel@tonic-gate 9500Sstevel@tonic-gate /* 9510Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 9520Sstevel@tonic-gate */ 9530Sstevel@tonic-gate 9540Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 9550Sstevel@tonic-gate 9560Sstevel@tonic-gate case DDI_MO_UNMAP: 9570Sstevel@tonic-gate 9580Sstevel@tonic-gate /* 9590Sstevel@tonic-gate * Release mapping... 9600Sstevel@tonic-gate */ 9610Sstevel@tonic-gate 9620Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 9630Sstevel@tonic-gate 9640Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 9650Sstevel@tonic-gate 9660Sstevel@tonic-gate return (rootnex_map_handle(mp)); 9670Sstevel@tonic-gate 9680Sstevel@tonic-gate default: 9690Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 9700Sstevel@tonic-gate } 9710Sstevel@tonic-gate } 9720Sstevel@tonic-gate 9730Sstevel@tonic-gate 9740Sstevel@tonic-gate /* 975509Smrj * rootnex_map_fault() 9760Sstevel@tonic-gate * 9770Sstevel@tonic-gate * fault in mappings for requestors 9780Sstevel@tonic-gate */ 9790Sstevel@tonic-gate /*ARGSUSED*/ 9800Sstevel@tonic-gate static int 981509Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 982509Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 983509Smrj uint_t lock) 9840Sstevel@tonic-gate { 9850Sstevel@tonic-gate 9860Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9870Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 9880Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 9890Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 9900Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 9910Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9920Sstevel@tonic-gate 9930Sstevel@tonic-gate /* 9940Sstevel@tonic-gate * This is all terribly broken, but it is a start 9950Sstevel@tonic-gate * 9960Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 9970Sstevel@tonic-gate * must be exported from seg_dev.c. 9980Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 9990Sstevel@tonic-gate */ 10000Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 10010Sstevel@tonic-gate struct segdev_data *sdp = 10020Sstevel@tonic-gate (struct segdev_data *)seg->s_data; 10030Sstevel@tonic-gate 10040Sstevel@tonic-gate if (hat == NULL) { 10050Sstevel@tonic-gate /* 10060Sstevel@tonic-gate * This is one plausible interpretation of 10070Sstevel@tonic-gate * a null hat i.e. use the first hat on the 10080Sstevel@tonic-gate * address space hat list which by convention is 10090Sstevel@tonic-gate * the hat of the system MMU. At alternative 10100Sstevel@tonic-gate * would be to panic .. this might well be better .. 10110Sstevel@tonic-gate */ 10120Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 10130Sstevel@tonic-gate hat = seg->s_as->a_hat; 10140Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 10150Sstevel@tonic-gate } 10160Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 10170Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 10180Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 10190Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 10200Sstevel@tonic-gate HAT_LOAD_LOCK); 10210Sstevel@tonic-gate } else 10220Sstevel@tonic-gate return (DDI_FAILURE); 10230Sstevel@tonic-gate return (DDI_SUCCESS); 10240Sstevel@tonic-gate } 10250Sstevel@tonic-gate 10260Sstevel@tonic-gate 10270Sstevel@tonic-gate /* 1028509Smrj * rootnex_map_regspec() 1029509Smrj * we don't support mapping of I/O cards above 4Gb 10300Sstevel@tonic-gate */ 1031509Smrj static int 1032509Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1033509Smrj { 1034509Smrj ulong_t base; 1035509Smrj void *cvaddr; 1036509Smrj uint_t npages, pgoffset; 1037509Smrj struct regspec *rp; 1038509Smrj ddi_acc_hdl_t *hp; 1039509Smrj ddi_acc_impl_t *ap; 1040509Smrj uint_t hat_acc_flags; 1041509Smrj 1042509Smrj rp = mp->map_obj.rp; 1043509Smrj hp = mp->map_handlep; 1044509Smrj 1045509Smrj #ifdef DDI_MAP_DEBUG 1046509Smrj ddi_map_debug( 1047509Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1048509Smrj rp->regspec_bustype, rp->regspec_addr, 1049509Smrj rp->regspec_size, mp->map_handlep); 1050509Smrj #endif /* DDI_MAP_DEBUG */ 1051509Smrj 1052509Smrj /* 1053509Smrj * I/O or memory mapping 1054509Smrj * 1055509Smrj * <bustype=0, addr=x, len=x>: memory 1056509Smrj * <bustype=1, addr=x, len=x>: i/o 1057509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1058509Smrj */ 1059509Smrj 1060509Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1061509Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 1062509Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 1063509Smrj rp->regspec_addr, rp->regspec_size); 1064509Smrj return (DDI_FAILURE); 1065509Smrj } 1066509Smrj 1067509Smrj if (rp->regspec_bustype != 0) { 1068509Smrj /* 1069509Smrj * I/O space - needs a handle. 1070509Smrj */ 1071509Smrj if (hp == NULL) { 1072509Smrj return (DDI_FAILURE); 1073509Smrj } 1074509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1075509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1076509Smrj impl_acc_hdl_init(hp); 1077509Smrj 1078509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1079509Smrj #ifdef DDI_MAP_DEBUG 1080509Smrj ddi_map_debug("rootnex_map_regspec: mmap() \ 1081509Smrj to I/O space is not supported.\n"); 1082509Smrj #endif /* DDI_MAP_DEBUG */ 1083509Smrj return (DDI_ME_INVAL); 1084509Smrj } else { 1085509Smrj /* 1086509Smrj * 1275-compliant vs. compatibility i/o mapping 1087509Smrj */ 1088509Smrj *vaddrp = 1089509Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 1090509Smrj ((caddr_t)(uintptr_t)rp->regspec_bustype) : 1091509Smrj ((caddr_t)(uintptr_t)rp->regspec_addr); 1092509Smrj } 1093509Smrj 1094509Smrj #ifdef DDI_MAP_DEBUG 1095509Smrj ddi_map_debug( 1096509Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1097509Smrj rp->regspec_size, *vaddrp); 1098509Smrj #endif /* DDI_MAP_DEBUG */ 1099509Smrj return (DDI_SUCCESS); 1100509Smrj } 1101509Smrj 1102509Smrj /* 1103509Smrj * Memory space 1104509Smrj */ 1105509Smrj 1106509Smrj if (hp != NULL) { 1107509Smrj /* 1108509Smrj * hat layer ignores 1109509Smrj * hp->ah_acc.devacc_attr_endian_flags. 1110509Smrj */ 1111509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1112509Smrj case DDI_STRICTORDER_ACC: 1113509Smrj hat_acc_flags = HAT_STRICTORDER; 1114509Smrj break; 1115509Smrj case DDI_UNORDERED_OK_ACC: 1116509Smrj hat_acc_flags = HAT_UNORDERED_OK; 1117509Smrj break; 1118509Smrj case DDI_MERGING_OK_ACC: 1119509Smrj hat_acc_flags = HAT_MERGING_OK; 1120509Smrj break; 1121509Smrj case DDI_LOADCACHING_OK_ACC: 1122509Smrj hat_acc_flags = HAT_LOADCACHING_OK; 1123509Smrj break; 1124509Smrj case DDI_STORECACHING_OK_ACC: 1125509Smrj hat_acc_flags = HAT_STORECACHING_OK; 1126509Smrj break; 1127509Smrj } 1128509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1129509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1130509Smrj impl_acc_hdl_init(hp); 1131509Smrj hp->ah_hat_flags = hat_acc_flags; 1132509Smrj } else { 1133509Smrj hat_acc_flags = HAT_STRICTORDER; 1134509Smrj } 1135509Smrj 1136509Smrj base = (ulong_t)rp->regspec_addr & (~MMU_PAGEOFFSET); /* base addr */ 1137509Smrj pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; /* offset */ 1138509Smrj 1139509Smrj if (rp->regspec_size == 0) { 1140509Smrj #ifdef DDI_MAP_DEBUG 1141509Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1142509Smrj #endif /* DDI_MAP_DEBUG */ 1143509Smrj return (DDI_ME_INVAL); 1144509Smrj } 1145509Smrj 1146509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1147509Smrj *vaddrp = (caddr_t)mmu_btop(base); 1148509Smrj } else { 1149509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1150509Smrj 1151509Smrj #ifdef DDI_MAP_DEBUG 1152509Smrj ddi_map_debug("rootnex_map_regspec: Mapping %d pages \ 1153509Smrj physical %x ", 1154509Smrj npages, base); 1155509Smrj #endif /* DDI_MAP_DEBUG */ 1156509Smrj 1157509Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1158509Smrj if (cvaddr == NULL) 1159509Smrj return (DDI_ME_NORESOURCES); 1160509Smrj 1161509Smrj /* 1162509Smrj * Now map in the pages we've allocated... 1163509Smrj */ 1164509Smrj hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), mmu_btop(base), 1165509Smrj mp->map_prot | hat_acc_flags, HAT_LOAD_LOCK); 1166509Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 1167509Smrj } 1168509Smrj 1169509Smrj #ifdef DDI_MAP_DEBUG 1170509Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1171509Smrj #endif /* DDI_MAP_DEBUG */ 1172509Smrj return (DDI_SUCCESS); 1173509Smrj } 1174509Smrj 11750Sstevel@tonic-gate 11760Sstevel@tonic-gate /* 1177509Smrj * rootnex_unmap_regspec() 1178509Smrj * 1179509Smrj */ 1180509Smrj static int 1181509Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1182509Smrj { 1183509Smrj caddr_t addr = (caddr_t)*vaddrp; 1184509Smrj uint_t npages, pgoffset; 1185509Smrj struct regspec *rp; 1186509Smrj 1187509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1188509Smrj return (0); 1189509Smrj 1190509Smrj rp = mp->map_obj.rp; 1191509Smrj 1192509Smrj if (rp->regspec_size == 0) { 1193509Smrj #ifdef DDI_MAP_DEBUG 1194509Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1195509Smrj #endif /* DDI_MAP_DEBUG */ 1196509Smrj return (DDI_ME_INVAL); 1197509Smrj } 1198509Smrj 1199509Smrj /* 1200509Smrj * I/O or memory mapping: 1201509Smrj * 1202509Smrj * <bustype=0, addr=x, len=x>: memory 1203509Smrj * <bustype=1, addr=x, len=x>: i/o 1204509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1205509Smrj */ 1206509Smrj if (rp->regspec_bustype != 0) { 1207509Smrj /* 1208509Smrj * This is I/O space, which requires no particular 1209509Smrj * processing on unmap since it isn't mapped in the 1210509Smrj * first place. 1211509Smrj */ 1212509Smrj return (DDI_SUCCESS); 1213509Smrj } 1214509Smrj 1215509Smrj /* 1216509Smrj * Memory space 1217509Smrj */ 1218509Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1219509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1220509Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1221509Smrj device_arena_free(addr - pgoffset, ptob(npages)); 1222509Smrj 1223509Smrj /* 1224509Smrj * Destroy the pointer - the mapping has logically gone 1225509Smrj */ 1226509Smrj *vaddrp = NULL; 1227509Smrj 1228509Smrj return (DDI_SUCCESS); 1229509Smrj } 1230509Smrj 1231509Smrj 1232509Smrj /* 1233509Smrj * rootnex_map_handle() 1234509Smrj * 12350Sstevel@tonic-gate */ 1236509Smrj static int 1237509Smrj rootnex_map_handle(ddi_map_req_t *mp) 1238509Smrj { 1239509Smrj ddi_acc_hdl_t *hp; 1240509Smrj ulong_t base; 1241509Smrj uint_t pgoffset; 1242509Smrj struct regspec *rp; 1243509Smrj 1244509Smrj rp = mp->map_obj.rp; 1245509Smrj 1246509Smrj #ifdef DDI_MAP_DEBUG 1247509Smrj ddi_map_debug( 1248509Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1249509Smrj rp->regspec_bustype, rp->regspec_addr, 1250509Smrj rp->regspec_size, mp->map_handlep); 1251509Smrj #endif /* DDI_MAP_DEBUG */ 1252509Smrj 1253509Smrj /* 1254509Smrj * I/O or memory mapping: 1255509Smrj * 1256509Smrj * <bustype=0, addr=x, len=x>: memory 1257509Smrj * <bustype=1, addr=x, len=x>: i/o 1258509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1259509Smrj */ 1260509Smrj if (rp->regspec_bustype != 0) { 1261509Smrj /* 1262509Smrj * This refers to I/O space, and we don't support "mapping" 1263509Smrj * I/O space to a user. 1264509Smrj */ 1265509Smrj return (DDI_FAILURE); 1266509Smrj } 1267509Smrj 1268509Smrj /* 1269509Smrj * Set up the hat_flags for the mapping. 1270509Smrj */ 1271509Smrj hp = mp->map_handlep; 1272509Smrj 1273509Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 1274509Smrj case DDI_NEVERSWAP_ACC: 1275509Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1276509Smrj break; 1277509Smrj case DDI_STRUCTURE_LE_ACC: 1278509Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 1279509Smrj break; 1280509Smrj case DDI_STRUCTURE_BE_ACC: 1281509Smrj return (DDI_FAILURE); 1282509Smrj default: 1283509Smrj return (DDI_REGS_ACC_CONFLICT); 1284509Smrj } 1285509Smrj 1286509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1287509Smrj case DDI_STRICTORDER_ACC: 1288509Smrj break; 1289509Smrj case DDI_UNORDERED_OK_ACC: 1290509Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 1291509Smrj break; 1292509Smrj case DDI_MERGING_OK_ACC: 1293509Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 1294509Smrj break; 1295509Smrj case DDI_LOADCACHING_OK_ACC: 1296509Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1297509Smrj break; 1298509Smrj case DDI_STORECACHING_OK_ACC: 1299509Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 1300509Smrj break; 1301509Smrj default: 1302509Smrj return (DDI_FAILURE); 1303509Smrj } 1304509Smrj 1305509Smrj base = (ulong_t)rp->regspec_addr & (~MMU_PAGEOFFSET); /* base addr */ 1306509Smrj pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; /* offset */ 1307509Smrj 1308509Smrj if (rp->regspec_size == 0) 1309509Smrj return (DDI_ME_INVAL); 1310509Smrj 1311509Smrj hp->ah_pfn = mmu_btop(base); 1312509Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1313509Smrj 1314509Smrj return (DDI_SUCCESS); 1315509Smrj } 13160Sstevel@tonic-gate 13170Sstevel@tonic-gate 13180Sstevel@tonic-gate 13190Sstevel@tonic-gate /* 1320509Smrj * ************************ 1321509Smrj * interrupt related code 1322509Smrj * ************************ 13230Sstevel@tonic-gate */ 13240Sstevel@tonic-gate 13250Sstevel@tonic-gate /* 1326509Smrj * rootnex_intr_ops() 13270Sstevel@tonic-gate * bus_intr_op() function for interrupt support 13280Sstevel@tonic-gate */ 13290Sstevel@tonic-gate /* ARGSUSED */ 13300Sstevel@tonic-gate static int 13310Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 13320Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 13330Sstevel@tonic-gate { 13340Sstevel@tonic-gate struct intrspec *ispec; 13350Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 13360Sstevel@tonic-gate 13370Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 13380Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 13390Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 13400Sstevel@tonic-gate 13410Sstevel@tonic-gate /* Process the interrupt operation */ 13420Sstevel@tonic-gate switch (intr_op) { 13430Sstevel@tonic-gate case DDI_INTROP_GETCAP: 13440Sstevel@tonic-gate /* First check with pcplusmp */ 13450Sstevel@tonic-gate if (psm_intr_ops == NULL) 13460Sstevel@tonic-gate return (DDI_FAILURE); 13470Sstevel@tonic-gate 13480Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13490Sstevel@tonic-gate *(int *)result = 0; 13500Sstevel@tonic-gate return (DDI_FAILURE); 13510Sstevel@tonic-gate } 13520Sstevel@tonic-gate break; 13530Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13540Sstevel@tonic-gate if (psm_intr_ops == NULL) 13550Sstevel@tonic-gate return (DDI_FAILURE); 13560Sstevel@tonic-gate 13570Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13580Sstevel@tonic-gate return (DDI_FAILURE); 13590Sstevel@tonic-gate break; 13600Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13610Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13620Sstevel@tonic-gate return (DDI_FAILURE); 13630Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13640Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 13650Sstevel@tonic-gate break; 13660Sstevel@tonic-gate case DDI_INTROP_FREE: 13670Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 13680Sstevel@tonic-gate /* 13690Sstevel@tonic-gate * Special case for 'pcic' driver' only. 13700Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 13710Sstevel@tonic-gate * See detailed comments on this in the function 13720Sstevel@tonic-gate * rootnex_get_ispec(). 13730Sstevel@tonic-gate */ 13740Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 13750Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 13760Sstevel@tonic-gate pdp->par_nintr); 13770Sstevel@tonic-gate /* 13780Sstevel@tonic-gate * Set it to zero; so that 13790Sstevel@tonic-gate * DDI framework doesn't free it again 13800Sstevel@tonic-gate */ 13810Sstevel@tonic-gate pdp->par_intr = NULL; 13820Sstevel@tonic-gate pdp->par_nintr = 0; 13830Sstevel@tonic-gate } 13840Sstevel@tonic-gate break; 13850Sstevel@tonic-gate case DDI_INTROP_GETPRI: 13860Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13870Sstevel@tonic-gate return (DDI_FAILURE); 13880Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 13890Sstevel@tonic-gate break; 13900Sstevel@tonic-gate case DDI_INTROP_SETPRI: 13910Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 13920Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 13930Sstevel@tonic-gate return (DDI_FAILURE); 13940Sstevel@tonic-gate 13950Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 13960Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 13970Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 13980Sstevel@tonic-gate return (DDI_FAILURE); 13990Sstevel@tonic-gate 14000Sstevel@tonic-gate /* Change the priority */ 14010Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 14020Sstevel@tonic-gate PSM_FAILURE) 14030Sstevel@tonic-gate return (DDI_FAILURE); 14040Sstevel@tonic-gate 14050Sstevel@tonic-gate /* update the ispec with the new priority */ 14060Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 14070Sstevel@tonic-gate break; 14080Sstevel@tonic-gate case DDI_INTROP_ADDISR: 14090Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14100Sstevel@tonic-gate return (DDI_FAILURE); 14110Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 14120Sstevel@tonic-gate break; 14130Sstevel@tonic-gate case DDI_INTROP_REMISR: 14140Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14150Sstevel@tonic-gate return (DDI_FAILURE); 14160Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 14170Sstevel@tonic-gate break; 14180Sstevel@tonic-gate case DDI_INTROP_ENABLE: 14190Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14200Sstevel@tonic-gate return (DDI_FAILURE); 14210Sstevel@tonic-gate 14220Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 14230Sstevel@tonic-gate if (psm_intr_ops == NULL) 14240Sstevel@tonic-gate return (DDI_FAILURE); 14250Sstevel@tonic-gate 14260Sstevel@tonic-gate hdlp->ih_private = (void *)ispec; 14270Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 14280Sstevel@tonic-gate (int *)&hdlp->ih_vector); 14290Sstevel@tonic-gate 14300Sstevel@tonic-gate /* Add the interrupt handler */ 14310Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 14320Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 14330Sstevel@tonic-gate hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, rdip)) 14340Sstevel@tonic-gate return (DDI_FAILURE); 14350Sstevel@tonic-gate break; 14360Sstevel@tonic-gate case DDI_INTROP_DISABLE: 14370Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14380Sstevel@tonic-gate return (DDI_FAILURE); 14390Sstevel@tonic-gate 14400Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 14410Sstevel@tonic-gate if (psm_intr_ops == NULL) 14420Sstevel@tonic-gate return (DDI_FAILURE); 14430Sstevel@tonic-gate 14440Sstevel@tonic-gate hdlp->ih_private = (void *)ispec; 14450Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14460Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14470Sstevel@tonic-gate 14480Sstevel@tonic-gate /* Remove the interrupt handler */ 14490Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14500Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14510Sstevel@tonic-gate break; 14520Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14530Sstevel@tonic-gate if (psm_intr_ops == NULL) 14540Sstevel@tonic-gate return (DDI_FAILURE); 14550Sstevel@tonic-gate 14560Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14570Sstevel@tonic-gate return (DDI_FAILURE); 14580Sstevel@tonic-gate break; 14590Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14600Sstevel@tonic-gate if (psm_intr_ops == NULL) 14610Sstevel@tonic-gate return (DDI_FAILURE); 14620Sstevel@tonic-gate 14630Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14640Sstevel@tonic-gate return (DDI_FAILURE); 14650Sstevel@tonic-gate break; 14660Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 14670Sstevel@tonic-gate if (psm_intr_ops == NULL) 14680Sstevel@tonic-gate return (DDI_FAILURE); 14690Sstevel@tonic-gate 14700Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 14710Sstevel@tonic-gate result)) { 14720Sstevel@tonic-gate *(int *)result = 0; 14730Sstevel@tonic-gate return (DDI_FAILURE); 14740Sstevel@tonic-gate } 14750Sstevel@tonic-gate break; 14760Sstevel@tonic-gate case DDI_INTROP_NINTRS: 14770Sstevel@tonic-gate if ((pdp = ddi_get_parent_data(rdip)) == NULL) 14780Sstevel@tonic-gate return (DDI_FAILURE); 14790Sstevel@tonic-gate *(int *)result = pdp->par_nintr; 14800Sstevel@tonic-gate if (pdp->par_nintr == 0) { 14810Sstevel@tonic-gate /* 14820Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 14830Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 14840Sstevel@tonic-gate * 14850Sstevel@tonic-gate * See detailed comments on this in the function 14860Sstevel@tonic-gate * rootnex_get_ispec(). 14870Sstevel@tonic-gate * 14880Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 14890Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 14900Sstevel@tonic-gate * field may not initialized. So, we fake it here 14910Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 14920Sstevel@tonic-gate */ 14930Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 14940Sstevel@tonic-gate *(int *)result = 1; 14950Sstevel@tonic-gate } 14960Sstevel@tonic-gate break; 14970Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 14980Sstevel@tonic-gate *(int *)result = 0; 14990Sstevel@tonic-gate *(int *)result |= DDI_INTR_TYPE_FIXED; /* Always ... */ 15000Sstevel@tonic-gate break; 15010Sstevel@tonic-gate case DDI_INTROP_NAVAIL: 15020Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 15030Sstevel@tonic-gate return (DDI_FAILURE); 15040Sstevel@tonic-gate 15050Sstevel@tonic-gate if (psm_intr_ops == NULL) { 15060Sstevel@tonic-gate *(int *)result = 1; 15070Sstevel@tonic-gate break; 15080Sstevel@tonic-gate } 15090Sstevel@tonic-gate 15100Sstevel@tonic-gate /* Priority in the handle not initialized yet */ 15110Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 15120Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 15130Sstevel@tonic-gate PSM_INTR_OP_NAVAIL_VECTORS, result); 15140Sstevel@tonic-gate break; 15150Sstevel@tonic-gate default: 15160Sstevel@tonic-gate return (DDI_FAILURE); 15170Sstevel@tonic-gate } 15180Sstevel@tonic-gate 15190Sstevel@tonic-gate return (DDI_SUCCESS); 15200Sstevel@tonic-gate } 15210Sstevel@tonic-gate 15220Sstevel@tonic-gate 15230Sstevel@tonic-gate /* 1524509Smrj * rootnex_get_ispec() 1525509Smrj * convert an interrupt number to an interrupt specification. 1526509Smrj * The interrupt number determines which interrupt spec will be 1527509Smrj * returned if more than one exists. 1528509Smrj * 1529509Smrj * Look into the parent private data area of the 'rdip' to find out 1530509Smrj * the interrupt specification. First check to make sure there is 1531509Smrj * one that matchs "inumber" and then return a pointer to it. 1532509Smrj * 1533509Smrj * Return NULL if one could not be found. 1534509Smrj * 1535509Smrj * NOTE: This is needed for rootnex_intr_ops() 1536509Smrj */ 1537509Smrj static struct intrspec * 1538509Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 1539509Smrj { 1540509Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1541509Smrj 1542509Smrj /* 1543509Smrj * Special case handling for drivers that provide their own 1544509Smrj * intrspec structures instead of relying on the DDI framework. 1545509Smrj * 1546509Smrj * A broken hardware driver in ON could potentially provide its 1547509Smrj * own intrspec structure, instead of relying on the hardware. 1548509Smrj * If these drivers are children of 'rootnex' then we need to 1549509Smrj * continue to provide backward compatibility to them here. 1550509Smrj * 1551509Smrj * Following check is a special case for 'pcic' driver which 1552509Smrj * was found to have broken hardwre andby provides its own intrspec. 1553509Smrj * 1554509Smrj * Verbatim comments from this driver are shown here: 1555509Smrj * "Don't use the ddi_add_intr since we don't have a 1556509Smrj * default intrspec in all cases." 1557509Smrj * 1558509Smrj * Since an 'ispec' may not be always created for it, 1559509Smrj * check for that and create one if so. 1560509Smrj * 1561509Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 1562509Smrj */ 1563509Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1564509Smrj pdp->par_nintr = 1; 1565509Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1566509Smrj pdp->par_nintr, KM_SLEEP); 1567509Smrj } 1568509Smrj 1569509Smrj /* Validate the interrupt number */ 1570509Smrj if (inum >= pdp->par_nintr) 1571509Smrj return (NULL); 1572509Smrj 1573509Smrj /* Get the interrupt structure pointer and return that */ 1574509Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 1575509Smrj } 1576509Smrj 1577509Smrj 1578509Smrj /* 1579509Smrj * ****************** 1580509Smrj * dma related code 1581509Smrj * ****************** 1582509Smrj */ 1583509Smrj 1584509Smrj /* 1585509Smrj * rootnex_dma_allochdl() 1586509Smrj * called from ddi_dma_alloc_handle(). 15870Sstevel@tonic-gate */ 1588509Smrj /*ARGSUSED*/ 1589509Smrj static int 1590509Smrj rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1591509Smrj int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1592509Smrj { 1593509Smrj uint64_t maxsegmentsize_ll; 1594509Smrj uint_t maxsegmentsize; 1595509Smrj ddi_dma_impl_t *hp; 1596509Smrj rootnex_dma_t *dma; 1597509Smrj uint64_t count_max; 1598509Smrj uint64_t seg; 1599509Smrj int kmflag; 1600509Smrj int e; 1601509Smrj 1602509Smrj 1603509Smrj /* convert our sleep flags */ 1604509Smrj if (waitfp == DDI_DMA_SLEEP) { 1605509Smrj kmflag = KM_SLEEP; 1606509Smrj } else { 1607509Smrj kmflag = KM_NOSLEEP; 1608509Smrj } 1609509Smrj 1610509Smrj /* 1611509Smrj * We try to do only one memory allocation here. We'll do a little 1612509Smrj * pointer manipulation later. If the bind ends up taking more than 1613509Smrj * our prealloc's space, we'll have to allocate more memory in the 1614509Smrj * bind operation. Not great, but much better than before and the 1615509Smrj * best we can do with the current bind interfaces. 1616509Smrj */ 1617509Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1618509Smrj if (hp == NULL) { 1619509Smrj if (waitfp != DDI_DMA_DONTWAIT) { 1620509Smrj ddi_set_callback(waitfp, arg, 1621509Smrj &rootnex_state->r_dvma_call_list_id); 1622509Smrj } 1623509Smrj return (DDI_DMA_NORESOURCES); 1624509Smrj } 1625509Smrj 1626509Smrj /* Do our pointer manipulation now, align the structures */ 1627509Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 1628509Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1629509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1630509Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1631509Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1632509Smrj 1633509Smrj /* setup the handle */ 1634509Smrj rootnex_clean_dmahdl(hp); 1635509Smrj dma->dp_dip = rdip; 1636509Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1637509Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1638509Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 1639509Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1640509Smrj hp->dmai_rdip = rdip; 1641509Smrj hp->dmai_attr = *attr; 1642509Smrj 1643509Smrj /* we don't need to worry about the SPL since we do a tryenter */ 1644509Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1645509Smrj 1646509Smrj /* 1647509Smrj * Figure out our maximum segment size. If the segment size is greater 1648509Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 1649509Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1650509Smrj * dma_attr_count_max are size-1 type values. 1651509Smrj * 1652509Smrj * Maximum segment size is the largest physically contiguous chunk of 1653509Smrj * memory that we can return from a bind (i.e. the maximum size of a 1654509Smrj * single cookie). 1655509Smrj */ 1656509Smrj 1657509Smrj /* handle the rollover cases */ 1658509Smrj seg = attr->dma_attr_seg + 1; 1659509Smrj if (seg < attr->dma_attr_seg) { 1660509Smrj seg = attr->dma_attr_seg; 1661509Smrj } 1662509Smrj count_max = attr->dma_attr_count_max + 1; 1663509Smrj if (count_max < attr->dma_attr_count_max) { 1664509Smrj count_max = attr->dma_attr_count_max; 1665509Smrj } 1666509Smrj 1667509Smrj /* 1668509Smrj * granularity may or may not be a power of two. If it isn't, we can't 1669509Smrj * use a simple mask. 1670509Smrj */ 1671509Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1672509Smrj dma->dp_granularity_power_2 = B_FALSE; 1673509Smrj } else { 1674509Smrj dma->dp_granularity_power_2 = B_TRUE; 1675509Smrj } 1676509Smrj 1677509Smrj /* 1678509Smrj * maxxfer should be a whole multiple of granularity. If we're going to 1679509Smrj * break up a window because we're greater than maxxfer, we might as 1680509Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 1681509Smrj * worry about triming the window later on for this case. 1682509Smrj */ 1683509Smrj if (attr->dma_attr_granular > 1) { 1684509Smrj if (dma->dp_granularity_power_2) { 1685509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1686509Smrj (attr->dma_attr_maxxfer & 1687509Smrj (attr->dma_attr_granular - 1)); 1688509Smrj } else { 1689509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1690509Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1691509Smrj } 1692509Smrj } else { 1693509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 1694509Smrj } 1695509Smrj 1696509Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1697509Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1698509Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1699509Smrj maxsegmentsize = 0xFFFFFFFF; 1700509Smrj } else { 1701509Smrj maxsegmentsize = maxsegmentsize_ll; 1702509Smrj } 1703509Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1704509Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1705509Smrj 1706509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1707509Smrj if (rootnex_alloc_check_parms) { 1708509Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1709509Smrj if (e != DDI_SUCCESS) { 1710509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1711509Smrj (void) rootnex_dma_freehdl(dip, rdip, 1712509Smrj (ddi_dma_handle_t)hp); 1713509Smrj return (e); 1714509Smrj } 1715509Smrj } 1716509Smrj 1717509Smrj *handlep = (ddi_dma_handle_t)hp; 1718509Smrj 1719509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1720509Smrj DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1721509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1722509Smrj 1723509Smrj return (DDI_SUCCESS); 1724509Smrj } 1725509Smrj 1726509Smrj 1727509Smrj /* 1728509Smrj * rootnex_dma_freehdl() 1729509Smrj * called from ddi_dma_free_handle(). 1730509Smrj */ 1731509Smrj /*ARGSUSED*/ 1732509Smrj static int 1733509Smrj rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1734509Smrj { 1735509Smrj ddi_dma_impl_t *hp; 1736509Smrj rootnex_dma_t *dma; 1737509Smrj 1738509Smrj 1739509Smrj hp = (ddi_dma_impl_t *)handle; 1740509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1741509Smrj 1742509Smrj /* unbind should have been called first */ 1743509Smrj ASSERT(!dma->dp_inuse); 1744509Smrj 1745509Smrj mutex_destroy(&dma->dp_mutex); 1746509Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1747509Smrj 1748509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1749509Smrj DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1750509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1751509Smrj 1752509Smrj if (rootnex_state->r_dvma_call_list_id) 1753509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1754509Smrj 1755509Smrj return (DDI_SUCCESS); 1756509Smrj } 1757509Smrj 1758509Smrj 1759509Smrj /* 1760509Smrj * rootnex_dma_bindhdl() 1761509Smrj * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 1762509Smrj */ 1763509Smrj /*ARGSUSED*/ 1764509Smrj static int 1765509Smrj rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 1766509Smrj struct ddi_dma_req *dmareq, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 17670Sstevel@tonic-gate { 1768509Smrj rootnex_sglinfo_t *sinfo; 1769509Smrj ddi_dma_attr_t *attr; 1770509Smrj ddi_dma_impl_t *hp; 1771509Smrj rootnex_dma_t *dma; 1772509Smrj int kmflag; 1773509Smrj int e; 1774509Smrj 1775509Smrj 1776509Smrj hp = (ddi_dma_impl_t *)handle; 1777509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1778509Smrj sinfo = &dma->dp_sglinfo; 1779509Smrj attr = &hp->dmai_attr; 1780509Smrj 1781509Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1782509Smrj 1783509Smrj /* 1784509Smrj * This is useful for debugging a driver. Not as useful in a production 1785509Smrj * system. The only time this will fail is if you have a driver bug. 1786509Smrj */ 1787509Smrj if (rootnex_bind_check_inuse) { 1788509Smrj /* 1789509Smrj * No one else should ever have this lock unless someone else 1790509Smrj * is trying to use this handle. So contention on the lock 1791509Smrj * is the same as inuse being set. 1792509Smrj */ 1793509Smrj e = mutex_tryenter(&dma->dp_mutex); 1794509Smrj if (e == 0) { 1795509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1796509Smrj return (DDI_DMA_INUSE); 1797509Smrj } 1798509Smrj if (dma->dp_inuse) { 1799509Smrj mutex_exit(&dma->dp_mutex); 1800509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1801509Smrj return (DDI_DMA_INUSE); 1802509Smrj } 1803509Smrj dma->dp_inuse = B_TRUE; 1804509Smrj mutex_exit(&dma->dp_mutex); 1805509Smrj } 1806509Smrj 1807509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1808509Smrj if (rootnex_bind_check_parms) { 1809509Smrj e = rootnex_valid_bind_parms(dmareq, attr); 1810509Smrj if (e != DDI_SUCCESS) { 1811509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1812509Smrj rootnex_clean_dmahdl(hp); 1813509Smrj return (e); 1814509Smrj } 1815509Smrj } 1816509Smrj 1817509Smrj /* save away the original bind info */ 1818509Smrj dma->dp_dma = dmareq->dmar_object; 1819509Smrj 1820509Smrj /* 1821509Smrj * Figure out a rough estimate of what maximum number of pages this 1822509Smrj * buffer could use (a high estimate of course). 1823509Smrj */ 1824509Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1825509Smrj 1826509Smrj /* 1827509Smrj * We'll use the pre-allocated cookies for any bind that will *always* 1828509Smrj * fit (more important to be consistent, we don't want to create 1829509Smrj * additional degenerate cases). 1830509Smrj */ 1831509Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1832509Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1833509Smrj dma->dp_need_to_free_cookie = B_FALSE; 1834509Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1835509Smrj uint_t, sinfo->si_max_pages); 1836509Smrj 1837509Smrj /* 1838509Smrj * For anything larger than that, we'll go ahead and allocate the 1839509Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 1840509Smrj * seeing this path in the fast path for high performance devices very 1841509Smrj * frequently. 1842509Smrj * 1843509Smrj * a ddi bind interface that allowed the driver to provide storage to 1844509Smrj * the bind interface would speed this case up. 1845509Smrj */ 1846509Smrj } else { 1847509Smrj /* convert the sleep flags */ 1848509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1849509Smrj kmflag = KM_SLEEP; 1850509Smrj } else { 1851509Smrj kmflag = KM_NOSLEEP; 1852509Smrj } 1853509Smrj 1854509Smrj /* 1855509Smrj * Save away how much memory we allocated. If we're doing a 1856509Smrj * nosleep, the alloc could fail... 1857509Smrj */ 1858509Smrj dma->dp_cookie_size = sinfo->si_max_pages * 1859509Smrj sizeof (ddi_dma_cookie_t); 1860509Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1861509Smrj if (dma->dp_cookies == NULL) { 1862509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1863509Smrj rootnex_clean_dmahdl(hp); 1864509Smrj return (DDI_DMA_NORESOURCES); 1865509Smrj } 1866509Smrj dma->dp_need_to_free_cookie = B_TRUE; 1867509Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1868509Smrj sinfo->si_max_pages); 1869509Smrj } 1870509Smrj hp->dmai_cookie = dma->dp_cookies; 1871509Smrj 1872509Smrj /* 1873509Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1874509Smrj * looking at the contraints in the dma structure. It will then put some 1875509Smrj * additional state about the sgl in the dma struct (i.e. is the sgl 1876509Smrj * clean, or do we need to do some munging; how many pages need to be 1877509Smrj * copied, etc.) 1878509Smrj */ 1879509Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1880509Smrj &dma->dp_sglinfo); 1881509Smrj ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1882509Smrj 1883509Smrj /* if we don't need a copy buffer, we don't need to sync */ 1884509Smrj if (sinfo->si_copybuf_req == 0) { 1885509Smrj hp->dmai_rflags |= DMP_NOSYNC; 1886509Smrj } 1887509Smrj 1888509Smrj /* 1889509Smrj * if we don't need the copybuf and we don't need to do a partial, we 1890509Smrj * hit the fast path. All the high performance devices should be trying 1891509Smrj * to hit this path. To hit this path, a device should be able to reach 1892509Smrj * all of memory, shouldn't try to bind more than it can transfer, and 1893509Smrj * the buffer shouldn't require more cookies than the driver/device can 1894509Smrj * handle [sgllen]). 1895509Smrj */ 1896509Smrj if ((sinfo->si_copybuf_req == 0) && 1897509Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1898509Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1899509Smrj /* 1900509Smrj * copy out the first cookie and ccountp, set the cookie 1901509Smrj * pointer to the second cookie. The first cookie is passed 1902509Smrj * back on the stack. Additional cookies are accessed via 1903509Smrj * ddi_dma_nextcookie() 1904509Smrj */ 1905509Smrj *cookiep = dma->dp_cookies[0]; 1906509Smrj *ccountp = sinfo->si_sgl_size; 1907509Smrj hp->dmai_cookie++; 1908509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1909509Smrj hp->dmai_nwin = 1; 1910509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1911509Smrj DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 1912509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1913509Smrj dma->dp_dma.dmao_size); 1914509Smrj return (DDI_DMA_MAPPED); 1915509Smrj } 1916509Smrj 1917509Smrj /* 1918509Smrj * go to the slow path, we may need to alloc more memory, create 1919509Smrj * multiple windows, and munge up a sgl to make the device happy. 1920509Smrj */ 1921509Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 1922509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 1923509Smrj if (dma->dp_need_to_free_cookie) { 1924509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 1925509Smrj } 1926509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1927509Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 1928509Smrj return (e); 1929509Smrj } 1930509Smrj 1931509Smrj /* if the first window uses the copy buffer, sync it for the device */ 1932509Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 1933509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 1934509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1935509Smrj DDI_DMA_SYNC_FORDEV); 1936509Smrj } 1937509Smrj 1938509Smrj /* 1939509Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 1940509Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 1941509Smrj * If we have a partial map (i.e. multiple windows), the number of 1942509Smrj * cookies we return is the number of cookies in the first window. 1943509Smrj */ 1944509Smrj if (e == DDI_DMA_MAPPED) { 1945509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1946509Smrj *ccountp = sinfo->si_sgl_size; 1947509Smrj } else { 1948509Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 1949509Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 1950509Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 1951509Smrj } 1952509Smrj *cookiep = dma->dp_cookies[0]; 1953509Smrj hp->dmai_cookie++; 1954509Smrj 1955509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1956509Smrj DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 1957509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1958509Smrj dma->dp_dma.dmao_size); 1959509Smrj return (e); 1960509Smrj } 1961509Smrj 1962509Smrj 1963509Smrj /* 1964509Smrj * rootnex_dma_unbindhdl() 1965509Smrj * called from ddi_dma_unbind_handle() 1966509Smrj */ 1967509Smrj /*ARGSUSED*/ 1968509Smrj static int 1969509Smrj rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 1970509Smrj ddi_dma_handle_t handle) 1971509Smrj { 1972509Smrj ddi_dma_impl_t *hp; 1973509Smrj rootnex_dma_t *dma; 1974509Smrj int e; 1975509Smrj 1976509Smrj 1977509Smrj hp = (ddi_dma_impl_t *)handle; 1978509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1979509Smrj 1980509Smrj /* make sure the buffer wasn't free'd before calling unbind */ 1981509Smrj if (rootnex_unbind_verify_buffer) { 1982509Smrj e = rootnex_verify_buffer(dma); 1983509Smrj if (e != DDI_SUCCESS) { 1984509Smrj ASSERT(0); 1985509Smrj return (DDI_FAILURE); 1986509Smrj } 1987509Smrj } 1988509Smrj 1989509Smrj /* sync the current window before unbinding the buffer */ 1990509Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 1991509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 1992509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1993509Smrj DDI_DMA_SYNC_FORCPU); 1994509Smrj } 1995509Smrj 1996509Smrj /* 1997509Smrj * cleanup and copy buffer or window state. if we didn't use the copy 1998509Smrj * buffer or windows, there won't be much to do :-) 1999509Smrj */ 2000509Smrj rootnex_teardown_copybuf(dma); 2001509Smrj rootnex_teardown_windows(dma); 2002509Smrj 2003509Smrj /* 2004509Smrj * If we had to allocate space to for the worse case sgl (it didn't 2005509Smrj * fit into our pre-allocate buffer), free that up now 2006509Smrj */ 2007509Smrj if (dma->dp_need_to_free_cookie) { 2008509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2009509Smrj } 2010509Smrj 2011509Smrj /* 2012509Smrj * clean up the handle so it's ready for the next bind (i.e. if the 2013509Smrj * handle is reused). 2014509Smrj */ 2015509Smrj rootnex_clean_dmahdl(hp); 2016509Smrj 2017509Smrj if (rootnex_state->r_dvma_call_list_id) 2018509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2019509Smrj 2020509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2021509Smrj DTRACE_PROBE1(rootnex__unbind, uint64_t, 2022509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2023509Smrj 2024509Smrj return (DDI_SUCCESS); 2025509Smrj } 2026509Smrj 2027509Smrj 2028509Smrj /* 2029509Smrj * rootnex_verify_buffer() 2030509Smrj * verify buffer wasn't free'd 2031509Smrj */ 2032509Smrj static int 2033509Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 2034509Smrj { 2035509Smrj peekpoke_ctlops_t peek; 2036509Smrj page_t **pplist; 2037509Smrj caddr_t vaddr; 2038509Smrj uint_t pcnt; 2039509Smrj uint_t poff; 2040509Smrj page_t *pp; 2041509Smrj uint8_t b; 2042509Smrj int i; 2043509Smrj int e; 2044509Smrj 2045509Smrj 2046509Smrj /* Figure out how many pages this buffer occupies */ 2047509Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2048509Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2049509Smrj } else { 2050509Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2051509Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2052509Smrj } 2053509Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2054509Smrj 2055509Smrj switch (dma->dp_dma.dmao_type) { 20560Sstevel@tonic-gate case DMA_OTYP_PAGES: 2057509Smrj /* 2058509Smrj * for a linked list of pp's walk through them to make sure 2059509Smrj * they're locked and not free. 2060509Smrj */ 2061509Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2062509Smrj for (i = 0; i < pcnt; i++) { 2063509Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2064509Smrj return (DDI_FAILURE); 20650Sstevel@tonic-gate } 2066509Smrj pp = pp->p_next; 20670Sstevel@tonic-gate } 20680Sstevel@tonic-gate break; 2069509Smrj 20700Sstevel@tonic-gate case DMA_OTYP_VADDR: 20710Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 2072509Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2073509Smrj /* 2074509Smrj * for an array of pp's walk through them to make sure they're 2075509Smrj * not free. It's possible that they may not be locked. 2076509Smrj */ 2077509Smrj if (pplist) { 2078509Smrj for (i = 0; i < pcnt; i++) { 2079509Smrj if (PP_ISFREE(pplist[i])) { 2080509Smrj return (DDI_FAILURE); 2081509Smrj } 2082509Smrj } 2083509Smrj 2084509Smrj /* For a virtual address, try to peek at each page */ 2085509Smrj } else { 2086509Smrj if (dma->dp_sglinfo.si_asp == &kas) { 2087509Smrj bzero(&peek, sizeof (peekpoke_ctlops_t)); 2088509Smrj peek.host_addr = (uintptr_t)&b; 2089509Smrj peek.size = sizeof (uint8_t); 2090509Smrj peek.dev_addr = (uintptr_t)vaddr; 2091509Smrj for (i = 0; i < pcnt; i++) { 2092509Smrj e = rootnex_ctlops_peek(&peek, &b); 2093509Smrj if (e != DDI_SUCCESS) { 2094509Smrj return (DDI_FAILURE); 2095509Smrj } 2096509Smrj peek.dev_addr += MMU_PAGESIZE; 2097509Smrj } 2098509Smrj } 2099509Smrj } 2100509Smrj break; 2101509Smrj 2102509Smrj default: 2103509Smrj ASSERT(0); 2104509Smrj break; 2105509Smrj } 2106509Smrj 2107509Smrj return (DDI_SUCCESS); 2108509Smrj } 2109509Smrj 2110509Smrj 2111509Smrj /* 2112509Smrj * rootnex_clean_dmahdl() 2113509Smrj * Clean the dma handle. This should be called on a handle alloc and an 2114509Smrj * unbind handle. Set the handle state to the default settings. 2115509Smrj */ 2116509Smrj static void 2117509Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2118509Smrj { 2119509Smrj rootnex_dma_t *dma; 2120509Smrj 2121509Smrj 2122509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2123509Smrj 2124509Smrj hp->dmai_nwin = 0; 2125509Smrj dma->dp_current_cookie = 0; 2126509Smrj dma->dp_copybuf_size = 0; 2127509Smrj dma->dp_window = NULL; 2128509Smrj dma->dp_cbaddr = NULL; 2129509Smrj dma->dp_inuse = B_FALSE; 2130509Smrj dma->dp_need_to_free_cookie = B_FALSE; 2131509Smrj dma->dp_need_to_free_window = B_FALSE; 2132509Smrj dma->dp_partial_required = B_FALSE; 2133509Smrj dma->dp_trim_required = B_FALSE; 2134509Smrj dma->dp_sglinfo.si_copybuf_req = 0; 2135509Smrj #if !defined(__amd64) 2136509Smrj dma->dp_cb_remaping = B_FALSE; 2137509Smrj dma->dp_kva = NULL; 2138509Smrj #endif 2139509Smrj 2140509Smrj /* FMA related initialization */ 2141509Smrj hp->dmai_fault = 0; 2142509Smrj hp->dmai_fault_check = NULL; 2143509Smrj hp->dmai_fault_notify = NULL; 2144509Smrj hp->dmai_error.err_ena = 0; 2145509Smrj hp->dmai_error.err_status = DDI_FM_OK; 2146509Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2147509Smrj hp->dmai_error.err_ontrap = NULL; 2148509Smrj hp->dmai_error.err_fep = NULL; 2149509Smrj } 2150509Smrj 2151509Smrj 2152509Smrj /* 2153509Smrj * rootnex_valid_alloc_parms() 2154509Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 2155509Smrj */ 2156509Smrj static int 2157509Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2158509Smrj { 2159509Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2160509Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2161509Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 2162509Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2163509Smrj return (DDI_DMA_BADATTR); 2164509Smrj } 2165509Smrj 2166509Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2167509Smrj return (DDI_DMA_BADATTR); 2168509Smrj } 2169509Smrj 2170509Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2171509Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2172509Smrj attr->dma_attr_sgllen <= 0) { 2173509Smrj return (DDI_DMA_BADATTR); 2174509Smrj } 2175509Smrj 2176509Smrj /* We should be able to DMA into every byte offset in a page */ 2177509Smrj if (maxsegmentsize < MMU_PAGESIZE) { 2178509Smrj return (DDI_DMA_BADATTR); 2179509Smrj } 2180509Smrj 2181509Smrj return (DDI_SUCCESS); 2182509Smrj } 2183509Smrj 2184509Smrj 2185509Smrj /* 2186509Smrj * rootnex_valid_bind_parms() 2187509Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 2188509Smrj */ 2189509Smrj /* ARGSUSED */ 2190509Smrj static int 2191509Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2192509Smrj { 2193509Smrj #if !defined(__amd64) 2194509Smrj /* 2195509Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 2196509Smrj * we can track the offset for the obsoleted interfaces. 2197509Smrj */ 2198509Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2199509Smrj return (DDI_DMA_TOOBIG); 2200509Smrj } 2201509Smrj #endif 2202509Smrj 2203509Smrj return (DDI_SUCCESS); 2204509Smrj } 2205509Smrj 2206509Smrj 2207509Smrj /* 2208509Smrj * rootnex_get_sgl() 2209509Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 2210509Smrj * with a call to the vm layer when vm2.0 comes around... 2211509Smrj */ 2212509Smrj static void 2213509Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2214509Smrj rootnex_sglinfo_t *sglinfo) 2215509Smrj { 2216509Smrj ddi_dma_atyp_t buftype; 2217509Smrj uint64_t last_page; 2218509Smrj uint64_t offset; 2219509Smrj uint64_t addrhi; 2220509Smrj uint64_t addrlo; 2221509Smrj uint64_t maxseg; 2222509Smrj page_t **pplist; 2223509Smrj uint64_t paddr; 2224509Smrj uint32_t psize; 2225509Smrj uint32_t size; 2226509Smrj caddr_t vaddr; 2227509Smrj uint_t pcnt; 2228509Smrj page_t *pp; 2229509Smrj uint_t cnt; 2230509Smrj 2231509Smrj 2232509Smrj /* shortcuts */ 2233509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2234509Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2235509Smrj maxseg = sglinfo->si_max_cookie_size; 2236509Smrj buftype = dmar_object->dmao_type; 2237509Smrj addrhi = sglinfo->si_max_addr; 2238509Smrj addrlo = sglinfo->si_min_addr; 2239509Smrj size = dmar_object->dmao_size; 2240509Smrj 2241509Smrj pcnt = 0; 2242509Smrj cnt = 0; 2243509Smrj 2244509Smrj /* 2245509Smrj * if we were passed down a linked list of pages, i.e. pointer to 2246509Smrj * page_t, use this to get our physical address and buf offset. 2247509Smrj */ 2248509Smrj if (buftype == DMA_OTYP_PAGES) { 2249509Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2250509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2251509Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2252509Smrj MMU_PAGEOFFSET; 2253509Smrj paddr = ptob64(pp->p_pagenum) + offset; 2254509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2255509Smrj pp = pp->p_next; 2256509Smrj sglinfo->si_asp = NULL; 2257509Smrj 2258509Smrj /* 2259509Smrj * We weren't passed down a linked list of pages, but if we were passed 2260509Smrj * down an array of pages, use this to get our physical address and buf 2261509Smrj * offset. 2262509Smrj */ 2263509Smrj } else if (pplist != NULL) { 2264509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2265509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2266509Smrj 2267509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2268509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2269509Smrj if (sglinfo->si_asp == NULL) { 2270509Smrj sglinfo->si_asp = &kas; 2271509Smrj } 2272509Smrj 2273509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2274509Smrj paddr = ptob64(pplist[pcnt]->p_pagenum); 2275509Smrj paddr += offset; 2276509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2277509Smrj pcnt++; 2278509Smrj 2279509Smrj /* 2280509Smrj * All we have is a virtual address, we'll need to call into the VM 2281509Smrj * to get the physical address. 2282509Smrj */ 2283509Smrj } else { 2284509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2285509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2286509Smrj 2287509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2288509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2289509Smrj if (sglinfo->si_asp == NULL) { 2290509Smrj sglinfo->si_asp = &kas; 2291509Smrj } 2292509Smrj 2293509Smrj paddr = ptob64(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2294509Smrj paddr += offset; 2295509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2296509Smrj vaddr += psize; 2297509Smrj } 2298509Smrj 2299509Smrj /* 2300509Smrj * Setup the first cookie with the physical address of the page and the 2301509Smrj * size of the page (which takes into account the initial offset into 2302509Smrj * the page. 2303509Smrj */ 2304509Smrj sgl[cnt].dmac_laddress = paddr; 2305509Smrj sgl[cnt].dmac_size = psize; 2306509Smrj sgl[cnt].dmac_type = 0; 2307509Smrj 2308509Smrj /* 2309509Smrj * Save away the buffer offset into the page. We'll need this later in 2310509Smrj * the copy buffer code to help figure out the page index within the 2311509Smrj * buffer and the offset into the current page. 2312509Smrj */ 2313509Smrj sglinfo->si_buf_offset = offset; 2314509Smrj 2315509Smrj /* 2316509Smrj * If the DMA engine can't reach the physical address, increase how 2317509Smrj * much copy buffer we need. We always increase by pagesize so we don't 2318509Smrj * have to worry about converting offsets. Set a flag in the cookies 2319509Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 2320509Smrj * last cookie, go to the next cookie (since we separate each page which 2321509Smrj * uses the copy buffer in case the copy buffer is not physically 2322509Smrj * contiguous. 2323509Smrj */ 2324509Smrj if ((paddr < addrlo) || ((paddr + psize) > addrhi)) { 2325509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2326509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2327509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2328509Smrj cnt++; 2329509Smrj sgl[cnt].dmac_laddress = 0; 2330509Smrj sgl[cnt].dmac_size = 0; 2331509Smrj sgl[cnt].dmac_type = 0; 2332509Smrj } 2333509Smrj } 2334509Smrj 2335509Smrj /* 2336509Smrj * save this page's physical address so we can figure out if the next 2337509Smrj * page is physically contiguous. Keep decrementing size until we are 2338509Smrj * done with the buffer. 2339509Smrj */ 2340509Smrj last_page = paddr & MMU_PAGEMASK; 2341509Smrj size -= psize; 2342509Smrj 2343509Smrj while (size > 0) { 2344509Smrj /* Get the size for this page (i.e. partial or full page) */ 2345509Smrj psize = MIN(size, MMU_PAGESIZE); 2346509Smrj 2347509Smrj if (buftype == DMA_OTYP_PAGES) { 2348509Smrj /* get the paddr from the page_t */ 2349509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2350509Smrj paddr = ptob64(pp->p_pagenum); 2351509Smrj pp = pp->p_next; 2352509Smrj } else if (pplist != NULL) { 2353509Smrj /* index into the array of page_t's to get the paddr */ 2354509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2355509Smrj paddr = ptob64(pplist[pcnt]->p_pagenum); 2356509Smrj pcnt++; 23570Sstevel@tonic-gate } else { 2358509Smrj /* call into the VM to get the paddr */ 2359509Smrj paddr = ptob64(hat_getpfnum(sglinfo->si_asp->a_hat, 2360509Smrj vaddr)); 2361509Smrj vaddr += psize; 2362509Smrj } 2363509Smrj 2364509Smrj /* check to see if this page needs the copy buffer */ 2365509Smrj if ((paddr < addrlo) || ((paddr + psize) > addrhi)) { 2366509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2367509Smrj 23680Sstevel@tonic-gate /* 2369509Smrj * if there is something in the current cookie, go to 2370509Smrj * the next one. We only want one page in a cookie which 2371509Smrj * uses the copybuf since the copybuf doesn't have to 2372509Smrj * be physically contiguous. 2373509Smrj */ 2374509Smrj if (sgl[cnt].dmac_size != 0) { 2375509Smrj cnt++; 2376509Smrj } 2377509Smrj sgl[cnt].dmac_laddress = paddr; 2378509Smrj sgl[cnt].dmac_size = psize; 2379509Smrj #if defined(__amd64) 2380509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2381509Smrj #else 2382509Smrj /* 2383509Smrj * save the buf offset for 32-bit kernel. used in the 2384509Smrj * obsoleted interfaces. 2385509Smrj */ 2386509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2387509Smrj (dmar_object->dmao_size - size); 2388509Smrj #endif 2389509Smrj /* if this isn't the last cookie, go to the next one */ 2390509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2391509Smrj cnt++; 2392509Smrj sgl[cnt].dmac_laddress = 0; 2393509Smrj sgl[cnt].dmac_size = 0; 2394509Smrj sgl[cnt].dmac_type = 0; 2395509Smrj } 2396509Smrj 2397509Smrj /* 2398509Smrj * this page didn't need the copy buffer, if it's not physically 2399509Smrj * contiguous, or it would put us over a segment boundary, or it 2400509Smrj * puts us over the max cookie size, or the current sgl doesn't 2401509Smrj * have anything in it. 2402509Smrj */ 2403509Smrj } else if (((last_page + MMU_PAGESIZE) != paddr) || 2404509Smrj !(paddr & sglinfo->si_segmask) || 2405509Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 2406509Smrj (sgl[cnt].dmac_size == 0)) { 2407509Smrj /* 2408509Smrj * if we're not already in a new cookie, go to the next 2409509Smrj * cookie. 2410509Smrj */ 2411509Smrj if (sgl[cnt].dmac_size != 0) { 2412509Smrj cnt++; 2413509Smrj } 2414509Smrj 2415509Smrj /* save the cookie information */ 2416509Smrj sgl[cnt].dmac_laddress = paddr; 2417509Smrj sgl[cnt].dmac_size = psize; 2418509Smrj #if defined(__amd64) 2419509Smrj sgl[cnt].dmac_type = 0; 2420509Smrj #else 2421509Smrj /* 2422509Smrj * save the buf offset for 32-bit kernel. used in the 2423509Smrj * obsoleted interfaces. 2424509Smrj */ 2425509Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2426509Smrj #endif 2427509Smrj 2428509Smrj /* 2429509Smrj * this page didn't need the copy buffer, it is physically 2430509Smrj * contiguous with the last page, and it's <= the max cookie 2431509Smrj * size. 2432509Smrj */ 2433509Smrj } else { 2434509Smrj sgl[cnt].dmac_size += psize; 2435509Smrj 2436509Smrj /* 2437509Smrj * if this exactly == the maximum cookie size, and 2438509Smrj * it isn't the last cookie, go to the next cookie. 2439509Smrj */ 2440509Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 2441509Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 2442509Smrj cnt++; 2443509Smrj sgl[cnt].dmac_laddress = 0; 2444509Smrj sgl[cnt].dmac_size = 0; 2445509Smrj sgl[cnt].dmac_type = 0; 2446509Smrj } 2447509Smrj } 2448509Smrj 2449509Smrj /* 2450509Smrj * save this page's physical address so we can figure out if the 2451509Smrj * next page is physically contiguous. Keep decrementing size 2452509Smrj * until we are done with the buffer. 2453509Smrj */ 2454509Smrj last_page = paddr; 2455509Smrj size -= psize; 2456509Smrj } 2457509Smrj 2458509Smrj /* we're done, save away how many cookies the sgl has */ 2459509Smrj if (sgl[cnt].dmac_size == 0) { 2460509Smrj ASSERT(cnt < sglinfo->si_max_pages); 2461509Smrj sglinfo->si_sgl_size = cnt; 2462509Smrj } else { 2463509Smrj sglinfo->si_sgl_size = cnt + 1; 2464509Smrj } 2465509Smrj } 2466509Smrj 2467509Smrj 2468509Smrj /* 2469509Smrj * rootnex_bind_slowpath() 2470509Smrj * Call in the bind path if the calling driver can't use the sgl without 2471509Smrj * modifying it. We either need to use the copy buffer and/or we will end up 2472509Smrj * with a partial bind. 2473509Smrj */ 2474509Smrj static int 2475509Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2476509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2477509Smrj { 2478509Smrj rootnex_sglinfo_t *sinfo; 2479509Smrj rootnex_window_t *window; 2480509Smrj ddi_dma_cookie_t *cookie; 2481509Smrj size_t copybuf_used; 2482509Smrj size_t dmac_size; 2483509Smrj boolean_t partial; 2484509Smrj off_t cur_offset; 2485509Smrj page_t *cur_pp; 2486509Smrj major_t mnum; 2487509Smrj int e; 2488509Smrj int i; 2489509Smrj 2490509Smrj 2491509Smrj sinfo = &dma->dp_sglinfo; 2492509Smrj copybuf_used = 0; 2493509Smrj partial = B_FALSE; 2494509Smrj 2495509Smrj /* 2496509Smrj * If we're using the copybuf, set the copybuf state in dma struct. 2497509Smrj * Needs to be first since it sets the copy buffer size. 2498509Smrj */ 2499509Smrj if (sinfo->si_copybuf_req != 0) { 2500509Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2501509Smrj if (e != DDI_SUCCESS) { 2502509Smrj return (e); 2503509Smrj } 2504509Smrj } else { 2505509Smrj dma->dp_copybuf_size = 0; 2506509Smrj } 2507509Smrj 2508509Smrj /* 2509509Smrj * Figure out if we need to do a partial mapping. If so, figure out 2510509Smrj * if we need to trim the buffers when we munge the sgl. 2511509Smrj */ 2512509Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2513509Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2514509Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2515509Smrj dma->dp_partial_required = B_TRUE; 2516509Smrj if (attr->dma_attr_granular != 1) { 2517509Smrj dma->dp_trim_required = B_TRUE; 2518509Smrj } 2519509Smrj } else { 2520509Smrj dma->dp_partial_required = B_FALSE; 2521509Smrj dma->dp_trim_required = B_FALSE; 2522509Smrj } 2523509Smrj 2524509Smrj /* If we need to do a partial bind, make sure the driver supports it */ 2525509Smrj if (dma->dp_partial_required && 2526509Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2527509Smrj 2528509Smrj mnum = ddi_driver_major(dma->dp_dip); 2529509Smrj /* 2530509Smrj * patchable which allows us to print one warning per major 2531509Smrj * number. 2532509Smrj */ 2533509Smrj if ((rootnex_bind_warn) && 2534509Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2535509Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2536509Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 2537509Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 2538509Smrj "There is a small risk of data corruption in " 2539509Smrj "particular with large I/Os. The driver should be " 2540509Smrj "replaced with a corrected version for proper " 2541509Smrj "system operation. To disable this warning, add " 2542509Smrj "'set rootnex:rootnex_bind_warn=0' to " 2543509Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2544509Smrj } 2545509Smrj return (DDI_DMA_TOOBIG); 2546509Smrj } 2547509Smrj 2548509Smrj /* 2549509Smrj * we might need multiple windows, setup state to handle them. In this 2550509Smrj * code path, we will have at least one window. 2551509Smrj */ 2552509Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 2553509Smrj if (e != DDI_SUCCESS) { 2554509Smrj rootnex_teardown_copybuf(dma); 2555509Smrj return (e); 2556509Smrj } 2557509Smrj 2558509Smrj window = &dma->dp_window[0]; 2559509Smrj cookie = &dma->dp_cookies[0]; 2560509Smrj cur_offset = 0; 2561509Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 2562509Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2563509Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2564509Smrj } 2565509Smrj 2566509Smrj /* loop though all the cookies we got back from get_sgl() */ 2567509Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 2568509Smrj /* 2569509Smrj * If we're using the copy buffer, check this cookie and setup 2570509Smrj * its associated copy buffer state. If this cookie uses the 2571509Smrj * copy buffer, make sure we sync this window during dma_sync. 2572509Smrj */ 2573509Smrj if (dma->dp_copybuf_size > 0) { 2574509Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2575509Smrj cur_offset, ©buf_used, &cur_pp); 2576509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2577509Smrj window->wd_dosync = B_TRUE; 2578509Smrj } 2579509Smrj } 2580509Smrj 2581509Smrj /* 2582509Smrj * save away the cookie size, since it could be modified in 2583509Smrj * the windowing code. 2584509Smrj */ 2585509Smrj dmac_size = cookie->dmac_size; 2586509Smrj 2587509Smrj /* if we went over max copybuf size */ 2588509Smrj if (dma->dp_copybuf_size && 2589509Smrj (copybuf_used > dma->dp_copybuf_size)) { 2590509Smrj partial = B_TRUE; 2591509Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 2592509Smrj cookie, cur_offset, ©buf_used); 2593509Smrj if (e != DDI_SUCCESS) { 2594509Smrj rootnex_teardown_copybuf(dma); 2595509Smrj rootnex_teardown_windows(dma); 2596509Smrj return (e); 2597509Smrj } 2598509Smrj 2599509Smrj /* 2600509Smrj * if the coookie uses the copy buffer, make sure the 2601509Smrj * new window we just moved to is set to sync. 2602509Smrj */ 2603509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2604509Smrj window->wd_dosync = B_TRUE; 2605509Smrj } 2606509Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2607509Smrj dma->dp_dip); 2608509Smrj 2609509Smrj /* if the cookie cnt == max sgllen, move to the next window */ 2610509Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2611509Smrj partial = B_TRUE; 2612509Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2613509Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 2614509Smrj cookie, attr, cur_offset); 2615509Smrj if (e != DDI_SUCCESS) { 2616509Smrj rootnex_teardown_copybuf(dma); 2617509Smrj rootnex_teardown_windows(dma); 2618509Smrj return (e); 2619509Smrj } 2620509Smrj 2621509Smrj /* 2622509Smrj * if the coookie uses the copy buffer, make sure the 2623509Smrj * new window we just moved to is set to sync. 2624509Smrj */ 2625509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2626509Smrj window->wd_dosync = B_TRUE; 2627509Smrj } 2628509Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2629509Smrj dma->dp_dip); 2630509Smrj 2631509Smrj /* else if we will be over maxxfer */ 2632509Smrj } else if ((window->wd_size + dmac_size) > 2633509Smrj dma->dp_maxxfer) { 2634509Smrj partial = B_TRUE; 2635509Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2636509Smrj cookie); 2637509Smrj if (e != DDI_SUCCESS) { 2638509Smrj rootnex_teardown_copybuf(dma); 2639509Smrj rootnex_teardown_windows(dma); 2640509Smrj return (e); 2641509Smrj } 2642509Smrj 2643509Smrj /* 2644509Smrj * if the coookie uses the copy buffer, make sure the 2645509Smrj * new window we just moved to is set to sync. 26460Sstevel@tonic-gate */ 2647509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2648509Smrj window->wd_dosync = B_TRUE; 2649509Smrj } 2650509Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2651509Smrj dma->dp_dip); 2652509Smrj 2653509Smrj /* else this cookie fits in the current window */ 2654509Smrj } else { 2655509Smrj window->wd_cookie_cnt++; 2656509Smrj window->wd_size += dmac_size; 2657509Smrj } 2658509Smrj 2659509Smrj /* track our offset into the buffer, go to the next cookie */ 2660509Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2661509Smrj ASSERT(cookie->dmac_size <= dmac_size); 2662509Smrj cur_offset += dmac_size; 2663509Smrj cookie++; 2664509Smrj } 2665509Smrj 2666509Smrj /* if we ended up with a zero sized window in the end, clean it up */ 2667509Smrj if (window->wd_size == 0) { 2668509Smrj hp->dmai_nwin--; 2669509Smrj window--; 2670509Smrj } 2671509Smrj 2672509Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 2673509Smrj 2674509Smrj if (!partial) { 2675509Smrj return (DDI_DMA_MAPPED); 2676509Smrj } 2677509Smrj 2678509Smrj ASSERT(dma->dp_partial_required); 2679509Smrj return (DDI_DMA_PARTIAL_MAP); 2680509Smrj } 2681509Smrj 2682509Smrj 2683509Smrj /* 2684509Smrj * rootnex_setup_copybuf() 2685509Smrj * Called in bind slowpath. Figures out if we're going to use the copy 2686509Smrj * buffer, and if we do, sets up the basic state to handle it. 2687509Smrj */ 2688509Smrj static int 2689509Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2690509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 2691509Smrj { 2692509Smrj rootnex_sglinfo_t *sinfo; 2693509Smrj ddi_dma_attr_t lattr; 2694509Smrj size_t max_copybuf; 2695509Smrj int cansleep; 2696509Smrj int e; 2697509Smrj #if !defined(__amd64) 2698509Smrj int vmflag; 2699509Smrj #endif 2700509Smrj 2701509Smrj 2702509Smrj sinfo = &dma->dp_sglinfo; 2703509Smrj 2704509Smrj /* 2705509Smrj * read this first so it's consistent through the routine so we can 2706509Smrj * patch it on the fly. 2707509Smrj */ 2708509Smrj max_copybuf = rootnex_max_copybuf_size & MMU_PAGEMASK; 2709509Smrj 2710509Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 2711509Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 2712509Smrj 2713509Smrj /* make sure the copybuf size <= the max size */ 2714509Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 2715509Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 2716509Smrj 2717509Smrj #if !defined(__amd64) 2718509Smrj /* 2719509Smrj * if we don't have kva space to copy to/from, allocate the KVA space 2720509Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 2721509Smrj * the 64-bit kernel. 2722509Smrj */ 2723509Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 2724509Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 2725509Smrj 2726509Smrj /* convert the sleep flags */ 2727509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2728509Smrj vmflag = VM_SLEEP; 2729509Smrj } else { 2730509Smrj vmflag = VM_NOSLEEP; 2731509Smrj } 2732509Smrj 2733509Smrj /* allocate Kernel VA space that we can bcopy to/from */ 2734509Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 2735509Smrj vmflag); 2736509Smrj if (dma->dp_kva == NULL) { 2737509Smrj return (DDI_DMA_NORESOURCES); 2738509Smrj } 2739509Smrj } 2740509Smrj #endif 2741509Smrj 2742509Smrj /* convert the sleep flags */ 2743509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2744509Smrj cansleep = 1; 2745509Smrj } else { 2746509Smrj cansleep = 0; 2747509Smrj } 2748509Smrj 2749509Smrj /* 2750509Smrj * Allocated the actual copy buffer. This needs to fit within the DMA 2751509Smrj * engines limits, so we can't use kmem_alloc... 2752509Smrj */ 2753509Smrj lattr = *attr; 2754509Smrj lattr.dma_attr_align = MMU_PAGESIZE; 2755509Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 2756509Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 2757509Smrj if (e != DDI_SUCCESS) { 2758509Smrj #if !defined(__amd64) 2759509Smrj if (dma->dp_kva != NULL) { 2760509Smrj vmem_free(heap_arena, dma->dp_kva, 2761509Smrj dma->dp_copybuf_size); 2762509Smrj } 2763509Smrj #endif 2764509Smrj return (DDI_DMA_NORESOURCES); 2765509Smrj } 2766509Smrj 2767509Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 2768509Smrj size_t, dma->dp_copybuf_size); 2769509Smrj 2770509Smrj return (DDI_SUCCESS); 2771509Smrj } 2772509Smrj 2773509Smrj 2774509Smrj /* 2775509Smrj * rootnex_setup_windows() 2776509Smrj * Called in bind slowpath to setup the window state. We always have windows 2777509Smrj * in the slowpath. Even if the window count = 1. 2778509Smrj */ 2779509Smrj static int 2780509Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2781509Smrj ddi_dma_attr_t *attr, int kmflag) 2782509Smrj { 2783509Smrj rootnex_window_t *windowp; 2784509Smrj rootnex_sglinfo_t *sinfo; 2785509Smrj size_t copy_state_size; 2786509Smrj size_t win_state_size; 2787509Smrj size_t state_available; 2788509Smrj size_t space_needed; 2789509Smrj uint_t copybuf_win; 2790509Smrj uint_t maxxfer_win; 2791509Smrj size_t space_used; 2792509Smrj uint_t sglwin; 2793509Smrj 2794509Smrj 2795509Smrj sinfo = &dma->dp_sglinfo; 2796509Smrj 2797509Smrj dma->dp_current_win = 0; 2798509Smrj hp->dmai_nwin = 0; 2799509Smrj 2800509Smrj /* If we don't need to do a partial, we only have one window */ 2801509Smrj if (!dma->dp_partial_required) { 2802509Smrj dma->dp_max_win = 1; 2803509Smrj 2804509Smrj /* 2805509Smrj * we need multiple windows, need to figure out the worse case number 2806509Smrj * of windows. 2807509Smrj */ 2808509Smrj } else { 2809509Smrj /* 2810509Smrj * if we need windows because we need more copy buffer that 2811509Smrj * we allow, the worse case number of windows we could need 2812509Smrj * here would be (copybuf space required / copybuf space that 2813509Smrj * we have) plus one for remainder, and plus 2 to handle the 2814509Smrj * extra pages on the trim for the first and last pages of the 2815509Smrj * buffer (a page is the minimum window size so under the right 2816509Smrj * attr settings, you could have a window for each page). 2817509Smrj * The last page will only be hit here if the size is not a 2818509Smrj * multiple of the granularity (which theoretically shouldn't 2819509Smrj * be the case but never has been enforced, so we could have 2820509Smrj * broken things without it). 2821509Smrj */ 2822509Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 2823509Smrj ASSERT(dma->dp_copybuf_size > 0); 2824509Smrj copybuf_win = (sinfo->si_copybuf_req / 2825509Smrj dma->dp_copybuf_size) + 1 + 2; 2826509Smrj } else { 2827509Smrj copybuf_win = 0; 2828509Smrj } 2829509Smrj 2830509Smrj /* 2831509Smrj * if we need windows because we have more cookies than the H/W 2832509Smrj * can handle, the number of windows we would need here would 2833509Smrj * be (cookie count / cookies count H/W supports) plus one for 2834509Smrj * remainder, and plus 2 to handle the extra pages on the trim 2835509Smrj * (see above comment about trim) 2836509Smrj */ 2837509Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 2838509Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 2839509Smrj + 1) + 2; 2840509Smrj } else { 2841509Smrj sglwin = 0; 2842509Smrj } 2843509Smrj 2844509Smrj /* 2845509Smrj * if we need windows because we're binding more memory than the 2846509Smrj * H/W can transfer at once, the number of windows we would need 2847509Smrj * here would be (xfer count / max xfer H/W supports) plus one 2848509Smrj * for remainder, and plus 2 to handle the extra pages on the 2849509Smrj * trim (see above comment about trim) 2850509Smrj */ 2851509Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 2852509Smrj maxxfer_win = (dma->dp_dma.dmao_size / 2853509Smrj dma->dp_maxxfer) + 1 + 2; 2854509Smrj } else { 2855509Smrj maxxfer_win = 0; 2856509Smrj } 2857509Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 2858509Smrj ASSERT(dma->dp_max_win > 0); 2859509Smrj } 2860509Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 2861509Smrj 2862509Smrj /* 2863509Smrj * Get space for window and potential copy buffer state. Before we 2864509Smrj * go and allocate memory, see if we can get away with using what's 2865509Smrj * left in the pre-allocted state or the dynamically allocated sgl. 2866509Smrj */ 2867509Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 2868509Smrj sizeof (ddi_dma_cookie_t)); 2869509Smrj 2870509Smrj /* if we dynamically allocated space for the cookies */ 2871509Smrj if (dma->dp_need_to_free_cookie) { 2872509Smrj /* if we have more space in the pre-allocted buffer, use it */ 2873509Smrj ASSERT(space_used <= dma->dp_cookie_size); 2874509Smrj if ((dma->dp_cookie_size - space_used) <= 2875509Smrj rootnex_state->r_prealloc_size) { 2876509Smrj state_available = rootnex_state->r_prealloc_size; 2877509Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 2878509Smrj 2879509Smrj /* 2880509Smrj * else, we have more free space in the dynamically allocated 2881509Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 2882509Smrj * didn't need a lot of cookies. 2883509Smrj */ 2884509Smrj } else { 2885509Smrj state_available = dma->dp_cookie_size - space_used; 2886509Smrj windowp = (rootnex_window_t *) 2887509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2888509Smrj } 2889509Smrj 2890509Smrj /* we used the pre-alloced buffer */ 2891509Smrj } else { 2892509Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 2893509Smrj state_available = rootnex_state->r_prealloc_size - space_used; 2894509Smrj windowp = (rootnex_window_t *) 2895509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2896509Smrj } 2897509Smrj 2898509Smrj /* 2899509Smrj * figure out how much state we need to track the copy buffer. Add an 2900509Smrj * addition 8 bytes for pointer alignemnt later. 2901509Smrj */ 2902509Smrj if (dma->dp_copybuf_size > 0) { 2903509Smrj copy_state_size = sinfo->si_max_pages * 2904509Smrj sizeof (rootnex_pgmap_t); 2905509Smrj } else { 2906509Smrj copy_state_size = 0; 2907509Smrj } 2908509Smrj /* add an additional 8 bytes for pointer alignment */ 2909509Smrj space_needed = win_state_size + copy_state_size + 0x8; 2910509Smrj 2911509Smrj /* if we have enough space already, use it */ 2912509Smrj if (state_available >= space_needed) { 2913509Smrj dma->dp_window = windowp; 2914509Smrj dma->dp_need_to_free_window = B_FALSE; 2915509Smrj 2916509Smrj /* not enough space, need to allocate more. */ 2917509Smrj } else { 2918509Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 2919509Smrj if (dma->dp_window == NULL) { 2920509Smrj return (DDI_DMA_NORESOURCES); 2921509Smrj } 2922509Smrj dma->dp_need_to_free_window = B_TRUE; 2923509Smrj dma->dp_window_size = space_needed; 2924509Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 2925509Smrj dma->dp_dip, size_t, space_needed); 2926509Smrj } 2927509Smrj 2928509Smrj /* 2929509Smrj * we allocate copy buffer state and window state at the same time. 2930509Smrj * setup our copy buffer state pointers. Make sure it's aligned. 2931509Smrj */ 2932509Smrj if (dma->dp_copybuf_size > 0) { 2933509Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 2934509Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 2935509Smrj 2936509Smrj #if !defined(__amd64) 2937509Smrj /* 2938509Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 2939509Smrj * false/NULL. Should be quicker to bzero vs loop and set. 2940509Smrj */ 2941509Smrj bzero(dma->dp_pgmap, copy_state_size); 2942509Smrj #endif 2943509Smrj } else { 2944509Smrj dma->dp_pgmap = NULL; 2945509Smrj } 2946509Smrj 2947509Smrj return (DDI_SUCCESS); 2948509Smrj } 2949509Smrj 2950509Smrj 2951509Smrj /* 2952509Smrj * rootnex_teardown_copybuf() 2953509Smrj * cleans up after rootnex_setup_copybuf() 2954509Smrj */ 2955509Smrj static void 2956509Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 2957509Smrj { 2958509Smrj #if !defined(__amd64) 2959509Smrj int i; 2960509Smrj 2961509Smrj /* 2962509Smrj * if we allocated kernel heap VMEM space, go through all the pages and 2963509Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 2964509Smrj * arena. Then free the VMEM space. 2965509Smrj */ 2966509Smrj if (dma->dp_kva != NULL) { 2967509Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 2968509Smrj if (dma->dp_pgmap[i].pm_mapped) { 2969509Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 2970509Smrj MMU_PAGESIZE, HAT_UNLOAD); 2971509Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 2972509Smrj } 2973509Smrj } 2974509Smrj 2975509Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 2976509Smrj } 2977509Smrj 2978509Smrj #endif 2979509Smrj 2980509Smrj /* if we allocated a copy buffer, free it */ 2981509Smrj if (dma->dp_cbaddr != NULL) { 2982509Smrj i_ddi_mem_free(dma->dp_cbaddr, 0); 2983509Smrj } 2984509Smrj } 2985509Smrj 2986509Smrj 2987509Smrj /* 2988509Smrj * rootnex_teardown_windows() 2989509Smrj * cleans up after rootnex_setup_windows() 2990509Smrj */ 2991509Smrj static void 2992509Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 2993509Smrj { 2994509Smrj /* 2995509Smrj * if we had to allocate window state on the last bind (because we 2996509Smrj * didn't have enough pre-allocated space in the handle), free it. 2997509Smrj */ 2998509Smrj if (dma->dp_need_to_free_window) { 2999509Smrj kmem_free(dma->dp_window, dma->dp_window_size); 3000509Smrj } 3001509Smrj } 3002509Smrj 3003509Smrj 3004509Smrj /* 3005509Smrj * rootnex_init_win() 3006509Smrj * Called in bind slow path during creation of a new window. Initializes 3007509Smrj * window state to default values. 3008509Smrj */ 3009509Smrj /*ARGSUSED*/ 3010509Smrj static void 3011509Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3012509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3013509Smrj { 3014509Smrj hp->dmai_nwin++; 3015509Smrj window->wd_dosync = B_FALSE; 3016509Smrj window->wd_offset = cur_offset; 3017509Smrj window->wd_size = 0; 3018509Smrj window->wd_first_cookie = cookie; 3019509Smrj window->wd_cookie_cnt = 0; 3020509Smrj window->wd_trim.tr_trim_first = B_FALSE; 3021509Smrj window->wd_trim.tr_trim_last = B_FALSE; 3022509Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 3023509Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 3024509Smrj #if !defined(__amd64) 3025509Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 3026509Smrj #endif 3027509Smrj } 3028509Smrj 3029509Smrj 3030509Smrj /* 3031509Smrj * rootnex_setup_cookie() 3032509Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 3033509Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 3034509Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 3035509Smrj * need during sync. 3036509Smrj */ 3037509Smrj static void 3038509Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3039509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3040509Smrj page_t **cur_pp) 3041509Smrj { 3042509Smrj boolean_t copybuf_sz_power_2; 3043509Smrj rootnex_sglinfo_t *sinfo; 3044509Smrj uint_t pidx; 3045509Smrj uint_t pcnt; 3046509Smrj off_t poff; 3047509Smrj #if defined(__amd64) 3048509Smrj pfn_t pfn; 3049509Smrj #else 3050509Smrj page_t **pplist; 3051509Smrj #endif 3052509Smrj 3053509Smrj sinfo = &dma->dp_sglinfo; 3054509Smrj 3055509Smrj /* 3056509Smrj * Calculate the page index relative to the start of the buffer. The 3057509Smrj * index to the current page for our buffer is the offset into the 3058509Smrj * first page of the buffer plus our current offset into the buffer 3059509Smrj * itself, shifted of course... 3060509Smrj */ 3061509Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3062509Smrj ASSERT(pidx < sinfo->si_max_pages); 3063509Smrj 3064509Smrj /* if this cookie uses the copy buffer */ 3065509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3066509Smrj /* 3067509Smrj * NOTE: we know that since this cookie uses the copy buffer, it 3068509Smrj * is <= MMU_PAGESIZE. 3069509Smrj */ 3070509Smrj 3071509Smrj /* 3072509Smrj * get the offset into the page. For the 64-bit kernel, get the 3073509Smrj * pfn which we'll use with seg kpm. 3074509Smrj */ 3075509Smrj poff = cookie->_dmu._dmac_ll & MMU_PAGEOFFSET; 3076509Smrj #if defined(__amd64) 3077509Smrj pfn = cookie->_dmu._dmac_ll >> MMU_PAGESHIFT; 3078509Smrj #endif 3079509Smrj 3080509Smrj /* figure out if the copybuf size is a power of 2 */ 3081509Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3082509Smrj copybuf_sz_power_2 = B_FALSE; 3083509Smrj } else { 3084509Smrj copybuf_sz_power_2 = B_TRUE; 3085509Smrj } 3086509Smrj 3087509Smrj /* This page uses the copy buffer */ 3088509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3089509Smrj 3090509Smrj /* 3091509Smrj * save the copy buffer KVA that we'll use with this page. 3092509Smrj * if we still fit within the copybuf, it's a simple add. 3093509Smrj * otherwise, we need to wrap over using & or % accordingly. 3094509Smrj */ 3095509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3096509Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3097509Smrj *copybuf_used; 3098509Smrj } else { 3099509Smrj if (copybuf_sz_power_2) { 3100509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3101509Smrj (uintptr_t)dma->dp_cbaddr + 3102509Smrj (*copybuf_used & 3103509Smrj (dma->dp_copybuf_size - 1))); 31040Sstevel@tonic-gate } else { 3105509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3106509Smrj (uintptr_t)dma->dp_cbaddr + 3107509Smrj (*copybuf_used % dma->dp_copybuf_size)); 31080Sstevel@tonic-gate } 3109509Smrj } 3110509Smrj 3111509Smrj /* 3112509Smrj * over write the cookie physical address with the address of 3113509Smrj * the physical address of the copy buffer page that we will 3114509Smrj * use. 3115509Smrj */ 3116509Smrj cookie->_dmu._dmac_ll = ptob64(hat_getpfnum(kas.a_hat, 3117509Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3118509Smrj 3119509Smrj /* if we have a kernel VA, it's easy, just save that address */ 3120509Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3121509Smrj (sinfo->si_asp == &kas)) { 3122509Smrj /* 3123509Smrj * save away the page aligned virtual address of the 3124509Smrj * driver buffer. Offsets are handled in the sync code. 3125509Smrj */ 3126509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3127509Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3128509Smrj & MMU_PAGEMASK); 3129509Smrj #if !defined(__amd64) 3130509Smrj /* 3131509Smrj * we didn't need to, and will never need to map this 3132509Smrj * page. 3133509Smrj */ 3134509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3135509Smrj #endif 3136509Smrj 3137509Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 3138509Smrj } else { 3139509Smrj #if defined(__amd64) 3140509Smrj /* 3141509Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 3142509Smrj * get a Kernel VA for the corresponding pfn. 3143509Smrj */ 3144509Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3145509Smrj #else 3146509Smrj /* 3147509Smrj * for the 32-bit kernel, this is a pain. First we'll 3148509Smrj * save away the page_t or user VA for this page. This 3149509Smrj * is needed in rootnex_dma_win() when we switch to a 3150509Smrj * new window which requires us to re-map the copy 3151509Smrj * buffer. 3152509Smrj */ 3153509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3154509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3155509Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3156509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3157509Smrj } else if (pplist != NULL) { 3158509Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3159509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3160509Smrj } else { 3161509Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 3162509Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3163509Smrj (((uintptr_t) 3164509Smrj dmar_object->dmao_obj.virt_obj.v_addr + 3165509Smrj cur_offset) & MMU_PAGEMASK); 3166509Smrj } 3167509Smrj 3168509Smrj /* 3169509Smrj * save away the page aligned virtual address which was 3170509Smrj * allocated from the kernel heap arena (taking into 3171509Smrj * account if we need more copy buffer than we alloced 3172509Smrj * and use multiple windows to handle this, i.e. &,%). 3173509Smrj * NOTE: there isn't and physical memory backing up this 3174509Smrj * virtual address space currently. 3175509Smrj */ 3176509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 3177509Smrj dma->dp_copybuf_size) { 3178509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3179509Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 3180509Smrj MMU_PAGEMASK); 3181509Smrj } else { 3182509Smrj if (copybuf_sz_power_2) { 3183509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3184509Smrj (((uintptr_t)dma->dp_kva + 3185509Smrj (*copybuf_used & 3186509Smrj (dma->dp_copybuf_size - 1))) & 3187509Smrj MMU_PAGEMASK); 3188509Smrj } else { 3189509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3190509Smrj (((uintptr_t)dma->dp_kva + 3191509Smrj (*copybuf_used % 3192509Smrj dma->dp_copybuf_size)) & 3193509Smrj MMU_PAGEMASK); 3194509Smrj } 3195509Smrj } 3196509Smrj 3197509Smrj /* 3198509Smrj * if we haven't used up the available copy buffer yet, 3199509Smrj * map the kva to the physical page. 3200509Smrj */ 3201509Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 3202509Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3203509Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3204509Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3205509Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3206509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3207509Smrj } else { 3208509Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3209509Smrj sinfo->si_asp, 3210509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3211509Smrj } 3212509Smrj 3213509Smrj /* 3214509Smrj * we've used up the available copy buffer, this page 3215509Smrj * will have to be mapped during rootnex_dma_win() when 3216509Smrj * we switch to a new window which requires a re-map 3217509Smrj * the copy buffer. (32-bit kernel only) 3218509Smrj */ 3219509Smrj } else { 3220509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3221509Smrj } 3222509Smrj #endif 3223509Smrj /* go to the next page_t */ 3224509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3225509Smrj *cur_pp = (*cur_pp)->p_next; 3226509Smrj } 32270Sstevel@tonic-gate } 3228509Smrj 3229509Smrj /* add to the copy buffer count */ 3230509Smrj *copybuf_used += MMU_PAGESIZE; 3231509Smrj 3232509Smrj /* 3233509Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 3234509Smrj * cookie occupies to reflect this. 3235509Smrj */ 3236509Smrj } else { 3237509Smrj /* 3238509Smrj * figure out how many pages the cookie occupies. We need to 3239509Smrj * use the original page offset of the buffer and the cookies 3240509Smrj * offset in the buffer to do this. 3241509Smrj */ 3242509Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3243509Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 3244509Smrj 3245509Smrj while (pcnt > 0) { 3246509Smrj #if !defined(__amd64) 3247509Smrj /* 3248509Smrj * the 32-bit kernel doesn't have seg kpm, so we need 3249509Smrj * to map in the driver buffer (if it didn't come down 3250509Smrj * with a kernel VA) on the fly. Since this page doesn't 3251509Smrj * use the copy buffer, it's not, or will it ever, have 3252509Smrj * to be mapped in. 3253509Smrj */ 3254509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3255509Smrj #endif 3256509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3257509Smrj 3258509Smrj /* 3259509Smrj * we need to update pidx and cur_pp or we'll loose 3260509Smrj * track of where we are. 3261509Smrj */ 3262509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3263509Smrj *cur_pp = (*cur_pp)->p_next; 3264509Smrj } 3265509Smrj pidx++; 3266509Smrj pcnt--; 3267509Smrj } 3268509Smrj } 3269509Smrj } 3270509Smrj 3271509Smrj 3272509Smrj /* 3273509Smrj * rootnex_sgllen_window_boundary() 3274509Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 3275509Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3276509Smrj * length supported by the DMA H/W. 3277509Smrj */ 3278509Smrj static int 3279509Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3280509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3281509Smrj off_t cur_offset) 3282509Smrj { 3283509Smrj off_t new_offset; 3284509Smrj size_t trim_sz; 3285509Smrj off_t coffset; 3286509Smrj 3287509Smrj 3288509Smrj /* 3289509Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 3290509Smrj * the next window and init it. We're done. 3291509Smrj */ 3292509Smrj if (!dma->dp_trim_required) { 3293509Smrj (*windowp)++; 3294509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3295509Smrj (*windowp)->wd_cookie_cnt++; 3296509Smrj (*windowp)->wd_size = cookie->dmac_size; 3297509Smrj return (DDI_SUCCESS); 3298509Smrj } 3299509Smrj 3300509Smrj /* figure out how much we need to trim from the window */ 3301509Smrj ASSERT(attr->dma_attr_granular != 0); 3302509Smrj if (dma->dp_granularity_power_2) { 3303509Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3304509Smrj } else { 3305509Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3306509Smrj } 3307509Smrj 3308509Smrj /* The window's a whole multiple of granularity. We're done */ 3309509Smrj if (trim_sz == 0) { 3310509Smrj (*windowp)++; 3311509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3312509Smrj (*windowp)->wd_cookie_cnt++; 3313509Smrj (*windowp)->wd_size = cookie->dmac_size; 3314509Smrj return (DDI_SUCCESS); 3315509Smrj } 3316509Smrj 3317509Smrj /* 3318509Smrj * The window's not a whole multiple of granularity, since we know this 3319509Smrj * is due to the sgllen, we need to go back to the last cookie and trim 3320509Smrj * that one, add the left over part of the old cookie into the new 3321509Smrj * window, and then add in the new cookie into the new window. 3322509Smrj */ 3323509Smrj 3324509Smrj /* 3325509Smrj * make sure the driver isn't making us do something bad... Trimming and 3326509Smrj * sgllen == 1 don't go together. 3327509Smrj */ 3328509Smrj if (attr->dma_attr_sgllen == 1) { 3329509Smrj return (DDI_DMA_NOMAPPING); 3330509Smrj } 3331509Smrj 3332509Smrj /* 3333509Smrj * first, setup the current window to account for the trim. Need to go 3334509Smrj * back to the last cookie for this. 3335509Smrj */ 3336509Smrj cookie--; 3337509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3338509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3339509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3340509Smrj ASSERT(cookie->dmac_size > trim_sz); 3341509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3342509Smrj (*windowp)->wd_size -= trim_sz; 3343509Smrj 3344509Smrj /* save the buffer offsets for the next window */ 3345509Smrj coffset = cookie->dmac_size - trim_sz; 3346509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3347509Smrj 3348509Smrj /* 3349509Smrj * set this now in case this is the first window. all other cases are 3350509Smrj * set in dma_win() 3351509Smrj */ 3352509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3353509Smrj 3354509Smrj /* 3355509Smrj * initialize the next window using what's left over in the previous 3356509Smrj * cookie. 3357509Smrj */ 3358509Smrj (*windowp)++; 3359509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3360509Smrj (*windowp)->wd_cookie_cnt++; 3361509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3362509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + coffset; 3363509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3364509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3365509Smrj (*windowp)->wd_dosync = B_TRUE; 3366509Smrj } 3367509Smrj 3368509Smrj /* 3369509Smrj * now go back to the current cookie and add it to the new window. set 3370509Smrj * the new window size to the what was left over from the previous 3371509Smrj * cookie and what's in the current cookie. 3372509Smrj */ 3373509Smrj cookie++; 3374509Smrj (*windowp)->wd_cookie_cnt++; 3375509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3376509Smrj 3377509Smrj /* 3378509Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 3379509Smrj * a max size of maxxfer). Handle that case. 3380509Smrj */ 3381509Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 3382509Smrj /* 3383509Smrj * maxxfer is already a whole multiple of granularity, and this 3384509Smrj * trim will be <= the previous trim (since a cookie can't be 3385509Smrj * larger than maxxfer). Make things simple here. 3386509Smrj */ 3387509Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3388509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3389509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3390509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3391509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3392509Smrj (*windowp)->wd_size -= trim_sz; 3393509Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3394509Smrj 3395509Smrj /* save the buffer offsets for the next window */ 3396509Smrj coffset = cookie->dmac_size - trim_sz; 3397509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3398509Smrj 3399509Smrj /* setup the next window */ 3400509Smrj (*windowp)++; 3401509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3402509Smrj (*windowp)->wd_cookie_cnt++; 3403509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3404509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + 3405509Smrj coffset; 3406509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3407509Smrj } 3408509Smrj 3409509Smrj return (DDI_SUCCESS); 3410509Smrj } 3411509Smrj 3412509Smrj 3413509Smrj /* 3414509Smrj * rootnex_copybuf_window_boundary() 3415509Smrj * Called in bind slowpath when we get to a window boundary because we used 3416509Smrj * up all the copy buffer that we have. 3417509Smrj */ 3418509Smrj static int 3419509Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3420509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3421509Smrj size_t *copybuf_used) 3422509Smrj { 3423509Smrj rootnex_sglinfo_t *sinfo; 3424509Smrj off_t new_offset; 3425509Smrj size_t trim_sz; 3426509Smrj off_t coffset; 3427509Smrj uint_t pidx; 3428509Smrj off_t poff; 3429509Smrj 3430509Smrj 3431509Smrj sinfo = &dma->dp_sglinfo; 3432509Smrj 3433509Smrj /* 3434509Smrj * the copy buffer should be a whole multiple of page size. We know that 3435509Smrj * this cookie is <= MMU_PAGESIZE. 3436509Smrj */ 3437509Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3438509Smrj 3439509Smrj /* 3440509Smrj * from now on, all new windows in this bind need to be re-mapped during 3441509Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3442509Smrj * space... 3443509Smrj */ 3444509Smrj #if !defined(__amd64) 3445509Smrj dma->dp_cb_remaping = B_TRUE; 3446509Smrj #endif 3447509Smrj 3448509Smrj /* reset copybuf used */ 3449509Smrj *copybuf_used = 0; 3450509Smrj 3451509Smrj /* 3452509Smrj * if we don't have to trim (since granularity is set to 1), go to the 3453509Smrj * next window and add the current cookie to it. We know the current 3454509Smrj * cookie uses the copy buffer since we're in this code path. 3455509Smrj */ 3456509Smrj if (!dma->dp_trim_required) { 3457509Smrj (*windowp)++; 3458509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3459509Smrj 3460509Smrj /* Add this cookie to the new window */ 3461509Smrj (*windowp)->wd_cookie_cnt++; 3462509Smrj (*windowp)->wd_size += cookie->dmac_size; 3463509Smrj *copybuf_used += MMU_PAGESIZE; 3464509Smrj return (DDI_SUCCESS); 3465509Smrj } 3466509Smrj 3467509Smrj /* 3468509Smrj * *** may need to trim, figure it out. 3469509Smrj */ 3470509Smrj 3471509Smrj /* figure out how much we need to trim from the window */ 3472509Smrj if (dma->dp_granularity_power_2) { 3473509Smrj trim_sz = (*windowp)->wd_size & 3474509Smrj (hp->dmai_attr.dma_attr_granular - 1); 3475509Smrj } else { 3476509Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3477509Smrj } 3478509Smrj 3479509Smrj /* 3480509Smrj * if the window's a whole multiple of granularity, go to the next 3481509Smrj * window, init it, then add in the current cookie. We know the current 3482509Smrj * cookie uses the copy buffer since we're in this code path. 3483509Smrj */ 3484509Smrj if (trim_sz == 0) { 3485509Smrj (*windowp)++; 3486509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3487509Smrj 3488509Smrj /* Add this cookie to the new window */ 3489509Smrj (*windowp)->wd_cookie_cnt++; 3490509Smrj (*windowp)->wd_size += cookie->dmac_size; 3491509Smrj *copybuf_used += MMU_PAGESIZE; 3492509Smrj return (DDI_SUCCESS); 3493509Smrj } 3494509Smrj 3495509Smrj /* 3496509Smrj * *** We figured it out, we definitly need to trim 3497509Smrj */ 3498509Smrj 3499509Smrj /* 3500509Smrj * make sure the driver isn't making us do something bad... 3501509Smrj * Trimming and sgllen == 1 don't go together. 3502509Smrj */ 3503509Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 3504509Smrj return (DDI_DMA_NOMAPPING); 3505509Smrj } 3506509Smrj 3507509Smrj /* 3508509Smrj * first, setup the current window to account for the trim. Need to go 3509509Smrj * back to the last cookie for this. Some of the last cookie will be in 3510509Smrj * the current window, and some of the last cookie will be in the new 3511509Smrj * window. All of the current cookie will be in the new window. 3512509Smrj */ 3513509Smrj cookie--; 3514509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3515509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3516509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3517509Smrj ASSERT(cookie->dmac_size > trim_sz); 3518509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3519509Smrj (*windowp)->wd_size -= trim_sz; 3520509Smrj 3521509Smrj /* 3522509Smrj * we're trimming the last cookie (not the current cookie). So that 3523509Smrj * last cookie may have or may not have been using the copy buffer ( 3524509Smrj * we know the cookie passed in uses the copy buffer since we're in 3525509Smrj * this code path). 3526509Smrj * 3527509Smrj * If the last cookie doesn't use the copy buffer, nothing special to 3528509Smrj * do. However, if it does uses the copy buffer, it will be both the 3529509Smrj * last page in the current window and the first page in the next 3530509Smrj * window. Since we are reusing the copy buffer (and KVA space on the 3531509Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 3532509Smrj * current window, and the start of the copy buffer in the next window. 3533509Smrj * Track that info... The cookie physical address was already set to 3534509Smrj * the copy buffer physical address in setup_cookie.. 3535509Smrj */ 3536509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3537509Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3538509Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 3539509Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3540509Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 3541509Smrj (*windowp)->wd_trim.tr_last_cbaddr = 3542509Smrj dma->dp_pgmap[pidx].pm_cbaddr; 3543509Smrj #if !defined(__amd64) 3544509Smrj (*windowp)->wd_trim.tr_last_kaddr = 3545509Smrj dma->dp_pgmap[pidx].pm_kaddr; 3546509Smrj #endif 3547509Smrj } 3548509Smrj 3549509Smrj /* save the buffer offsets for the next window */ 3550509Smrj coffset = cookie->dmac_size - trim_sz; 3551509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3552509Smrj 3553509Smrj /* 3554509Smrj * set this now in case this is the first window. all other cases are 3555509Smrj * set in dma_win() 3556509Smrj */ 3557509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3558509Smrj 3559509Smrj /* 3560509Smrj * initialize the next window using what's left over in the previous 3561509Smrj * cookie. 3562509Smrj */ 3563509Smrj (*windowp)++; 3564509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3565509Smrj (*windowp)->wd_cookie_cnt++; 3566509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3567509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + coffset; 3568509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3569509Smrj 3570509Smrj /* 3571509Smrj * again, we're tracking if the last cookie uses the copy buffer. 3572509Smrj * read the comment above for more info on why we need to track 3573509Smrj * additional state. 3574509Smrj * 3575509Smrj * For the first cookie in the new window, we need reset the physical 3576509Smrj * address to DMA into to the start of the copy buffer plus any 3577509Smrj * initial page offset which may be present. 3578509Smrj */ 3579509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3580509Smrj (*windowp)->wd_dosync = B_TRUE; 3581509Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3582509Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 3583509Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3584509Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 3585509Smrj (*windowp)->wd_trim.tr_first_paddr = ptob64(hat_getpfnum( 3586509Smrj kas.a_hat, dma->dp_cbaddr)) + poff; 3587509Smrj #if !defined(__amd64) 3588509Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3589509Smrj #endif 3590509Smrj /* account for the cookie copybuf usage in the new window */ 3591509Smrj *copybuf_used += MMU_PAGESIZE; 3592509Smrj 3593509Smrj /* 3594509Smrj * every piece of code has to have a hack, and here is this 3595509Smrj * ones :-) 3596509Smrj * 3597509Smrj * There is a complex interaction between setup_cookie and the 3598509Smrj * copybuf window boundary. The complexity had to be in either 3599509Smrj * the maxxfer window, or the copybuf window, and I chose the 3600509Smrj * copybuf code. 3601509Smrj * 3602509Smrj * So in this code path, we have taken the last cookie, 3603509Smrj * virtually broken it in half due to the trim, and it happens 3604509Smrj * to use the copybuf which further complicates life. At the 3605509Smrj * same time, we have already setup the current cookie, which 3606509Smrj * is now wrong. More background info: the current cookie uses 3607509Smrj * the copybuf, so it is only a page long max. So we need to 3608509Smrj * fix the current cookies copy buffer address, physical 3609509Smrj * address, and kva for the 32-bit kernel. We due this by 3610509Smrj * bumping them by page size (of course, we can't due this on 3611509Smrj * the physical address since the copy buffer may not be 3612509Smrj * physically contiguous). 3613509Smrj */ 3614509Smrj cookie++; 3615509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 3616509Smrj poff = cookie->_dmu._dmac_ll & MMU_PAGEOFFSET; 3617509Smrj cookie->_dmu._dmac_ll = ptob64(hat_getpfnum(kas.a_hat, 3618509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 3619509Smrj #if !defined(__amd64) 3620509Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3621509Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3622509Smrj #endif 3623509Smrj } else { 3624509Smrj /* go back to the current cookie */ 3625509Smrj cookie++; 3626509Smrj } 3627509Smrj 3628509Smrj /* 3629509Smrj * add the current cookie to the new window. set the new window size to 3630509Smrj * the what was left over from the previous cookie and what's in the 3631509Smrj * current cookie. 3632509Smrj */ 3633509Smrj (*windowp)->wd_cookie_cnt++; 3634509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3635509Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 3636509Smrj 3637509Smrj /* 3638509Smrj * we know that the cookie passed in always uses the copy buffer. We 3639509Smrj * wouldn't be here if it didn't. 3640509Smrj */ 3641509Smrj *copybuf_used += MMU_PAGESIZE; 3642509Smrj 3643509Smrj return (DDI_SUCCESS); 3644509Smrj } 3645509Smrj 3646509Smrj 3647509Smrj /* 3648509Smrj * rootnex_maxxfer_window_boundary() 3649509Smrj * Called in bind slowpath when we get to a window boundary because we will 3650509Smrj * go over maxxfer. 3651509Smrj */ 3652509Smrj static int 3653509Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3654509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 3655509Smrj { 3656509Smrj size_t dmac_size; 3657509Smrj off_t new_offset; 3658509Smrj size_t trim_sz; 3659509Smrj off_t coffset; 3660509Smrj 3661509Smrj 3662509Smrj /* 3663509Smrj * calculate how much we have to trim off of the current cookie to equal 3664509Smrj * maxxfer. We don't have to account for granularity here since our 3665509Smrj * maxxfer already takes that into account. 3666509Smrj */ 3667509Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 3668509Smrj ASSERT(trim_sz <= cookie->dmac_size); 3669509Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 3670509Smrj 3671509Smrj /* save cookie size since we need it later and we might change it */ 3672509Smrj dmac_size = cookie->dmac_size; 3673509Smrj 3674509Smrj /* 3675509Smrj * if we're not trimming the entire cookie, setup the current window to 3676509Smrj * account for the trim. 3677509Smrj */ 3678509Smrj if (trim_sz < cookie->dmac_size) { 3679509Smrj (*windowp)->wd_cookie_cnt++; 3680509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3681509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3682509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3683509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3684509Smrj (*windowp)->wd_size = dma->dp_maxxfer; 3685509Smrj 3686509Smrj /* 3687509Smrj * set the adjusted cookie size now in case this is the first 3688509Smrj * window. All other windows are taken care of in get win 3689509Smrj */ 3690509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3691509Smrj } 3692509Smrj 3693509Smrj /* 3694509Smrj * coffset is the current offset within the cookie, new_offset is the 3695509Smrj * current offset with the entire buffer. 3696509Smrj */ 3697509Smrj coffset = dmac_size - trim_sz; 3698509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3699509Smrj 3700509Smrj /* initialize the next window */ 3701509Smrj (*windowp)++; 3702509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3703509Smrj (*windowp)->wd_cookie_cnt++; 3704509Smrj (*windowp)->wd_size = trim_sz; 3705509Smrj if (trim_sz < dmac_size) { 3706509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3707509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + 3708509Smrj coffset; 3709509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3710509Smrj } 3711509Smrj 3712509Smrj return (DDI_SUCCESS); 3713509Smrj } 3714509Smrj 3715509Smrj 3716509Smrj /* 3717509Smrj * rootnex_dma_sync() 3718509Smrj * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 3719509Smrj * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 3720509Smrj * is set, ddi_dma_sync() returns immediately passing back success. 3721509Smrj */ 3722509Smrj /*ARGSUSED*/ 3723509Smrj static int 3724509Smrj rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3725509Smrj off_t off, size_t len, uint_t cache_flags) 3726509Smrj { 3727509Smrj rootnex_sglinfo_t *sinfo; 3728509Smrj rootnex_pgmap_t *cbpage; 3729509Smrj rootnex_window_t *win; 3730509Smrj ddi_dma_impl_t *hp; 3731509Smrj rootnex_dma_t *dma; 3732509Smrj caddr_t fromaddr; 3733509Smrj caddr_t toaddr; 3734509Smrj uint_t psize; 3735509Smrj off_t offset; 3736509Smrj uint_t pidx; 3737509Smrj size_t size; 3738509Smrj off_t poff; 3739509Smrj int e; 3740509Smrj 3741509Smrj 3742509Smrj hp = (ddi_dma_impl_t *)handle; 3743509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3744509Smrj sinfo = &dma->dp_sglinfo; 3745509Smrj 3746509Smrj /* 3747509Smrj * if we don't have any windows, we don't need to sync. A copybuf 3748509Smrj * will cause us to have at least one window. 3749509Smrj */ 3750509Smrj if (dma->dp_window == NULL) { 3751509Smrj return (DDI_SUCCESS); 3752509Smrj } 3753509Smrj 3754509Smrj /* This window may not need to be sync'd */ 3755509Smrj win = &dma->dp_window[dma->dp_current_win]; 3756509Smrj if (!win->wd_dosync) { 3757509Smrj return (DDI_SUCCESS); 3758509Smrj } 3759509Smrj 3760509Smrj /* handle off and len special cases */ 3761509Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 3762509Smrj offset = win->wd_offset; 3763509Smrj } else { 3764509Smrj offset = off; 3765509Smrj } 3766509Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 3767509Smrj size = win->wd_size; 3768509Smrj } else { 3769509Smrj size = len; 3770509Smrj } 3771509Smrj 3772509Smrj /* check the sync args to make sure they make a little sense */ 3773509Smrj if (rootnex_sync_check_parms) { 3774509Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 3775509Smrj cache_flags); 3776509Smrj if (e != DDI_SUCCESS) { 3777509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 3778509Smrj return (DDI_FAILURE); 3779509Smrj } 3780509Smrj } 3781509Smrj 3782509Smrj /* 3783509Smrj * special case the first page to handle the offset into the page. The 3784509Smrj * offset to the current page for our buffer is the offset into the 3785509Smrj * first page of the buffer plus our current offset into the buffer 3786509Smrj * itself, masked of course. 3787509Smrj */ 3788509Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 3789509Smrj psize = MIN((MMU_PAGESIZE - poff), size); 3790509Smrj 3791509Smrj /* go through all the pages that we want to sync */ 3792509Smrj while (size > 0) { 3793509Smrj /* 3794509Smrj * Calculate the page index relative to the start of the buffer. 3795509Smrj * The index to the current page for our buffer is the offset 3796509Smrj * into the first page of the buffer plus our current offset 3797509Smrj * into the buffer itself, shifted of course... 3798509Smrj */ 3799509Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 3800509Smrj ASSERT(pidx < sinfo->si_max_pages); 3801509Smrj 3802509Smrj /* 3803509Smrj * if this page uses the copy buffer, we need to sync it, 3804509Smrj * otherwise, go on to the next page. 3805509Smrj */ 3806509Smrj cbpage = &dma->dp_pgmap[pidx]; 3807509Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 3808509Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 3809509Smrj if (cbpage->pm_uses_copybuf) { 3810509Smrj /* cbaddr and kaddr should be page aligned */ 3811509Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 3812509Smrj MMU_PAGEOFFSET) == 0); 3813509Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 3814509Smrj MMU_PAGEOFFSET) == 0); 3815509Smrj 3816509Smrj /* 3817509Smrj * if we're copying for the device, we are going to 3818509Smrj * copy from the drivers buffer and to the rootnex 3819509Smrj * allocated copy buffer. 3820509Smrj */ 3821509Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 3822509Smrj fromaddr = cbpage->pm_kaddr + poff; 3823509Smrj toaddr = cbpage->pm_cbaddr + poff; 3824509Smrj DTRACE_PROBE2(rootnex__sync__dev, 3825509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3826509Smrj 3827509Smrj /* 3828509Smrj * if we're copying for the cpu/kernel, we are going to 3829509Smrj * copy from the rootnex allocated copy buffer to the 3830509Smrj * drivers buffer. 3831509Smrj */ 3832509Smrj } else { 3833509Smrj fromaddr = cbpage->pm_cbaddr + poff; 3834509Smrj toaddr = cbpage->pm_kaddr + poff; 3835509Smrj DTRACE_PROBE2(rootnex__sync__cpu, 3836509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3837509Smrj } 3838509Smrj 3839509Smrj bcopy(fromaddr, toaddr, psize); 3840509Smrj } 3841509Smrj 3842509Smrj /* 3843509Smrj * decrement size until we're done, update our offset into the 3844509Smrj * buffer, and get the next page size. 3845509Smrj */ 3846509Smrj size -= psize; 3847509Smrj offset += psize; 3848509Smrj psize = MIN(MMU_PAGESIZE, size); 3849509Smrj 3850509Smrj /* page offset is zero for the rest of this loop */ 3851509Smrj poff = 0; 3852509Smrj } 3853509Smrj 3854509Smrj return (DDI_SUCCESS); 3855509Smrj } 3856509Smrj 3857509Smrj 3858509Smrj /* 3859509Smrj * rootnex_valid_sync_parms() 3860509Smrj * checks the parameters passed to sync to verify they are correct. 3861509Smrj */ 3862509Smrj static int 3863509Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 3864509Smrj off_t offset, size_t size, uint_t cache_flags) 3865509Smrj { 3866509Smrj off_t woffset; 3867509Smrj 3868509Smrj 3869509Smrj /* 3870509Smrj * the first part of the test to make sure the offset passed in is 3871509Smrj * within the window. 3872509Smrj */ 3873509Smrj if (offset < win->wd_offset) { 3874509Smrj return (DDI_FAILURE); 3875509Smrj } 3876509Smrj 3877509Smrj /* 3878509Smrj * second and last part of the test to make sure the offset and length 3879509Smrj * passed in is within the window. 3880509Smrj */ 3881509Smrj woffset = offset - win->wd_offset; 3882509Smrj if ((woffset + size) > win->wd_size) { 3883509Smrj return (DDI_FAILURE); 3884509Smrj } 3885509Smrj 3886509Smrj /* 3887509Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 3888509Smrj * be set too. 3889509Smrj */ 3890509Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 3891509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 3892509Smrj return (DDI_SUCCESS); 3893509Smrj } 3894509Smrj 3895509Smrj /* 3896509Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 3897509Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 3898509Smrj */ 3899509Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 3900509Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 3901509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 3902509Smrj return (DDI_SUCCESS); 3903509Smrj } 3904509Smrj 3905509Smrj return (DDI_FAILURE); 3906509Smrj } 3907509Smrj 3908509Smrj 3909509Smrj /* 3910509Smrj * rootnex_dma_win() 3911509Smrj * called from ddi_dma_getwin() 3912509Smrj */ 3913509Smrj /*ARGSUSED*/ 3914509Smrj static int 3915509Smrj rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3916509Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 3917509Smrj uint_t *ccountp) 3918509Smrj { 3919509Smrj rootnex_window_t *window; 3920509Smrj rootnex_trim_t *trim; 3921509Smrj ddi_dma_impl_t *hp; 3922509Smrj rootnex_dma_t *dma; 3923509Smrj #if !defined(__amd64) 3924509Smrj rootnex_sglinfo_t *sinfo; 3925509Smrj rootnex_pgmap_t *pmap; 3926509Smrj uint_t pidx; 3927509Smrj uint_t pcnt; 3928509Smrj off_t poff; 3929509Smrj int i; 3930509Smrj #endif 3931509Smrj 3932509Smrj 3933509Smrj hp = (ddi_dma_impl_t *)handle; 3934509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3935509Smrj #if !defined(__amd64) 3936509Smrj sinfo = &dma->dp_sglinfo; 3937509Smrj #endif 3938509Smrj 3939509Smrj /* If we try and get a window which doesn't exist, return failure */ 3940509Smrj if (win >= hp->dmai_nwin) { 3941509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3942509Smrj return (DDI_FAILURE); 3943509Smrj } 3944509Smrj 3945509Smrj /* 3946509Smrj * if we don't have any windows, and they're asking for the first 3947509Smrj * window, setup the cookie pointer to the first cookie in the bind. 3948509Smrj * setup our return values, then increment the cookie since we return 3949509Smrj * the first cookie on the stack. 3950509Smrj */ 3951509Smrj if (dma->dp_window == NULL) { 3952509Smrj if (win != 0) { 3953509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3954509Smrj return (DDI_FAILURE); 3955509Smrj } 3956509Smrj hp->dmai_cookie = dma->dp_cookies; 3957509Smrj *offp = 0; 3958509Smrj *lenp = dma->dp_dma.dmao_size; 3959509Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 3960509Smrj *cookiep = hp->dmai_cookie[0]; 3961509Smrj hp->dmai_cookie++; 3962509Smrj return (DDI_SUCCESS); 3963509Smrj } 3964509Smrj 3965509Smrj /* sync the old window before moving on to the new one */ 3966509Smrj window = &dma->dp_window[dma->dp_current_win]; 3967509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 3968509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 3969509Smrj DDI_DMA_SYNC_FORCPU); 3970509Smrj } 3971509Smrj 3972509Smrj #if !defined(__amd64) 3973509Smrj /* 3974509Smrj * before we move to the next window, if we need to re-map, unmap all 3975509Smrj * the pages in this window. 3976509Smrj */ 3977509Smrj if (dma->dp_cb_remaping) { 3978509Smrj /* 3979509Smrj * If we switch to this window again, we'll need to map in 3980509Smrj * on the fly next time. 3981509Smrj */ 3982509Smrj window->wd_remap_copybuf = B_TRUE; 3983509Smrj 3984509Smrj /* 3985509Smrj * calculate the page index into the buffer where this window 3986509Smrj * starts, and the number of pages this window takes up. 3987509Smrj */ 3988509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 3989509Smrj MMU_PAGESHIFT; 3990509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 3991509Smrj MMU_PAGEOFFSET; 3992509Smrj pcnt = mmu_btopr(window->wd_size + poff); 3993509Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 3994509Smrj 3995509Smrj /* unmap pages which are currently mapped in this window */ 3996509Smrj for (i = 0; i < pcnt; i++) { 3997509Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 3998509Smrj hat_unload(kas.a_hat, 3999509Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4000509Smrj HAT_UNLOAD); 4001509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4002509Smrj } 4003509Smrj pidx++; 4004509Smrj } 4005509Smrj } 4006509Smrj #endif 4007509Smrj 4008509Smrj /* 4009509Smrj * Move to the new window. 4010509Smrj * NOTE: current_win must be set for sync to work right 4011509Smrj */ 4012509Smrj dma->dp_current_win = win; 4013509Smrj window = &dma->dp_window[win]; 4014509Smrj 4015509Smrj /* if needed, adjust the first and/or last cookies for trim */ 4016509Smrj trim = &window->wd_trim; 4017509Smrj if (trim->tr_trim_first) { 4018509Smrj window->wd_first_cookie->_dmu._dmac_ll = trim->tr_first_paddr; 4019509Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 4020509Smrj #if !defined(__amd64) 4021509Smrj window->wd_first_cookie->dmac_type = 4022509Smrj (window->wd_first_cookie->dmac_type & 4023509Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 4024509Smrj #endif 4025509Smrj if (trim->tr_first_copybuf_win) { 4026509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4027509Smrj trim->tr_first_cbaddr; 4028509Smrj #if !defined(__amd64) 4029509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4030509Smrj trim->tr_first_kaddr; 4031509Smrj #endif 4032509Smrj } 4033509Smrj } 4034509Smrj if (trim->tr_trim_last) { 4035509Smrj trim->tr_last_cookie->_dmu._dmac_ll = trim->tr_last_paddr; 4036509Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4037509Smrj if (trim->tr_last_copybuf_win) { 4038509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4039509Smrj trim->tr_last_cbaddr; 4040509Smrj #if !defined(__amd64) 4041509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4042509Smrj trim->tr_last_kaddr; 4043509Smrj #endif 4044509Smrj } 4045509Smrj } 4046509Smrj 4047509Smrj /* 4048509Smrj * setup the cookie pointer to the first cookie in the window. setup 4049509Smrj * our return values, then increment the cookie since we return the 4050509Smrj * first cookie on the stack. 4051509Smrj */ 4052509Smrj hp->dmai_cookie = window->wd_first_cookie; 4053509Smrj *offp = window->wd_offset; 4054509Smrj *lenp = window->wd_size; 4055509Smrj *ccountp = window->wd_cookie_cnt; 4056509Smrj *cookiep = hp->dmai_cookie[0]; 4057509Smrj hp->dmai_cookie++; 4058509Smrj 4059509Smrj #if !defined(__amd64) 4060509Smrj /* re-map copybuf if required for this window */ 4061509Smrj if (dma->dp_cb_remaping) { 4062509Smrj /* 4063509Smrj * calculate the page index into the buffer where this 4064509Smrj * window starts. 4065509Smrj */ 4066509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4067509Smrj MMU_PAGESHIFT; 4068509Smrj ASSERT(pidx < sinfo->si_max_pages); 4069509Smrj 4070509Smrj /* 4071509Smrj * the first page can get unmapped if it's shared with the 4072509Smrj * previous window. Even if the rest of this window is already 4073509Smrj * mapped in, we need to still check this one. 4074509Smrj */ 4075509Smrj pmap = &dma->dp_pgmap[pidx]; 4076509Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4077509Smrj if (pmap->pm_pp != NULL) { 4078509Smrj pmap->pm_mapped = B_TRUE; 4079509Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4080509Smrj } else if (pmap->pm_vaddr != NULL) { 4081509Smrj pmap->pm_mapped = B_TRUE; 4082509Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4083509Smrj pmap->pm_kaddr); 4084509Smrj } 4085509Smrj } 4086509Smrj pidx++; 4087509Smrj 4088509Smrj /* map in the rest of the pages if required */ 4089509Smrj if (window->wd_remap_copybuf) { 4090509Smrj window->wd_remap_copybuf = B_FALSE; 4091509Smrj 4092509Smrj /* figure out many pages this window takes up */ 4093509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4094509Smrj MMU_PAGEOFFSET; 4095509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4096509Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4097509Smrj 4098509Smrj /* map pages which require it */ 4099509Smrj for (i = 1; i < pcnt; i++) { 4100509Smrj pmap = &dma->dp_pgmap[pidx]; 4101509Smrj if (pmap->pm_uses_copybuf) { 4102509Smrj ASSERT(pmap->pm_mapped == B_FALSE); 4103509Smrj if (pmap->pm_pp != NULL) { 4104509Smrj pmap->pm_mapped = B_TRUE; 4105509Smrj i86_pp_map(pmap->pm_pp, 4106509Smrj pmap->pm_kaddr); 4107509Smrj } else if (pmap->pm_vaddr != NULL) { 4108509Smrj pmap->pm_mapped = B_TRUE; 4109509Smrj i86_va_map(pmap->pm_vaddr, 4110509Smrj sinfo->si_asp, 4111509Smrj pmap->pm_kaddr); 4112509Smrj } 4113509Smrj } 4114509Smrj pidx++; 4115509Smrj } 4116509Smrj } 4117509Smrj } 4118509Smrj #endif 4119509Smrj 4120509Smrj /* if the new window uses the copy buffer, sync it for the device */ 4121509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4122509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4123509Smrj DDI_DMA_SYNC_FORDEV); 4124509Smrj } 4125509Smrj 4126509Smrj return (DDI_SUCCESS); 4127509Smrj } 4128509Smrj 4129509Smrj 4130509Smrj 4131509Smrj /* 4132509Smrj * ************************ 4133509Smrj * obsoleted dma routines 4134509Smrj * ************************ 4135509Smrj */ 4136509Smrj 4137509Smrj /* 4138509Smrj * rootnex_dma_map() 4139509Smrj * called from ddi_dma_setup() 4140509Smrj */ 4141509Smrj /* ARGSUSED */ 4142509Smrj static int 4143509Smrj rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, struct ddi_dma_req *dmareq, 4144509Smrj ddi_dma_handle_t *handlep) 4145509Smrj { 4146509Smrj #if defined(__amd64) 4147509Smrj /* 4148509Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 4149509Smrj * rootnex_dma_mctl() 4150509Smrj */ 4151509Smrj ASSERT(0); 4152509Smrj return (DDI_DMA_NORESOURCES); 4153509Smrj 4154509Smrj #else /* 32-bit x86 kernel */ 4155509Smrj ddi_dma_handle_t *lhandlep; 4156509Smrj ddi_dma_handle_t lhandle; 4157509Smrj ddi_dma_cookie_t cookie; 4158509Smrj ddi_dma_attr_t dma_attr; 4159509Smrj ddi_dma_lim_t *dma_lim; 4160509Smrj uint_t ccnt; 4161509Smrj int e; 4162509Smrj 4163509Smrj 4164509Smrj /* 4165509Smrj * if the driver is just testing to see if it's possible to do the bind, 4166509Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 4167509Smrj */ 4168509Smrj if (handlep == NULL) { 4169509Smrj lhandlep = &lhandle; 4170509Smrj } else { 4171509Smrj lhandlep = handlep; 4172509Smrj } 4173509Smrj 4174509Smrj /* convert the limit structure to a dma_attr one */ 4175509Smrj dma_lim = dmareq->dmar_limits; 4176509Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 4177509Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4178509Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4179509Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4180509Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4181509Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4182509Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4183509Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4184509Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4185509Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4186509Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 4187509Smrj dma_attr.dma_attr_flags = 0; 4188509Smrj 4189509Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4190509Smrj dmareq->dmar_arg, lhandlep); 4191509Smrj if (e != DDI_SUCCESS) { 4192509Smrj return (e); 4193509Smrj } 4194509Smrj 4195509Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4196509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4197509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4198509Smrj return (e); 4199509Smrj } 4200509Smrj 4201509Smrj /* 4202509Smrj * if the driver is just testing to see if it's possible to do the bind, 4203509Smrj * free up the local state and return the result. 4204509Smrj */ 4205509Smrj if (handlep == NULL) { 4206509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4207509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4208509Smrj if (e == DDI_DMA_MAPPED) { 4209509Smrj return (DDI_DMA_MAPOK); 42100Sstevel@tonic-gate } else { 4211509Smrj return (DDI_DMA_NOMAPPING); 4212509Smrj } 4213509Smrj } 4214509Smrj 4215509Smrj return (e); 4216509Smrj #endif /* defined(__amd64) */ 4217509Smrj } 4218509Smrj 4219509Smrj 4220509Smrj /* 4221509Smrj * rootnex_dma_mctl() 4222509Smrj * 4223509Smrj */ 4224509Smrj /* ARGSUSED */ 4225509Smrj static int 4226509Smrj rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4227509Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4228509Smrj uint_t cache_flags) 4229509Smrj { 4230509Smrj #if defined(__amd64) 4231509Smrj /* 4232509Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4233509Smrj * common implementation in genunix, so they no longer have x86 4234509Smrj * specific functionality which called into dma_ctl. 4235509Smrj * 4236509Smrj * The rest of the obsoleted interfaces were never supported in the 4237509Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4238509Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4239509Smrj * implementation issues. 4240509Smrj * 4241509Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4242509Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4243509Smrj * reflect that now too... 4244509Smrj * 4245509Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4246509Smrj * not going to put this functionality into the 64-bit x86 kernel now. 4247509Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 4248509Smrj * that in a future release. 4249509Smrj */ 4250509Smrj ASSERT(0); 4251509Smrj return (DDI_FAILURE); 4252509Smrj 4253509Smrj #else /* 32-bit x86 kernel */ 4254509Smrj ddi_dma_cookie_t lcookie; 4255509Smrj ddi_dma_cookie_t *cookie; 4256509Smrj rootnex_window_t *window; 4257509Smrj ddi_dma_impl_t *hp; 4258509Smrj rootnex_dma_t *dma; 4259509Smrj uint_t nwin; 4260509Smrj uint_t ccnt; 4261509Smrj size_t len; 4262509Smrj off_t off; 4263509Smrj int e; 4264509Smrj 4265509Smrj 4266509Smrj /* 4267509Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4268509Smrj * hacky since were optimizing for the current interfaces and so we can 4269509Smrj * cleanup the mess in genunix. Hopefully we will remove the this 4270509Smrj * obsoleted routines someday soon. 4271509Smrj */ 4272509Smrj 4273509Smrj switch (request) { 4274509Smrj 4275509Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4276509Smrj hp = (ddi_dma_impl_t *)handle; 4277509Smrj cookie = (ddi_dma_cookie_t *)objpp; 4278509Smrj 4279509Smrj /* 4280509Smrj * convert segment to cookie. We don't distinguish between the 4281509Smrj * two :-) 4282509Smrj */ 4283509Smrj *cookie = *hp->dmai_cookie; 4284509Smrj *lenp = cookie->dmac_size; 4285509Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4286509Smrj return (DDI_SUCCESS); 4287509Smrj 4288509Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4289509Smrj hp = (ddi_dma_impl_t *)handle; 4290509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4291509Smrj 4292509Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4293509Smrj return (DDI_DMA_STALE); 42940Sstevel@tonic-gate } 4295509Smrj 4296509Smrj /* handle the case where we don't have any windows */ 4297509Smrj if (dma->dp_window == NULL) { 4298509Smrj /* 4299509Smrj * if seg == NULL, and we don't have any windows, 4300509Smrj * return the first cookie in the sgl. 4301509Smrj */ 4302509Smrj if (*lenp == NULL) { 4303509Smrj dma->dp_current_cookie = 0; 4304509Smrj hp->dmai_cookie = dma->dp_cookies; 4305509Smrj *objpp = (caddr_t)handle; 4306509Smrj return (DDI_SUCCESS); 4307509Smrj 4308509Smrj /* if we have more cookies, go to the next cookie */ 4309509Smrj } else { 4310509Smrj if ((dma->dp_current_cookie + 1) >= 4311509Smrj dma->dp_sglinfo.si_sgl_size) { 4312509Smrj return (DDI_DMA_DONE); 4313509Smrj } 4314509Smrj dma->dp_current_cookie++; 4315509Smrj hp->dmai_cookie++; 4316509Smrj return (DDI_SUCCESS); 4317509Smrj } 4318509Smrj } 4319509Smrj 4320509Smrj /* We have one or more windows */ 4321509Smrj window = &dma->dp_window[dma->dp_current_win]; 4322509Smrj 4323509Smrj /* 4324509Smrj * if seg == NULL, return the first cookie in the current 4325509Smrj * window 4326509Smrj */ 4327509Smrj if (*lenp == NULL) { 4328509Smrj dma->dp_current_cookie = 0; 4329683Smrj hp->dmai_cookie = window->wd_first_cookie; 4330509Smrj 4331509Smrj /* 4332509Smrj * go to the next cookie in the window then see if we done with 4333509Smrj * this window. 4334509Smrj */ 4335509Smrj } else { 4336509Smrj if ((dma->dp_current_cookie + 1) >= 4337509Smrj window->wd_cookie_cnt) { 4338509Smrj return (DDI_DMA_DONE); 4339509Smrj } 4340509Smrj dma->dp_current_cookie++; 4341509Smrj hp->dmai_cookie++; 4342509Smrj } 4343509Smrj *objpp = (caddr_t)handle; 4344509Smrj return (DDI_SUCCESS); 4345509Smrj 4346509Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4347509Smrj hp = (ddi_dma_impl_t *)handle; 4348509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4349509Smrj 4350509Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4351509Smrj return (DDI_DMA_STALE); 4352509Smrj } 4353509Smrj 4354509Smrj /* if win == NULL, return the first window in the bind */ 4355509Smrj if (*offp == NULL) { 4356509Smrj nwin = 0; 4357509Smrj 4358509Smrj /* 4359509Smrj * else, go to the next window then see if we're done with all 4360509Smrj * the windows. 4361509Smrj */ 4362509Smrj } else { 4363509Smrj nwin = dma->dp_current_win + 1; 4364509Smrj if (nwin >= hp->dmai_nwin) { 4365509Smrj return (DDI_DMA_DONE); 4366509Smrj } 4367509Smrj } 4368509Smrj 4369509Smrj /* switch to the next window */ 4370509Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4371509Smrj &lcookie, &ccnt); 4372509Smrj ASSERT(e == DDI_SUCCESS); 4373509Smrj if (e != DDI_SUCCESS) { 4374509Smrj return (DDI_DMA_STALE); 4375509Smrj } 4376509Smrj 4377509Smrj /* reset the cookie back to the first cookie in the window */ 4378509Smrj if (dma->dp_window != NULL) { 4379509Smrj window = &dma->dp_window[dma->dp_current_win]; 4380509Smrj hp->dmai_cookie = window->wd_first_cookie; 4381509Smrj } else { 4382509Smrj hp->dmai_cookie = dma->dp_cookies; 4383509Smrj } 4384509Smrj 4385509Smrj *objpp = (caddr_t)handle; 4386509Smrj return (DDI_SUCCESS); 4387509Smrj 4388509Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 4389509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4390509Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 4391509Smrj if (rootnex_state->r_dvma_call_list_id) { 4392509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4393509Smrj } 4394509Smrj return (DDI_SUCCESS); 4395509Smrj 4396509Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4397509Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4398509Smrj /* should never get here, handled in genunix */ 4399509Smrj ASSERT(0); 4400509Smrj return (DDI_FAILURE); 4401509Smrj 4402509Smrj case DDI_DMA_KVADDR: 4403509Smrj case DDI_DMA_GETERR: 4404509Smrj case DDI_DMA_COFF: 4405509Smrj return (DDI_FAILURE); 44060Sstevel@tonic-gate } 4407509Smrj 4408509Smrj return (DDI_FAILURE); 4409509Smrj #endif /* defined(__amd64) */ 44100Sstevel@tonic-gate } 4411