10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 50Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 60Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 70Sstevel@tonic-gate * with the License. 80Sstevel@tonic-gate * 90Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 100Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 110Sstevel@tonic-gate * See the License for the specific language governing permissions 120Sstevel@tonic-gate * and limitations under the License. 130Sstevel@tonic-gate * 140Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 150Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 160Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 170Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 180Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 190Sstevel@tonic-gate * 200Sstevel@tonic-gate * CDDL HEADER END 210Sstevel@tonic-gate */ 220Sstevel@tonic-gate /* 230Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 280Sstevel@tonic-gate 290Sstevel@tonic-gate /* 30509Smrj * x86 root nexus driver 310Sstevel@tonic-gate */ 320Sstevel@tonic-gate 330Sstevel@tonic-gate #include <sys/sysmacros.h> 340Sstevel@tonic-gate #include <sys/conf.h> 350Sstevel@tonic-gate #include <sys/autoconf.h> 360Sstevel@tonic-gate #include <sys/sysmacros.h> 370Sstevel@tonic-gate #include <sys/debug.h> 380Sstevel@tonic-gate #include <sys/psw.h> 390Sstevel@tonic-gate #include <sys/ddidmareq.h> 400Sstevel@tonic-gate #include <sys/promif.h> 410Sstevel@tonic-gate #include <sys/devops.h> 420Sstevel@tonic-gate #include <sys/kmem.h> 430Sstevel@tonic-gate #include <sys/cmn_err.h> 440Sstevel@tonic-gate #include <vm/seg.h> 450Sstevel@tonic-gate #include <vm/seg_kmem.h> 460Sstevel@tonic-gate #include <vm/seg_dev.h> 470Sstevel@tonic-gate #include <sys/vmem.h> 480Sstevel@tonic-gate #include <sys/mman.h> 490Sstevel@tonic-gate #include <vm/hat.h> 500Sstevel@tonic-gate #include <vm/as.h> 510Sstevel@tonic-gate #include <vm/page.h> 520Sstevel@tonic-gate #include <sys/avintr.h> 530Sstevel@tonic-gate #include <sys/errno.h> 540Sstevel@tonic-gate #include <sys/modctl.h> 550Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 560Sstevel@tonic-gate #include <sys/sunddi.h> 570Sstevel@tonic-gate #include <sys/sunndi.h> 580Sstevel@tonic-gate #include <sys/psm.h> 590Sstevel@tonic-gate #include <sys/ontrap.h> 60509Smrj #include <sys/atomic.h> 61509Smrj #include <sys/sdt.h> 62509Smrj #include <sys/rootnex.h> 63509Smrj #include <vm/hat_i86.h> 64509Smrj 65509Smrj 66509Smrj /* 67509Smrj * enable/disable extra checking of function parameters. Useful for debugging 68509Smrj * drivers. 69509Smrj */ 70509Smrj #ifdef DEBUG 71509Smrj int rootnex_alloc_check_parms = 1; 72509Smrj int rootnex_bind_check_parms = 1; 73509Smrj int rootnex_bind_check_inuse = 1; 74509Smrj int rootnex_unbind_verify_buffer = 0; 75509Smrj int rootnex_sync_check_parms = 1; 76509Smrj #else 77509Smrj int rootnex_alloc_check_parms = 0; 78509Smrj int rootnex_bind_check_parms = 0; 79509Smrj int rootnex_bind_check_inuse = 0; 80509Smrj int rootnex_unbind_verify_buffer = 0; 81509Smrj int rootnex_sync_check_parms = 0; 82509Smrj #endif 83509Smrj 84509Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 850Sstevel@tonic-gate int rootnex_bind_fail = 1; 860Sstevel@tonic-gate int rootnex_bind_warn = 1; 870Sstevel@tonic-gate uint8_t *rootnex_warn_list; 880Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 890Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 900Sstevel@tonic-gate 910Sstevel@tonic-gate /* 92509Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 93509Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 94509Smrj * the offset and size into ddi_dma_sync(). 950Sstevel@tonic-gate */ 96509Smrj int rootnex_sync_ignore_params = 0; 970Sstevel@tonic-gate 980Sstevel@tonic-gate /* 99509Smrj * maximum size that we will allow for a copy buffer. Can be patched on the 100509Smrj * fly 1010Sstevel@tonic-gate */ 102509Smrj size_t rootnex_max_copybuf_size = 0x100000; 1030Sstevel@tonic-gate 1040Sstevel@tonic-gate /* 105509Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 106509Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 107509Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 108509Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 109509Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 110509Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 111509Smrj * (if we need one). These can only be modified in /etc/system before rootnex 112509Smrj * attach. 1130Sstevel@tonic-gate */ 114509Smrj #if defined(__amd64) 115509Smrj int rootnex_prealloc_cookies = 65; 116509Smrj int rootnex_prealloc_windows = 4; 117509Smrj int rootnex_prealloc_copybuf = 2; 118509Smrj #else 119509Smrj int rootnex_prealloc_cookies = 33; 120509Smrj int rootnex_prealloc_windows = 4; 121509Smrj int rootnex_prealloc_copybuf = 2; 122509Smrj #endif 123509Smrj 124509Smrj /* driver global state */ 125509Smrj static rootnex_state_t *rootnex_state; 126509Smrj 127509Smrj /* shortcut to rootnex counters */ 128509Smrj static uint64_t *rootnex_cnt; 1290Sstevel@tonic-gate 1300Sstevel@tonic-gate /* 131509Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1320Sstevel@tonic-gate */ 133509Smrj /* statically defined integer/boolean properties for the root node */ 134509Smrj static rootnex_intprop_t rootnex_intprp[] = { 135509Smrj { "PAGESIZE", PAGESIZE }, 136509Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 137509Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 138509Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 139509Smrj }; 140509Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 141509Smrj 142509Smrj 143509Smrj static struct cb_ops rootnex_cb_ops = { 144509Smrj nodev, /* open */ 145509Smrj nodev, /* close */ 146509Smrj nodev, /* strategy */ 147509Smrj nodev, /* print */ 148509Smrj nodev, /* dump */ 149509Smrj nodev, /* read */ 150509Smrj nodev, /* write */ 151509Smrj nodev, /* ioctl */ 152509Smrj nodev, /* devmap */ 153509Smrj nodev, /* mmap */ 154509Smrj nodev, /* segmap */ 155509Smrj nochpoll, /* chpoll */ 156509Smrj ddi_prop_op, /* cb_prop_op */ 157509Smrj NULL, /* struct streamtab */ 158509Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 159509Smrj CB_REV, /* Rev */ 160509Smrj nodev, /* cb_aread */ 161509Smrj nodev /* cb_awrite */ 162509Smrj }; 163509Smrj 164509Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1650Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 166509Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1670Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1680Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 169509Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1700Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 171509Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 172509Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 173509Smrj ddi_dma_handle_t *handlep); 174509Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 175509Smrj ddi_dma_handle_t handle); 176509Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 177509Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 178509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 179509Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 180509Smrj ddi_dma_handle_t handle); 181509Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 182509Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 183509Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 184509Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 185509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 186509Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 1870Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 1880Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 189509Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 190509Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 191509Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 192509Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 193509Smrj 1940Sstevel@tonic-gate 1950Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 1960Sstevel@tonic-gate BUSO_REV, 1970Sstevel@tonic-gate rootnex_map, 1980Sstevel@tonic-gate NULL, 1990Sstevel@tonic-gate NULL, 2000Sstevel@tonic-gate NULL, 2010Sstevel@tonic-gate rootnex_map_fault, 2020Sstevel@tonic-gate rootnex_dma_map, 2030Sstevel@tonic-gate rootnex_dma_allochdl, 2040Sstevel@tonic-gate rootnex_dma_freehdl, 2050Sstevel@tonic-gate rootnex_dma_bindhdl, 2060Sstevel@tonic-gate rootnex_dma_unbindhdl, 207509Smrj rootnex_dma_sync, 2080Sstevel@tonic-gate rootnex_dma_win, 2090Sstevel@tonic-gate rootnex_dma_mctl, 2100Sstevel@tonic-gate rootnex_ctlops, 2110Sstevel@tonic-gate ddi_bus_prop_op, 2120Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2130Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2140Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2150Sstevel@tonic-gate i_ddi_rootnex_post_event, 2160Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2170Sstevel@tonic-gate 0, /* bus_config */ 2180Sstevel@tonic-gate 0, /* bus_unconfig */ 2190Sstevel@tonic-gate NULL, /* bus_fm_init */ 2200Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2210Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2220Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2230Sstevel@tonic-gate NULL, /* bus_powr */ 2240Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2250Sstevel@tonic-gate }; 2260Sstevel@tonic-gate 227509Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 228509Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 2290Sstevel@tonic-gate 2300Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2310Sstevel@tonic-gate DEVO_REV, 232509Smrj 0, 233509Smrj ddi_no_info, 234509Smrj nulldev, 2350Sstevel@tonic-gate nulldev, 2360Sstevel@tonic-gate rootnex_attach, 237509Smrj rootnex_detach, 238509Smrj nulldev, 239509Smrj &rootnex_cb_ops, 2400Sstevel@tonic-gate &rootnex_bus_ops 2410Sstevel@tonic-gate }; 2420Sstevel@tonic-gate 243509Smrj static struct modldrv rootnex_modldrv = { 244509Smrj &mod_driverops, 245509Smrj "i86pc root nexus %I%", 246509Smrj &rootnex_ops 247509Smrj }; 248509Smrj 249509Smrj static struct modlinkage rootnex_modlinkage = { 250509Smrj MODREV_1, 251509Smrj (void *)&rootnex_modldrv, 252509Smrj NULL 253509Smrj }; 254509Smrj 255509Smrj 256509Smrj /* 257509Smrj * extern hacks 258509Smrj */ 259509Smrj extern struct seg_ops segdev_ops; 260509Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 261509Smrj #ifdef DDI_MAP_DEBUG 262509Smrj extern int ddi_map_debug_flag; 263509Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 264509Smrj #endif 265509Smrj #define ptob64(x) (((uint64_t)(x)) << MMU_PAGESHIFT) 266509Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 267509Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 268509Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 269509Smrj psm_intr_op_t, int *); 270509Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 271509Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 272509Smrj /* 273509Smrj * Use device arena to use for device control register mappings. 274509Smrj * Various kernel memory walkers (debugger, dtrace) need to know 275509Smrj * to avoid this address range to prevent undesired device activity. 276509Smrj */ 277509Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 278509Smrj extern void device_arena_free(void * vaddr, size_t size); 279509Smrj 280509Smrj 2810Sstevel@tonic-gate /* 282509Smrj * Internal functions 2830Sstevel@tonic-gate */ 284509Smrj static int rootnex_dma_init(); 285509Smrj static void rootnex_add_props(dev_info_t *); 286509Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 287509Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 288509Smrj static int rootnex_xlate_intrs(dev_info_t *dip, dev_info_t *rdip, int *in, 289509Smrj struct ddi_parent_private_data *pdptr); 290509Smrj static int rootnex_ctlops_poke(peekpoke_ctlops_t *in_args); 291509Smrj static int rootnex_ctlops_peek(peekpoke_ctlops_t *in_args, void *result); 292509Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 293509Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 294509Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 295509Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 296509Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 297509Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 298509Smrj ddi_dma_attr_t *attr); 299509Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 300509Smrj rootnex_sglinfo_t *sglinfo); 301509Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 302509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 303509Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 304509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 305509Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 306509Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 307509Smrj ddi_dma_attr_t *attr, int kmflag); 308509Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 309509Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 310509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 311509Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 312509Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 313509Smrj size_t *copybuf_used, page_t **cur_pp); 314509Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 315509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 316509Smrj ddi_dma_attr_t *attr, off_t cur_offset); 317509Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 318509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 319509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 320509Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 321509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 322509Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 323509Smrj off_t offset, size_t size, uint_t cache_flags); 324509Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 325509Smrj 326509Smrj 327509Smrj /* 328509Smrj * _init() 329509Smrj * 330509Smrj */ 3310Sstevel@tonic-gate int 3320Sstevel@tonic-gate _init(void) 3330Sstevel@tonic-gate { 334509Smrj 335509Smrj rootnex_state = NULL; 336509Smrj return (mod_install(&rootnex_modlinkage)); 3370Sstevel@tonic-gate } 3380Sstevel@tonic-gate 339509Smrj 340509Smrj /* 341509Smrj * _info() 342509Smrj * 343509Smrj */ 344509Smrj int 345509Smrj _info(struct modinfo *modinfop) 346509Smrj { 347509Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 348509Smrj } 349509Smrj 350509Smrj 351509Smrj /* 352509Smrj * _fini() 353509Smrj * 354509Smrj */ 3550Sstevel@tonic-gate int 3560Sstevel@tonic-gate _fini(void) 3570Sstevel@tonic-gate { 3580Sstevel@tonic-gate return (EBUSY); 3590Sstevel@tonic-gate } 3600Sstevel@tonic-gate 3610Sstevel@tonic-gate 3620Sstevel@tonic-gate /* 363509Smrj * rootnex_attach() 3640Sstevel@tonic-gate * 3650Sstevel@tonic-gate */ 366509Smrj static int 367509Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 368509Smrj { 369509Smrj int e; 370509Smrj 371509Smrj 372509Smrj switch (cmd) { 373509Smrj case DDI_ATTACH: 374509Smrj break; 375509Smrj case DDI_RESUME: 376509Smrj return (DDI_SUCCESS); 377509Smrj default: 378509Smrj return (DDI_FAILURE); 379509Smrj } 380509Smrj 381509Smrj /* 382509Smrj * We should only have one instance of rootnex. Save it away since we 383509Smrj * don't have an easy way to get it back later. 384509Smrj */ 385509Smrj ASSERT(rootnex_state == NULL); 386509Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 387509Smrj 388509Smrj rootnex_state->r_dip = dip; 389509Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 390509Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 391509Smrj 392509Smrj mutex_init(&rootnex_state->r_peekpoke_mutex, NULL, MUTEX_SPIN, 393509Smrj (void *)ipltospl(15)); 394509Smrj 395509Smrj /* initialize DMA related state */ 396509Smrj e = rootnex_dma_init(); 397509Smrj if (e != DDI_SUCCESS) { 398509Smrj mutex_destroy(&rootnex_state->r_peekpoke_mutex); 399509Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 400509Smrj return (DDI_FAILURE); 401509Smrj } 402509Smrj 403509Smrj /* Add static root node properties */ 404509Smrj rootnex_add_props(dip); 405509Smrj 406509Smrj /* since we can't call ddi_report_dev() */ 407509Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 408509Smrj 409509Smrj /* Initialize rootnex event handle */ 410509Smrj i_ddi_rootnex_init_events(dip); 411509Smrj 412509Smrj return (DDI_SUCCESS); 413509Smrj } 414509Smrj 415509Smrj 416509Smrj /* 417509Smrj * rootnex_detach() 418509Smrj * 419509Smrj */ 4200Sstevel@tonic-gate /*ARGSUSED*/ 4210Sstevel@tonic-gate static int 422509Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 423509Smrj { 424509Smrj switch (cmd) { 425509Smrj case DDI_SUSPEND: 426509Smrj break; 427509Smrj default: 428509Smrj return (DDI_FAILURE); 429509Smrj } 430509Smrj 431509Smrj return (DDI_SUCCESS); 432509Smrj } 433509Smrj 434509Smrj 435509Smrj /* 436509Smrj * rootnex_dma_init() 437509Smrj * 438509Smrj */ 439509Smrj /*ARGSUSED*/ 440509Smrj static int 441509Smrj rootnex_dma_init() 4420Sstevel@tonic-gate { 443509Smrj size_t bufsize; 444509Smrj 445509Smrj 446509Smrj /* 447509Smrj * size of our cookie/window/copybuf state needed in dma bind that we 448509Smrj * pre-alloc in dma_alloc_handle 449509Smrj */ 450509Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 451509Smrj rootnex_state->r_prealloc_size = 452509Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 453509Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 454509Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 455509Smrj 456509Smrj /* 457509Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 458509Smrj * allocate 16 extra bytes for struct pointer alignment 459509Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 460509Smrj */ 461509Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 462509Smrj rootnex_state->r_prealloc_size + 0x10; 463509Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 464509Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 465509Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 466509Smrj return (DDI_FAILURE); 467509Smrj } 4680Sstevel@tonic-gate 4690Sstevel@tonic-gate /* 4700Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 4710Sstevel@tonic-gate * for. 4720Sstevel@tonic-gate */ 4730Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 4740Sstevel@tonic-gate KM_SLEEP); 4750Sstevel@tonic-gate 4760Sstevel@tonic-gate return (DDI_SUCCESS); 4770Sstevel@tonic-gate } 4780Sstevel@tonic-gate 4790Sstevel@tonic-gate 4800Sstevel@tonic-gate /* 481509Smrj * rootnex_add_props() 482509Smrj * 4830Sstevel@tonic-gate */ 4840Sstevel@tonic-gate static void 485509Smrj rootnex_add_props(dev_info_t *dip) 4860Sstevel@tonic-gate { 487509Smrj rootnex_intprop_t *rpp; 4880Sstevel@tonic-gate int i; 489509Smrj 490509Smrj /* Add static integer/boolean properties to the root node */ 491509Smrj rpp = rootnex_intprp; 492509Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 493509Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 494509Smrj rpp[i].prop_name, rpp[i].prop_value); 4950Sstevel@tonic-gate } 4960Sstevel@tonic-gate } 4970Sstevel@tonic-gate 498509Smrj 499509Smrj 500509Smrj /* 501509Smrj * ************************* 502509Smrj * ctlops related routines 503509Smrj * ************************* 504509Smrj */ 505509Smrj 5060Sstevel@tonic-gate /* 507509Smrj * rootnex_ctlops() 508509Smrj * 5090Sstevel@tonic-gate */ 510509Smrj static int 511509Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 512509Smrj void *arg, void *result) 513509Smrj { 514509Smrj int n, *ptr; 515509Smrj struct ddi_parent_private_data *pdp; 516509Smrj 517509Smrj 518509Smrj switch (ctlop) { 519509Smrj case DDI_CTLOPS_DMAPMAPC: 520509Smrj /* 521509Smrj * Return 'partial' to indicate that dma mapping 522509Smrj * has to be done in the main MMU. 523509Smrj */ 524509Smrj return (DDI_DMA_PARTIAL); 525509Smrj 526509Smrj case DDI_CTLOPS_BTOP: 527509Smrj /* 528509Smrj * Convert byte count input to physical page units. 529509Smrj * (byte counts that are not a page-size multiple 530509Smrj * are rounded down) 531509Smrj */ 532509Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 533509Smrj return (DDI_SUCCESS); 534509Smrj 535509Smrj case DDI_CTLOPS_PTOB: 536509Smrj /* 537509Smrj * Convert size in physical pages to bytes 538509Smrj */ 539509Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 540509Smrj return (DDI_SUCCESS); 541509Smrj 542509Smrj case DDI_CTLOPS_BTOPR: 543509Smrj /* 544509Smrj * Convert byte count input to physical page units 545509Smrj * (byte counts that are not a page-size multiple 546509Smrj * are rounded up) 547509Smrj */ 548509Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 549509Smrj return (DDI_SUCCESS); 550509Smrj 551509Smrj case DDI_CTLOPS_POKE: 552509Smrj return (rootnex_ctlops_poke((peekpoke_ctlops_t *)arg)); 553509Smrj 554509Smrj case DDI_CTLOPS_PEEK: 555509Smrj return (rootnex_ctlops_peek((peekpoke_ctlops_t *)arg, result)); 556509Smrj 557509Smrj case DDI_CTLOPS_INITCHILD: 558509Smrj return (impl_ddi_sunbus_initchild(arg)); 559509Smrj 560509Smrj case DDI_CTLOPS_UNINITCHILD: 561509Smrj impl_ddi_sunbus_removechild(arg); 562509Smrj return (DDI_SUCCESS); 563509Smrj 564509Smrj case DDI_CTLOPS_REPORTDEV: 565509Smrj return (rootnex_ctl_reportdev(rdip)); 566509Smrj 567509Smrj case DDI_CTLOPS_IOMIN: 568509Smrj /* 569509Smrj * Nothing to do here but reflect back.. 570509Smrj */ 571509Smrj return (DDI_SUCCESS); 572509Smrj 573509Smrj case DDI_CTLOPS_REGSIZE: 574509Smrj case DDI_CTLOPS_NREGS: 575509Smrj case DDI_CTLOPS_NINTRS: 576509Smrj break; 577509Smrj 578509Smrj case DDI_CTLOPS_SIDDEV: 579509Smrj if (ndi_dev_is_prom_node(rdip)) 580509Smrj return (DDI_SUCCESS); 581509Smrj if (ndi_dev_is_persistent_node(rdip)) 582509Smrj return (DDI_SUCCESS); 583509Smrj return (DDI_FAILURE); 584509Smrj 585509Smrj case DDI_CTLOPS_INTR_HILEVEL: 586509Smrj /* 587509Smrj * Indicate whether the interrupt specified is to be handled 588509Smrj * above lock level. In other words, above the level that 589509Smrj * cv_signal and default type mutexes can be used. 590509Smrj */ 591509Smrj *(int *)result = 592509Smrj (INT_IPL(((struct intrspec *)arg)->intrspec_pri) 593509Smrj > LOCK_LEVEL); 594509Smrj return (DDI_SUCCESS); 595509Smrj 596509Smrj case DDI_CTLOPS_XLATE_INTRS: 597509Smrj return (rootnex_xlate_intrs(dip, rdip, arg, result)); 598509Smrj 599509Smrj case DDI_CTLOPS_POWER: 600509Smrj return ((*pm_platform_power)((power_req_t *)arg)); 601509Smrj 602509Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 603509Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 604509Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 605509Smrj if (!rootnex_state->r_reserved_msg_printed) { 606509Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 607509Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 608509Smrj "1 or more reserved/obsolete operations."); 609509Smrj } 610509Smrj return (DDI_FAILURE); 611509Smrj 612509Smrj default: 613509Smrj return (DDI_FAILURE); 614509Smrj } 615509Smrj /* 616509Smrj * The rest are for "hardware" properties 617509Smrj */ 618509Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 619509Smrj return (DDI_FAILURE); 620509Smrj 621509Smrj if (ctlop == DDI_CTLOPS_NREGS) { 622509Smrj ptr = (int *)result; 623509Smrj *ptr = pdp->par_nreg; 624509Smrj } else if (ctlop == DDI_CTLOPS_NINTRS) { 625509Smrj ptr = (int *)result; 626509Smrj *ptr = pdp->par_nintr; 627509Smrj } else { 628509Smrj off_t *size = (off_t *)result; 629509Smrj 630509Smrj ptr = (int *)arg; 631509Smrj n = *ptr; 632509Smrj if (n >= pdp->par_nreg) { 633509Smrj return (DDI_FAILURE); 634509Smrj } 635509Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 636509Smrj } 637509Smrj return (DDI_SUCCESS); 638509Smrj } 6390Sstevel@tonic-gate 6400Sstevel@tonic-gate 6410Sstevel@tonic-gate /* 642509Smrj * rootnex_ctl_reportdev() 643509Smrj * 6440Sstevel@tonic-gate */ 6450Sstevel@tonic-gate static int 646509Smrj rootnex_ctl_reportdev(dev_info_t *dev) 6470Sstevel@tonic-gate { 648509Smrj int i, n, len, f_len = 0; 649509Smrj char *buf; 650509Smrj 651509Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 652509Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 653509Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 654509Smrj len = strlen(buf); 655509Smrj 656509Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 657509Smrj 658509Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 659509Smrj 660509Smrj if (i == 0) 661509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 662509Smrj ": "); 663509Smrj else 664509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 665509Smrj " and "); 666509Smrj len = strlen(buf); 667509Smrj 668509Smrj switch (rp->regspec_bustype) { 669509Smrj 670509Smrj case BTEISA: 671509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 672509Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 6730Sstevel@tonic-gate break; 674509Smrj 675509Smrj case BTISA: 676509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 677509Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 6780Sstevel@tonic-gate break; 679509Smrj 680509Smrj default: 681509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 682509Smrj "space %x offset %x", 683509Smrj rp->regspec_bustype, rp->regspec_addr); 6840Sstevel@tonic-gate break; 6850Sstevel@tonic-gate } 686509Smrj len = strlen(buf); 6870Sstevel@tonic-gate } 688509Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 689509Smrj int pri; 690509Smrj 691509Smrj if (i != 0) { 692509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 693509Smrj ","); 694509Smrj len = strlen(buf); 695509Smrj } 696509Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 697509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 698509Smrj " sparc ipl %d", pri); 699509Smrj len = strlen(buf); 7000Sstevel@tonic-gate } 701509Smrj #ifdef DEBUG 702509Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 703509Smrj cmn_err(CE_NOTE, "next message is truncated: " 704509Smrj "printed length 1024, real length %d", f_len); 705509Smrj } 706509Smrj #endif /* DEBUG */ 707509Smrj cmn_err(CE_CONT, "?%s\n", buf); 708509Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 7090Sstevel@tonic-gate return (DDI_SUCCESS); 7100Sstevel@tonic-gate } 7110Sstevel@tonic-gate 712509Smrj 713509Smrj /* 714509Smrj * rootnex_ctlops_poke() 715509Smrj * 716509Smrj */ 7170Sstevel@tonic-gate static int 718509Smrj rootnex_ctlops_poke(peekpoke_ctlops_t *in_args) 7190Sstevel@tonic-gate { 720509Smrj int err = DDI_SUCCESS; 721509Smrj on_trap_data_t otd; 722509Smrj 723509Smrj /* Cautious access not supported. */ 724509Smrj if (in_args->handle != NULL) 7250Sstevel@tonic-gate return (DDI_FAILURE); 726509Smrj 727509Smrj mutex_enter(&rootnex_state->r_peekpoke_mutex); 728509Smrj 729509Smrj /* Set up protected environment. */ 730509Smrj if (!on_trap(&otd, OT_DATA_ACCESS)) { 731509Smrj switch (in_args->size) { 732509Smrj case sizeof (uint8_t): 733509Smrj *(uint8_t *)in_args->dev_addr = *(uint8_t *) 734509Smrj in_args->host_addr; 735509Smrj break; 736509Smrj 737509Smrj case sizeof (uint16_t): 738509Smrj *(uint16_t *)in_args->dev_addr = 739509Smrj *(uint16_t *)in_args->host_addr; 740509Smrj break; 741509Smrj 742509Smrj case sizeof (uint32_t): 743509Smrj *(uint32_t *)in_args->dev_addr = 744509Smrj *(uint32_t *)in_args->host_addr; 745509Smrj break; 746509Smrj 747509Smrj case sizeof (uint64_t): 748509Smrj *(uint64_t *)in_args->dev_addr = 749509Smrj *(uint64_t *)in_args->host_addr; 750509Smrj break; 751509Smrj 752509Smrj default: 753509Smrj err = DDI_FAILURE; 754509Smrj break; 755509Smrj } 756509Smrj } else 757509Smrj err = DDI_FAILURE; 758509Smrj 759509Smrj /* Take down protected environment. */ 760509Smrj no_trap(); 761509Smrj mutex_exit(&rootnex_state->r_peekpoke_mutex); 762509Smrj 763509Smrj return (err); 764509Smrj } 765509Smrj 766509Smrj 767509Smrj /* 768509Smrj * rootnex_ctlops_peek() 769509Smrj * 770509Smrj */ 771509Smrj static int 772509Smrj rootnex_ctlops_peek(peekpoke_ctlops_t *in_args, void *result) 773509Smrj { 774509Smrj int err = DDI_SUCCESS; 775509Smrj on_trap_data_t otd; 776509Smrj 777509Smrj /* Cautious access not supported. */ 778509Smrj if (in_args->handle != NULL) 7790Sstevel@tonic-gate return (DDI_FAILURE); 780509Smrj 781509Smrj mutex_enter(&rootnex_state->r_peekpoke_mutex); 782509Smrj 783509Smrj if (!on_trap(&otd, OT_DATA_ACCESS)) { 784509Smrj switch (in_args->size) { 785509Smrj case sizeof (uint8_t): 786509Smrj *(uint8_t *)in_args->host_addr = 787509Smrj *(uint8_t *)in_args->dev_addr; 788509Smrj break; 789509Smrj 790509Smrj case sizeof (uint16_t): 791509Smrj *(uint16_t *)in_args->host_addr = 792509Smrj *(uint16_t *)in_args->dev_addr; 793509Smrj break; 794509Smrj 795509Smrj case sizeof (uint32_t): 796509Smrj *(uint32_t *)in_args->host_addr = 797509Smrj *(uint32_t *)in_args->dev_addr; 798509Smrj break; 799509Smrj 800509Smrj case sizeof (uint64_t): 801509Smrj *(uint64_t *)in_args->host_addr = 802509Smrj *(uint64_t *)in_args->dev_addr; 803509Smrj break; 804509Smrj 805509Smrj default: 806509Smrj err = DDI_FAILURE; 807509Smrj break; 808509Smrj } 809509Smrj result = (void *)in_args->host_addr; 810509Smrj } else 811509Smrj err = DDI_FAILURE; 812509Smrj 813509Smrj no_trap(); 814509Smrj mutex_exit(&rootnex_state->r_peekpoke_mutex); 815509Smrj 816509Smrj return (err); 8170Sstevel@tonic-gate } 8180Sstevel@tonic-gate 819509Smrj 820509Smrj 821509Smrj /* 822509Smrj * ****************** 823509Smrj * map related code 824509Smrj * ****************** 825509Smrj */ 826509Smrj 827509Smrj /* 828509Smrj * rootnex_map() 829509Smrj * 830509Smrj */ 8310Sstevel@tonic-gate static int 832509Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 833509Smrj off_t len, caddr_t *vaddrp) 8340Sstevel@tonic-gate { 8350Sstevel@tonic-gate struct regspec *rp, tmp_reg; 8360Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 8370Sstevel@tonic-gate int error; 8380Sstevel@tonic-gate 8390Sstevel@tonic-gate mp = &mr; 8400Sstevel@tonic-gate 8410Sstevel@tonic-gate switch (mp->map_op) { 8420Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8430Sstevel@tonic-gate case DDI_MO_UNMAP: 8440Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8450Sstevel@tonic-gate break; 8460Sstevel@tonic-gate default: 8470Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8480Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 8490Sstevel@tonic-gate mp->map_op); 8500Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8510Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8520Sstevel@tonic-gate } 8530Sstevel@tonic-gate 8540Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 8550Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8560Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 8570Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8580Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8590Sstevel@tonic-gate } 8600Sstevel@tonic-gate 8610Sstevel@tonic-gate /* 8620Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 8630Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 8640Sstevel@tonic-gate */ 8650Sstevel@tonic-gate 8660Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 8670Sstevel@tonic-gate 8680Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 8690Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8700Sstevel@tonic-gate static char *out_of_range = 8710Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 8720Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8730Sstevel@tonic-gate 8740Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 8750Sstevel@tonic-gate if (rp == NULL) { 8760Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8770Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 8780Sstevel@tonic-gate ddi_get_name(rdip)); 8790Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8800Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 8810Sstevel@tonic-gate } 8820Sstevel@tonic-gate 8830Sstevel@tonic-gate /* 8840Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 8850Sstevel@tonic-gate */ 8860Sstevel@tonic-gate 8870Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 8880Sstevel@tonic-gate mp->map_obj.rp = rp; 8890Sstevel@tonic-gate } 8900Sstevel@tonic-gate 8910Sstevel@tonic-gate /* 8920Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 8930Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 8940Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 8950Sstevel@tonic-gate */ 8960Sstevel@tonic-gate 8970Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 8980Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 8990Sstevel@tonic-gate 9000Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9010Sstevel@tonic-gate cmn_err(CE_CONT, 9020Sstevel@tonic-gate "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d>" 9030Sstevel@tonic-gate " offset %d len %d handle 0x%x\n", 9040Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip), 9050Sstevel@tonic-gate rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 9060Sstevel@tonic-gate offset, len, mp->map_handlep); 9070Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9080Sstevel@tonic-gate 9090Sstevel@tonic-gate /* 9100Sstevel@tonic-gate * I/O or memory mapping: 9110Sstevel@tonic-gate * 9120Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 9130Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 9140Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 9150Sstevel@tonic-gate */ 9160Sstevel@tonic-gate 9170Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 9180Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 9190Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 9200Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 9210Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 9220Sstevel@tonic-gate return (DDI_ME_INVAL); 9230Sstevel@tonic-gate } 9240Sstevel@tonic-gate 9250Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 9260Sstevel@tonic-gate /* 9270Sstevel@tonic-gate * compatibility i/o mapping 9280Sstevel@tonic-gate */ 9290Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 9300Sstevel@tonic-gate } else { 9310Sstevel@tonic-gate /* 9320Sstevel@tonic-gate * Normal memory or i/o mapping 9330Sstevel@tonic-gate */ 9340Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 9350Sstevel@tonic-gate } 9360Sstevel@tonic-gate 9370Sstevel@tonic-gate if (len != 0) 9380Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 9390Sstevel@tonic-gate 9400Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9410Sstevel@tonic-gate cmn_err(CE_CONT, 9420Sstevel@tonic-gate " <%s,%s> <0x%x, 0x%x, 0x%d>" 9430Sstevel@tonic-gate " offset %d len %d handle 0x%x\n", 9440Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip), 9450Sstevel@tonic-gate rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 9460Sstevel@tonic-gate offset, len, mp->map_handlep); 9470Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9480Sstevel@tonic-gate 9490Sstevel@tonic-gate /* 9500Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 9510Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 9520Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 9530Sstevel@tonic-gate * provided via ddi_apply_range.) 9540Sstevel@tonic-gate */ 9550Sstevel@tonic-gate 9560Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9570Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 9580Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 9590Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9600Sstevel@tonic-gate 9610Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 9620Sstevel@tonic-gate return (error); 9630Sstevel@tonic-gate 9640Sstevel@tonic-gate switch (mp->map_op) { 9650Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 9660Sstevel@tonic-gate 9670Sstevel@tonic-gate /* 9680Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 9690Sstevel@tonic-gate */ 9700Sstevel@tonic-gate 9710Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 9720Sstevel@tonic-gate 9730Sstevel@tonic-gate case DDI_MO_UNMAP: 9740Sstevel@tonic-gate 9750Sstevel@tonic-gate /* 9760Sstevel@tonic-gate * Release mapping... 9770Sstevel@tonic-gate */ 9780Sstevel@tonic-gate 9790Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 9800Sstevel@tonic-gate 9810Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 9820Sstevel@tonic-gate 9830Sstevel@tonic-gate return (rootnex_map_handle(mp)); 9840Sstevel@tonic-gate 9850Sstevel@tonic-gate default: 9860Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 9870Sstevel@tonic-gate } 9880Sstevel@tonic-gate } 9890Sstevel@tonic-gate 9900Sstevel@tonic-gate 9910Sstevel@tonic-gate /* 992509Smrj * rootnex_map_fault() 9930Sstevel@tonic-gate * 9940Sstevel@tonic-gate * fault in mappings for requestors 9950Sstevel@tonic-gate */ 9960Sstevel@tonic-gate /*ARGSUSED*/ 9970Sstevel@tonic-gate static int 998509Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 999509Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 1000509Smrj uint_t lock) 10010Sstevel@tonic-gate { 10020Sstevel@tonic-gate 10030Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 10040Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 10050Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 10060Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 10070Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 10080Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 10090Sstevel@tonic-gate 10100Sstevel@tonic-gate /* 10110Sstevel@tonic-gate * This is all terribly broken, but it is a start 10120Sstevel@tonic-gate * 10130Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 10140Sstevel@tonic-gate * must be exported from seg_dev.c. 10150Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 10160Sstevel@tonic-gate */ 10170Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 10180Sstevel@tonic-gate struct segdev_data *sdp = 10190Sstevel@tonic-gate (struct segdev_data *)seg->s_data; 10200Sstevel@tonic-gate 10210Sstevel@tonic-gate if (hat == NULL) { 10220Sstevel@tonic-gate /* 10230Sstevel@tonic-gate * This is one plausible interpretation of 10240Sstevel@tonic-gate * a null hat i.e. use the first hat on the 10250Sstevel@tonic-gate * address space hat list which by convention is 10260Sstevel@tonic-gate * the hat of the system MMU. At alternative 10270Sstevel@tonic-gate * would be to panic .. this might well be better .. 10280Sstevel@tonic-gate */ 10290Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 10300Sstevel@tonic-gate hat = seg->s_as->a_hat; 10310Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 10320Sstevel@tonic-gate } 10330Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 10340Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 10350Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 10360Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 10370Sstevel@tonic-gate HAT_LOAD_LOCK); 10380Sstevel@tonic-gate } else 10390Sstevel@tonic-gate return (DDI_FAILURE); 10400Sstevel@tonic-gate return (DDI_SUCCESS); 10410Sstevel@tonic-gate } 10420Sstevel@tonic-gate 10430Sstevel@tonic-gate 10440Sstevel@tonic-gate /* 1045509Smrj * rootnex_map_regspec() 1046509Smrj * we don't support mapping of I/O cards above 4Gb 10470Sstevel@tonic-gate */ 1048509Smrj static int 1049509Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1050509Smrj { 1051509Smrj ulong_t base; 1052509Smrj void *cvaddr; 1053509Smrj uint_t npages, pgoffset; 1054509Smrj struct regspec *rp; 1055509Smrj ddi_acc_hdl_t *hp; 1056509Smrj ddi_acc_impl_t *ap; 1057509Smrj uint_t hat_acc_flags; 1058509Smrj 1059509Smrj rp = mp->map_obj.rp; 1060509Smrj hp = mp->map_handlep; 1061509Smrj 1062509Smrj #ifdef DDI_MAP_DEBUG 1063509Smrj ddi_map_debug( 1064509Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1065509Smrj rp->regspec_bustype, rp->regspec_addr, 1066509Smrj rp->regspec_size, mp->map_handlep); 1067509Smrj #endif /* DDI_MAP_DEBUG */ 1068509Smrj 1069509Smrj /* 1070509Smrj * I/O or memory mapping 1071509Smrj * 1072509Smrj * <bustype=0, addr=x, len=x>: memory 1073509Smrj * <bustype=1, addr=x, len=x>: i/o 1074509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1075509Smrj */ 1076509Smrj 1077509Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1078509Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 1079509Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 1080509Smrj rp->regspec_addr, rp->regspec_size); 1081509Smrj return (DDI_FAILURE); 1082509Smrj } 1083509Smrj 1084509Smrj if (rp->regspec_bustype != 0) { 1085509Smrj /* 1086509Smrj * I/O space - needs a handle. 1087509Smrj */ 1088509Smrj if (hp == NULL) { 1089509Smrj return (DDI_FAILURE); 1090509Smrj } 1091509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1092509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1093509Smrj impl_acc_hdl_init(hp); 1094509Smrj 1095509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1096509Smrj #ifdef DDI_MAP_DEBUG 1097509Smrj ddi_map_debug("rootnex_map_regspec: mmap() \ 1098509Smrj to I/O space is not supported.\n"); 1099509Smrj #endif /* DDI_MAP_DEBUG */ 1100509Smrj return (DDI_ME_INVAL); 1101509Smrj } else { 1102509Smrj /* 1103509Smrj * 1275-compliant vs. compatibility i/o mapping 1104509Smrj */ 1105509Smrj *vaddrp = 1106509Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 1107509Smrj ((caddr_t)(uintptr_t)rp->regspec_bustype) : 1108509Smrj ((caddr_t)(uintptr_t)rp->regspec_addr); 1109509Smrj } 1110509Smrj 1111509Smrj #ifdef DDI_MAP_DEBUG 1112509Smrj ddi_map_debug( 1113509Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1114509Smrj rp->regspec_size, *vaddrp); 1115509Smrj #endif /* DDI_MAP_DEBUG */ 1116509Smrj return (DDI_SUCCESS); 1117509Smrj } 1118509Smrj 1119509Smrj /* 1120509Smrj * Memory space 1121509Smrj */ 1122509Smrj 1123509Smrj if (hp != NULL) { 1124509Smrj /* 1125509Smrj * hat layer ignores 1126509Smrj * hp->ah_acc.devacc_attr_endian_flags. 1127509Smrj */ 1128509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1129509Smrj case DDI_STRICTORDER_ACC: 1130509Smrj hat_acc_flags = HAT_STRICTORDER; 1131509Smrj break; 1132509Smrj case DDI_UNORDERED_OK_ACC: 1133509Smrj hat_acc_flags = HAT_UNORDERED_OK; 1134509Smrj break; 1135509Smrj case DDI_MERGING_OK_ACC: 1136509Smrj hat_acc_flags = HAT_MERGING_OK; 1137509Smrj break; 1138509Smrj case DDI_LOADCACHING_OK_ACC: 1139509Smrj hat_acc_flags = HAT_LOADCACHING_OK; 1140509Smrj break; 1141509Smrj case DDI_STORECACHING_OK_ACC: 1142509Smrj hat_acc_flags = HAT_STORECACHING_OK; 1143509Smrj break; 1144509Smrj } 1145509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1146509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1147509Smrj impl_acc_hdl_init(hp); 1148509Smrj hp->ah_hat_flags = hat_acc_flags; 1149509Smrj } else { 1150509Smrj hat_acc_flags = HAT_STRICTORDER; 1151509Smrj } 1152509Smrj 1153509Smrj base = (ulong_t)rp->regspec_addr & (~MMU_PAGEOFFSET); /* base addr */ 1154509Smrj pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; /* offset */ 1155509Smrj 1156509Smrj if (rp->regspec_size == 0) { 1157509Smrj #ifdef DDI_MAP_DEBUG 1158509Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1159509Smrj #endif /* DDI_MAP_DEBUG */ 1160509Smrj return (DDI_ME_INVAL); 1161509Smrj } 1162509Smrj 1163509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1164509Smrj *vaddrp = (caddr_t)mmu_btop(base); 1165509Smrj } else { 1166509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1167509Smrj 1168509Smrj #ifdef DDI_MAP_DEBUG 1169509Smrj ddi_map_debug("rootnex_map_regspec: Mapping %d pages \ 1170509Smrj physical %x ", 1171509Smrj npages, base); 1172509Smrj #endif /* DDI_MAP_DEBUG */ 1173509Smrj 1174509Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1175509Smrj if (cvaddr == NULL) 1176509Smrj return (DDI_ME_NORESOURCES); 1177509Smrj 1178509Smrj /* 1179509Smrj * Now map in the pages we've allocated... 1180509Smrj */ 1181509Smrj hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), mmu_btop(base), 1182509Smrj mp->map_prot | hat_acc_flags, HAT_LOAD_LOCK); 1183509Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 1184509Smrj } 1185509Smrj 1186509Smrj #ifdef DDI_MAP_DEBUG 1187509Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1188509Smrj #endif /* DDI_MAP_DEBUG */ 1189509Smrj return (DDI_SUCCESS); 1190509Smrj } 1191509Smrj 11920Sstevel@tonic-gate 11930Sstevel@tonic-gate /* 1194509Smrj * rootnex_unmap_regspec() 1195509Smrj * 1196509Smrj */ 1197509Smrj static int 1198509Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1199509Smrj { 1200509Smrj caddr_t addr = (caddr_t)*vaddrp; 1201509Smrj uint_t npages, pgoffset; 1202509Smrj struct regspec *rp; 1203509Smrj 1204509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1205509Smrj return (0); 1206509Smrj 1207509Smrj rp = mp->map_obj.rp; 1208509Smrj 1209509Smrj if (rp->regspec_size == 0) { 1210509Smrj #ifdef DDI_MAP_DEBUG 1211509Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1212509Smrj #endif /* DDI_MAP_DEBUG */ 1213509Smrj return (DDI_ME_INVAL); 1214509Smrj } 1215509Smrj 1216509Smrj /* 1217509Smrj * I/O or memory mapping: 1218509Smrj * 1219509Smrj * <bustype=0, addr=x, len=x>: memory 1220509Smrj * <bustype=1, addr=x, len=x>: i/o 1221509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1222509Smrj */ 1223509Smrj if (rp->regspec_bustype != 0) { 1224509Smrj /* 1225509Smrj * This is I/O space, which requires no particular 1226509Smrj * processing on unmap since it isn't mapped in the 1227509Smrj * first place. 1228509Smrj */ 1229509Smrj return (DDI_SUCCESS); 1230509Smrj } 1231509Smrj 1232509Smrj /* 1233509Smrj * Memory space 1234509Smrj */ 1235509Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1236509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1237509Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1238509Smrj device_arena_free(addr - pgoffset, ptob(npages)); 1239509Smrj 1240509Smrj /* 1241509Smrj * Destroy the pointer - the mapping has logically gone 1242509Smrj */ 1243509Smrj *vaddrp = NULL; 1244509Smrj 1245509Smrj return (DDI_SUCCESS); 1246509Smrj } 1247509Smrj 1248509Smrj 1249509Smrj /* 1250509Smrj * rootnex_map_handle() 1251509Smrj * 12520Sstevel@tonic-gate */ 1253509Smrj static int 1254509Smrj rootnex_map_handle(ddi_map_req_t *mp) 1255509Smrj { 1256509Smrj ddi_acc_hdl_t *hp; 1257509Smrj ulong_t base; 1258509Smrj uint_t pgoffset; 1259509Smrj struct regspec *rp; 1260509Smrj 1261509Smrj rp = mp->map_obj.rp; 1262509Smrj 1263509Smrj #ifdef DDI_MAP_DEBUG 1264509Smrj ddi_map_debug( 1265509Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1266509Smrj rp->regspec_bustype, rp->regspec_addr, 1267509Smrj rp->regspec_size, mp->map_handlep); 1268509Smrj #endif /* DDI_MAP_DEBUG */ 1269509Smrj 1270509Smrj /* 1271509Smrj * I/O or memory mapping: 1272509Smrj * 1273509Smrj * <bustype=0, addr=x, len=x>: memory 1274509Smrj * <bustype=1, addr=x, len=x>: i/o 1275509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1276509Smrj */ 1277509Smrj if (rp->regspec_bustype != 0) { 1278509Smrj /* 1279509Smrj * This refers to I/O space, and we don't support "mapping" 1280509Smrj * I/O space to a user. 1281509Smrj */ 1282509Smrj return (DDI_FAILURE); 1283509Smrj } 1284509Smrj 1285509Smrj /* 1286509Smrj * Set up the hat_flags for the mapping. 1287509Smrj */ 1288509Smrj hp = mp->map_handlep; 1289509Smrj 1290509Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 1291509Smrj case DDI_NEVERSWAP_ACC: 1292509Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1293509Smrj break; 1294509Smrj case DDI_STRUCTURE_LE_ACC: 1295509Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 1296509Smrj break; 1297509Smrj case DDI_STRUCTURE_BE_ACC: 1298509Smrj return (DDI_FAILURE); 1299509Smrj default: 1300509Smrj return (DDI_REGS_ACC_CONFLICT); 1301509Smrj } 1302509Smrj 1303509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1304509Smrj case DDI_STRICTORDER_ACC: 1305509Smrj break; 1306509Smrj case DDI_UNORDERED_OK_ACC: 1307509Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 1308509Smrj break; 1309509Smrj case DDI_MERGING_OK_ACC: 1310509Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 1311509Smrj break; 1312509Smrj case DDI_LOADCACHING_OK_ACC: 1313509Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1314509Smrj break; 1315509Smrj case DDI_STORECACHING_OK_ACC: 1316509Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 1317509Smrj break; 1318509Smrj default: 1319509Smrj return (DDI_FAILURE); 1320509Smrj } 1321509Smrj 1322509Smrj base = (ulong_t)rp->regspec_addr & (~MMU_PAGEOFFSET); /* base addr */ 1323509Smrj pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; /* offset */ 1324509Smrj 1325509Smrj if (rp->regspec_size == 0) 1326509Smrj return (DDI_ME_INVAL); 1327509Smrj 1328509Smrj hp->ah_pfn = mmu_btop(base); 1329509Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1330509Smrj 1331509Smrj return (DDI_SUCCESS); 1332509Smrj } 13330Sstevel@tonic-gate 13340Sstevel@tonic-gate 13350Sstevel@tonic-gate 13360Sstevel@tonic-gate /* 1337509Smrj * ************************ 1338509Smrj * interrupt related code 1339509Smrj * ************************ 13400Sstevel@tonic-gate */ 13410Sstevel@tonic-gate 13420Sstevel@tonic-gate /* 1343509Smrj * rootnex_intr_ops() 13440Sstevel@tonic-gate * bus_intr_op() function for interrupt support 13450Sstevel@tonic-gate */ 13460Sstevel@tonic-gate /* ARGSUSED */ 13470Sstevel@tonic-gate static int 13480Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 13490Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 13500Sstevel@tonic-gate { 13510Sstevel@tonic-gate struct intrspec *ispec; 13520Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 13530Sstevel@tonic-gate 13540Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 13550Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 13560Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 13570Sstevel@tonic-gate 13580Sstevel@tonic-gate /* Process the interrupt operation */ 13590Sstevel@tonic-gate switch (intr_op) { 13600Sstevel@tonic-gate case DDI_INTROP_GETCAP: 13610Sstevel@tonic-gate /* First check with pcplusmp */ 13620Sstevel@tonic-gate if (psm_intr_ops == NULL) 13630Sstevel@tonic-gate return (DDI_FAILURE); 13640Sstevel@tonic-gate 13650Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13660Sstevel@tonic-gate *(int *)result = 0; 13670Sstevel@tonic-gate return (DDI_FAILURE); 13680Sstevel@tonic-gate } 13690Sstevel@tonic-gate break; 13700Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13710Sstevel@tonic-gate if (psm_intr_ops == NULL) 13720Sstevel@tonic-gate return (DDI_FAILURE); 13730Sstevel@tonic-gate 13740Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13750Sstevel@tonic-gate return (DDI_FAILURE); 13760Sstevel@tonic-gate break; 13770Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13780Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13790Sstevel@tonic-gate return (DDI_FAILURE); 13800Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13810Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 13820Sstevel@tonic-gate break; 13830Sstevel@tonic-gate case DDI_INTROP_FREE: 13840Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 13850Sstevel@tonic-gate /* 13860Sstevel@tonic-gate * Special case for 'pcic' driver' only. 13870Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 13880Sstevel@tonic-gate * See detailed comments on this in the function 13890Sstevel@tonic-gate * rootnex_get_ispec(). 13900Sstevel@tonic-gate */ 13910Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 13920Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 13930Sstevel@tonic-gate pdp->par_nintr); 13940Sstevel@tonic-gate /* 13950Sstevel@tonic-gate * Set it to zero; so that 13960Sstevel@tonic-gate * DDI framework doesn't free it again 13970Sstevel@tonic-gate */ 13980Sstevel@tonic-gate pdp->par_intr = NULL; 13990Sstevel@tonic-gate pdp->par_nintr = 0; 14000Sstevel@tonic-gate } 14010Sstevel@tonic-gate break; 14020Sstevel@tonic-gate case DDI_INTROP_GETPRI: 14030Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14040Sstevel@tonic-gate return (DDI_FAILURE); 14050Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 14060Sstevel@tonic-gate break; 14070Sstevel@tonic-gate case DDI_INTROP_SETPRI: 14080Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 14090Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 14100Sstevel@tonic-gate return (DDI_FAILURE); 14110Sstevel@tonic-gate 14120Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 14130Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 14140Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 14150Sstevel@tonic-gate return (DDI_FAILURE); 14160Sstevel@tonic-gate 14170Sstevel@tonic-gate /* Change the priority */ 14180Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 14190Sstevel@tonic-gate PSM_FAILURE) 14200Sstevel@tonic-gate return (DDI_FAILURE); 14210Sstevel@tonic-gate 14220Sstevel@tonic-gate /* update the ispec with the new priority */ 14230Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 14240Sstevel@tonic-gate break; 14250Sstevel@tonic-gate case DDI_INTROP_ADDISR: 14260Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14270Sstevel@tonic-gate return (DDI_FAILURE); 14280Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 14290Sstevel@tonic-gate break; 14300Sstevel@tonic-gate case DDI_INTROP_REMISR: 14310Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14320Sstevel@tonic-gate return (DDI_FAILURE); 14330Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 14340Sstevel@tonic-gate break; 14350Sstevel@tonic-gate case DDI_INTROP_ENABLE: 14360Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14370Sstevel@tonic-gate return (DDI_FAILURE); 14380Sstevel@tonic-gate 14390Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 14400Sstevel@tonic-gate if (psm_intr_ops == NULL) 14410Sstevel@tonic-gate return (DDI_FAILURE); 14420Sstevel@tonic-gate 14430Sstevel@tonic-gate hdlp->ih_private = (void *)ispec; 14440Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 14450Sstevel@tonic-gate (int *)&hdlp->ih_vector); 14460Sstevel@tonic-gate 14470Sstevel@tonic-gate /* Add the interrupt handler */ 14480Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 14490Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 14500Sstevel@tonic-gate hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, rdip)) 14510Sstevel@tonic-gate return (DDI_FAILURE); 14520Sstevel@tonic-gate break; 14530Sstevel@tonic-gate case DDI_INTROP_DISABLE: 14540Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14550Sstevel@tonic-gate return (DDI_FAILURE); 14560Sstevel@tonic-gate 14570Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 14580Sstevel@tonic-gate if (psm_intr_ops == NULL) 14590Sstevel@tonic-gate return (DDI_FAILURE); 14600Sstevel@tonic-gate 14610Sstevel@tonic-gate hdlp->ih_private = (void *)ispec; 14620Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14630Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14640Sstevel@tonic-gate 14650Sstevel@tonic-gate /* Remove the interrupt handler */ 14660Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14670Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14680Sstevel@tonic-gate break; 14690Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14700Sstevel@tonic-gate if (psm_intr_ops == NULL) 14710Sstevel@tonic-gate return (DDI_FAILURE); 14720Sstevel@tonic-gate 14730Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14740Sstevel@tonic-gate return (DDI_FAILURE); 14750Sstevel@tonic-gate break; 14760Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14770Sstevel@tonic-gate if (psm_intr_ops == NULL) 14780Sstevel@tonic-gate return (DDI_FAILURE); 14790Sstevel@tonic-gate 14800Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14810Sstevel@tonic-gate return (DDI_FAILURE); 14820Sstevel@tonic-gate break; 14830Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 14840Sstevel@tonic-gate if (psm_intr_ops == NULL) 14850Sstevel@tonic-gate return (DDI_FAILURE); 14860Sstevel@tonic-gate 14870Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 14880Sstevel@tonic-gate result)) { 14890Sstevel@tonic-gate *(int *)result = 0; 14900Sstevel@tonic-gate return (DDI_FAILURE); 14910Sstevel@tonic-gate } 14920Sstevel@tonic-gate break; 14930Sstevel@tonic-gate case DDI_INTROP_NINTRS: 14940Sstevel@tonic-gate if ((pdp = ddi_get_parent_data(rdip)) == NULL) 14950Sstevel@tonic-gate return (DDI_FAILURE); 14960Sstevel@tonic-gate *(int *)result = pdp->par_nintr; 14970Sstevel@tonic-gate if (pdp->par_nintr == 0) { 14980Sstevel@tonic-gate /* 14990Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 15000Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 15010Sstevel@tonic-gate * 15020Sstevel@tonic-gate * See detailed comments on this in the function 15030Sstevel@tonic-gate * rootnex_get_ispec(). 15040Sstevel@tonic-gate * 15050Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 15060Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 15070Sstevel@tonic-gate * field may not initialized. So, we fake it here 15080Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 15090Sstevel@tonic-gate */ 15100Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 15110Sstevel@tonic-gate *(int *)result = 1; 15120Sstevel@tonic-gate } 15130Sstevel@tonic-gate break; 15140Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 15150Sstevel@tonic-gate *(int *)result = 0; 15160Sstevel@tonic-gate *(int *)result |= DDI_INTR_TYPE_FIXED; /* Always ... */ 15170Sstevel@tonic-gate break; 15180Sstevel@tonic-gate case DDI_INTROP_NAVAIL: 15190Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 15200Sstevel@tonic-gate return (DDI_FAILURE); 15210Sstevel@tonic-gate 15220Sstevel@tonic-gate if (psm_intr_ops == NULL) { 15230Sstevel@tonic-gate *(int *)result = 1; 15240Sstevel@tonic-gate break; 15250Sstevel@tonic-gate } 15260Sstevel@tonic-gate 15270Sstevel@tonic-gate /* Priority in the handle not initialized yet */ 15280Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 15290Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 15300Sstevel@tonic-gate PSM_INTR_OP_NAVAIL_VECTORS, result); 15310Sstevel@tonic-gate break; 15320Sstevel@tonic-gate default: 15330Sstevel@tonic-gate return (DDI_FAILURE); 15340Sstevel@tonic-gate } 15350Sstevel@tonic-gate 15360Sstevel@tonic-gate return (DDI_SUCCESS); 15370Sstevel@tonic-gate } 15380Sstevel@tonic-gate 15390Sstevel@tonic-gate 15400Sstevel@tonic-gate /* 1541509Smrj * rootnex_get_ispec() 1542509Smrj * convert an interrupt number to an interrupt specification. 1543509Smrj * The interrupt number determines which interrupt spec will be 1544509Smrj * returned if more than one exists. 1545509Smrj * 1546509Smrj * Look into the parent private data area of the 'rdip' to find out 1547509Smrj * the interrupt specification. First check to make sure there is 1548509Smrj * one that matchs "inumber" and then return a pointer to it. 1549509Smrj * 1550509Smrj * Return NULL if one could not be found. 1551509Smrj * 1552509Smrj * NOTE: This is needed for rootnex_intr_ops() 1553509Smrj */ 1554509Smrj static struct intrspec * 1555509Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 1556509Smrj { 1557509Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1558509Smrj 1559509Smrj /* 1560509Smrj * Special case handling for drivers that provide their own 1561509Smrj * intrspec structures instead of relying on the DDI framework. 1562509Smrj * 1563509Smrj * A broken hardware driver in ON could potentially provide its 1564509Smrj * own intrspec structure, instead of relying on the hardware. 1565509Smrj * If these drivers are children of 'rootnex' then we need to 1566509Smrj * continue to provide backward compatibility to them here. 1567509Smrj * 1568509Smrj * Following check is a special case for 'pcic' driver which 1569509Smrj * was found to have broken hardwre andby provides its own intrspec. 1570509Smrj * 1571509Smrj * Verbatim comments from this driver are shown here: 1572509Smrj * "Don't use the ddi_add_intr since we don't have a 1573509Smrj * default intrspec in all cases." 1574509Smrj * 1575509Smrj * Since an 'ispec' may not be always created for it, 1576509Smrj * check for that and create one if so. 1577509Smrj * 1578509Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 1579509Smrj */ 1580509Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1581509Smrj pdp->par_nintr = 1; 1582509Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1583509Smrj pdp->par_nintr, KM_SLEEP); 1584509Smrj } 1585509Smrj 1586509Smrj /* Validate the interrupt number */ 1587509Smrj if (inum >= pdp->par_nintr) 1588509Smrj return (NULL); 1589509Smrj 1590509Smrj /* Get the interrupt structure pointer and return that */ 1591509Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 1592509Smrj } 1593509Smrj 1594509Smrj 1595509Smrj /* 1596509Smrj * rootnex_xlate_intrs() 1597509Smrj * For the x86 rootnexus, we're prepared to claim that the interrupt string 1598509Smrj * is in the form of a list of <ipl,vec> specifications. 1599509Smrj */ 1600509Smrj static int 1601509Smrj rootnex_xlate_intrs(dev_info_t *dip, dev_info_t *rdip, int *in, 1602509Smrj struct ddi_parent_private_data *pdptr) 1603509Smrj { 1604509Smrj size_t size; 1605509Smrj int n; 1606509Smrj struct intrspec *new; 1607509Smrj caddr_t got_prop; 1608509Smrj int *inpri; 1609509Smrj int got_len; 1610509Smrj 1611509Smrj static char bad_intr_fmt[] = 1612509Smrj "rootnex: bad interrupt spec from %s%d - ipl %d, irq %d\n"; 1613509Smrj 1614509Smrj #ifdef lint 1615509Smrj dip = dip; 1616509Smrj #endif 1617509Smrj /* 1618509Smrj * determine if the driver is expecting the new style "interrupts" 1619509Smrj * property which just contains the IRQ, or the old style which 1620509Smrj * contains pairs of <IPL,IRQ>. if it is the new style, we always 1621509Smrj * assign IPL 5 unless an "interrupt-priorities" property exists. 1622509Smrj * in that case, the "interrupt-priorities" property contains the 1623509Smrj * IPL values that match, one for one, the IRQ values in the 1624509Smrj * "interrupts" property. 1625509Smrj */ 1626509Smrj inpri = NULL; 1627509Smrj if ((ddi_getprop(DDI_DEV_T_ANY, rdip, DDI_PROP_DONTPASS, 1628509Smrj "ignore-hardware-nodes", -1) != -1) || 1629509Smrj ignore_hardware_nodes) { 1630509Smrj /* the old style "interrupts" property... */ 1631509Smrj 1632509Smrj /* 1633509Smrj * The list consists of <ipl,vec> elements 1634509Smrj */ 1635509Smrj if ((n = (*in++ >> 1)) < 1) 1636509Smrj return (DDI_FAILURE); 1637509Smrj 1638509Smrj pdptr->par_nintr = n; 1639509Smrj size = n * sizeof (struct intrspec); 1640509Smrj new = pdptr->par_intr = kmem_zalloc(size, KM_SLEEP); 1641509Smrj 1642509Smrj while (n--) { 1643509Smrj int level = *in++; 1644509Smrj int vec = *in++; 1645509Smrj 1646509Smrj if (level < 1 || level > MAXIPL || 1647509Smrj vec < VEC_MIN || vec > VEC_MAX) { 1648509Smrj cmn_err(CE_CONT, bad_intr_fmt, 1649509Smrj DEVI(rdip)->devi_name, 1650509Smrj DEVI(rdip)->devi_instance, level, vec); 1651509Smrj goto broken; 1652509Smrj } 1653509Smrj new->intrspec_pri = level; 1654509Smrj if (vec != 2) 1655509Smrj new->intrspec_vec = vec; 1656509Smrj else 1657509Smrj /* 1658509Smrj * irq 2 on the PC bus is tied to irq 9 1659509Smrj * on ISA, EISA and MicroChannel 1660509Smrj */ 1661509Smrj new->intrspec_vec = 9; 1662509Smrj new++; 1663509Smrj } 1664509Smrj 1665509Smrj return (DDI_SUCCESS); 1666509Smrj } else { 1667509Smrj /* the new style "interrupts" property... */ 1668509Smrj 1669509Smrj /* 1670509Smrj * The list consists of <vec> elements 1671509Smrj */ 1672509Smrj if ((n = (*in++)) < 1) 1673509Smrj return (DDI_FAILURE); 1674509Smrj 1675509Smrj pdptr->par_nintr = n; 1676509Smrj size = n * sizeof (struct intrspec); 1677509Smrj new = pdptr->par_intr = kmem_zalloc(size, KM_SLEEP); 1678509Smrj 1679509Smrj /* XXX check for "interrupt-priorities" property... */ 1680509Smrj if (ddi_getlongprop(DDI_DEV_T_ANY, rdip, DDI_PROP_DONTPASS, 1681509Smrj "interrupt-priorities", (caddr_t)&got_prop, &got_len) 1682509Smrj == DDI_PROP_SUCCESS) { 1683509Smrj if (n != (got_len / sizeof (int))) { 1684509Smrj cmn_err(CE_CONT, 1685509Smrj "rootnex: bad interrupt-priorities length" 1686509Smrj " from %s%d: expected %d, got %d\n", 1687509Smrj DEVI(rdip)->devi_name, 1688509Smrj DEVI(rdip)->devi_instance, n, 1689509Smrj (int)(got_len / sizeof (int))); 1690509Smrj goto broken; 1691509Smrj } 1692509Smrj inpri = (int *)got_prop; 1693509Smrj } 1694509Smrj 1695509Smrj while (n--) { 1696509Smrj int level; 1697509Smrj int vec = *in++; 1698509Smrj 1699509Smrj if (inpri == NULL) 1700509Smrj level = 5; 1701509Smrj else 1702509Smrj level = *inpri++; 1703509Smrj 1704509Smrj if (level < 1 || level > MAXIPL || 1705509Smrj vec < VEC_MIN || vec > VEC_MAX) { 1706509Smrj cmn_err(CE_CONT, bad_intr_fmt, 1707509Smrj DEVI(rdip)->devi_name, 1708509Smrj DEVI(rdip)->devi_instance, level, vec); 1709509Smrj goto broken; 1710509Smrj } 1711509Smrj new->intrspec_pri = level; 1712509Smrj if (vec != 2) 1713509Smrj new->intrspec_vec = vec; 1714509Smrj else 1715509Smrj /* 1716509Smrj * irq 2 on the PC bus is tied to irq 9 1717509Smrj * on ISA, EISA and MicroChannel 1718509Smrj */ 1719509Smrj new->intrspec_vec = 9; 1720509Smrj new++; 1721509Smrj } 1722509Smrj 1723509Smrj if (inpri != NULL) 1724509Smrj kmem_free(got_prop, got_len); 1725509Smrj return (DDI_SUCCESS); 1726509Smrj } 1727509Smrj 1728509Smrj broken: 1729509Smrj kmem_free(pdptr->par_intr, size); 1730509Smrj pdptr->par_intr = NULL; 1731509Smrj pdptr->par_nintr = 0; 1732509Smrj if (inpri != NULL) 1733509Smrj kmem_free(got_prop, got_len); 1734509Smrj return (DDI_FAILURE); 1735509Smrj } 1736509Smrj 1737509Smrj 1738509Smrj /* 1739509Smrj * ****************** 1740509Smrj * dma related code 1741509Smrj * ****************** 1742509Smrj */ 1743509Smrj 1744509Smrj /* 1745509Smrj * rootnex_dma_allochdl() 1746509Smrj * called from ddi_dma_alloc_handle(). 17470Sstevel@tonic-gate */ 1748509Smrj /*ARGSUSED*/ 1749509Smrj static int 1750509Smrj rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1751509Smrj int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1752509Smrj { 1753509Smrj uint64_t maxsegmentsize_ll; 1754509Smrj uint_t maxsegmentsize; 1755509Smrj ddi_dma_impl_t *hp; 1756509Smrj rootnex_dma_t *dma; 1757509Smrj uint64_t count_max; 1758509Smrj uint64_t seg; 1759509Smrj int kmflag; 1760509Smrj int e; 1761509Smrj 1762509Smrj 1763509Smrj /* convert our sleep flags */ 1764509Smrj if (waitfp == DDI_DMA_SLEEP) { 1765509Smrj kmflag = KM_SLEEP; 1766509Smrj } else { 1767509Smrj kmflag = KM_NOSLEEP; 1768509Smrj } 1769509Smrj 1770509Smrj /* 1771509Smrj * We try to do only one memory allocation here. We'll do a little 1772509Smrj * pointer manipulation later. If the bind ends up taking more than 1773509Smrj * our prealloc's space, we'll have to allocate more memory in the 1774509Smrj * bind operation. Not great, but much better than before and the 1775509Smrj * best we can do with the current bind interfaces. 1776509Smrj */ 1777509Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1778509Smrj if (hp == NULL) { 1779509Smrj if (waitfp != DDI_DMA_DONTWAIT) { 1780509Smrj ddi_set_callback(waitfp, arg, 1781509Smrj &rootnex_state->r_dvma_call_list_id); 1782509Smrj } 1783509Smrj return (DDI_DMA_NORESOURCES); 1784509Smrj } 1785509Smrj 1786509Smrj /* Do our pointer manipulation now, align the structures */ 1787509Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 1788509Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1789509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1790509Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1791509Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1792509Smrj 1793509Smrj /* setup the handle */ 1794509Smrj rootnex_clean_dmahdl(hp); 1795509Smrj dma->dp_dip = rdip; 1796509Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1797509Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1798509Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 1799509Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1800509Smrj hp->dmai_rdip = rdip; 1801509Smrj hp->dmai_attr = *attr; 1802509Smrj 1803509Smrj /* we don't need to worry about the SPL since we do a tryenter */ 1804509Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1805509Smrj 1806509Smrj /* 1807509Smrj * Figure out our maximum segment size. If the segment size is greater 1808509Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 1809509Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1810509Smrj * dma_attr_count_max are size-1 type values. 1811509Smrj * 1812509Smrj * Maximum segment size is the largest physically contiguous chunk of 1813509Smrj * memory that we can return from a bind (i.e. the maximum size of a 1814509Smrj * single cookie). 1815509Smrj */ 1816509Smrj 1817509Smrj /* handle the rollover cases */ 1818509Smrj seg = attr->dma_attr_seg + 1; 1819509Smrj if (seg < attr->dma_attr_seg) { 1820509Smrj seg = attr->dma_attr_seg; 1821509Smrj } 1822509Smrj count_max = attr->dma_attr_count_max + 1; 1823509Smrj if (count_max < attr->dma_attr_count_max) { 1824509Smrj count_max = attr->dma_attr_count_max; 1825509Smrj } 1826509Smrj 1827509Smrj /* 1828509Smrj * granularity may or may not be a power of two. If it isn't, we can't 1829509Smrj * use a simple mask. 1830509Smrj */ 1831509Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1832509Smrj dma->dp_granularity_power_2 = B_FALSE; 1833509Smrj } else { 1834509Smrj dma->dp_granularity_power_2 = B_TRUE; 1835509Smrj } 1836509Smrj 1837509Smrj /* 1838509Smrj * maxxfer should be a whole multiple of granularity. If we're going to 1839509Smrj * break up a window because we're greater than maxxfer, we might as 1840509Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 1841509Smrj * worry about triming the window later on for this case. 1842509Smrj */ 1843509Smrj if (attr->dma_attr_granular > 1) { 1844509Smrj if (dma->dp_granularity_power_2) { 1845509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1846509Smrj (attr->dma_attr_maxxfer & 1847509Smrj (attr->dma_attr_granular - 1)); 1848509Smrj } else { 1849509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1850509Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1851509Smrj } 1852509Smrj } else { 1853509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 1854509Smrj } 1855509Smrj 1856509Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1857509Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1858509Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1859509Smrj maxsegmentsize = 0xFFFFFFFF; 1860509Smrj } else { 1861509Smrj maxsegmentsize = maxsegmentsize_ll; 1862509Smrj } 1863509Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1864509Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1865509Smrj 1866509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1867509Smrj if (rootnex_alloc_check_parms) { 1868509Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1869509Smrj if (e != DDI_SUCCESS) { 1870509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1871509Smrj (void) rootnex_dma_freehdl(dip, rdip, 1872509Smrj (ddi_dma_handle_t)hp); 1873509Smrj return (e); 1874509Smrj } 1875509Smrj } 1876509Smrj 1877509Smrj *handlep = (ddi_dma_handle_t)hp; 1878509Smrj 1879509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1880509Smrj DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1881509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1882509Smrj 1883509Smrj return (DDI_SUCCESS); 1884509Smrj } 1885509Smrj 1886509Smrj 1887509Smrj /* 1888509Smrj * rootnex_dma_freehdl() 1889509Smrj * called from ddi_dma_free_handle(). 1890509Smrj */ 1891509Smrj /*ARGSUSED*/ 1892509Smrj static int 1893509Smrj rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1894509Smrj { 1895509Smrj ddi_dma_impl_t *hp; 1896509Smrj rootnex_dma_t *dma; 1897509Smrj 1898509Smrj 1899509Smrj hp = (ddi_dma_impl_t *)handle; 1900509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1901509Smrj 1902509Smrj /* unbind should have been called first */ 1903509Smrj ASSERT(!dma->dp_inuse); 1904509Smrj 1905509Smrj mutex_destroy(&dma->dp_mutex); 1906509Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1907509Smrj 1908509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1909509Smrj DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1910509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1911509Smrj 1912509Smrj if (rootnex_state->r_dvma_call_list_id) 1913509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1914509Smrj 1915509Smrj return (DDI_SUCCESS); 1916509Smrj } 1917509Smrj 1918509Smrj 1919509Smrj /* 1920509Smrj * rootnex_dma_bindhdl() 1921509Smrj * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 1922509Smrj */ 1923509Smrj /*ARGSUSED*/ 1924509Smrj static int 1925509Smrj rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 1926509Smrj struct ddi_dma_req *dmareq, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 19270Sstevel@tonic-gate { 1928509Smrj rootnex_sglinfo_t *sinfo; 1929509Smrj ddi_dma_attr_t *attr; 1930509Smrj ddi_dma_impl_t *hp; 1931509Smrj rootnex_dma_t *dma; 1932509Smrj int kmflag; 1933509Smrj int e; 1934509Smrj 1935509Smrj 1936509Smrj hp = (ddi_dma_impl_t *)handle; 1937509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1938509Smrj sinfo = &dma->dp_sglinfo; 1939509Smrj attr = &hp->dmai_attr; 1940509Smrj 1941509Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1942509Smrj 1943509Smrj /* 1944509Smrj * This is useful for debugging a driver. Not as useful in a production 1945509Smrj * system. The only time this will fail is if you have a driver bug. 1946509Smrj */ 1947509Smrj if (rootnex_bind_check_inuse) { 1948509Smrj /* 1949509Smrj * No one else should ever have this lock unless someone else 1950509Smrj * is trying to use this handle. So contention on the lock 1951509Smrj * is the same as inuse being set. 1952509Smrj */ 1953509Smrj e = mutex_tryenter(&dma->dp_mutex); 1954509Smrj if (e == 0) { 1955509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1956509Smrj return (DDI_DMA_INUSE); 1957509Smrj } 1958509Smrj if (dma->dp_inuse) { 1959509Smrj mutex_exit(&dma->dp_mutex); 1960509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1961509Smrj return (DDI_DMA_INUSE); 1962509Smrj } 1963509Smrj dma->dp_inuse = B_TRUE; 1964509Smrj mutex_exit(&dma->dp_mutex); 1965509Smrj } 1966509Smrj 1967509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1968509Smrj if (rootnex_bind_check_parms) { 1969509Smrj e = rootnex_valid_bind_parms(dmareq, attr); 1970509Smrj if (e != DDI_SUCCESS) { 1971509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1972509Smrj rootnex_clean_dmahdl(hp); 1973509Smrj return (e); 1974509Smrj } 1975509Smrj } 1976509Smrj 1977509Smrj /* save away the original bind info */ 1978509Smrj dma->dp_dma = dmareq->dmar_object; 1979509Smrj 1980509Smrj /* 1981509Smrj * Figure out a rough estimate of what maximum number of pages this 1982509Smrj * buffer could use (a high estimate of course). 1983509Smrj */ 1984509Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1985509Smrj 1986509Smrj /* 1987509Smrj * We'll use the pre-allocated cookies for any bind that will *always* 1988509Smrj * fit (more important to be consistent, we don't want to create 1989509Smrj * additional degenerate cases). 1990509Smrj */ 1991509Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1992509Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1993509Smrj dma->dp_need_to_free_cookie = B_FALSE; 1994509Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1995509Smrj uint_t, sinfo->si_max_pages); 1996509Smrj 1997509Smrj /* 1998509Smrj * For anything larger than that, we'll go ahead and allocate the 1999509Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 2000509Smrj * seeing this path in the fast path for high performance devices very 2001509Smrj * frequently. 2002509Smrj * 2003509Smrj * a ddi bind interface that allowed the driver to provide storage to 2004509Smrj * the bind interface would speed this case up. 2005509Smrj */ 2006509Smrj } else { 2007509Smrj /* convert the sleep flags */ 2008509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2009509Smrj kmflag = KM_SLEEP; 2010509Smrj } else { 2011509Smrj kmflag = KM_NOSLEEP; 2012509Smrj } 2013509Smrj 2014509Smrj /* 2015509Smrj * Save away how much memory we allocated. If we're doing a 2016509Smrj * nosleep, the alloc could fail... 2017509Smrj */ 2018509Smrj dma->dp_cookie_size = sinfo->si_max_pages * 2019509Smrj sizeof (ddi_dma_cookie_t); 2020509Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 2021509Smrj if (dma->dp_cookies == NULL) { 2022509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2023509Smrj rootnex_clean_dmahdl(hp); 2024509Smrj return (DDI_DMA_NORESOURCES); 2025509Smrj } 2026509Smrj dma->dp_need_to_free_cookie = B_TRUE; 2027509Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 2028509Smrj sinfo->si_max_pages); 2029509Smrj } 2030509Smrj hp->dmai_cookie = dma->dp_cookies; 2031509Smrj 2032509Smrj /* 2033509Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 2034509Smrj * looking at the contraints in the dma structure. It will then put some 2035509Smrj * additional state about the sgl in the dma struct (i.e. is the sgl 2036509Smrj * clean, or do we need to do some munging; how many pages need to be 2037509Smrj * copied, etc.) 2038509Smrj */ 2039509Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 2040509Smrj &dma->dp_sglinfo); 2041509Smrj ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 2042509Smrj 2043509Smrj /* if we don't need a copy buffer, we don't need to sync */ 2044509Smrj if (sinfo->si_copybuf_req == 0) { 2045509Smrj hp->dmai_rflags |= DMP_NOSYNC; 2046509Smrj } 2047509Smrj 2048509Smrj /* 2049509Smrj * if we don't need the copybuf and we don't need to do a partial, we 2050509Smrj * hit the fast path. All the high performance devices should be trying 2051509Smrj * to hit this path. To hit this path, a device should be able to reach 2052509Smrj * all of memory, shouldn't try to bind more than it can transfer, and 2053509Smrj * the buffer shouldn't require more cookies than the driver/device can 2054509Smrj * handle [sgllen]). 2055509Smrj */ 2056509Smrj if ((sinfo->si_copybuf_req == 0) && 2057509Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 2058509Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 2059509Smrj /* 2060509Smrj * copy out the first cookie and ccountp, set the cookie 2061509Smrj * pointer to the second cookie. The first cookie is passed 2062509Smrj * back on the stack. Additional cookies are accessed via 2063509Smrj * ddi_dma_nextcookie() 2064509Smrj */ 2065509Smrj *cookiep = dma->dp_cookies[0]; 2066509Smrj *ccountp = sinfo->si_sgl_size; 2067509Smrj hp->dmai_cookie++; 2068509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2069509Smrj hp->dmai_nwin = 1; 2070509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2071509Smrj DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 2072509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2073509Smrj dma->dp_dma.dmao_size); 2074509Smrj return (DDI_DMA_MAPPED); 2075509Smrj } 2076509Smrj 2077509Smrj /* 2078509Smrj * go to the slow path, we may need to alloc more memory, create 2079509Smrj * multiple windows, and munge up a sgl to make the device happy. 2080509Smrj */ 2081509Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 2082509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 2083509Smrj if (dma->dp_need_to_free_cookie) { 2084509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2085509Smrj } 2086509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2087509Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 2088509Smrj return (e); 2089509Smrj } 2090509Smrj 2091509Smrj /* if the first window uses the copy buffer, sync it for the device */ 2092509Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 2093509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 2094509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 2095509Smrj DDI_DMA_SYNC_FORDEV); 2096509Smrj } 2097509Smrj 2098509Smrj /* 2099509Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 2100509Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 2101509Smrj * If we have a partial map (i.e. multiple windows), the number of 2102509Smrj * cookies we return is the number of cookies in the first window. 2103509Smrj */ 2104509Smrj if (e == DDI_DMA_MAPPED) { 2105509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2106509Smrj *ccountp = sinfo->si_sgl_size; 2107509Smrj } else { 2108509Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 2109509Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 2110509Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 2111509Smrj } 2112509Smrj *cookiep = dma->dp_cookies[0]; 2113509Smrj hp->dmai_cookie++; 2114509Smrj 2115509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2116509Smrj DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 2117509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2118509Smrj dma->dp_dma.dmao_size); 2119509Smrj return (e); 2120509Smrj } 2121509Smrj 2122509Smrj 2123509Smrj /* 2124509Smrj * rootnex_dma_unbindhdl() 2125509Smrj * called from ddi_dma_unbind_handle() 2126509Smrj */ 2127509Smrj /*ARGSUSED*/ 2128509Smrj static int 2129509Smrj rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2130509Smrj ddi_dma_handle_t handle) 2131509Smrj { 2132509Smrj ddi_dma_impl_t *hp; 2133509Smrj rootnex_dma_t *dma; 2134509Smrj int e; 2135509Smrj 2136509Smrj 2137509Smrj hp = (ddi_dma_impl_t *)handle; 2138509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2139509Smrj 2140509Smrj /* make sure the buffer wasn't free'd before calling unbind */ 2141509Smrj if (rootnex_unbind_verify_buffer) { 2142509Smrj e = rootnex_verify_buffer(dma); 2143509Smrj if (e != DDI_SUCCESS) { 2144509Smrj ASSERT(0); 2145509Smrj return (DDI_FAILURE); 2146509Smrj } 2147509Smrj } 2148509Smrj 2149509Smrj /* sync the current window before unbinding the buffer */ 2150509Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 2151509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 2152509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 2153509Smrj DDI_DMA_SYNC_FORCPU); 2154509Smrj } 2155509Smrj 2156509Smrj /* 2157509Smrj * cleanup and copy buffer or window state. if we didn't use the copy 2158509Smrj * buffer or windows, there won't be much to do :-) 2159509Smrj */ 2160509Smrj rootnex_teardown_copybuf(dma); 2161509Smrj rootnex_teardown_windows(dma); 2162509Smrj 2163509Smrj /* 2164509Smrj * If we had to allocate space to for the worse case sgl (it didn't 2165509Smrj * fit into our pre-allocate buffer), free that up now 2166509Smrj */ 2167509Smrj if (dma->dp_need_to_free_cookie) { 2168509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2169509Smrj } 2170509Smrj 2171509Smrj /* 2172509Smrj * clean up the handle so it's ready for the next bind (i.e. if the 2173509Smrj * handle is reused). 2174509Smrj */ 2175509Smrj rootnex_clean_dmahdl(hp); 2176509Smrj 2177509Smrj if (rootnex_state->r_dvma_call_list_id) 2178509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2179509Smrj 2180509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2181509Smrj DTRACE_PROBE1(rootnex__unbind, uint64_t, 2182509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2183509Smrj 2184509Smrj return (DDI_SUCCESS); 2185509Smrj } 2186509Smrj 2187509Smrj 2188509Smrj /* 2189509Smrj * rootnex_verify_buffer() 2190509Smrj * verify buffer wasn't free'd 2191509Smrj */ 2192509Smrj static int 2193509Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 2194509Smrj { 2195509Smrj peekpoke_ctlops_t peek; 2196509Smrj page_t **pplist; 2197509Smrj caddr_t vaddr; 2198509Smrj uint_t pcnt; 2199509Smrj uint_t poff; 2200509Smrj page_t *pp; 2201509Smrj uint8_t b; 2202509Smrj int i; 2203509Smrj int e; 2204509Smrj 2205509Smrj 2206509Smrj /* Figure out how many pages this buffer occupies */ 2207509Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2208509Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2209509Smrj } else { 2210509Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2211509Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2212509Smrj } 2213509Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2214509Smrj 2215509Smrj switch (dma->dp_dma.dmao_type) { 22160Sstevel@tonic-gate case DMA_OTYP_PAGES: 2217509Smrj /* 2218509Smrj * for a linked list of pp's walk through them to make sure 2219509Smrj * they're locked and not free. 2220509Smrj */ 2221509Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2222509Smrj for (i = 0; i < pcnt; i++) { 2223509Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2224509Smrj return (DDI_FAILURE); 22250Sstevel@tonic-gate } 2226509Smrj pp = pp->p_next; 22270Sstevel@tonic-gate } 22280Sstevel@tonic-gate break; 2229509Smrj 22300Sstevel@tonic-gate case DMA_OTYP_VADDR: 22310Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 2232509Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2233509Smrj /* 2234509Smrj * for an array of pp's walk through them to make sure they're 2235509Smrj * not free. It's possible that they may not be locked. 2236509Smrj */ 2237509Smrj if (pplist) { 2238509Smrj for (i = 0; i < pcnt; i++) { 2239509Smrj if (PP_ISFREE(pplist[i])) { 2240509Smrj return (DDI_FAILURE); 2241509Smrj } 2242509Smrj } 2243509Smrj 2244509Smrj /* For a virtual address, try to peek at each page */ 2245509Smrj } else { 2246509Smrj if (dma->dp_sglinfo.si_asp == &kas) { 2247509Smrj bzero(&peek, sizeof (peekpoke_ctlops_t)); 2248509Smrj peek.host_addr = (uintptr_t)&b; 2249509Smrj peek.size = sizeof (uint8_t); 2250509Smrj peek.dev_addr = (uintptr_t)vaddr; 2251509Smrj for (i = 0; i < pcnt; i++) { 2252509Smrj e = rootnex_ctlops_peek(&peek, &b); 2253509Smrj if (e != DDI_SUCCESS) { 2254509Smrj return (DDI_FAILURE); 2255509Smrj } 2256509Smrj peek.dev_addr += MMU_PAGESIZE; 2257509Smrj } 2258509Smrj } 2259509Smrj } 2260509Smrj break; 2261509Smrj 2262509Smrj default: 2263509Smrj ASSERT(0); 2264509Smrj break; 2265509Smrj } 2266509Smrj 2267509Smrj return (DDI_SUCCESS); 2268509Smrj } 2269509Smrj 2270509Smrj 2271509Smrj /* 2272509Smrj * rootnex_clean_dmahdl() 2273509Smrj * Clean the dma handle. This should be called on a handle alloc and an 2274509Smrj * unbind handle. Set the handle state to the default settings. 2275509Smrj */ 2276509Smrj static void 2277509Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2278509Smrj { 2279509Smrj rootnex_dma_t *dma; 2280509Smrj 2281509Smrj 2282509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2283509Smrj 2284509Smrj hp->dmai_nwin = 0; 2285509Smrj dma->dp_current_cookie = 0; 2286509Smrj dma->dp_copybuf_size = 0; 2287509Smrj dma->dp_window = NULL; 2288509Smrj dma->dp_cbaddr = NULL; 2289509Smrj dma->dp_inuse = B_FALSE; 2290509Smrj dma->dp_need_to_free_cookie = B_FALSE; 2291509Smrj dma->dp_need_to_free_window = B_FALSE; 2292509Smrj dma->dp_partial_required = B_FALSE; 2293509Smrj dma->dp_trim_required = B_FALSE; 2294509Smrj dma->dp_sglinfo.si_copybuf_req = 0; 2295509Smrj #if !defined(__amd64) 2296509Smrj dma->dp_cb_remaping = B_FALSE; 2297509Smrj dma->dp_kva = NULL; 2298509Smrj #endif 2299509Smrj 2300509Smrj /* FMA related initialization */ 2301509Smrj hp->dmai_fault = 0; 2302509Smrj hp->dmai_fault_check = NULL; 2303509Smrj hp->dmai_fault_notify = NULL; 2304509Smrj hp->dmai_error.err_ena = 0; 2305509Smrj hp->dmai_error.err_status = DDI_FM_OK; 2306509Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2307509Smrj hp->dmai_error.err_ontrap = NULL; 2308509Smrj hp->dmai_error.err_fep = NULL; 2309509Smrj } 2310509Smrj 2311509Smrj 2312509Smrj /* 2313509Smrj * rootnex_valid_alloc_parms() 2314509Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 2315509Smrj */ 2316509Smrj static int 2317509Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2318509Smrj { 2319509Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2320509Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2321509Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 2322509Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2323509Smrj return (DDI_DMA_BADATTR); 2324509Smrj } 2325509Smrj 2326509Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2327509Smrj return (DDI_DMA_BADATTR); 2328509Smrj } 2329509Smrj 2330509Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2331509Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2332509Smrj attr->dma_attr_sgllen <= 0) { 2333509Smrj return (DDI_DMA_BADATTR); 2334509Smrj } 2335509Smrj 2336509Smrj /* We should be able to DMA into every byte offset in a page */ 2337509Smrj if (maxsegmentsize < MMU_PAGESIZE) { 2338509Smrj return (DDI_DMA_BADATTR); 2339509Smrj } 2340509Smrj 2341509Smrj return (DDI_SUCCESS); 2342509Smrj } 2343509Smrj 2344509Smrj 2345509Smrj /* 2346509Smrj * rootnex_valid_bind_parms() 2347509Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 2348509Smrj */ 2349509Smrj /* ARGSUSED */ 2350509Smrj static int 2351509Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2352509Smrj { 2353509Smrj #if !defined(__amd64) 2354509Smrj /* 2355509Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 2356509Smrj * we can track the offset for the obsoleted interfaces. 2357509Smrj */ 2358509Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2359509Smrj return (DDI_DMA_TOOBIG); 2360509Smrj } 2361509Smrj #endif 2362509Smrj 2363509Smrj return (DDI_SUCCESS); 2364509Smrj } 2365509Smrj 2366509Smrj 2367509Smrj /* 2368509Smrj * rootnex_get_sgl() 2369509Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 2370509Smrj * with a call to the vm layer when vm2.0 comes around... 2371509Smrj */ 2372509Smrj static void 2373509Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2374509Smrj rootnex_sglinfo_t *sglinfo) 2375509Smrj { 2376509Smrj ddi_dma_atyp_t buftype; 2377509Smrj uint64_t last_page; 2378509Smrj uint64_t offset; 2379509Smrj uint64_t addrhi; 2380509Smrj uint64_t addrlo; 2381509Smrj uint64_t maxseg; 2382509Smrj page_t **pplist; 2383509Smrj uint64_t paddr; 2384509Smrj uint32_t psize; 2385509Smrj uint32_t size; 2386509Smrj caddr_t vaddr; 2387509Smrj uint_t pcnt; 2388509Smrj page_t *pp; 2389509Smrj uint_t cnt; 2390509Smrj 2391509Smrj 2392509Smrj /* shortcuts */ 2393509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2394509Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2395509Smrj maxseg = sglinfo->si_max_cookie_size; 2396509Smrj buftype = dmar_object->dmao_type; 2397509Smrj addrhi = sglinfo->si_max_addr; 2398509Smrj addrlo = sglinfo->si_min_addr; 2399509Smrj size = dmar_object->dmao_size; 2400509Smrj 2401509Smrj pcnt = 0; 2402509Smrj cnt = 0; 2403509Smrj 2404509Smrj /* 2405509Smrj * if we were passed down a linked list of pages, i.e. pointer to 2406509Smrj * page_t, use this to get our physical address and buf offset. 2407509Smrj */ 2408509Smrj if (buftype == DMA_OTYP_PAGES) { 2409509Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2410509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2411509Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2412509Smrj MMU_PAGEOFFSET; 2413509Smrj paddr = ptob64(pp->p_pagenum) + offset; 2414509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2415509Smrj pp = pp->p_next; 2416509Smrj sglinfo->si_asp = NULL; 2417509Smrj 2418509Smrj /* 2419509Smrj * We weren't passed down a linked list of pages, but if we were passed 2420509Smrj * down an array of pages, use this to get our physical address and buf 2421509Smrj * offset. 2422509Smrj */ 2423509Smrj } else if (pplist != NULL) { 2424509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2425509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2426509Smrj 2427509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2428509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2429509Smrj if (sglinfo->si_asp == NULL) { 2430509Smrj sglinfo->si_asp = &kas; 2431509Smrj } 2432509Smrj 2433509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2434509Smrj paddr = ptob64(pplist[pcnt]->p_pagenum); 2435509Smrj paddr += offset; 2436509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2437509Smrj pcnt++; 2438509Smrj 2439509Smrj /* 2440509Smrj * All we have is a virtual address, we'll need to call into the VM 2441509Smrj * to get the physical address. 2442509Smrj */ 2443509Smrj } else { 2444509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2445509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2446509Smrj 2447509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2448509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2449509Smrj if (sglinfo->si_asp == NULL) { 2450509Smrj sglinfo->si_asp = &kas; 2451509Smrj } 2452509Smrj 2453509Smrj paddr = ptob64(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2454509Smrj paddr += offset; 2455509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2456509Smrj vaddr += psize; 2457509Smrj } 2458509Smrj 2459509Smrj /* 2460509Smrj * Setup the first cookie with the physical address of the page and the 2461509Smrj * size of the page (which takes into account the initial offset into 2462509Smrj * the page. 2463509Smrj */ 2464509Smrj sgl[cnt].dmac_laddress = paddr; 2465509Smrj sgl[cnt].dmac_size = psize; 2466509Smrj sgl[cnt].dmac_type = 0; 2467509Smrj 2468509Smrj /* 2469509Smrj * Save away the buffer offset into the page. We'll need this later in 2470509Smrj * the copy buffer code to help figure out the page index within the 2471509Smrj * buffer and the offset into the current page. 2472509Smrj */ 2473509Smrj sglinfo->si_buf_offset = offset; 2474509Smrj 2475509Smrj /* 2476509Smrj * If the DMA engine can't reach the physical address, increase how 2477509Smrj * much copy buffer we need. We always increase by pagesize so we don't 2478509Smrj * have to worry about converting offsets. Set a flag in the cookies 2479509Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 2480509Smrj * last cookie, go to the next cookie (since we separate each page which 2481509Smrj * uses the copy buffer in case the copy buffer is not physically 2482509Smrj * contiguous. 2483509Smrj */ 2484509Smrj if ((paddr < addrlo) || ((paddr + psize) > addrhi)) { 2485509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2486509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2487509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2488509Smrj cnt++; 2489509Smrj sgl[cnt].dmac_laddress = 0; 2490509Smrj sgl[cnt].dmac_size = 0; 2491509Smrj sgl[cnt].dmac_type = 0; 2492509Smrj } 2493509Smrj } 2494509Smrj 2495509Smrj /* 2496509Smrj * save this page's physical address so we can figure out if the next 2497509Smrj * page is physically contiguous. Keep decrementing size until we are 2498509Smrj * done with the buffer. 2499509Smrj */ 2500509Smrj last_page = paddr & MMU_PAGEMASK; 2501509Smrj size -= psize; 2502509Smrj 2503509Smrj while (size > 0) { 2504509Smrj /* Get the size for this page (i.e. partial or full page) */ 2505509Smrj psize = MIN(size, MMU_PAGESIZE); 2506509Smrj 2507509Smrj if (buftype == DMA_OTYP_PAGES) { 2508509Smrj /* get the paddr from the page_t */ 2509509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2510509Smrj paddr = ptob64(pp->p_pagenum); 2511509Smrj pp = pp->p_next; 2512509Smrj } else if (pplist != NULL) { 2513509Smrj /* index into the array of page_t's to get the paddr */ 2514509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 2515509Smrj paddr = ptob64(pplist[pcnt]->p_pagenum); 2516509Smrj pcnt++; 25170Sstevel@tonic-gate } else { 2518509Smrj /* call into the VM to get the paddr */ 2519509Smrj paddr = ptob64(hat_getpfnum(sglinfo->si_asp->a_hat, 2520509Smrj vaddr)); 2521509Smrj vaddr += psize; 2522509Smrj } 2523509Smrj 2524509Smrj /* check to see if this page needs the copy buffer */ 2525509Smrj if ((paddr < addrlo) || ((paddr + psize) > addrhi)) { 2526509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2527509Smrj 25280Sstevel@tonic-gate /* 2529509Smrj * if there is something in the current cookie, go to 2530509Smrj * the next one. We only want one page in a cookie which 2531509Smrj * uses the copybuf since the copybuf doesn't have to 2532509Smrj * be physically contiguous. 2533509Smrj */ 2534509Smrj if (sgl[cnt].dmac_size != 0) { 2535509Smrj cnt++; 2536509Smrj } 2537509Smrj sgl[cnt].dmac_laddress = paddr; 2538509Smrj sgl[cnt].dmac_size = psize; 2539509Smrj #if defined(__amd64) 2540509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2541509Smrj #else 2542509Smrj /* 2543509Smrj * save the buf offset for 32-bit kernel. used in the 2544509Smrj * obsoleted interfaces. 2545509Smrj */ 2546509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2547509Smrj (dmar_object->dmao_size - size); 2548509Smrj #endif 2549509Smrj /* if this isn't the last cookie, go to the next one */ 2550509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2551509Smrj cnt++; 2552509Smrj sgl[cnt].dmac_laddress = 0; 2553509Smrj sgl[cnt].dmac_size = 0; 2554509Smrj sgl[cnt].dmac_type = 0; 2555509Smrj } 2556509Smrj 2557509Smrj /* 2558509Smrj * this page didn't need the copy buffer, if it's not physically 2559509Smrj * contiguous, or it would put us over a segment boundary, or it 2560509Smrj * puts us over the max cookie size, or the current sgl doesn't 2561509Smrj * have anything in it. 2562509Smrj */ 2563509Smrj } else if (((last_page + MMU_PAGESIZE) != paddr) || 2564509Smrj !(paddr & sglinfo->si_segmask) || 2565509Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 2566509Smrj (sgl[cnt].dmac_size == 0)) { 2567509Smrj /* 2568509Smrj * if we're not already in a new cookie, go to the next 2569509Smrj * cookie. 2570509Smrj */ 2571509Smrj if (sgl[cnt].dmac_size != 0) { 2572509Smrj cnt++; 2573509Smrj } 2574509Smrj 2575509Smrj /* save the cookie information */ 2576509Smrj sgl[cnt].dmac_laddress = paddr; 2577509Smrj sgl[cnt].dmac_size = psize; 2578509Smrj #if defined(__amd64) 2579509Smrj sgl[cnt].dmac_type = 0; 2580509Smrj #else 2581509Smrj /* 2582509Smrj * save the buf offset for 32-bit kernel. used in the 2583509Smrj * obsoleted interfaces. 2584509Smrj */ 2585509Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2586509Smrj #endif 2587509Smrj 2588509Smrj /* 2589509Smrj * this page didn't need the copy buffer, it is physically 2590509Smrj * contiguous with the last page, and it's <= the max cookie 2591509Smrj * size. 2592509Smrj */ 2593509Smrj } else { 2594509Smrj sgl[cnt].dmac_size += psize; 2595509Smrj 2596509Smrj /* 2597509Smrj * if this exactly == the maximum cookie size, and 2598509Smrj * it isn't the last cookie, go to the next cookie. 2599509Smrj */ 2600509Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 2601509Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 2602509Smrj cnt++; 2603509Smrj sgl[cnt].dmac_laddress = 0; 2604509Smrj sgl[cnt].dmac_size = 0; 2605509Smrj sgl[cnt].dmac_type = 0; 2606509Smrj } 2607509Smrj } 2608509Smrj 2609509Smrj /* 2610509Smrj * save this page's physical address so we can figure out if the 2611509Smrj * next page is physically contiguous. Keep decrementing size 2612509Smrj * until we are done with the buffer. 2613509Smrj */ 2614509Smrj last_page = paddr; 2615509Smrj size -= psize; 2616509Smrj } 2617509Smrj 2618509Smrj /* we're done, save away how many cookies the sgl has */ 2619509Smrj if (sgl[cnt].dmac_size == 0) { 2620509Smrj ASSERT(cnt < sglinfo->si_max_pages); 2621509Smrj sglinfo->si_sgl_size = cnt; 2622509Smrj } else { 2623509Smrj sglinfo->si_sgl_size = cnt + 1; 2624509Smrj } 2625509Smrj } 2626509Smrj 2627509Smrj 2628509Smrj /* 2629509Smrj * rootnex_bind_slowpath() 2630509Smrj * Call in the bind path if the calling driver can't use the sgl without 2631509Smrj * modifying it. We either need to use the copy buffer and/or we will end up 2632509Smrj * with a partial bind. 2633509Smrj */ 2634509Smrj static int 2635509Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2636509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2637509Smrj { 2638509Smrj rootnex_sglinfo_t *sinfo; 2639509Smrj rootnex_window_t *window; 2640509Smrj ddi_dma_cookie_t *cookie; 2641509Smrj size_t copybuf_used; 2642509Smrj size_t dmac_size; 2643509Smrj boolean_t partial; 2644509Smrj off_t cur_offset; 2645509Smrj page_t *cur_pp; 2646509Smrj major_t mnum; 2647509Smrj int e; 2648509Smrj int i; 2649509Smrj 2650509Smrj 2651509Smrj sinfo = &dma->dp_sglinfo; 2652509Smrj copybuf_used = 0; 2653509Smrj partial = B_FALSE; 2654509Smrj 2655509Smrj /* 2656509Smrj * If we're using the copybuf, set the copybuf state in dma struct. 2657509Smrj * Needs to be first since it sets the copy buffer size. 2658509Smrj */ 2659509Smrj if (sinfo->si_copybuf_req != 0) { 2660509Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2661509Smrj if (e != DDI_SUCCESS) { 2662509Smrj return (e); 2663509Smrj } 2664509Smrj } else { 2665509Smrj dma->dp_copybuf_size = 0; 2666509Smrj } 2667509Smrj 2668509Smrj /* 2669509Smrj * Figure out if we need to do a partial mapping. If so, figure out 2670509Smrj * if we need to trim the buffers when we munge the sgl. 2671509Smrj */ 2672509Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2673509Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2674509Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2675509Smrj dma->dp_partial_required = B_TRUE; 2676509Smrj if (attr->dma_attr_granular != 1) { 2677509Smrj dma->dp_trim_required = B_TRUE; 2678509Smrj } 2679509Smrj } else { 2680509Smrj dma->dp_partial_required = B_FALSE; 2681509Smrj dma->dp_trim_required = B_FALSE; 2682509Smrj } 2683509Smrj 2684509Smrj /* If we need to do a partial bind, make sure the driver supports it */ 2685509Smrj if (dma->dp_partial_required && 2686509Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2687509Smrj 2688509Smrj mnum = ddi_driver_major(dma->dp_dip); 2689509Smrj /* 2690509Smrj * patchable which allows us to print one warning per major 2691509Smrj * number. 2692509Smrj */ 2693509Smrj if ((rootnex_bind_warn) && 2694509Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2695509Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2696509Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 2697509Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 2698509Smrj "There is a small risk of data corruption in " 2699509Smrj "particular with large I/Os. The driver should be " 2700509Smrj "replaced with a corrected version for proper " 2701509Smrj "system operation. To disable this warning, add " 2702509Smrj "'set rootnex:rootnex_bind_warn=0' to " 2703509Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2704509Smrj } 2705509Smrj return (DDI_DMA_TOOBIG); 2706509Smrj } 2707509Smrj 2708509Smrj /* 2709509Smrj * we might need multiple windows, setup state to handle them. In this 2710509Smrj * code path, we will have at least one window. 2711509Smrj */ 2712509Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 2713509Smrj if (e != DDI_SUCCESS) { 2714509Smrj rootnex_teardown_copybuf(dma); 2715509Smrj return (e); 2716509Smrj } 2717509Smrj 2718509Smrj window = &dma->dp_window[0]; 2719509Smrj cookie = &dma->dp_cookies[0]; 2720509Smrj cur_offset = 0; 2721509Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 2722509Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2723509Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2724509Smrj } 2725509Smrj 2726509Smrj /* loop though all the cookies we got back from get_sgl() */ 2727509Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 2728509Smrj /* 2729509Smrj * If we're using the copy buffer, check this cookie and setup 2730509Smrj * its associated copy buffer state. If this cookie uses the 2731509Smrj * copy buffer, make sure we sync this window during dma_sync. 2732509Smrj */ 2733509Smrj if (dma->dp_copybuf_size > 0) { 2734509Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2735509Smrj cur_offset, ©buf_used, &cur_pp); 2736509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2737509Smrj window->wd_dosync = B_TRUE; 2738509Smrj } 2739509Smrj } 2740509Smrj 2741509Smrj /* 2742509Smrj * save away the cookie size, since it could be modified in 2743509Smrj * the windowing code. 2744509Smrj */ 2745509Smrj dmac_size = cookie->dmac_size; 2746509Smrj 2747509Smrj /* if we went over max copybuf size */ 2748509Smrj if (dma->dp_copybuf_size && 2749509Smrj (copybuf_used > dma->dp_copybuf_size)) { 2750509Smrj partial = B_TRUE; 2751509Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 2752509Smrj cookie, cur_offset, ©buf_used); 2753509Smrj if (e != DDI_SUCCESS) { 2754509Smrj rootnex_teardown_copybuf(dma); 2755509Smrj rootnex_teardown_windows(dma); 2756509Smrj return (e); 2757509Smrj } 2758509Smrj 2759509Smrj /* 2760509Smrj * if the coookie uses the copy buffer, make sure the 2761509Smrj * new window we just moved to is set to sync. 2762509Smrj */ 2763509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2764509Smrj window->wd_dosync = B_TRUE; 2765509Smrj } 2766509Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2767509Smrj dma->dp_dip); 2768509Smrj 2769509Smrj /* if the cookie cnt == max sgllen, move to the next window */ 2770509Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2771509Smrj partial = B_TRUE; 2772509Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2773509Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 2774509Smrj cookie, attr, cur_offset); 2775509Smrj if (e != DDI_SUCCESS) { 2776509Smrj rootnex_teardown_copybuf(dma); 2777509Smrj rootnex_teardown_windows(dma); 2778509Smrj return (e); 2779509Smrj } 2780509Smrj 2781509Smrj /* 2782509Smrj * if the coookie uses the copy buffer, make sure the 2783509Smrj * new window we just moved to is set to sync. 2784509Smrj */ 2785509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2786509Smrj window->wd_dosync = B_TRUE; 2787509Smrj } 2788509Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2789509Smrj dma->dp_dip); 2790509Smrj 2791509Smrj /* else if we will be over maxxfer */ 2792509Smrj } else if ((window->wd_size + dmac_size) > 2793509Smrj dma->dp_maxxfer) { 2794509Smrj partial = B_TRUE; 2795509Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2796509Smrj cookie); 2797509Smrj if (e != DDI_SUCCESS) { 2798509Smrj rootnex_teardown_copybuf(dma); 2799509Smrj rootnex_teardown_windows(dma); 2800509Smrj return (e); 2801509Smrj } 2802509Smrj 2803509Smrj /* 2804509Smrj * if the coookie uses the copy buffer, make sure the 2805509Smrj * new window we just moved to is set to sync. 28060Sstevel@tonic-gate */ 2807509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2808509Smrj window->wd_dosync = B_TRUE; 2809509Smrj } 2810509Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2811509Smrj dma->dp_dip); 2812509Smrj 2813509Smrj /* else this cookie fits in the current window */ 2814509Smrj } else { 2815509Smrj window->wd_cookie_cnt++; 2816509Smrj window->wd_size += dmac_size; 2817509Smrj } 2818509Smrj 2819509Smrj /* track our offset into the buffer, go to the next cookie */ 2820509Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2821509Smrj ASSERT(cookie->dmac_size <= dmac_size); 2822509Smrj cur_offset += dmac_size; 2823509Smrj cookie++; 2824509Smrj } 2825509Smrj 2826509Smrj /* if we ended up with a zero sized window in the end, clean it up */ 2827509Smrj if (window->wd_size == 0) { 2828509Smrj hp->dmai_nwin--; 2829509Smrj window--; 2830509Smrj } 2831509Smrj 2832509Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 2833509Smrj 2834509Smrj if (!partial) { 2835509Smrj return (DDI_DMA_MAPPED); 2836509Smrj } 2837509Smrj 2838509Smrj ASSERT(dma->dp_partial_required); 2839509Smrj return (DDI_DMA_PARTIAL_MAP); 2840509Smrj } 2841509Smrj 2842509Smrj 2843509Smrj /* 2844509Smrj * rootnex_setup_copybuf() 2845509Smrj * Called in bind slowpath. Figures out if we're going to use the copy 2846509Smrj * buffer, and if we do, sets up the basic state to handle it. 2847509Smrj */ 2848509Smrj static int 2849509Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2850509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 2851509Smrj { 2852509Smrj rootnex_sglinfo_t *sinfo; 2853509Smrj ddi_dma_attr_t lattr; 2854509Smrj size_t max_copybuf; 2855509Smrj int cansleep; 2856509Smrj int e; 2857509Smrj #if !defined(__amd64) 2858509Smrj int vmflag; 2859509Smrj #endif 2860509Smrj 2861509Smrj 2862509Smrj sinfo = &dma->dp_sglinfo; 2863509Smrj 2864509Smrj /* 2865509Smrj * read this first so it's consistent through the routine so we can 2866509Smrj * patch it on the fly. 2867509Smrj */ 2868509Smrj max_copybuf = rootnex_max_copybuf_size & MMU_PAGEMASK; 2869509Smrj 2870509Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 2871509Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 2872509Smrj 2873509Smrj /* make sure the copybuf size <= the max size */ 2874509Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 2875509Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 2876509Smrj 2877509Smrj #if !defined(__amd64) 2878509Smrj /* 2879509Smrj * if we don't have kva space to copy to/from, allocate the KVA space 2880509Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 2881509Smrj * the 64-bit kernel. 2882509Smrj */ 2883509Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 2884509Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 2885509Smrj 2886509Smrj /* convert the sleep flags */ 2887509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2888509Smrj vmflag = VM_SLEEP; 2889509Smrj } else { 2890509Smrj vmflag = VM_NOSLEEP; 2891509Smrj } 2892509Smrj 2893509Smrj /* allocate Kernel VA space that we can bcopy to/from */ 2894509Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 2895509Smrj vmflag); 2896509Smrj if (dma->dp_kva == NULL) { 2897509Smrj return (DDI_DMA_NORESOURCES); 2898509Smrj } 2899509Smrj } 2900509Smrj #endif 2901509Smrj 2902509Smrj /* convert the sleep flags */ 2903509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2904509Smrj cansleep = 1; 2905509Smrj } else { 2906509Smrj cansleep = 0; 2907509Smrj } 2908509Smrj 2909509Smrj /* 2910509Smrj * Allocated the actual copy buffer. This needs to fit within the DMA 2911509Smrj * engines limits, so we can't use kmem_alloc... 2912509Smrj */ 2913509Smrj lattr = *attr; 2914509Smrj lattr.dma_attr_align = MMU_PAGESIZE; 2915509Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 2916509Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 2917509Smrj if (e != DDI_SUCCESS) { 2918509Smrj #if !defined(__amd64) 2919509Smrj if (dma->dp_kva != NULL) { 2920509Smrj vmem_free(heap_arena, dma->dp_kva, 2921509Smrj dma->dp_copybuf_size); 2922509Smrj } 2923509Smrj #endif 2924509Smrj return (DDI_DMA_NORESOURCES); 2925509Smrj } 2926509Smrj 2927509Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 2928509Smrj size_t, dma->dp_copybuf_size); 2929509Smrj 2930509Smrj return (DDI_SUCCESS); 2931509Smrj } 2932509Smrj 2933509Smrj 2934509Smrj /* 2935509Smrj * rootnex_setup_windows() 2936509Smrj * Called in bind slowpath to setup the window state. We always have windows 2937509Smrj * in the slowpath. Even if the window count = 1. 2938509Smrj */ 2939509Smrj static int 2940509Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2941509Smrj ddi_dma_attr_t *attr, int kmflag) 2942509Smrj { 2943509Smrj rootnex_window_t *windowp; 2944509Smrj rootnex_sglinfo_t *sinfo; 2945509Smrj size_t copy_state_size; 2946509Smrj size_t win_state_size; 2947509Smrj size_t state_available; 2948509Smrj size_t space_needed; 2949509Smrj uint_t copybuf_win; 2950509Smrj uint_t maxxfer_win; 2951509Smrj size_t space_used; 2952509Smrj uint_t sglwin; 2953509Smrj 2954509Smrj 2955509Smrj sinfo = &dma->dp_sglinfo; 2956509Smrj 2957509Smrj dma->dp_current_win = 0; 2958509Smrj hp->dmai_nwin = 0; 2959509Smrj 2960509Smrj /* If we don't need to do a partial, we only have one window */ 2961509Smrj if (!dma->dp_partial_required) { 2962509Smrj dma->dp_max_win = 1; 2963509Smrj 2964509Smrj /* 2965509Smrj * we need multiple windows, need to figure out the worse case number 2966509Smrj * of windows. 2967509Smrj */ 2968509Smrj } else { 2969509Smrj /* 2970509Smrj * if we need windows because we need more copy buffer that 2971509Smrj * we allow, the worse case number of windows we could need 2972509Smrj * here would be (copybuf space required / copybuf space that 2973509Smrj * we have) plus one for remainder, and plus 2 to handle the 2974509Smrj * extra pages on the trim for the first and last pages of the 2975509Smrj * buffer (a page is the minimum window size so under the right 2976509Smrj * attr settings, you could have a window for each page). 2977509Smrj * The last page will only be hit here if the size is not a 2978509Smrj * multiple of the granularity (which theoretically shouldn't 2979509Smrj * be the case but never has been enforced, so we could have 2980509Smrj * broken things without it). 2981509Smrj */ 2982509Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 2983509Smrj ASSERT(dma->dp_copybuf_size > 0); 2984509Smrj copybuf_win = (sinfo->si_copybuf_req / 2985509Smrj dma->dp_copybuf_size) + 1 + 2; 2986509Smrj } else { 2987509Smrj copybuf_win = 0; 2988509Smrj } 2989509Smrj 2990509Smrj /* 2991509Smrj * if we need windows because we have more cookies than the H/W 2992509Smrj * can handle, the number of windows we would need here would 2993509Smrj * be (cookie count / cookies count H/W supports) plus one for 2994509Smrj * remainder, and plus 2 to handle the extra pages on the trim 2995509Smrj * (see above comment about trim) 2996509Smrj */ 2997509Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 2998509Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 2999509Smrj + 1) + 2; 3000509Smrj } else { 3001509Smrj sglwin = 0; 3002509Smrj } 3003509Smrj 3004509Smrj /* 3005509Smrj * if we need windows because we're binding more memory than the 3006509Smrj * H/W can transfer at once, the number of windows we would need 3007509Smrj * here would be (xfer count / max xfer H/W supports) plus one 3008509Smrj * for remainder, and plus 2 to handle the extra pages on the 3009509Smrj * trim (see above comment about trim) 3010509Smrj */ 3011509Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 3012509Smrj maxxfer_win = (dma->dp_dma.dmao_size / 3013509Smrj dma->dp_maxxfer) + 1 + 2; 3014509Smrj } else { 3015509Smrj maxxfer_win = 0; 3016509Smrj } 3017509Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 3018509Smrj ASSERT(dma->dp_max_win > 0); 3019509Smrj } 3020509Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 3021509Smrj 3022509Smrj /* 3023509Smrj * Get space for window and potential copy buffer state. Before we 3024509Smrj * go and allocate memory, see if we can get away with using what's 3025509Smrj * left in the pre-allocted state or the dynamically allocated sgl. 3026509Smrj */ 3027509Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 3028509Smrj sizeof (ddi_dma_cookie_t)); 3029509Smrj 3030509Smrj /* if we dynamically allocated space for the cookies */ 3031509Smrj if (dma->dp_need_to_free_cookie) { 3032509Smrj /* if we have more space in the pre-allocted buffer, use it */ 3033509Smrj ASSERT(space_used <= dma->dp_cookie_size); 3034509Smrj if ((dma->dp_cookie_size - space_used) <= 3035509Smrj rootnex_state->r_prealloc_size) { 3036509Smrj state_available = rootnex_state->r_prealloc_size; 3037509Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 3038509Smrj 3039509Smrj /* 3040509Smrj * else, we have more free space in the dynamically allocated 3041509Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 3042509Smrj * didn't need a lot of cookies. 3043509Smrj */ 3044509Smrj } else { 3045509Smrj state_available = dma->dp_cookie_size - space_used; 3046509Smrj windowp = (rootnex_window_t *) 3047509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 3048509Smrj } 3049509Smrj 3050509Smrj /* we used the pre-alloced buffer */ 3051509Smrj } else { 3052509Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 3053509Smrj state_available = rootnex_state->r_prealloc_size - space_used; 3054509Smrj windowp = (rootnex_window_t *) 3055509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 3056509Smrj } 3057509Smrj 3058509Smrj /* 3059509Smrj * figure out how much state we need to track the copy buffer. Add an 3060509Smrj * addition 8 bytes for pointer alignemnt later. 3061509Smrj */ 3062509Smrj if (dma->dp_copybuf_size > 0) { 3063509Smrj copy_state_size = sinfo->si_max_pages * 3064509Smrj sizeof (rootnex_pgmap_t); 3065509Smrj } else { 3066509Smrj copy_state_size = 0; 3067509Smrj } 3068509Smrj /* add an additional 8 bytes for pointer alignment */ 3069509Smrj space_needed = win_state_size + copy_state_size + 0x8; 3070509Smrj 3071509Smrj /* if we have enough space already, use it */ 3072509Smrj if (state_available >= space_needed) { 3073509Smrj dma->dp_window = windowp; 3074509Smrj dma->dp_need_to_free_window = B_FALSE; 3075509Smrj 3076509Smrj /* not enough space, need to allocate more. */ 3077509Smrj } else { 3078509Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 3079509Smrj if (dma->dp_window == NULL) { 3080509Smrj return (DDI_DMA_NORESOURCES); 3081509Smrj } 3082509Smrj dma->dp_need_to_free_window = B_TRUE; 3083509Smrj dma->dp_window_size = space_needed; 3084509Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 3085509Smrj dma->dp_dip, size_t, space_needed); 3086509Smrj } 3087509Smrj 3088509Smrj /* 3089509Smrj * we allocate copy buffer state and window state at the same time. 3090509Smrj * setup our copy buffer state pointers. Make sure it's aligned. 3091509Smrj */ 3092509Smrj if (dma->dp_copybuf_size > 0) { 3093509Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 3094509Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 3095509Smrj 3096509Smrj #if !defined(__amd64) 3097509Smrj /* 3098509Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 3099509Smrj * false/NULL. Should be quicker to bzero vs loop and set. 3100509Smrj */ 3101509Smrj bzero(dma->dp_pgmap, copy_state_size); 3102509Smrj #endif 3103509Smrj } else { 3104509Smrj dma->dp_pgmap = NULL; 3105509Smrj } 3106509Smrj 3107509Smrj return (DDI_SUCCESS); 3108509Smrj } 3109509Smrj 3110509Smrj 3111509Smrj /* 3112509Smrj * rootnex_teardown_copybuf() 3113509Smrj * cleans up after rootnex_setup_copybuf() 3114509Smrj */ 3115509Smrj static void 3116509Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 3117509Smrj { 3118509Smrj #if !defined(__amd64) 3119509Smrj int i; 3120509Smrj 3121509Smrj /* 3122509Smrj * if we allocated kernel heap VMEM space, go through all the pages and 3123509Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 3124509Smrj * arena. Then free the VMEM space. 3125509Smrj */ 3126509Smrj if (dma->dp_kva != NULL) { 3127509Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 3128509Smrj if (dma->dp_pgmap[i].pm_mapped) { 3129509Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 3130509Smrj MMU_PAGESIZE, HAT_UNLOAD); 3131509Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 3132509Smrj } 3133509Smrj } 3134509Smrj 3135509Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 3136509Smrj } 3137509Smrj 3138509Smrj #endif 3139509Smrj 3140509Smrj /* if we allocated a copy buffer, free it */ 3141509Smrj if (dma->dp_cbaddr != NULL) { 3142509Smrj i_ddi_mem_free(dma->dp_cbaddr, 0); 3143509Smrj } 3144509Smrj } 3145509Smrj 3146509Smrj 3147509Smrj /* 3148509Smrj * rootnex_teardown_windows() 3149509Smrj * cleans up after rootnex_setup_windows() 3150509Smrj */ 3151509Smrj static void 3152509Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 3153509Smrj { 3154509Smrj /* 3155509Smrj * if we had to allocate window state on the last bind (because we 3156509Smrj * didn't have enough pre-allocated space in the handle), free it. 3157509Smrj */ 3158509Smrj if (dma->dp_need_to_free_window) { 3159509Smrj kmem_free(dma->dp_window, dma->dp_window_size); 3160509Smrj } 3161509Smrj } 3162509Smrj 3163509Smrj 3164509Smrj /* 3165509Smrj * rootnex_init_win() 3166509Smrj * Called in bind slow path during creation of a new window. Initializes 3167509Smrj * window state to default values. 3168509Smrj */ 3169509Smrj /*ARGSUSED*/ 3170509Smrj static void 3171509Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3172509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3173509Smrj { 3174509Smrj hp->dmai_nwin++; 3175509Smrj window->wd_dosync = B_FALSE; 3176509Smrj window->wd_offset = cur_offset; 3177509Smrj window->wd_size = 0; 3178509Smrj window->wd_first_cookie = cookie; 3179509Smrj window->wd_cookie_cnt = 0; 3180509Smrj window->wd_trim.tr_trim_first = B_FALSE; 3181509Smrj window->wd_trim.tr_trim_last = B_FALSE; 3182509Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 3183509Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 3184509Smrj #if !defined(__amd64) 3185509Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 3186509Smrj #endif 3187509Smrj } 3188509Smrj 3189509Smrj 3190509Smrj /* 3191509Smrj * rootnex_setup_cookie() 3192509Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 3193509Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 3194509Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 3195509Smrj * need during sync. 3196509Smrj */ 3197509Smrj static void 3198509Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3199509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3200509Smrj page_t **cur_pp) 3201509Smrj { 3202509Smrj boolean_t copybuf_sz_power_2; 3203509Smrj rootnex_sglinfo_t *sinfo; 3204509Smrj uint_t pidx; 3205509Smrj uint_t pcnt; 3206509Smrj off_t poff; 3207509Smrj #if defined(__amd64) 3208509Smrj pfn_t pfn; 3209509Smrj #else 3210509Smrj page_t **pplist; 3211509Smrj #endif 3212509Smrj 3213509Smrj sinfo = &dma->dp_sglinfo; 3214509Smrj 3215509Smrj /* 3216509Smrj * Calculate the page index relative to the start of the buffer. The 3217509Smrj * index to the current page for our buffer is the offset into the 3218509Smrj * first page of the buffer plus our current offset into the buffer 3219509Smrj * itself, shifted of course... 3220509Smrj */ 3221509Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3222509Smrj ASSERT(pidx < sinfo->si_max_pages); 3223509Smrj 3224509Smrj /* if this cookie uses the copy buffer */ 3225509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3226509Smrj /* 3227509Smrj * NOTE: we know that since this cookie uses the copy buffer, it 3228509Smrj * is <= MMU_PAGESIZE. 3229509Smrj */ 3230509Smrj 3231509Smrj /* 3232509Smrj * get the offset into the page. For the 64-bit kernel, get the 3233509Smrj * pfn which we'll use with seg kpm. 3234509Smrj */ 3235509Smrj poff = cookie->_dmu._dmac_ll & MMU_PAGEOFFSET; 3236509Smrj #if defined(__amd64) 3237509Smrj pfn = cookie->_dmu._dmac_ll >> MMU_PAGESHIFT; 3238509Smrj #endif 3239509Smrj 3240509Smrj /* figure out if the copybuf size is a power of 2 */ 3241509Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3242509Smrj copybuf_sz_power_2 = B_FALSE; 3243509Smrj } else { 3244509Smrj copybuf_sz_power_2 = B_TRUE; 3245509Smrj } 3246509Smrj 3247509Smrj /* This page uses the copy buffer */ 3248509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3249509Smrj 3250509Smrj /* 3251509Smrj * save the copy buffer KVA that we'll use with this page. 3252509Smrj * if we still fit within the copybuf, it's a simple add. 3253509Smrj * otherwise, we need to wrap over using & or % accordingly. 3254509Smrj */ 3255509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3256509Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3257509Smrj *copybuf_used; 3258509Smrj } else { 3259509Smrj if (copybuf_sz_power_2) { 3260509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3261509Smrj (uintptr_t)dma->dp_cbaddr + 3262509Smrj (*copybuf_used & 3263509Smrj (dma->dp_copybuf_size - 1))); 32640Sstevel@tonic-gate } else { 3265509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3266509Smrj (uintptr_t)dma->dp_cbaddr + 3267509Smrj (*copybuf_used % dma->dp_copybuf_size)); 32680Sstevel@tonic-gate } 3269509Smrj } 3270509Smrj 3271509Smrj /* 3272509Smrj * over write the cookie physical address with the address of 3273509Smrj * the physical address of the copy buffer page that we will 3274509Smrj * use. 3275509Smrj */ 3276509Smrj cookie->_dmu._dmac_ll = ptob64(hat_getpfnum(kas.a_hat, 3277509Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3278509Smrj 3279509Smrj /* if we have a kernel VA, it's easy, just save that address */ 3280509Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3281509Smrj (sinfo->si_asp == &kas)) { 3282509Smrj /* 3283509Smrj * save away the page aligned virtual address of the 3284509Smrj * driver buffer. Offsets are handled in the sync code. 3285509Smrj */ 3286509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3287509Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3288509Smrj & MMU_PAGEMASK); 3289509Smrj #if !defined(__amd64) 3290509Smrj /* 3291509Smrj * we didn't need to, and will never need to map this 3292509Smrj * page. 3293509Smrj */ 3294509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3295509Smrj #endif 3296509Smrj 3297509Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 3298509Smrj } else { 3299509Smrj #if defined(__amd64) 3300509Smrj /* 3301509Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 3302509Smrj * get a Kernel VA for the corresponding pfn. 3303509Smrj */ 3304509Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3305509Smrj #else 3306509Smrj /* 3307509Smrj * for the 32-bit kernel, this is a pain. First we'll 3308509Smrj * save away the page_t or user VA for this page. This 3309509Smrj * is needed in rootnex_dma_win() when we switch to a 3310509Smrj * new window which requires us to re-map the copy 3311509Smrj * buffer. 3312509Smrj */ 3313509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3314509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3315509Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3316509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3317509Smrj } else if (pplist != NULL) { 3318509Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3319509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3320509Smrj } else { 3321509Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 3322509Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3323509Smrj (((uintptr_t) 3324509Smrj dmar_object->dmao_obj.virt_obj.v_addr + 3325509Smrj cur_offset) & MMU_PAGEMASK); 3326509Smrj } 3327509Smrj 3328509Smrj /* 3329509Smrj * save away the page aligned virtual address which was 3330509Smrj * allocated from the kernel heap arena (taking into 3331509Smrj * account if we need more copy buffer than we alloced 3332509Smrj * and use multiple windows to handle this, i.e. &,%). 3333509Smrj * NOTE: there isn't and physical memory backing up this 3334509Smrj * virtual address space currently. 3335509Smrj */ 3336509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 3337509Smrj dma->dp_copybuf_size) { 3338509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3339509Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 3340509Smrj MMU_PAGEMASK); 3341509Smrj } else { 3342509Smrj if (copybuf_sz_power_2) { 3343509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3344509Smrj (((uintptr_t)dma->dp_kva + 3345509Smrj (*copybuf_used & 3346509Smrj (dma->dp_copybuf_size - 1))) & 3347509Smrj MMU_PAGEMASK); 3348509Smrj } else { 3349509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3350509Smrj (((uintptr_t)dma->dp_kva + 3351509Smrj (*copybuf_used % 3352509Smrj dma->dp_copybuf_size)) & 3353509Smrj MMU_PAGEMASK); 3354509Smrj } 3355509Smrj } 3356509Smrj 3357509Smrj /* 3358509Smrj * if we haven't used up the available copy buffer yet, 3359509Smrj * map the kva to the physical page. 3360509Smrj */ 3361509Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 3362509Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3363509Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3364509Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3365509Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3366509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3367509Smrj } else { 3368509Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3369509Smrj sinfo->si_asp, 3370509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3371509Smrj } 3372509Smrj 3373509Smrj /* 3374509Smrj * we've used up the available copy buffer, this page 3375509Smrj * will have to be mapped during rootnex_dma_win() when 3376509Smrj * we switch to a new window which requires a re-map 3377509Smrj * the copy buffer. (32-bit kernel only) 3378509Smrj */ 3379509Smrj } else { 3380509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3381509Smrj } 3382509Smrj #endif 3383509Smrj /* go to the next page_t */ 3384509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3385509Smrj *cur_pp = (*cur_pp)->p_next; 3386509Smrj } 33870Sstevel@tonic-gate } 3388509Smrj 3389509Smrj /* add to the copy buffer count */ 3390509Smrj *copybuf_used += MMU_PAGESIZE; 3391509Smrj 3392509Smrj /* 3393509Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 3394509Smrj * cookie occupies to reflect this. 3395509Smrj */ 3396509Smrj } else { 3397509Smrj /* 3398509Smrj * figure out how many pages the cookie occupies. We need to 3399509Smrj * use the original page offset of the buffer and the cookies 3400509Smrj * offset in the buffer to do this. 3401509Smrj */ 3402509Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3403509Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 3404509Smrj 3405509Smrj while (pcnt > 0) { 3406509Smrj #if !defined(__amd64) 3407509Smrj /* 3408509Smrj * the 32-bit kernel doesn't have seg kpm, so we need 3409509Smrj * to map in the driver buffer (if it didn't come down 3410509Smrj * with a kernel VA) on the fly. Since this page doesn't 3411509Smrj * use the copy buffer, it's not, or will it ever, have 3412509Smrj * to be mapped in. 3413509Smrj */ 3414509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3415509Smrj #endif 3416509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3417509Smrj 3418509Smrj /* 3419509Smrj * we need to update pidx and cur_pp or we'll loose 3420509Smrj * track of where we are. 3421509Smrj */ 3422509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3423509Smrj *cur_pp = (*cur_pp)->p_next; 3424509Smrj } 3425509Smrj pidx++; 3426509Smrj pcnt--; 3427509Smrj } 3428509Smrj } 3429509Smrj } 3430509Smrj 3431509Smrj 3432509Smrj /* 3433509Smrj * rootnex_sgllen_window_boundary() 3434509Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 3435509Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3436509Smrj * length supported by the DMA H/W. 3437509Smrj */ 3438509Smrj static int 3439509Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3440509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3441509Smrj off_t cur_offset) 3442509Smrj { 3443509Smrj off_t new_offset; 3444509Smrj size_t trim_sz; 3445509Smrj off_t coffset; 3446509Smrj 3447509Smrj 3448509Smrj /* 3449509Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 3450509Smrj * the next window and init it. We're done. 3451509Smrj */ 3452509Smrj if (!dma->dp_trim_required) { 3453509Smrj (*windowp)++; 3454509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3455509Smrj (*windowp)->wd_cookie_cnt++; 3456509Smrj (*windowp)->wd_size = cookie->dmac_size; 3457509Smrj return (DDI_SUCCESS); 3458509Smrj } 3459509Smrj 3460509Smrj /* figure out how much we need to trim from the window */ 3461509Smrj ASSERT(attr->dma_attr_granular != 0); 3462509Smrj if (dma->dp_granularity_power_2) { 3463509Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3464509Smrj } else { 3465509Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3466509Smrj } 3467509Smrj 3468509Smrj /* The window's a whole multiple of granularity. We're done */ 3469509Smrj if (trim_sz == 0) { 3470509Smrj (*windowp)++; 3471509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3472509Smrj (*windowp)->wd_cookie_cnt++; 3473509Smrj (*windowp)->wd_size = cookie->dmac_size; 3474509Smrj return (DDI_SUCCESS); 3475509Smrj } 3476509Smrj 3477509Smrj /* 3478509Smrj * The window's not a whole multiple of granularity, since we know this 3479509Smrj * is due to the sgllen, we need to go back to the last cookie and trim 3480509Smrj * that one, add the left over part of the old cookie into the new 3481509Smrj * window, and then add in the new cookie into the new window. 3482509Smrj */ 3483509Smrj 3484509Smrj /* 3485509Smrj * make sure the driver isn't making us do something bad... Trimming and 3486509Smrj * sgllen == 1 don't go together. 3487509Smrj */ 3488509Smrj if (attr->dma_attr_sgllen == 1) { 3489509Smrj return (DDI_DMA_NOMAPPING); 3490509Smrj } 3491509Smrj 3492509Smrj /* 3493509Smrj * first, setup the current window to account for the trim. Need to go 3494509Smrj * back to the last cookie for this. 3495509Smrj */ 3496509Smrj cookie--; 3497509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3498509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3499509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3500509Smrj ASSERT(cookie->dmac_size > trim_sz); 3501509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3502509Smrj (*windowp)->wd_size -= trim_sz; 3503509Smrj 3504509Smrj /* save the buffer offsets for the next window */ 3505509Smrj coffset = cookie->dmac_size - trim_sz; 3506509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3507509Smrj 3508509Smrj /* 3509509Smrj * set this now in case this is the first window. all other cases are 3510509Smrj * set in dma_win() 3511509Smrj */ 3512509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3513509Smrj 3514509Smrj /* 3515509Smrj * initialize the next window using what's left over in the previous 3516509Smrj * cookie. 3517509Smrj */ 3518509Smrj (*windowp)++; 3519509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3520509Smrj (*windowp)->wd_cookie_cnt++; 3521509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3522509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + coffset; 3523509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3524509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3525509Smrj (*windowp)->wd_dosync = B_TRUE; 3526509Smrj } 3527509Smrj 3528509Smrj /* 3529509Smrj * now go back to the current cookie and add it to the new window. set 3530509Smrj * the new window size to the what was left over from the previous 3531509Smrj * cookie and what's in the current cookie. 3532509Smrj */ 3533509Smrj cookie++; 3534509Smrj (*windowp)->wd_cookie_cnt++; 3535509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3536509Smrj 3537509Smrj /* 3538509Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 3539509Smrj * a max size of maxxfer). Handle that case. 3540509Smrj */ 3541509Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 3542509Smrj /* 3543509Smrj * maxxfer is already a whole multiple of granularity, and this 3544509Smrj * trim will be <= the previous trim (since a cookie can't be 3545509Smrj * larger than maxxfer). Make things simple here. 3546509Smrj */ 3547509Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3548509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3549509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3550509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3551509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3552509Smrj (*windowp)->wd_size -= trim_sz; 3553509Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3554509Smrj 3555509Smrj /* save the buffer offsets for the next window */ 3556509Smrj coffset = cookie->dmac_size - trim_sz; 3557509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3558509Smrj 3559509Smrj /* setup the next window */ 3560509Smrj (*windowp)++; 3561509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3562509Smrj (*windowp)->wd_cookie_cnt++; 3563509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3564509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + 3565509Smrj coffset; 3566509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3567509Smrj } 3568509Smrj 3569509Smrj return (DDI_SUCCESS); 3570509Smrj } 3571509Smrj 3572509Smrj 3573509Smrj /* 3574509Smrj * rootnex_copybuf_window_boundary() 3575509Smrj * Called in bind slowpath when we get to a window boundary because we used 3576509Smrj * up all the copy buffer that we have. 3577509Smrj */ 3578509Smrj static int 3579509Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3580509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3581509Smrj size_t *copybuf_used) 3582509Smrj { 3583509Smrj rootnex_sglinfo_t *sinfo; 3584509Smrj off_t new_offset; 3585509Smrj size_t trim_sz; 3586509Smrj off_t coffset; 3587509Smrj uint_t pidx; 3588509Smrj off_t poff; 3589509Smrj 3590509Smrj 3591509Smrj sinfo = &dma->dp_sglinfo; 3592509Smrj 3593509Smrj /* 3594509Smrj * the copy buffer should be a whole multiple of page size. We know that 3595509Smrj * this cookie is <= MMU_PAGESIZE. 3596509Smrj */ 3597509Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3598509Smrj 3599509Smrj /* 3600509Smrj * from now on, all new windows in this bind need to be re-mapped during 3601509Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3602509Smrj * space... 3603509Smrj */ 3604509Smrj #if !defined(__amd64) 3605509Smrj dma->dp_cb_remaping = B_TRUE; 3606509Smrj #endif 3607509Smrj 3608509Smrj /* reset copybuf used */ 3609509Smrj *copybuf_used = 0; 3610509Smrj 3611509Smrj /* 3612509Smrj * if we don't have to trim (since granularity is set to 1), go to the 3613509Smrj * next window and add the current cookie to it. We know the current 3614509Smrj * cookie uses the copy buffer since we're in this code path. 3615509Smrj */ 3616509Smrj if (!dma->dp_trim_required) { 3617509Smrj (*windowp)++; 3618509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3619509Smrj 3620509Smrj /* Add this cookie to the new window */ 3621509Smrj (*windowp)->wd_cookie_cnt++; 3622509Smrj (*windowp)->wd_size += cookie->dmac_size; 3623509Smrj *copybuf_used += MMU_PAGESIZE; 3624509Smrj return (DDI_SUCCESS); 3625509Smrj } 3626509Smrj 3627509Smrj /* 3628509Smrj * *** may need to trim, figure it out. 3629509Smrj */ 3630509Smrj 3631509Smrj /* figure out how much we need to trim from the window */ 3632509Smrj if (dma->dp_granularity_power_2) { 3633509Smrj trim_sz = (*windowp)->wd_size & 3634509Smrj (hp->dmai_attr.dma_attr_granular - 1); 3635509Smrj } else { 3636509Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3637509Smrj } 3638509Smrj 3639509Smrj /* 3640509Smrj * if the window's a whole multiple of granularity, go to the next 3641509Smrj * window, init it, then add in the current cookie. We know the current 3642509Smrj * cookie uses the copy buffer since we're in this code path. 3643509Smrj */ 3644509Smrj if (trim_sz == 0) { 3645509Smrj (*windowp)++; 3646509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3647509Smrj 3648509Smrj /* Add this cookie to the new window */ 3649509Smrj (*windowp)->wd_cookie_cnt++; 3650509Smrj (*windowp)->wd_size += cookie->dmac_size; 3651509Smrj *copybuf_used += MMU_PAGESIZE; 3652509Smrj return (DDI_SUCCESS); 3653509Smrj } 3654509Smrj 3655509Smrj /* 3656509Smrj * *** We figured it out, we definitly need to trim 3657509Smrj */ 3658509Smrj 3659509Smrj /* 3660509Smrj * make sure the driver isn't making us do something bad... 3661509Smrj * Trimming and sgllen == 1 don't go together. 3662509Smrj */ 3663509Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 3664509Smrj return (DDI_DMA_NOMAPPING); 3665509Smrj } 3666509Smrj 3667509Smrj /* 3668509Smrj * first, setup the current window to account for the trim. Need to go 3669509Smrj * back to the last cookie for this. Some of the last cookie will be in 3670509Smrj * the current window, and some of the last cookie will be in the new 3671509Smrj * window. All of the current cookie will be in the new window. 3672509Smrj */ 3673509Smrj cookie--; 3674509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3675509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3676509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3677509Smrj ASSERT(cookie->dmac_size > trim_sz); 3678509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3679509Smrj (*windowp)->wd_size -= trim_sz; 3680509Smrj 3681509Smrj /* 3682509Smrj * we're trimming the last cookie (not the current cookie). So that 3683509Smrj * last cookie may have or may not have been using the copy buffer ( 3684509Smrj * we know the cookie passed in uses the copy buffer since we're in 3685509Smrj * this code path). 3686509Smrj * 3687509Smrj * If the last cookie doesn't use the copy buffer, nothing special to 3688509Smrj * do. However, if it does uses the copy buffer, it will be both the 3689509Smrj * last page in the current window and the first page in the next 3690509Smrj * window. Since we are reusing the copy buffer (and KVA space on the 3691509Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 3692509Smrj * current window, and the start of the copy buffer in the next window. 3693509Smrj * Track that info... The cookie physical address was already set to 3694509Smrj * the copy buffer physical address in setup_cookie.. 3695509Smrj */ 3696509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3697509Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3698509Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 3699509Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3700509Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 3701509Smrj (*windowp)->wd_trim.tr_last_cbaddr = 3702509Smrj dma->dp_pgmap[pidx].pm_cbaddr; 3703509Smrj #if !defined(__amd64) 3704509Smrj (*windowp)->wd_trim.tr_last_kaddr = 3705509Smrj dma->dp_pgmap[pidx].pm_kaddr; 3706509Smrj #endif 3707509Smrj } 3708509Smrj 3709509Smrj /* save the buffer offsets for the next window */ 3710509Smrj coffset = cookie->dmac_size - trim_sz; 3711509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3712509Smrj 3713509Smrj /* 3714509Smrj * set this now in case this is the first window. all other cases are 3715509Smrj * set in dma_win() 3716509Smrj */ 3717509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3718509Smrj 3719509Smrj /* 3720509Smrj * initialize the next window using what's left over in the previous 3721509Smrj * cookie. 3722509Smrj */ 3723509Smrj (*windowp)++; 3724509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3725509Smrj (*windowp)->wd_cookie_cnt++; 3726509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3727509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + coffset; 3728509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3729509Smrj 3730509Smrj /* 3731509Smrj * again, we're tracking if the last cookie uses the copy buffer. 3732509Smrj * read the comment above for more info on why we need to track 3733509Smrj * additional state. 3734509Smrj * 3735509Smrj * For the first cookie in the new window, we need reset the physical 3736509Smrj * address to DMA into to the start of the copy buffer plus any 3737509Smrj * initial page offset which may be present. 3738509Smrj */ 3739509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3740509Smrj (*windowp)->wd_dosync = B_TRUE; 3741509Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3742509Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 3743509Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3744509Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 3745509Smrj (*windowp)->wd_trim.tr_first_paddr = ptob64(hat_getpfnum( 3746509Smrj kas.a_hat, dma->dp_cbaddr)) + poff; 3747509Smrj #if !defined(__amd64) 3748509Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3749509Smrj #endif 3750509Smrj /* account for the cookie copybuf usage in the new window */ 3751509Smrj *copybuf_used += MMU_PAGESIZE; 3752509Smrj 3753509Smrj /* 3754509Smrj * every piece of code has to have a hack, and here is this 3755509Smrj * ones :-) 3756509Smrj * 3757509Smrj * There is a complex interaction between setup_cookie and the 3758509Smrj * copybuf window boundary. The complexity had to be in either 3759509Smrj * the maxxfer window, or the copybuf window, and I chose the 3760509Smrj * copybuf code. 3761509Smrj * 3762509Smrj * So in this code path, we have taken the last cookie, 3763509Smrj * virtually broken it in half due to the trim, and it happens 3764509Smrj * to use the copybuf which further complicates life. At the 3765509Smrj * same time, we have already setup the current cookie, which 3766509Smrj * is now wrong. More background info: the current cookie uses 3767509Smrj * the copybuf, so it is only a page long max. So we need to 3768509Smrj * fix the current cookies copy buffer address, physical 3769509Smrj * address, and kva for the 32-bit kernel. We due this by 3770509Smrj * bumping them by page size (of course, we can't due this on 3771509Smrj * the physical address since the copy buffer may not be 3772509Smrj * physically contiguous). 3773509Smrj */ 3774509Smrj cookie++; 3775509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 3776509Smrj poff = cookie->_dmu._dmac_ll & MMU_PAGEOFFSET; 3777509Smrj cookie->_dmu._dmac_ll = ptob64(hat_getpfnum(kas.a_hat, 3778509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 3779509Smrj #if !defined(__amd64) 3780509Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3781509Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3782509Smrj #endif 3783509Smrj } else { 3784509Smrj /* go back to the current cookie */ 3785509Smrj cookie++; 3786509Smrj } 3787509Smrj 3788509Smrj /* 3789509Smrj * add the current cookie to the new window. set the new window size to 3790509Smrj * the what was left over from the previous cookie and what's in the 3791509Smrj * current cookie. 3792509Smrj */ 3793509Smrj (*windowp)->wd_cookie_cnt++; 3794509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3795509Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 3796509Smrj 3797509Smrj /* 3798509Smrj * we know that the cookie passed in always uses the copy buffer. We 3799509Smrj * wouldn't be here if it didn't. 3800509Smrj */ 3801509Smrj *copybuf_used += MMU_PAGESIZE; 3802509Smrj 3803509Smrj return (DDI_SUCCESS); 3804509Smrj } 3805509Smrj 3806509Smrj 3807509Smrj /* 3808509Smrj * rootnex_maxxfer_window_boundary() 3809509Smrj * Called in bind slowpath when we get to a window boundary because we will 3810509Smrj * go over maxxfer. 3811509Smrj */ 3812509Smrj static int 3813509Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3814509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 3815509Smrj { 3816509Smrj size_t dmac_size; 3817509Smrj off_t new_offset; 3818509Smrj size_t trim_sz; 3819509Smrj off_t coffset; 3820509Smrj 3821509Smrj 3822509Smrj /* 3823509Smrj * calculate how much we have to trim off of the current cookie to equal 3824509Smrj * maxxfer. We don't have to account for granularity here since our 3825509Smrj * maxxfer already takes that into account. 3826509Smrj */ 3827509Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 3828509Smrj ASSERT(trim_sz <= cookie->dmac_size); 3829509Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 3830509Smrj 3831509Smrj /* save cookie size since we need it later and we might change it */ 3832509Smrj dmac_size = cookie->dmac_size; 3833509Smrj 3834509Smrj /* 3835509Smrj * if we're not trimming the entire cookie, setup the current window to 3836509Smrj * account for the trim. 3837509Smrj */ 3838509Smrj if (trim_sz < cookie->dmac_size) { 3839509Smrj (*windowp)->wd_cookie_cnt++; 3840509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3841509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 3842509Smrj (*windowp)->wd_trim.tr_last_paddr = cookie->_dmu._dmac_ll; 3843509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3844509Smrj (*windowp)->wd_size = dma->dp_maxxfer; 3845509Smrj 3846509Smrj /* 3847509Smrj * set the adjusted cookie size now in case this is the first 3848509Smrj * window. All other windows are taken care of in get win 3849509Smrj */ 3850509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3851509Smrj } 3852509Smrj 3853509Smrj /* 3854509Smrj * coffset is the current offset within the cookie, new_offset is the 3855509Smrj * current offset with the entire buffer. 3856509Smrj */ 3857509Smrj coffset = dmac_size - trim_sz; 3858509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3859509Smrj 3860509Smrj /* initialize the next window */ 3861509Smrj (*windowp)++; 3862509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3863509Smrj (*windowp)->wd_cookie_cnt++; 3864509Smrj (*windowp)->wd_size = trim_sz; 3865509Smrj if (trim_sz < dmac_size) { 3866509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3867509Smrj (*windowp)->wd_trim.tr_first_paddr = cookie->_dmu._dmac_ll + 3868509Smrj coffset; 3869509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3870509Smrj } 3871509Smrj 3872509Smrj return (DDI_SUCCESS); 3873509Smrj } 3874509Smrj 3875509Smrj 3876509Smrj /* 3877509Smrj * rootnex_dma_sync() 3878509Smrj * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 3879509Smrj * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 3880509Smrj * is set, ddi_dma_sync() returns immediately passing back success. 3881509Smrj */ 3882509Smrj /*ARGSUSED*/ 3883509Smrj static int 3884509Smrj rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3885509Smrj off_t off, size_t len, uint_t cache_flags) 3886509Smrj { 3887509Smrj rootnex_sglinfo_t *sinfo; 3888509Smrj rootnex_pgmap_t *cbpage; 3889509Smrj rootnex_window_t *win; 3890509Smrj ddi_dma_impl_t *hp; 3891509Smrj rootnex_dma_t *dma; 3892509Smrj caddr_t fromaddr; 3893509Smrj caddr_t toaddr; 3894509Smrj uint_t psize; 3895509Smrj off_t offset; 3896509Smrj uint_t pidx; 3897509Smrj size_t size; 3898509Smrj off_t poff; 3899509Smrj int e; 3900509Smrj 3901509Smrj 3902509Smrj hp = (ddi_dma_impl_t *)handle; 3903509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3904509Smrj sinfo = &dma->dp_sglinfo; 3905509Smrj 3906509Smrj /* 3907509Smrj * if we don't have any windows, we don't need to sync. A copybuf 3908509Smrj * will cause us to have at least one window. 3909509Smrj */ 3910509Smrj if (dma->dp_window == NULL) { 3911509Smrj return (DDI_SUCCESS); 3912509Smrj } 3913509Smrj 3914509Smrj /* This window may not need to be sync'd */ 3915509Smrj win = &dma->dp_window[dma->dp_current_win]; 3916509Smrj if (!win->wd_dosync) { 3917509Smrj return (DDI_SUCCESS); 3918509Smrj } 3919509Smrj 3920509Smrj /* handle off and len special cases */ 3921509Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 3922509Smrj offset = win->wd_offset; 3923509Smrj } else { 3924509Smrj offset = off; 3925509Smrj } 3926509Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 3927509Smrj size = win->wd_size; 3928509Smrj } else { 3929509Smrj size = len; 3930509Smrj } 3931509Smrj 3932509Smrj /* check the sync args to make sure they make a little sense */ 3933509Smrj if (rootnex_sync_check_parms) { 3934509Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 3935509Smrj cache_flags); 3936509Smrj if (e != DDI_SUCCESS) { 3937509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 3938509Smrj return (DDI_FAILURE); 3939509Smrj } 3940509Smrj } 3941509Smrj 3942509Smrj /* 3943509Smrj * special case the first page to handle the offset into the page. The 3944509Smrj * offset to the current page for our buffer is the offset into the 3945509Smrj * first page of the buffer plus our current offset into the buffer 3946509Smrj * itself, masked of course. 3947509Smrj */ 3948509Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 3949509Smrj psize = MIN((MMU_PAGESIZE - poff), size); 3950509Smrj 3951509Smrj /* go through all the pages that we want to sync */ 3952509Smrj while (size > 0) { 3953509Smrj /* 3954509Smrj * Calculate the page index relative to the start of the buffer. 3955509Smrj * The index to the current page for our buffer is the offset 3956509Smrj * into the first page of the buffer plus our current offset 3957509Smrj * into the buffer itself, shifted of course... 3958509Smrj */ 3959509Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 3960509Smrj ASSERT(pidx < sinfo->si_max_pages); 3961509Smrj 3962509Smrj /* 3963509Smrj * if this page uses the copy buffer, we need to sync it, 3964509Smrj * otherwise, go on to the next page. 3965509Smrj */ 3966509Smrj cbpage = &dma->dp_pgmap[pidx]; 3967509Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 3968509Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 3969509Smrj if (cbpage->pm_uses_copybuf) { 3970509Smrj /* cbaddr and kaddr should be page aligned */ 3971509Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 3972509Smrj MMU_PAGEOFFSET) == 0); 3973509Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 3974509Smrj MMU_PAGEOFFSET) == 0); 3975509Smrj 3976509Smrj /* 3977509Smrj * if we're copying for the device, we are going to 3978509Smrj * copy from the drivers buffer and to the rootnex 3979509Smrj * allocated copy buffer. 3980509Smrj */ 3981509Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 3982509Smrj fromaddr = cbpage->pm_kaddr + poff; 3983509Smrj toaddr = cbpage->pm_cbaddr + poff; 3984509Smrj DTRACE_PROBE2(rootnex__sync__dev, 3985509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3986509Smrj 3987509Smrj /* 3988509Smrj * if we're copying for the cpu/kernel, we are going to 3989509Smrj * copy from the rootnex allocated copy buffer to the 3990509Smrj * drivers buffer. 3991509Smrj */ 3992509Smrj } else { 3993509Smrj fromaddr = cbpage->pm_cbaddr + poff; 3994509Smrj toaddr = cbpage->pm_kaddr + poff; 3995509Smrj DTRACE_PROBE2(rootnex__sync__cpu, 3996509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3997509Smrj } 3998509Smrj 3999509Smrj bcopy(fromaddr, toaddr, psize); 4000509Smrj } 4001509Smrj 4002509Smrj /* 4003509Smrj * decrement size until we're done, update our offset into the 4004509Smrj * buffer, and get the next page size. 4005509Smrj */ 4006509Smrj size -= psize; 4007509Smrj offset += psize; 4008509Smrj psize = MIN(MMU_PAGESIZE, size); 4009509Smrj 4010509Smrj /* page offset is zero for the rest of this loop */ 4011509Smrj poff = 0; 4012509Smrj } 4013509Smrj 4014509Smrj return (DDI_SUCCESS); 4015509Smrj } 4016509Smrj 4017509Smrj 4018509Smrj /* 4019509Smrj * rootnex_valid_sync_parms() 4020509Smrj * checks the parameters passed to sync to verify they are correct. 4021509Smrj */ 4022509Smrj static int 4023509Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 4024509Smrj off_t offset, size_t size, uint_t cache_flags) 4025509Smrj { 4026509Smrj off_t woffset; 4027509Smrj 4028509Smrj 4029509Smrj /* 4030509Smrj * the first part of the test to make sure the offset passed in is 4031509Smrj * within the window. 4032509Smrj */ 4033509Smrj if (offset < win->wd_offset) { 4034509Smrj return (DDI_FAILURE); 4035509Smrj } 4036509Smrj 4037509Smrj /* 4038509Smrj * second and last part of the test to make sure the offset and length 4039509Smrj * passed in is within the window. 4040509Smrj */ 4041509Smrj woffset = offset - win->wd_offset; 4042509Smrj if ((woffset + size) > win->wd_size) { 4043509Smrj return (DDI_FAILURE); 4044509Smrj } 4045509Smrj 4046509Smrj /* 4047509Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 4048509Smrj * be set too. 4049509Smrj */ 4050509Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 4051509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 4052509Smrj return (DDI_SUCCESS); 4053509Smrj } 4054509Smrj 4055509Smrj /* 4056509Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 4057509Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 4058509Smrj */ 4059509Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 4060509Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 4061509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 4062509Smrj return (DDI_SUCCESS); 4063509Smrj } 4064509Smrj 4065509Smrj return (DDI_FAILURE); 4066509Smrj } 4067509Smrj 4068509Smrj 4069509Smrj /* 4070509Smrj * rootnex_dma_win() 4071509Smrj * called from ddi_dma_getwin() 4072509Smrj */ 4073509Smrj /*ARGSUSED*/ 4074509Smrj static int 4075509Smrj rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4076509Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4077509Smrj uint_t *ccountp) 4078509Smrj { 4079509Smrj rootnex_window_t *window; 4080509Smrj rootnex_trim_t *trim; 4081509Smrj ddi_dma_impl_t *hp; 4082509Smrj rootnex_dma_t *dma; 4083509Smrj #if !defined(__amd64) 4084509Smrj rootnex_sglinfo_t *sinfo; 4085509Smrj rootnex_pgmap_t *pmap; 4086509Smrj uint_t pidx; 4087509Smrj uint_t pcnt; 4088509Smrj off_t poff; 4089509Smrj int i; 4090509Smrj #endif 4091509Smrj 4092509Smrj 4093509Smrj hp = (ddi_dma_impl_t *)handle; 4094509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4095509Smrj #if !defined(__amd64) 4096509Smrj sinfo = &dma->dp_sglinfo; 4097509Smrj #endif 4098509Smrj 4099509Smrj /* If we try and get a window which doesn't exist, return failure */ 4100509Smrj if (win >= hp->dmai_nwin) { 4101509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4102509Smrj return (DDI_FAILURE); 4103509Smrj } 4104509Smrj 4105509Smrj /* 4106509Smrj * if we don't have any windows, and they're asking for the first 4107509Smrj * window, setup the cookie pointer to the first cookie in the bind. 4108509Smrj * setup our return values, then increment the cookie since we return 4109509Smrj * the first cookie on the stack. 4110509Smrj */ 4111509Smrj if (dma->dp_window == NULL) { 4112509Smrj if (win != 0) { 4113509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4114509Smrj return (DDI_FAILURE); 4115509Smrj } 4116509Smrj hp->dmai_cookie = dma->dp_cookies; 4117509Smrj *offp = 0; 4118509Smrj *lenp = dma->dp_dma.dmao_size; 4119509Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 4120509Smrj *cookiep = hp->dmai_cookie[0]; 4121509Smrj hp->dmai_cookie++; 4122509Smrj return (DDI_SUCCESS); 4123509Smrj } 4124509Smrj 4125509Smrj /* sync the old window before moving on to the new one */ 4126509Smrj window = &dma->dp_window[dma->dp_current_win]; 4127509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 4128509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4129509Smrj DDI_DMA_SYNC_FORCPU); 4130509Smrj } 4131509Smrj 4132509Smrj #if !defined(__amd64) 4133509Smrj /* 4134509Smrj * before we move to the next window, if we need to re-map, unmap all 4135509Smrj * the pages in this window. 4136509Smrj */ 4137509Smrj if (dma->dp_cb_remaping) { 4138509Smrj /* 4139509Smrj * If we switch to this window again, we'll need to map in 4140509Smrj * on the fly next time. 4141509Smrj */ 4142509Smrj window->wd_remap_copybuf = B_TRUE; 4143509Smrj 4144509Smrj /* 4145509Smrj * calculate the page index into the buffer where this window 4146509Smrj * starts, and the number of pages this window takes up. 4147509Smrj */ 4148509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4149509Smrj MMU_PAGESHIFT; 4150509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4151509Smrj MMU_PAGEOFFSET; 4152509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4153509Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4154509Smrj 4155509Smrj /* unmap pages which are currently mapped in this window */ 4156509Smrj for (i = 0; i < pcnt; i++) { 4157509Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 4158509Smrj hat_unload(kas.a_hat, 4159509Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4160509Smrj HAT_UNLOAD); 4161509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4162509Smrj } 4163509Smrj pidx++; 4164509Smrj } 4165509Smrj } 4166509Smrj #endif 4167509Smrj 4168509Smrj /* 4169509Smrj * Move to the new window. 4170509Smrj * NOTE: current_win must be set for sync to work right 4171509Smrj */ 4172509Smrj dma->dp_current_win = win; 4173509Smrj window = &dma->dp_window[win]; 4174509Smrj 4175509Smrj /* if needed, adjust the first and/or last cookies for trim */ 4176509Smrj trim = &window->wd_trim; 4177509Smrj if (trim->tr_trim_first) { 4178509Smrj window->wd_first_cookie->_dmu._dmac_ll = trim->tr_first_paddr; 4179509Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 4180509Smrj #if !defined(__amd64) 4181509Smrj window->wd_first_cookie->dmac_type = 4182509Smrj (window->wd_first_cookie->dmac_type & 4183509Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 4184509Smrj #endif 4185509Smrj if (trim->tr_first_copybuf_win) { 4186509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4187509Smrj trim->tr_first_cbaddr; 4188509Smrj #if !defined(__amd64) 4189509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4190509Smrj trim->tr_first_kaddr; 4191509Smrj #endif 4192509Smrj } 4193509Smrj } 4194509Smrj if (trim->tr_trim_last) { 4195509Smrj trim->tr_last_cookie->_dmu._dmac_ll = trim->tr_last_paddr; 4196509Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4197509Smrj if (trim->tr_last_copybuf_win) { 4198509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4199509Smrj trim->tr_last_cbaddr; 4200509Smrj #if !defined(__amd64) 4201509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4202509Smrj trim->tr_last_kaddr; 4203509Smrj #endif 4204509Smrj } 4205509Smrj } 4206509Smrj 4207509Smrj /* 4208509Smrj * setup the cookie pointer to the first cookie in the window. setup 4209509Smrj * our return values, then increment the cookie since we return the 4210509Smrj * first cookie on the stack. 4211509Smrj */ 4212509Smrj hp->dmai_cookie = window->wd_first_cookie; 4213509Smrj *offp = window->wd_offset; 4214509Smrj *lenp = window->wd_size; 4215509Smrj *ccountp = window->wd_cookie_cnt; 4216509Smrj *cookiep = hp->dmai_cookie[0]; 4217509Smrj hp->dmai_cookie++; 4218509Smrj 4219509Smrj #if !defined(__amd64) 4220509Smrj /* re-map copybuf if required for this window */ 4221509Smrj if (dma->dp_cb_remaping) { 4222509Smrj /* 4223509Smrj * calculate the page index into the buffer where this 4224509Smrj * window starts. 4225509Smrj */ 4226509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4227509Smrj MMU_PAGESHIFT; 4228509Smrj ASSERT(pidx < sinfo->si_max_pages); 4229509Smrj 4230509Smrj /* 4231509Smrj * the first page can get unmapped if it's shared with the 4232509Smrj * previous window. Even if the rest of this window is already 4233509Smrj * mapped in, we need to still check this one. 4234509Smrj */ 4235509Smrj pmap = &dma->dp_pgmap[pidx]; 4236509Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4237509Smrj if (pmap->pm_pp != NULL) { 4238509Smrj pmap->pm_mapped = B_TRUE; 4239509Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4240509Smrj } else if (pmap->pm_vaddr != NULL) { 4241509Smrj pmap->pm_mapped = B_TRUE; 4242509Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4243509Smrj pmap->pm_kaddr); 4244509Smrj } 4245509Smrj } 4246509Smrj pidx++; 4247509Smrj 4248509Smrj /* map in the rest of the pages if required */ 4249509Smrj if (window->wd_remap_copybuf) { 4250509Smrj window->wd_remap_copybuf = B_FALSE; 4251509Smrj 4252509Smrj /* figure out many pages this window takes up */ 4253509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4254509Smrj MMU_PAGEOFFSET; 4255509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4256509Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4257509Smrj 4258509Smrj /* map pages which require it */ 4259509Smrj for (i = 1; i < pcnt; i++) { 4260509Smrj pmap = &dma->dp_pgmap[pidx]; 4261509Smrj if (pmap->pm_uses_copybuf) { 4262509Smrj ASSERT(pmap->pm_mapped == B_FALSE); 4263509Smrj if (pmap->pm_pp != NULL) { 4264509Smrj pmap->pm_mapped = B_TRUE; 4265509Smrj i86_pp_map(pmap->pm_pp, 4266509Smrj pmap->pm_kaddr); 4267509Smrj } else if (pmap->pm_vaddr != NULL) { 4268509Smrj pmap->pm_mapped = B_TRUE; 4269509Smrj i86_va_map(pmap->pm_vaddr, 4270509Smrj sinfo->si_asp, 4271509Smrj pmap->pm_kaddr); 4272509Smrj } 4273509Smrj } 4274509Smrj pidx++; 4275509Smrj } 4276509Smrj } 4277509Smrj } 4278509Smrj #endif 4279509Smrj 4280509Smrj /* if the new window uses the copy buffer, sync it for the device */ 4281509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4282509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4283509Smrj DDI_DMA_SYNC_FORDEV); 4284509Smrj } 4285509Smrj 4286509Smrj return (DDI_SUCCESS); 4287509Smrj } 4288509Smrj 4289509Smrj 4290509Smrj 4291509Smrj /* 4292509Smrj * ************************ 4293509Smrj * obsoleted dma routines 4294509Smrj * ************************ 4295509Smrj */ 4296509Smrj 4297509Smrj /* 4298509Smrj * rootnex_dma_map() 4299509Smrj * called from ddi_dma_setup() 4300509Smrj */ 4301509Smrj /* ARGSUSED */ 4302509Smrj static int 4303509Smrj rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, struct ddi_dma_req *dmareq, 4304509Smrj ddi_dma_handle_t *handlep) 4305509Smrj { 4306509Smrj #if defined(__amd64) 4307509Smrj /* 4308509Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 4309509Smrj * rootnex_dma_mctl() 4310509Smrj */ 4311509Smrj ASSERT(0); 4312509Smrj return (DDI_DMA_NORESOURCES); 4313509Smrj 4314509Smrj #else /* 32-bit x86 kernel */ 4315509Smrj ddi_dma_handle_t *lhandlep; 4316509Smrj ddi_dma_handle_t lhandle; 4317509Smrj ddi_dma_cookie_t cookie; 4318509Smrj ddi_dma_attr_t dma_attr; 4319509Smrj ddi_dma_lim_t *dma_lim; 4320509Smrj uint_t ccnt; 4321509Smrj int e; 4322509Smrj 4323509Smrj 4324509Smrj /* 4325509Smrj * if the driver is just testing to see if it's possible to do the bind, 4326509Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 4327509Smrj */ 4328509Smrj if (handlep == NULL) { 4329509Smrj lhandlep = &lhandle; 4330509Smrj } else { 4331509Smrj lhandlep = handlep; 4332509Smrj } 4333509Smrj 4334509Smrj /* convert the limit structure to a dma_attr one */ 4335509Smrj dma_lim = dmareq->dmar_limits; 4336509Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 4337509Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4338509Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4339509Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4340509Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4341509Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4342509Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4343509Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4344509Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4345509Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4346509Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 4347509Smrj dma_attr.dma_attr_flags = 0; 4348509Smrj 4349509Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4350509Smrj dmareq->dmar_arg, lhandlep); 4351509Smrj if (e != DDI_SUCCESS) { 4352509Smrj return (e); 4353509Smrj } 4354509Smrj 4355509Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4356509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4357509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4358509Smrj return (e); 4359509Smrj } 4360509Smrj 4361509Smrj /* 4362509Smrj * if the driver is just testing to see if it's possible to do the bind, 4363509Smrj * free up the local state and return the result. 4364509Smrj */ 4365509Smrj if (handlep == NULL) { 4366509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4367509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4368509Smrj if (e == DDI_DMA_MAPPED) { 4369509Smrj return (DDI_DMA_MAPOK); 43700Sstevel@tonic-gate } else { 4371509Smrj return (DDI_DMA_NOMAPPING); 4372509Smrj } 4373509Smrj } 4374509Smrj 4375509Smrj return (e); 4376509Smrj #endif /* defined(__amd64) */ 4377509Smrj } 4378509Smrj 4379509Smrj 4380509Smrj /* 4381509Smrj * rootnex_dma_mctl() 4382509Smrj * 4383509Smrj */ 4384509Smrj /* ARGSUSED */ 4385509Smrj static int 4386509Smrj rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4387509Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4388509Smrj uint_t cache_flags) 4389509Smrj { 4390509Smrj #if defined(__amd64) 4391509Smrj /* 4392509Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4393509Smrj * common implementation in genunix, so they no longer have x86 4394509Smrj * specific functionality which called into dma_ctl. 4395509Smrj * 4396509Smrj * The rest of the obsoleted interfaces were never supported in the 4397509Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4398509Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4399509Smrj * implementation issues. 4400509Smrj * 4401509Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4402509Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4403509Smrj * reflect that now too... 4404509Smrj * 4405509Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4406509Smrj * not going to put this functionality into the 64-bit x86 kernel now. 4407509Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 4408509Smrj * that in a future release. 4409509Smrj */ 4410509Smrj ASSERT(0); 4411509Smrj return (DDI_FAILURE); 4412509Smrj 4413509Smrj #else /* 32-bit x86 kernel */ 4414509Smrj ddi_dma_cookie_t lcookie; 4415509Smrj ddi_dma_cookie_t *cookie; 4416509Smrj rootnex_window_t *window; 4417509Smrj ddi_dma_impl_t *hp; 4418509Smrj rootnex_dma_t *dma; 4419509Smrj uint_t nwin; 4420509Smrj uint_t ccnt; 4421509Smrj size_t len; 4422509Smrj off_t off; 4423509Smrj int e; 4424509Smrj 4425509Smrj 4426509Smrj /* 4427509Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4428509Smrj * hacky since were optimizing for the current interfaces and so we can 4429509Smrj * cleanup the mess in genunix. Hopefully we will remove the this 4430509Smrj * obsoleted routines someday soon. 4431509Smrj */ 4432509Smrj 4433509Smrj switch (request) { 4434509Smrj 4435509Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4436509Smrj hp = (ddi_dma_impl_t *)handle; 4437509Smrj cookie = (ddi_dma_cookie_t *)objpp; 4438509Smrj 4439509Smrj /* 4440509Smrj * convert segment to cookie. We don't distinguish between the 4441509Smrj * two :-) 4442509Smrj */ 4443509Smrj *cookie = *hp->dmai_cookie; 4444509Smrj *lenp = cookie->dmac_size; 4445509Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4446509Smrj return (DDI_SUCCESS); 4447509Smrj 4448509Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4449509Smrj hp = (ddi_dma_impl_t *)handle; 4450509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4451509Smrj 4452509Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4453509Smrj return (DDI_DMA_STALE); 44540Sstevel@tonic-gate } 4455509Smrj 4456509Smrj /* handle the case where we don't have any windows */ 4457509Smrj if (dma->dp_window == NULL) { 4458509Smrj /* 4459509Smrj * if seg == NULL, and we don't have any windows, 4460509Smrj * return the first cookie in the sgl. 4461509Smrj */ 4462509Smrj if (*lenp == NULL) { 4463509Smrj dma->dp_current_cookie = 0; 4464509Smrj hp->dmai_cookie = dma->dp_cookies; 4465509Smrj *objpp = (caddr_t)handle; 4466509Smrj return (DDI_SUCCESS); 4467509Smrj 4468509Smrj /* if we have more cookies, go to the next cookie */ 4469509Smrj } else { 4470509Smrj if ((dma->dp_current_cookie + 1) >= 4471509Smrj dma->dp_sglinfo.si_sgl_size) { 4472509Smrj return (DDI_DMA_DONE); 4473509Smrj } 4474509Smrj dma->dp_current_cookie++; 4475509Smrj hp->dmai_cookie++; 4476509Smrj return (DDI_SUCCESS); 4477509Smrj } 4478509Smrj } 4479509Smrj 4480509Smrj /* We have one or more windows */ 4481509Smrj window = &dma->dp_window[dma->dp_current_win]; 4482509Smrj 4483509Smrj /* 4484509Smrj * if seg == NULL, return the first cookie in the current 4485509Smrj * window 4486509Smrj */ 4487509Smrj if (*lenp == NULL) { 4488509Smrj dma->dp_current_cookie = 0; 4489*683Smrj hp->dmai_cookie = window->wd_first_cookie; 4490509Smrj 4491509Smrj /* 4492509Smrj * go to the next cookie in the window then see if we done with 4493509Smrj * this window. 4494509Smrj */ 4495509Smrj } else { 4496509Smrj if ((dma->dp_current_cookie + 1) >= 4497509Smrj window->wd_cookie_cnt) { 4498509Smrj return (DDI_DMA_DONE); 4499509Smrj } 4500509Smrj dma->dp_current_cookie++; 4501509Smrj hp->dmai_cookie++; 4502509Smrj } 4503509Smrj *objpp = (caddr_t)handle; 4504509Smrj return (DDI_SUCCESS); 4505509Smrj 4506509Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4507509Smrj hp = (ddi_dma_impl_t *)handle; 4508509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4509509Smrj 4510509Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4511509Smrj return (DDI_DMA_STALE); 4512509Smrj } 4513509Smrj 4514509Smrj /* if win == NULL, return the first window in the bind */ 4515509Smrj if (*offp == NULL) { 4516509Smrj nwin = 0; 4517509Smrj 4518509Smrj /* 4519509Smrj * else, go to the next window then see if we're done with all 4520509Smrj * the windows. 4521509Smrj */ 4522509Smrj } else { 4523509Smrj nwin = dma->dp_current_win + 1; 4524509Smrj if (nwin >= hp->dmai_nwin) { 4525509Smrj return (DDI_DMA_DONE); 4526509Smrj } 4527509Smrj } 4528509Smrj 4529509Smrj /* switch to the next window */ 4530509Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4531509Smrj &lcookie, &ccnt); 4532509Smrj ASSERT(e == DDI_SUCCESS); 4533509Smrj if (e != DDI_SUCCESS) { 4534509Smrj return (DDI_DMA_STALE); 4535509Smrj } 4536509Smrj 4537509Smrj /* reset the cookie back to the first cookie in the window */ 4538509Smrj if (dma->dp_window != NULL) { 4539509Smrj window = &dma->dp_window[dma->dp_current_win]; 4540509Smrj hp->dmai_cookie = window->wd_first_cookie; 4541509Smrj } else { 4542509Smrj hp->dmai_cookie = dma->dp_cookies; 4543509Smrj } 4544509Smrj 4545509Smrj *objpp = (caddr_t)handle; 4546509Smrj return (DDI_SUCCESS); 4547509Smrj 4548509Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 4549509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4550509Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 4551509Smrj if (rootnex_state->r_dvma_call_list_id) { 4552509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4553509Smrj } 4554509Smrj return (DDI_SUCCESS); 4555509Smrj 4556509Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4557509Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4558509Smrj /* should never get here, handled in genunix */ 4559509Smrj ASSERT(0); 4560509Smrj return (DDI_FAILURE); 4561509Smrj 4562509Smrj case DDI_DMA_KVADDR: 4563509Smrj case DDI_DMA_GETERR: 4564509Smrj case DDI_DMA_COFF: 4565509Smrj return (DDI_FAILURE); 45660Sstevel@tonic-gate } 4567509Smrj 4568509Smrj return (DDI_FAILURE); 4569509Smrj #endif /* defined(__amd64) */ 45700Sstevel@tonic-gate } 4571