10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51865Sdilpreet * Common Development and Distribution License (the "License"). 61865Sdilpreet * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 225084Sjohnlev * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 270Sstevel@tonic-gate 280Sstevel@tonic-gate /* 29509Smrj * x86 root nexus driver 300Sstevel@tonic-gate */ 310Sstevel@tonic-gate 320Sstevel@tonic-gate #include <sys/sysmacros.h> 330Sstevel@tonic-gate #include <sys/conf.h> 340Sstevel@tonic-gate #include <sys/autoconf.h> 350Sstevel@tonic-gate #include <sys/sysmacros.h> 360Sstevel@tonic-gate #include <sys/debug.h> 370Sstevel@tonic-gate #include <sys/psw.h> 380Sstevel@tonic-gate #include <sys/ddidmareq.h> 390Sstevel@tonic-gate #include <sys/promif.h> 400Sstevel@tonic-gate #include <sys/devops.h> 410Sstevel@tonic-gate #include <sys/kmem.h> 420Sstevel@tonic-gate #include <sys/cmn_err.h> 430Sstevel@tonic-gate #include <vm/seg.h> 440Sstevel@tonic-gate #include <vm/seg_kmem.h> 450Sstevel@tonic-gate #include <vm/seg_dev.h> 460Sstevel@tonic-gate #include <sys/vmem.h> 470Sstevel@tonic-gate #include <sys/mman.h> 480Sstevel@tonic-gate #include <vm/hat.h> 490Sstevel@tonic-gate #include <vm/as.h> 500Sstevel@tonic-gate #include <vm/page.h> 510Sstevel@tonic-gate #include <sys/avintr.h> 520Sstevel@tonic-gate #include <sys/errno.h> 530Sstevel@tonic-gate #include <sys/modctl.h> 540Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 550Sstevel@tonic-gate #include <sys/sunddi.h> 560Sstevel@tonic-gate #include <sys/sunndi.h> 57916Sschwartz #include <sys/mach_intr.h> 580Sstevel@tonic-gate #include <sys/psm.h> 590Sstevel@tonic-gate #include <sys/ontrap.h> 60509Smrj #include <sys/atomic.h> 61509Smrj #include <sys/sdt.h> 62509Smrj #include <sys/rootnex.h> 63509Smrj #include <vm/hat_i86.h> 641865Sdilpreet #include <sys/ddifm.h> 65*5251Smrj #include <sys/ddi_isa.h> 66509Smrj 675084Sjohnlev #ifdef __xpv 685084Sjohnlev #include <sys/bootinfo.h> 695084Sjohnlev #include <sys/hypervisor.h> 705084Sjohnlev #include <sys/bootconf.h> 715084Sjohnlev #include <vm/kboot_mmu.h> 725084Sjohnlev #endif 735084Sjohnlev 74509Smrj /* 75509Smrj * enable/disable extra checking of function parameters. Useful for debugging 76509Smrj * drivers. 77509Smrj */ 78509Smrj #ifdef DEBUG 79509Smrj int rootnex_alloc_check_parms = 1; 80509Smrj int rootnex_bind_check_parms = 1; 81509Smrj int rootnex_bind_check_inuse = 1; 82509Smrj int rootnex_unbind_verify_buffer = 0; 83509Smrj int rootnex_sync_check_parms = 1; 84509Smrj #else 85509Smrj int rootnex_alloc_check_parms = 0; 86509Smrj int rootnex_bind_check_parms = 0; 87509Smrj int rootnex_bind_check_inuse = 0; 88509Smrj int rootnex_unbind_verify_buffer = 0; 89509Smrj int rootnex_sync_check_parms = 0; 90509Smrj #endif 91509Smrj 921414Scindi /* Master Abort and Target Abort panic flag */ 931414Scindi int rootnex_fm_ma_ta_panic_flag = 0; 941414Scindi 95509Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 960Sstevel@tonic-gate int rootnex_bind_fail = 1; 970Sstevel@tonic-gate int rootnex_bind_warn = 1; 980Sstevel@tonic-gate uint8_t *rootnex_warn_list; 990Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 1000Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 1010Sstevel@tonic-gate 1020Sstevel@tonic-gate /* 103509Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 104509Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 105509Smrj * the offset and size into ddi_dma_sync(). 1060Sstevel@tonic-gate */ 107509Smrj int rootnex_sync_ignore_params = 0; 1080Sstevel@tonic-gate 1090Sstevel@tonic-gate /* 110509Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 111509Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 112509Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 113509Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 114509Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 115509Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 116509Smrj * (if we need one). These can only be modified in /etc/system before rootnex 117509Smrj * attach. 1180Sstevel@tonic-gate */ 119509Smrj #if defined(__amd64) 120509Smrj int rootnex_prealloc_cookies = 65; 121509Smrj int rootnex_prealloc_windows = 4; 122509Smrj int rootnex_prealloc_copybuf = 2; 123509Smrj #else 124509Smrj int rootnex_prealloc_cookies = 33; 125509Smrj int rootnex_prealloc_windows = 4; 126509Smrj int rootnex_prealloc_copybuf = 2; 127509Smrj #endif 128509Smrj 129509Smrj /* driver global state */ 130509Smrj static rootnex_state_t *rootnex_state; 131509Smrj 132509Smrj /* shortcut to rootnex counters */ 133509Smrj static uint64_t *rootnex_cnt; 1340Sstevel@tonic-gate 1350Sstevel@tonic-gate /* 136509Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1370Sstevel@tonic-gate */ 138509Smrj /* statically defined integer/boolean properties for the root node */ 139509Smrj static rootnex_intprop_t rootnex_intprp[] = { 140509Smrj { "PAGESIZE", PAGESIZE }, 141509Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 142509Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 143509Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 144509Smrj }; 145509Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 146509Smrj 1475084Sjohnlev #ifdef __xpv 1485084Sjohnlev typedef maddr_t rootnex_addr_t; 1495084Sjohnlev #define ROOTNEX_PADDR_TO_RBASE(xinfo, pa) \ 1505084Sjohnlev (DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa)) 1515084Sjohnlev #else 1525084Sjohnlev typedef paddr_t rootnex_addr_t; 1535084Sjohnlev #endif 1545084Sjohnlev 155509Smrj 156509Smrj static struct cb_ops rootnex_cb_ops = { 157509Smrj nodev, /* open */ 158509Smrj nodev, /* close */ 159509Smrj nodev, /* strategy */ 160509Smrj nodev, /* print */ 161509Smrj nodev, /* dump */ 162509Smrj nodev, /* read */ 163509Smrj nodev, /* write */ 164509Smrj nodev, /* ioctl */ 165509Smrj nodev, /* devmap */ 166509Smrj nodev, /* mmap */ 167509Smrj nodev, /* segmap */ 168509Smrj nochpoll, /* chpoll */ 169509Smrj ddi_prop_op, /* cb_prop_op */ 170509Smrj NULL, /* struct streamtab */ 171509Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 172509Smrj CB_REV, /* Rev */ 173509Smrj nodev, /* cb_aread */ 174509Smrj nodev /* cb_awrite */ 175509Smrj }; 176509Smrj 177509Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1780Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 179509Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1800Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1810Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 182509Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1830Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 184509Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 185509Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 186509Smrj ddi_dma_handle_t *handlep); 187509Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 188509Smrj ddi_dma_handle_t handle); 189509Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 190509Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 191509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 192509Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 193509Smrj ddi_dma_handle_t handle); 194509Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 195509Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 196509Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 197509Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 198509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 199509Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 2000Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 2010Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 202509Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 203509Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 2041865Sdilpreet static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 2051865Sdilpreet ddi_iblock_cookie_t *ibc); 206509Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 207509Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 208509Smrj 2090Sstevel@tonic-gate 2100Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 2110Sstevel@tonic-gate BUSO_REV, 2120Sstevel@tonic-gate rootnex_map, 2130Sstevel@tonic-gate NULL, 2140Sstevel@tonic-gate NULL, 2150Sstevel@tonic-gate NULL, 2160Sstevel@tonic-gate rootnex_map_fault, 2170Sstevel@tonic-gate rootnex_dma_map, 2180Sstevel@tonic-gate rootnex_dma_allochdl, 2190Sstevel@tonic-gate rootnex_dma_freehdl, 2200Sstevel@tonic-gate rootnex_dma_bindhdl, 2210Sstevel@tonic-gate rootnex_dma_unbindhdl, 222509Smrj rootnex_dma_sync, 2230Sstevel@tonic-gate rootnex_dma_win, 2240Sstevel@tonic-gate rootnex_dma_mctl, 2250Sstevel@tonic-gate rootnex_ctlops, 2260Sstevel@tonic-gate ddi_bus_prop_op, 2270Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2280Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2290Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2300Sstevel@tonic-gate i_ddi_rootnex_post_event, 2310Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2320Sstevel@tonic-gate 0, /* bus_config */ 2330Sstevel@tonic-gate 0, /* bus_unconfig */ 2341865Sdilpreet rootnex_fm_init, /* bus_fm_init */ 2350Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2360Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2370Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2380Sstevel@tonic-gate NULL, /* bus_powr */ 2390Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2400Sstevel@tonic-gate }; 2410Sstevel@tonic-gate 242509Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 243509Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 2440Sstevel@tonic-gate 2450Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2460Sstevel@tonic-gate DEVO_REV, 247509Smrj 0, 248509Smrj ddi_no_info, 249509Smrj nulldev, 2500Sstevel@tonic-gate nulldev, 2510Sstevel@tonic-gate rootnex_attach, 252509Smrj rootnex_detach, 253509Smrj nulldev, 254509Smrj &rootnex_cb_ops, 2550Sstevel@tonic-gate &rootnex_bus_ops 2560Sstevel@tonic-gate }; 2570Sstevel@tonic-gate 258509Smrj static struct modldrv rootnex_modldrv = { 259509Smrj &mod_driverops, 260509Smrj "i86pc root nexus %I%", 261509Smrj &rootnex_ops 262509Smrj }; 263509Smrj 264509Smrj static struct modlinkage rootnex_modlinkage = { 265509Smrj MODREV_1, 266509Smrj (void *)&rootnex_modldrv, 267509Smrj NULL 268509Smrj }; 269509Smrj 270509Smrj 271509Smrj /* 272509Smrj * extern hacks 273509Smrj */ 274509Smrj extern struct seg_ops segdev_ops; 275509Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 276509Smrj #ifdef DDI_MAP_DEBUG 277509Smrj extern int ddi_map_debug_flag; 278509Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 279509Smrj #endif 280509Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 281509Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 282509Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 283509Smrj psm_intr_op_t, int *); 284509Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 285509Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 286*5251Smrj 287509Smrj /* 288509Smrj * Use device arena to use for device control register mappings. 289509Smrj * Various kernel memory walkers (debugger, dtrace) need to know 290509Smrj * to avoid this address range to prevent undesired device activity. 291509Smrj */ 292509Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 293509Smrj extern void device_arena_free(void * vaddr, size_t size); 294509Smrj 295509Smrj 2960Sstevel@tonic-gate /* 297509Smrj * Internal functions 2980Sstevel@tonic-gate */ 299509Smrj static int rootnex_dma_init(); 300509Smrj static void rootnex_add_props(dev_info_t *); 301509Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 302509Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 303509Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 304509Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 305509Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 306509Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 307509Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 308509Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 309509Smrj ddi_dma_attr_t *attr); 310509Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 311509Smrj rootnex_sglinfo_t *sglinfo); 312509Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 313509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 314509Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 315509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 316509Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 317509Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 318509Smrj ddi_dma_attr_t *attr, int kmflag); 319509Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 320509Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 321509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 322509Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 323509Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 324509Smrj size_t *copybuf_used, page_t **cur_pp); 325509Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 326509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 327509Smrj ddi_dma_attr_t *attr, off_t cur_offset); 328509Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 329509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 330509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 331509Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 332509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 333509Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 334509Smrj off_t offset, size_t size, uint_t cache_flags); 335509Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 3361865Sdilpreet static int rootnex_dma_check(dev_info_t *dip, const void *handle, 3371865Sdilpreet const void *comp_addr, const void *not_used); 338509Smrj 339509Smrj /* 340509Smrj * _init() 341509Smrj * 342509Smrj */ 3430Sstevel@tonic-gate int 3440Sstevel@tonic-gate _init(void) 3450Sstevel@tonic-gate { 346509Smrj 347509Smrj rootnex_state = NULL; 348509Smrj return (mod_install(&rootnex_modlinkage)); 3490Sstevel@tonic-gate } 3500Sstevel@tonic-gate 351509Smrj 352509Smrj /* 353509Smrj * _info() 354509Smrj * 355509Smrj */ 356509Smrj int 357509Smrj _info(struct modinfo *modinfop) 358509Smrj { 359509Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 360509Smrj } 361509Smrj 362509Smrj 363509Smrj /* 364509Smrj * _fini() 365509Smrj * 366509Smrj */ 3670Sstevel@tonic-gate int 3680Sstevel@tonic-gate _fini(void) 3690Sstevel@tonic-gate { 3700Sstevel@tonic-gate return (EBUSY); 3710Sstevel@tonic-gate } 3720Sstevel@tonic-gate 3730Sstevel@tonic-gate 3740Sstevel@tonic-gate /* 375509Smrj * rootnex_attach() 3760Sstevel@tonic-gate * 3770Sstevel@tonic-gate */ 378509Smrj static int 379509Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 380509Smrj { 3811414Scindi int fmcap; 382509Smrj int e; 383509Smrj 384509Smrj switch (cmd) { 385509Smrj case DDI_ATTACH: 386509Smrj break; 387509Smrj case DDI_RESUME: 388509Smrj return (DDI_SUCCESS); 389509Smrj default: 390509Smrj return (DDI_FAILURE); 391509Smrj } 392509Smrj 393509Smrj /* 394509Smrj * We should only have one instance of rootnex. Save it away since we 395509Smrj * don't have an easy way to get it back later. 396509Smrj */ 397509Smrj ASSERT(rootnex_state == NULL); 398509Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 399509Smrj 400509Smrj rootnex_state->r_dip = dip; 4011414Scindi rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 402509Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 403509Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 404509Smrj 4051414Scindi /* 4061414Scindi * Set minimum fm capability level for i86pc platforms and then 4071414Scindi * initialize error handling. Since we're the rootnex, we don't 4081414Scindi * care what's returned in the fmcap field. 4091414Scindi */ 4101865Sdilpreet ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 4111865Sdilpreet DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 4121414Scindi fmcap = ddi_system_fmcap; 4131414Scindi ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 4141414Scindi 415509Smrj /* initialize DMA related state */ 416509Smrj e = rootnex_dma_init(); 417509Smrj if (e != DDI_SUCCESS) { 418509Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 419509Smrj return (DDI_FAILURE); 420509Smrj } 421509Smrj 422509Smrj /* Add static root node properties */ 423509Smrj rootnex_add_props(dip); 424509Smrj 425509Smrj /* since we can't call ddi_report_dev() */ 426509Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 427509Smrj 428509Smrj /* Initialize rootnex event handle */ 429509Smrj i_ddi_rootnex_init_events(dip); 430509Smrj 431509Smrj return (DDI_SUCCESS); 432509Smrj } 433509Smrj 434509Smrj 435509Smrj /* 436509Smrj * rootnex_detach() 437509Smrj * 438509Smrj */ 4390Sstevel@tonic-gate /*ARGSUSED*/ 4400Sstevel@tonic-gate static int 441509Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 442509Smrj { 443509Smrj switch (cmd) { 444509Smrj case DDI_SUSPEND: 445509Smrj break; 446509Smrj default: 447509Smrj return (DDI_FAILURE); 448509Smrj } 449509Smrj 450509Smrj return (DDI_SUCCESS); 451509Smrj } 452509Smrj 453509Smrj 454509Smrj /* 455509Smrj * rootnex_dma_init() 456509Smrj * 457509Smrj */ 458509Smrj /*ARGSUSED*/ 459509Smrj static int 460509Smrj rootnex_dma_init() 4610Sstevel@tonic-gate { 462509Smrj size_t bufsize; 463509Smrj 464509Smrj 465509Smrj /* 466509Smrj * size of our cookie/window/copybuf state needed in dma bind that we 467509Smrj * pre-alloc in dma_alloc_handle 468509Smrj */ 469509Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 470509Smrj rootnex_state->r_prealloc_size = 471509Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 472509Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 473509Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 474509Smrj 475509Smrj /* 476509Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 477509Smrj * allocate 16 extra bytes for struct pointer alignment 478509Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 479509Smrj */ 480509Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 481509Smrj rootnex_state->r_prealloc_size + 0x10; 482509Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 483509Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 484509Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 485509Smrj return (DDI_FAILURE); 486509Smrj } 4870Sstevel@tonic-gate 4880Sstevel@tonic-gate /* 4890Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 4900Sstevel@tonic-gate * for. 4910Sstevel@tonic-gate */ 4920Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 4930Sstevel@tonic-gate KM_SLEEP); 4940Sstevel@tonic-gate 4950Sstevel@tonic-gate return (DDI_SUCCESS); 4960Sstevel@tonic-gate } 4970Sstevel@tonic-gate 4980Sstevel@tonic-gate 4990Sstevel@tonic-gate /* 500509Smrj * rootnex_add_props() 501509Smrj * 5020Sstevel@tonic-gate */ 5030Sstevel@tonic-gate static void 504509Smrj rootnex_add_props(dev_info_t *dip) 5050Sstevel@tonic-gate { 506509Smrj rootnex_intprop_t *rpp; 5070Sstevel@tonic-gate int i; 508509Smrj 509509Smrj /* Add static integer/boolean properties to the root node */ 510509Smrj rpp = rootnex_intprp; 511509Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 512509Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 513509Smrj rpp[i].prop_name, rpp[i].prop_value); 5140Sstevel@tonic-gate } 5150Sstevel@tonic-gate } 5160Sstevel@tonic-gate 517509Smrj 518509Smrj 519509Smrj /* 520509Smrj * ************************* 521509Smrj * ctlops related routines 522509Smrj * ************************* 523509Smrj */ 524509Smrj 5250Sstevel@tonic-gate /* 526509Smrj * rootnex_ctlops() 527509Smrj * 5280Sstevel@tonic-gate */ 529693Sgovinda /*ARGSUSED*/ 530509Smrj static int 531509Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 532509Smrj void *arg, void *result) 533509Smrj { 534509Smrj int n, *ptr; 535509Smrj struct ddi_parent_private_data *pdp; 536509Smrj 537509Smrj switch (ctlop) { 538509Smrj case DDI_CTLOPS_DMAPMAPC: 539509Smrj /* 540509Smrj * Return 'partial' to indicate that dma mapping 541509Smrj * has to be done in the main MMU. 542509Smrj */ 543509Smrj return (DDI_DMA_PARTIAL); 544509Smrj 545509Smrj case DDI_CTLOPS_BTOP: 546509Smrj /* 547509Smrj * Convert byte count input to physical page units. 548509Smrj * (byte counts that are not a page-size multiple 549509Smrj * are rounded down) 550509Smrj */ 551509Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 552509Smrj return (DDI_SUCCESS); 553509Smrj 554509Smrj case DDI_CTLOPS_PTOB: 555509Smrj /* 556509Smrj * Convert size in physical pages to bytes 557509Smrj */ 558509Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 559509Smrj return (DDI_SUCCESS); 560509Smrj 561509Smrj case DDI_CTLOPS_BTOPR: 562509Smrj /* 563509Smrj * Convert byte count input to physical page units 564509Smrj * (byte counts that are not a page-size multiple 565509Smrj * are rounded up) 566509Smrj */ 567509Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 568509Smrj return (DDI_SUCCESS); 569509Smrj 570509Smrj case DDI_CTLOPS_INITCHILD: 571509Smrj return (impl_ddi_sunbus_initchild(arg)); 572509Smrj 573509Smrj case DDI_CTLOPS_UNINITCHILD: 574509Smrj impl_ddi_sunbus_removechild(arg); 575509Smrj return (DDI_SUCCESS); 576509Smrj 577509Smrj case DDI_CTLOPS_REPORTDEV: 578509Smrj return (rootnex_ctl_reportdev(rdip)); 579509Smrj 580509Smrj case DDI_CTLOPS_IOMIN: 581509Smrj /* 582509Smrj * Nothing to do here but reflect back.. 583509Smrj */ 584509Smrj return (DDI_SUCCESS); 585509Smrj 586509Smrj case DDI_CTLOPS_REGSIZE: 587509Smrj case DDI_CTLOPS_NREGS: 588509Smrj break; 589509Smrj 590509Smrj case DDI_CTLOPS_SIDDEV: 591509Smrj if (ndi_dev_is_prom_node(rdip)) 592509Smrj return (DDI_SUCCESS); 593509Smrj if (ndi_dev_is_persistent_node(rdip)) 594509Smrj return (DDI_SUCCESS); 595509Smrj return (DDI_FAILURE); 596509Smrj 597509Smrj case DDI_CTLOPS_POWER: 598509Smrj return ((*pm_platform_power)((power_req_t *)arg)); 599509Smrj 600693Sgovinda case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 601509Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 602509Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 603509Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 604693Sgovinda case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 605693Sgovinda case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 606509Smrj if (!rootnex_state->r_reserved_msg_printed) { 607509Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 608509Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 609509Smrj "1 or more reserved/obsolete operations."); 610509Smrj } 611509Smrj return (DDI_FAILURE); 612509Smrj 613509Smrj default: 614509Smrj return (DDI_FAILURE); 615509Smrj } 616509Smrj /* 617509Smrj * The rest are for "hardware" properties 618509Smrj */ 619509Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 620509Smrj return (DDI_FAILURE); 621509Smrj 622509Smrj if (ctlop == DDI_CTLOPS_NREGS) { 623509Smrj ptr = (int *)result; 624509Smrj *ptr = pdp->par_nreg; 625509Smrj } else { 626509Smrj off_t *size = (off_t *)result; 627509Smrj 628509Smrj ptr = (int *)arg; 629509Smrj n = *ptr; 630509Smrj if (n >= pdp->par_nreg) { 631509Smrj return (DDI_FAILURE); 632509Smrj } 633509Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 634509Smrj } 635509Smrj return (DDI_SUCCESS); 636509Smrj } 6370Sstevel@tonic-gate 6380Sstevel@tonic-gate 6390Sstevel@tonic-gate /* 640509Smrj * rootnex_ctl_reportdev() 641509Smrj * 6420Sstevel@tonic-gate */ 6430Sstevel@tonic-gate static int 644509Smrj rootnex_ctl_reportdev(dev_info_t *dev) 6450Sstevel@tonic-gate { 646509Smrj int i, n, len, f_len = 0; 647509Smrj char *buf; 648509Smrj 649509Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 650509Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 651509Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 652509Smrj len = strlen(buf); 653509Smrj 654509Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 655509Smrj 656509Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 657509Smrj 658509Smrj if (i == 0) 659509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 660509Smrj ": "); 661509Smrj else 662509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 663509Smrj " and "); 664509Smrj len = strlen(buf); 665509Smrj 666509Smrj switch (rp->regspec_bustype) { 667509Smrj 668509Smrj case BTEISA: 669509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 670509Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 6710Sstevel@tonic-gate break; 672509Smrj 673509Smrj case BTISA: 674509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 675509Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 6760Sstevel@tonic-gate break; 677509Smrj 678509Smrj default: 679509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 680509Smrj "space %x offset %x", 681509Smrj rp->regspec_bustype, rp->regspec_addr); 6820Sstevel@tonic-gate break; 6830Sstevel@tonic-gate } 684509Smrj len = strlen(buf); 6850Sstevel@tonic-gate } 686509Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 687509Smrj int pri; 688509Smrj 689509Smrj if (i != 0) { 690509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 691509Smrj ","); 692509Smrj len = strlen(buf); 693509Smrj } 694509Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 695509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 696509Smrj " sparc ipl %d", pri); 697509Smrj len = strlen(buf); 6980Sstevel@tonic-gate } 699509Smrj #ifdef DEBUG 700509Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 701509Smrj cmn_err(CE_NOTE, "next message is truncated: " 702509Smrj "printed length 1024, real length %d", f_len); 703509Smrj } 704509Smrj #endif /* DEBUG */ 705509Smrj cmn_err(CE_CONT, "?%s\n", buf); 706509Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 7070Sstevel@tonic-gate return (DDI_SUCCESS); 7080Sstevel@tonic-gate } 7090Sstevel@tonic-gate 710509Smrj 711509Smrj /* 712509Smrj * ****************** 713509Smrj * map related code 714509Smrj * ****************** 715509Smrj */ 716509Smrj 717509Smrj /* 718509Smrj * rootnex_map() 719509Smrj * 720509Smrj */ 7210Sstevel@tonic-gate static int 722509Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 723509Smrj off_t len, caddr_t *vaddrp) 7240Sstevel@tonic-gate { 7250Sstevel@tonic-gate struct regspec *rp, tmp_reg; 7260Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 7270Sstevel@tonic-gate int error; 7280Sstevel@tonic-gate 7290Sstevel@tonic-gate mp = &mr; 7300Sstevel@tonic-gate 7310Sstevel@tonic-gate switch (mp->map_op) { 7320Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 7330Sstevel@tonic-gate case DDI_MO_UNMAP: 7340Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 7350Sstevel@tonic-gate break; 7360Sstevel@tonic-gate default: 7370Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7380Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 7390Sstevel@tonic-gate mp->map_op); 7400Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7410Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 7420Sstevel@tonic-gate } 7430Sstevel@tonic-gate 7440Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 7450Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7460Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 7470Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7480Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 7490Sstevel@tonic-gate } 7500Sstevel@tonic-gate 7510Sstevel@tonic-gate /* 7520Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 7530Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 7540Sstevel@tonic-gate */ 7550Sstevel@tonic-gate 7560Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 7570Sstevel@tonic-gate 7580Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 7590Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7600Sstevel@tonic-gate static char *out_of_range = 7610Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 7620Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7630Sstevel@tonic-gate 7640Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 7650Sstevel@tonic-gate if (rp == NULL) { 7660Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7670Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 7680Sstevel@tonic-gate ddi_get_name(rdip)); 7690Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7700Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 7710Sstevel@tonic-gate } 7720Sstevel@tonic-gate 7730Sstevel@tonic-gate /* 7740Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 7750Sstevel@tonic-gate */ 7760Sstevel@tonic-gate 7770Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 7780Sstevel@tonic-gate mp->map_obj.rp = rp; 7790Sstevel@tonic-gate } 7800Sstevel@tonic-gate 7810Sstevel@tonic-gate /* 7820Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 7830Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 7840Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 7850Sstevel@tonic-gate */ 7860Sstevel@tonic-gate 7870Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 7880Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 7890Sstevel@tonic-gate 7900Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 7915084Sjohnlev cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 7925084Sjohnlev "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 7935084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 7945084Sjohnlev len, mp->map_handlep); 7950Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 7960Sstevel@tonic-gate 7970Sstevel@tonic-gate /* 7980Sstevel@tonic-gate * I/O or memory mapping: 7990Sstevel@tonic-gate * 8000Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 8010Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 8020Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 8030Sstevel@tonic-gate */ 8040Sstevel@tonic-gate 8050Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 8060Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 8070Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 8080Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 8090Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 8100Sstevel@tonic-gate return (DDI_ME_INVAL); 8110Sstevel@tonic-gate } 8120Sstevel@tonic-gate 8130Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 8140Sstevel@tonic-gate /* 8150Sstevel@tonic-gate * compatibility i/o mapping 8160Sstevel@tonic-gate */ 8170Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 8180Sstevel@tonic-gate } else { 8190Sstevel@tonic-gate /* 8200Sstevel@tonic-gate * Normal memory or i/o mapping 8210Sstevel@tonic-gate */ 8220Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 8230Sstevel@tonic-gate } 8240Sstevel@tonic-gate 8250Sstevel@tonic-gate if (len != 0) 8260Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 8270Sstevel@tonic-gate 8280Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8295084Sjohnlev cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 8305084Sjohnlev "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 8315084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 8325084Sjohnlev offset, len, mp->map_handlep); 8330Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8340Sstevel@tonic-gate 8350Sstevel@tonic-gate /* 8360Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 8370Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 8380Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 8390Sstevel@tonic-gate * provided via ddi_apply_range.) 8400Sstevel@tonic-gate */ 8410Sstevel@tonic-gate 8420Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8430Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 8440Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 8450Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8460Sstevel@tonic-gate 8470Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 8480Sstevel@tonic-gate return (error); 8490Sstevel@tonic-gate 8500Sstevel@tonic-gate switch (mp->map_op) { 8510Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8520Sstevel@tonic-gate 8530Sstevel@tonic-gate /* 8540Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 8550Sstevel@tonic-gate */ 8560Sstevel@tonic-gate 8570Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 8580Sstevel@tonic-gate 8590Sstevel@tonic-gate case DDI_MO_UNMAP: 8600Sstevel@tonic-gate 8610Sstevel@tonic-gate /* 8620Sstevel@tonic-gate * Release mapping... 8630Sstevel@tonic-gate */ 8640Sstevel@tonic-gate 8650Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 8660Sstevel@tonic-gate 8670Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8680Sstevel@tonic-gate 8690Sstevel@tonic-gate return (rootnex_map_handle(mp)); 8700Sstevel@tonic-gate 8710Sstevel@tonic-gate default: 8720Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8730Sstevel@tonic-gate } 8740Sstevel@tonic-gate } 8750Sstevel@tonic-gate 8760Sstevel@tonic-gate 8770Sstevel@tonic-gate /* 878509Smrj * rootnex_map_fault() 8790Sstevel@tonic-gate * 8800Sstevel@tonic-gate * fault in mappings for requestors 8810Sstevel@tonic-gate */ 8820Sstevel@tonic-gate /*ARGSUSED*/ 8830Sstevel@tonic-gate static int 884509Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 885509Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 886509Smrj uint_t lock) 8870Sstevel@tonic-gate { 8880Sstevel@tonic-gate 8890Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8900Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 8910Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 8920Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 8930Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 8940Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8950Sstevel@tonic-gate 8960Sstevel@tonic-gate /* 8970Sstevel@tonic-gate * This is all terribly broken, but it is a start 8980Sstevel@tonic-gate * 8990Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 9000Sstevel@tonic-gate * must be exported from seg_dev.c. 9010Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 9020Sstevel@tonic-gate */ 9030Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 9045084Sjohnlev struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 9050Sstevel@tonic-gate 9060Sstevel@tonic-gate if (hat == NULL) { 9070Sstevel@tonic-gate /* 9080Sstevel@tonic-gate * This is one plausible interpretation of 9090Sstevel@tonic-gate * a null hat i.e. use the first hat on the 9100Sstevel@tonic-gate * address space hat list which by convention is 9110Sstevel@tonic-gate * the hat of the system MMU. At alternative 9120Sstevel@tonic-gate * would be to panic .. this might well be better .. 9130Sstevel@tonic-gate */ 9140Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 9150Sstevel@tonic-gate hat = seg->s_as->a_hat; 9160Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 9170Sstevel@tonic-gate } 9180Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 9190Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 9200Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 9210Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 9220Sstevel@tonic-gate HAT_LOAD_LOCK); 9230Sstevel@tonic-gate } else 9240Sstevel@tonic-gate return (DDI_FAILURE); 9250Sstevel@tonic-gate return (DDI_SUCCESS); 9260Sstevel@tonic-gate } 9270Sstevel@tonic-gate 9280Sstevel@tonic-gate 9290Sstevel@tonic-gate /* 930509Smrj * rootnex_map_regspec() 931509Smrj * we don't support mapping of I/O cards above 4Gb 9320Sstevel@tonic-gate */ 933509Smrj static int 934509Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 935509Smrj { 9365084Sjohnlev rootnex_addr_t rbase; 937509Smrj void *cvaddr; 938509Smrj uint_t npages, pgoffset; 939509Smrj struct regspec *rp; 940509Smrj ddi_acc_hdl_t *hp; 941509Smrj ddi_acc_impl_t *ap; 942509Smrj uint_t hat_acc_flags; 9435084Sjohnlev paddr_t pbase; 944509Smrj 945509Smrj rp = mp->map_obj.rp; 946509Smrj hp = mp->map_handlep; 947509Smrj 948509Smrj #ifdef DDI_MAP_DEBUG 949509Smrj ddi_map_debug( 950509Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 951509Smrj rp->regspec_bustype, rp->regspec_addr, 952509Smrj rp->regspec_size, mp->map_handlep); 953509Smrj #endif /* DDI_MAP_DEBUG */ 954509Smrj 955509Smrj /* 956509Smrj * I/O or memory mapping 957509Smrj * 958509Smrj * <bustype=0, addr=x, len=x>: memory 959509Smrj * <bustype=1, addr=x, len=x>: i/o 960509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 961509Smrj */ 962509Smrj 963509Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 964509Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 965509Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 966509Smrj rp->regspec_addr, rp->regspec_size); 967509Smrj return (DDI_FAILURE); 968509Smrj } 969509Smrj 970509Smrj if (rp->regspec_bustype != 0) { 971509Smrj /* 972509Smrj * I/O space - needs a handle. 973509Smrj */ 974509Smrj if (hp == NULL) { 975509Smrj return (DDI_FAILURE); 976509Smrj } 977509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 978509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 979509Smrj impl_acc_hdl_init(hp); 980509Smrj 981509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 982509Smrj #ifdef DDI_MAP_DEBUG 9835084Sjohnlev ddi_map_debug("rootnex_map_regspec: mmap() " 9845084Sjohnlev "to I/O space is not supported.\n"); 985509Smrj #endif /* DDI_MAP_DEBUG */ 986509Smrj return (DDI_ME_INVAL); 987509Smrj } else { 988509Smrj /* 989509Smrj * 1275-compliant vs. compatibility i/o mapping 990509Smrj */ 991509Smrj *vaddrp = 992509Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 9935084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_bustype) : 9945084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_addr); 9955084Sjohnlev #ifdef __xpv 9965084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 9975084Sjohnlev hp->ah_pfn = xen_assign_pfn( 9985084Sjohnlev mmu_btop((ulong_t)rp->regspec_addr & 9995084Sjohnlev MMU_PAGEMASK)); 10005084Sjohnlev } else { 10015084Sjohnlev hp->ah_pfn = mmu_btop( 10025084Sjohnlev (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 10035084Sjohnlev } 10045084Sjohnlev #else 10051865Sdilpreet hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 10065084Sjohnlev MMU_PAGEMASK); 10075084Sjohnlev #endif 10081865Sdilpreet hp->ah_pnum = mmu_btopr(rp->regspec_size + 10091865Sdilpreet (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1010509Smrj } 1011509Smrj 1012509Smrj #ifdef DDI_MAP_DEBUG 1013509Smrj ddi_map_debug( 1014509Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1015509Smrj rp->regspec_size, *vaddrp); 1016509Smrj #endif /* DDI_MAP_DEBUG */ 1017509Smrj return (DDI_SUCCESS); 1018509Smrj } 1019509Smrj 1020509Smrj /* 1021509Smrj * Memory space 1022509Smrj */ 1023509Smrj 1024509Smrj if (hp != NULL) { 1025509Smrj /* 1026509Smrj * hat layer ignores 1027509Smrj * hp->ah_acc.devacc_attr_endian_flags. 1028509Smrj */ 1029509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1030509Smrj case DDI_STRICTORDER_ACC: 1031509Smrj hat_acc_flags = HAT_STRICTORDER; 1032509Smrj break; 1033509Smrj case DDI_UNORDERED_OK_ACC: 1034509Smrj hat_acc_flags = HAT_UNORDERED_OK; 1035509Smrj break; 1036509Smrj case DDI_MERGING_OK_ACC: 1037509Smrj hat_acc_flags = HAT_MERGING_OK; 1038509Smrj break; 1039509Smrj case DDI_LOADCACHING_OK_ACC: 1040509Smrj hat_acc_flags = HAT_LOADCACHING_OK; 1041509Smrj break; 1042509Smrj case DDI_STORECACHING_OK_ACC: 1043509Smrj hat_acc_flags = HAT_STORECACHING_OK; 1044509Smrj break; 1045509Smrj } 1046509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1047509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1048509Smrj impl_acc_hdl_init(hp); 1049509Smrj hp->ah_hat_flags = hat_acc_flags; 1050509Smrj } else { 1051509Smrj hat_acc_flags = HAT_STRICTORDER; 1052509Smrj } 1053509Smrj 10545084Sjohnlev rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 10555084Sjohnlev #ifdef __xpv 10565084Sjohnlev /* 10575084Sjohnlev * If we're dom0, we're using a real device so we need to translate 10585084Sjohnlev * the MA to a PA. 10595084Sjohnlev */ 10605084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 10615084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 10625084Sjohnlev } else { 10635084Sjohnlev pbase = rbase; 10645084Sjohnlev } 10655084Sjohnlev #else 10665084Sjohnlev pbase = rbase; 10675084Sjohnlev #endif 10685084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1069509Smrj 1070509Smrj if (rp->regspec_size == 0) { 1071509Smrj #ifdef DDI_MAP_DEBUG 1072509Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1073509Smrj #endif /* DDI_MAP_DEBUG */ 1074509Smrj return (DDI_ME_INVAL); 1075509Smrj } 1076509Smrj 1077509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 10785084Sjohnlev /* extra cast to make gcc happy */ 10795084Sjohnlev *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1080509Smrj } else { 1081509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1082509Smrj 1083509Smrj #ifdef DDI_MAP_DEBUG 10845084Sjohnlev ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 10855084Sjohnlev "physical %llx", npages, pbase); 1086509Smrj #endif /* DDI_MAP_DEBUG */ 1087509Smrj 1088509Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1089509Smrj if (cvaddr == NULL) 1090509Smrj return (DDI_ME_NORESOURCES); 1091509Smrj 1092509Smrj /* 1093509Smrj * Now map in the pages we've allocated... 1094509Smrj */ 10955084Sjohnlev hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 10965084Sjohnlev mmu_btop(pbase), mp->map_prot | hat_acc_flags, 10975084Sjohnlev HAT_LOAD_LOCK); 1098509Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 10991865Sdilpreet 11001865Sdilpreet /* save away pfn and npages for FMA */ 11011865Sdilpreet hp = mp->map_handlep; 11021865Sdilpreet if (hp) { 11035084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 11041865Sdilpreet hp->ah_pnum = npages; 11051865Sdilpreet } 1106509Smrj } 1107509Smrj 1108509Smrj #ifdef DDI_MAP_DEBUG 1109509Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1110509Smrj #endif /* DDI_MAP_DEBUG */ 1111509Smrj return (DDI_SUCCESS); 1112509Smrj } 1113509Smrj 11140Sstevel@tonic-gate 11150Sstevel@tonic-gate /* 1116509Smrj * rootnex_unmap_regspec() 1117509Smrj * 1118509Smrj */ 1119509Smrj static int 1120509Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1121509Smrj { 1122509Smrj caddr_t addr = (caddr_t)*vaddrp; 1123509Smrj uint_t npages, pgoffset; 1124509Smrj struct regspec *rp; 1125509Smrj 1126509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1127509Smrj return (0); 1128509Smrj 1129509Smrj rp = mp->map_obj.rp; 1130509Smrj 1131509Smrj if (rp->regspec_size == 0) { 1132509Smrj #ifdef DDI_MAP_DEBUG 1133509Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1134509Smrj #endif /* DDI_MAP_DEBUG */ 1135509Smrj return (DDI_ME_INVAL); 1136509Smrj } 1137509Smrj 1138509Smrj /* 1139509Smrj * I/O or memory mapping: 1140509Smrj * 1141509Smrj * <bustype=0, addr=x, len=x>: memory 1142509Smrj * <bustype=1, addr=x, len=x>: i/o 1143509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1144509Smrj */ 1145509Smrj if (rp->regspec_bustype != 0) { 1146509Smrj /* 1147509Smrj * This is I/O space, which requires no particular 1148509Smrj * processing on unmap since it isn't mapped in the 1149509Smrj * first place. 1150509Smrj */ 1151509Smrj return (DDI_SUCCESS); 1152509Smrj } 1153509Smrj 1154509Smrj /* 1155509Smrj * Memory space 1156509Smrj */ 1157509Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1158509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1159509Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1160509Smrj device_arena_free(addr - pgoffset, ptob(npages)); 1161509Smrj 1162509Smrj /* 1163509Smrj * Destroy the pointer - the mapping has logically gone 1164509Smrj */ 1165509Smrj *vaddrp = NULL; 1166509Smrj 1167509Smrj return (DDI_SUCCESS); 1168509Smrj } 1169509Smrj 1170509Smrj 1171509Smrj /* 1172509Smrj * rootnex_map_handle() 1173509Smrj * 11740Sstevel@tonic-gate */ 1175509Smrj static int 1176509Smrj rootnex_map_handle(ddi_map_req_t *mp) 1177509Smrj { 11785084Sjohnlev rootnex_addr_t rbase; 1179509Smrj ddi_acc_hdl_t *hp; 1180509Smrj uint_t pgoffset; 1181509Smrj struct regspec *rp; 11825084Sjohnlev paddr_t pbase; 1183509Smrj 1184509Smrj rp = mp->map_obj.rp; 1185509Smrj 1186509Smrj #ifdef DDI_MAP_DEBUG 1187509Smrj ddi_map_debug( 1188509Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1189509Smrj rp->regspec_bustype, rp->regspec_addr, 1190509Smrj rp->regspec_size, mp->map_handlep); 1191509Smrj #endif /* DDI_MAP_DEBUG */ 1192509Smrj 1193509Smrj /* 1194509Smrj * I/O or memory mapping: 1195509Smrj * 1196509Smrj * <bustype=0, addr=x, len=x>: memory 1197509Smrj * <bustype=1, addr=x, len=x>: i/o 1198509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1199509Smrj */ 1200509Smrj if (rp->regspec_bustype != 0) { 1201509Smrj /* 1202509Smrj * This refers to I/O space, and we don't support "mapping" 1203509Smrj * I/O space to a user. 1204509Smrj */ 1205509Smrj return (DDI_FAILURE); 1206509Smrj } 1207509Smrj 1208509Smrj /* 1209509Smrj * Set up the hat_flags for the mapping. 1210509Smrj */ 1211509Smrj hp = mp->map_handlep; 1212509Smrj 1213509Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 1214509Smrj case DDI_NEVERSWAP_ACC: 1215509Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1216509Smrj break; 1217509Smrj case DDI_STRUCTURE_LE_ACC: 1218509Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 1219509Smrj break; 1220509Smrj case DDI_STRUCTURE_BE_ACC: 1221509Smrj return (DDI_FAILURE); 1222509Smrj default: 1223509Smrj return (DDI_REGS_ACC_CONFLICT); 1224509Smrj } 1225509Smrj 1226509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1227509Smrj case DDI_STRICTORDER_ACC: 1228509Smrj break; 1229509Smrj case DDI_UNORDERED_OK_ACC: 1230509Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 1231509Smrj break; 1232509Smrj case DDI_MERGING_OK_ACC: 1233509Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 1234509Smrj break; 1235509Smrj case DDI_LOADCACHING_OK_ACC: 1236509Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1237509Smrj break; 1238509Smrj case DDI_STORECACHING_OK_ACC: 1239509Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 1240509Smrj break; 1241509Smrj default: 1242509Smrj return (DDI_FAILURE); 1243509Smrj } 1244509Smrj 12455084Sjohnlev rbase = (rootnex_addr_t)rp->regspec_addr & 12465084Sjohnlev (~(rootnex_addr_t)MMU_PAGEOFFSET); 12475084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1248509Smrj 1249509Smrj if (rp->regspec_size == 0) 1250509Smrj return (DDI_ME_INVAL); 1251509Smrj 12525084Sjohnlev #ifdef __xpv 12535084Sjohnlev /* 12545084Sjohnlev * If we're dom0, we're using a real device so we need to translate 12555084Sjohnlev * the MA to a PA. 12565084Sjohnlev */ 12575084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 12585084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 12595084Sjohnlev (rbase & MMU_PAGEOFFSET); 12605084Sjohnlev } else { 12615084Sjohnlev pbase = rbase; 12625084Sjohnlev } 12635084Sjohnlev #else 12645084Sjohnlev pbase = rbase; 12655084Sjohnlev #endif 12665084Sjohnlev 12675084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 1268509Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1269509Smrj 1270509Smrj return (DDI_SUCCESS); 1271509Smrj } 12720Sstevel@tonic-gate 12730Sstevel@tonic-gate 12740Sstevel@tonic-gate 12750Sstevel@tonic-gate /* 1276509Smrj * ************************ 1277509Smrj * interrupt related code 1278509Smrj * ************************ 12790Sstevel@tonic-gate */ 12800Sstevel@tonic-gate 12810Sstevel@tonic-gate /* 1282509Smrj * rootnex_intr_ops() 12830Sstevel@tonic-gate * bus_intr_op() function for interrupt support 12840Sstevel@tonic-gate */ 12850Sstevel@tonic-gate /* ARGSUSED */ 12860Sstevel@tonic-gate static int 12870Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 12880Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 12890Sstevel@tonic-gate { 12900Sstevel@tonic-gate struct intrspec *ispec; 12910Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 12920Sstevel@tonic-gate 12930Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 12940Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 12950Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 12960Sstevel@tonic-gate 12970Sstevel@tonic-gate /* Process the interrupt operation */ 12980Sstevel@tonic-gate switch (intr_op) { 12990Sstevel@tonic-gate case DDI_INTROP_GETCAP: 13000Sstevel@tonic-gate /* First check with pcplusmp */ 13010Sstevel@tonic-gate if (psm_intr_ops == NULL) 13020Sstevel@tonic-gate return (DDI_FAILURE); 13030Sstevel@tonic-gate 13040Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13050Sstevel@tonic-gate *(int *)result = 0; 13060Sstevel@tonic-gate return (DDI_FAILURE); 13070Sstevel@tonic-gate } 13080Sstevel@tonic-gate break; 13090Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13100Sstevel@tonic-gate if (psm_intr_ops == NULL) 13110Sstevel@tonic-gate return (DDI_FAILURE); 13120Sstevel@tonic-gate 13130Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13140Sstevel@tonic-gate return (DDI_FAILURE); 13150Sstevel@tonic-gate break; 13160Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13170Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13180Sstevel@tonic-gate return (DDI_FAILURE); 13190Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13200Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 13210Sstevel@tonic-gate break; 13220Sstevel@tonic-gate case DDI_INTROP_FREE: 13230Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 13240Sstevel@tonic-gate /* 13250Sstevel@tonic-gate * Special case for 'pcic' driver' only. 13260Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 13270Sstevel@tonic-gate * See detailed comments on this in the function 13280Sstevel@tonic-gate * rootnex_get_ispec(). 13290Sstevel@tonic-gate */ 13300Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 13310Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 13320Sstevel@tonic-gate pdp->par_nintr); 13330Sstevel@tonic-gate /* 13340Sstevel@tonic-gate * Set it to zero; so that 13350Sstevel@tonic-gate * DDI framework doesn't free it again 13360Sstevel@tonic-gate */ 13370Sstevel@tonic-gate pdp->par_intr = NULL; 13380Sstevel@tonic-gate pdp->par_nintr = 0; 13390Sstevel@tonic-gate } 13400Sstevel@tonic-gate break; 13410Sstevel@tonic-gate case DDI_INTROP_GETPRI: 13420Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13430Sstevel@tonic-gate return (DDI_FAILURE); 13440Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 13450Sstevel@tonic-gate break; 13460Sstevel@tonic-gate case DDI_INTROP_SETPRI: 13470Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 13480Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 13490Sstevel@tonic-gate return (DDI_FAILURE); 13500Sstevel@tonic-gate 13510Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 13520Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 13530Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 13540Sstevel@tonic-gate return (DDI_FAILURE); 13550Sstevel@tonic-gate 13560Sstevel@tonic-gate /* Change the priority */ 13570Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 13580Sstevel@tonic-gate PSM_FAILURE) 13590Sstevel@tonic-gate return (DDI_FAILURE); 13600Sstevel@tonic-gate 13610Sstevel@tonic-gate /* update the ispec with the new priority */ 13620Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 13630Sstevel@tonic-gate break; 13640Sstevel@tonic-gate case DDI_INTROP_ADDISR: 13650Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13660Sstevel@tonic-gate return (DDI_FAILURE); 13670Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 13680Sstevel@tonic-gate break; 13690Sstevel@tonic-gate case DDI_INTROP_REMISR: 13700Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13710Sstevel@tonic-gate return (DDI_FAILURE); 13720Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 13730Sstevel@tonic-gate break; 13740Sstevel@tonic-gate case DDI_INTROP_ENABLE: 13750Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13760Sstevel@tonic-gate return (DDI_FAILURE); 13770Sstevel@tonic-gate 13780Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 13790Sstevel@tonic-gate if (psm_intr_ops == NULL) 13800Sstevel@tonic-gate return (DDI_FAILURE); 13810Sstevel@tonic-gate 1382916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 13830Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 13840Sstevel@tonic-gate (int *)&hdlp->ih_vector); 13850Sstevel@tonic-gate 13860Sstevel@tonic-gate /* Add the interrupt handler */ 13870Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 13880Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1389916Sschwartz hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 13900Sstevel@tonic-gate return (DDI_FAILURE); 13910Sstevel@tonic-gate break; 13920Sstevel@tonic-gate case DDI_INTROP_DISABLE: 13930Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13940Sstevel@tonic-gate return (DDI_FAILURE); 13950Sstevel@tonic-gate 13960Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 13970Sstevel@tonic-gate if (psm_intr_ops == NULL) 13980Sstevel@tonic-gate return (DDI_FAILURE); 13990Sstevel@tonic-gate 1400916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14010Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14020Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14030Sstevel@tonic-gate 14040Sstevel@tonic-gate /* Remove the interrupt handler */ 14050Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14060Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14070Sstevel@tonic-gate break; 14080Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14090Sstevel@tonic-gate if (psm_intr_ops == NULL) 14100Sstevel@tonic-gate return (DDI_FAILURE); 14110Sstevel@tonic-gate 14120Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14130Sstevel@tonic-gate return (DDI_FAILURE); 14140Sstevel@tonic-gate break; 14150Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14160Sstevel@tonic-gate if (psm_intr_ops == NULL) 14170Sstevel@tonic-gate return (DDI_FAILURE); 14180Sstevel@tonic-gate 14190Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14200Sstevel@tonic-gate return (DDI_FAILURE); 14210Sstevel@tonic-gate break; 14220Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 14230Sstevel@tonic-gate if (psm_intr_ops == NULL) 14240Sstevel@tonic-gate return (DDI_FAILURE); 14250Sstevel@tonic-gate 14260Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 14270Sstevel@tonic-gate result)) { 14280Sstevel@tonic-gate *(int *)result = 0; 14290Sstevel@tonic-gate return (DDI_FAILURE); 14300Sstevel@tonic-gate } 14310Sstevel@tonic-gate break; 14322580Sanish case DDI_INTROP_NAVAIL: 14330Sstevel@tonic-gate case DDI_INTROP_NINTRS: 14342580Sanish *(int *)result = i_ddi_get_intx_nintrs(rdip); 14352580Sanish if (*(int *)result == 0) { 14360Sstevel@tonic-gate /* 14370Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 14380Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 14390Sstevel@tonic-gate * 14400Sstevel@tonic-gate * See detailed comments on this in the function 14410Sstevel@tonic-gate * rootnex_get_ispec(). 14420Sstevel@tonic-gate * 14430Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 14440Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 14450Sstevel@tonic-gate * field may not initialized. So, we fake it here 14460Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 14470Sstevel@tonic-gate */ 14480Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 14490Sstevel@tonic-gate *(int *)result = 1; 14502580Sanish else 14512580Sanish return (DDI_FAILURE); 14520Sstevel@tonic-gate } 14530Sstevel@tonic-gate break; 14540Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 14552580Sanish *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 14560Sstevel@tonic-gate break; 14570Sstevel@tonic-gate default: 14580Sstevel@tonic-gate return (DDI_FAILURE); 14590Sstevel@tonic-gate } 14600Sstevel@tonic-gate 14610Sstevel@tonic-gate return (DDI_SUCCESS); 14620Sstevel@tonic-gate } 14630Sstevel@tonic-gate 14640Sstevel@tonic-gate 14650Sstevel@tonic-gate /* 1466509Smrj * rootnex_get_ispec() 1467509Smrj * convert an interrupt number to an interrupt specification. 1468509Smrj * The interrupt number determines which interrupt spec will be 1469509Smrj * returned if more than one exists. 1470509Smrj * 1471509Smrj * Look into the parent private data area of the 'rdip' to find out 1472509Smrj * the interrupt specification. First check to make sure there is 1473509Smrj * one that matchs "inumber" and then return a pointer to it. 1474509Smrj * 1475509Smrj * Return NULL if one could not be found. 1476509Smrj * 1477509Smrj * NOTE: This is needed for rootnex_intr_ops() 1478509Smrj */ 1479509Smrj static struct intrspec * 1480509Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 1481509Smrj { 1482509Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1483509Smrj 1484509Smrj /* 1485509Smrj * Special case handling for drivers that provide their own 1486509Smrj * intrspec structures instead of relying on the DDI framework. 1487509Smrj * 1488509Smrj * A broken hardware driver in ON could potentially provide its 1489509Smrj * own intrspec structure, instead of relying on the hardware. 1490509Smrj * If these drivers are children of 'rootnex' then we need to 1491509Smrj * continue to provide backward compatibility to them here. 1492509Smrj * 1493509Smrj * Following check is a special case for 'pcic' driver which 1494509Smrj * was found to have broken hardwre andby provides its own intrspec. 1495509Smrj * 1496509Smrj * Verbatim comments from this driver are shown here: 1497509Smrj * "Don't use the ddi_add_intr since we don't have a 1498509Smrj * default intrspec in all cases." 1499509Smrj * 1500509Smrj * Since an 'ispec' may not be always created for it, 1501509Smrj * check for that and create one if so. 1502509Smrj * 1503509Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 1504509Smrj */ 1505509Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1506509Smrj pdp->par_nintr = 1; 1507509Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1508509Smrj pdp->par_nintr, KM_SLEEP); 1509509Smrj } 1510509Smrj 1511509Smrj /* Validate the interrupt number */ 1512509Smrj if (inum >= pdp->par_nintr) 1513509Smrj return (NULL); 1514509Smrj 1515509Smrj /* Get the interrupt structure pointer and return that */ 1516509Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 1517509Smrj } 1518509Smrj 1519509Smrj 1520509Smrj /* 1521509Smrj * ****************** 1522509Smrj * dma related code 1523509Smrj * ****************** 1524509Smrj */ 1525509Smrj 1526509Smrj /* 1527509Smrj * rootnex_dma_allochdl() 1528509Smrj * called from ddi_dma_alloc_handle(). 15290Sstevel@tonic-gate */ 1530509Smrj /*ARGSUSED*/ 1531509Smrj static int 1532509Smrj rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1533509Smrj int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1534509Smrj { 1535509Smrj uint64_t maxsegmentsize_ll; 1536509Smrj uint_t maxsegmentsize; 1537509Smrj ddi_dma_impl_t *hp; 1538509Smrj rootnex_dma_t *dma; 1539509Smrj uint64_t count_max; 1540509Smrj uint64_t seg; 1541509Smrj int kmflag; 1542509Smrj int e; 1543509Smrj 1544509Smrj 1545509Smrj /* convert our sleep flags */ 1546509Smrj if (waitfp == DDI_DMA_SLEEP) { 1547509Smrj kmflag = KM_SLEEP; 1548509Smrj } else { 1549509Smrj kmflag = KM_NOSLEEP; 1550509Smrj } 1551509Smrj 1552509Smrj /* 1553509Smrj * We try to do only one memory allocation here. We'll do a little 1554509Smrj * pointer manipulation later. If the bind ends up taking more than 1555509Smrj * our prealloc's space, we'll have to allocate more memory in the 1556509Smrj * bind operation. Not great, but much better than before and the 1557509Smrj * best we can do with the current bind interfaces. 1558509Smrj */ 1559509Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1560509Smrj if (hp == NULL) { 1561509Smrj if (waitfp != DDI_DMA_DONTWAIT) { 1562509Smrj ddi_set_callback(waitfp, arg, 1563509Smrj &rootnex_state->r_dvma_call_list_id); 1564509Smrj } 1565509Smrj return (DDI_DMA_NORESOURCES); 1566509Smrj } 1567509Smrj 1568509Smrj /* Do our pointer manipulation now, align the structures */ 1569509Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 1570509Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1571509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1572509Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1573509Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1574509Smrj 1575509Smrj /* setup the handle */ 1576509Smrj rootnex_clean_dmahdl(hp); 1577509Smrj dma->dp_dip = rdip; 1578509Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1579509Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1580509Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 1581509Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1582509Smrj hp->dmai_rdip = rdip; 1583509Smrj hp->dmai_attr = *attr; 1584509Smrj 1585509Smrj /* we don't need to worry about the SPL since we do a tryenter */ 1586509Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1587509Smrj 1588509Smrj /* 1589509Smrj * Figure out our maximum segment size. If the segment size is greater 1590509Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 1591509Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1592509Smrj * dma_attr_count_max are size-1 type values. 1593509Smrj * 1594509Smrj * Maximum segment size is the largest physically contiguous chunk of 1595509Smrj * memory that we can return from a bind (i.e. the maximum size of a 1596509Smrj * single cookie). 1597509Smrj */ 1598509Smrj 1599509Smrj /* handle the rollover cases */ 1600509Smrj seg = attr->dma_attr_seg + 1; 1601509Smrj if (seg < attr->dma_attr_seg) { 1602509Smrj seg = attr->dma_attr_seg; 1603509Smrj } 1604509Smrj count_max = attr->dma_attr_count_max + 1; 1605509Smrj if (count_max < attr->dma_attr_count_max) { 1606509Smrj count_max = attr->dma_attr_count_max; 1607509Smrj } 1608509Smrj 1609509Smrj /* 1610509Smrj * granularity may or may not be a power of two. If it isn't, we can't 1611509Smrj * use a simple mask. 1612509Smrj */ 1613509Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1614509Smrj dma->dp_granularity_power_2 = B_FALSE; 1615509Smrj } else { 1616509Smrj dma->dp_granularity_power_2 = B_TRUE; 1617509Smrj } 1618509Smrj 1619509Smrj /* 1620509Smrj * maxxfer should be a whole multiple of granularity. If we're going to 1621509Smrj * break up a window because we're greater than maxxfer, we might as 1622509Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 1623509Smrj * worry about triming the window later on for this case. 1624509Smrj */ 1625509Smrj if (attr->dma_attr_granular > 1) { 1626509Smrj if (dma->dp_granularity_power_2) { 1627509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1628509Smrj (attr->dma_attr_maxxfer & 1629509Smrj (attr->dma_attr_granular - 1)); 1630509Smrj } else { 1631509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1632509Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1633509Smrj } 1634509Smrj } else { 1635509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 1636509Smrj } 1637509Smrj 1638509Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1639509Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1640509Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1641509Smrj maxsegmentsize = 0xFFFFFFFF; 1642509Smrj } else { 1643509Smrj maxsegmentsize = maxsegmentsize_ll; 1644509Smrj } 1645509Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1646509Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1647509Smrj 1648509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1649509Smrj if (rootnex_alloc_check_parms) { 1650509Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1651509Smrj if (e != DDI_SUCCESS) { 1652509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1653509Smrj (void) rootnex_dma_freehdl(dip, rdip, 1654509Smrj (ddi_dma_handle_t)hp); 1655509Smrj return (e); 1656509Smrj } 1657509Smrj } 1658509Smrj 1659509Smrj *handlep = (ddi_dma_handle_t)hp; 1660509Smrj 1661509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1662509Smrj DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1663509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1664509Smrj 1665509Smrj return (DDI_SUCCESS); 1666509Smrj } 1667509Smrj 1668509Smrj 1669509Smrj /* 1670509Smrj * rootnex_dma_freehdl() 1671509Smrj * called from ddi_dma_free_handle(). 1672509Smrj */ 1673509Smrj /*ARGSUSED*/ 1674509Smrj static int 1675509Smrj rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1676509Smrj { 1677509Smrj ddi_dma_impl_t *hp; 1678509Smrj rootnex_dma_t *dma; 1679509Smrj 1680509Smrj 1681509Smrj hp = (ddi_dma_impl_t *)handle; 1682509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1683509Smrj 1684509Smrj /* unbind should have been called first */ 1685509Smrj ASSERT(!dma->dp_inuse); 1686509Smrj 1687509Smrj mutex_destroy(&dma->dp_mutex); 1688509Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1689509Smrj 1690509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1691509Smrj DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1692509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1693509Smrj 1694509Smrj if (rootnex_state->r_dvma_call_list_id) 1695509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1696509Smrj 1697509Smrj return (DDI_SUCCESS); 1698509Smrj } 1699509Smrj 1700509Smrj 1701509Smrj /* 1702509Smrj * rootnex_dma_bindhdl() 1703509Smrj * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 1704509Smrj */ 1705509Smrj /*ARGSUSED*/ 1706509Smrj static int 1707509Smrj rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 1708509Smrj struct ddi_dma_req *dmareq, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 17090Sstevel@tonic-gate { 1710509Smrj rootnex_sglinfo_t *sinfo; 1711509Smrj ddi_dma_attr_t *attr; 1712509Smrj ddi_dma_impl_t *hp; 1713509Smrj rootnex_dma_t *dma; 1714509Smrj int kmflag; 1715509Smrj int e; 1716509Smrj 1717509Smrj 1718509Smrj hp = (ddi_dma_impl_t *)handle; 1719509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1720509Smrj sinfo = &dma->dp_sglinfo; 1721509Smrj attr = &hp->dmai_attr; 1722509Smrj 1723509Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1724509Smrj 1725509Smrj /* 1726509Smrj * This is useful for debugging a driver. Not as useful in a production 1727509Smrj * system. The only time this will fail is if you have a driver bug. 1728509Smrj */ 1729509Smrj if (rootnex_bind_check_inuse) { 1730509Smrj /* 1731509Smrj * No one else should ever have this lock unless someone else 1732509Smrj * is trying to use this handle. So contention on the lock 1733509Smrj * is the same as inuse being set. 1734509Smrj */ 1735509Smrj e = mutex_tryenter(&dma->dp_mutex); 1736509Smrj if (e == 0) { 1737509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1738509Smrj return (DDI_DMA_INUSE); 1739509Smrj } 1740509Smrj if (dma->dp_inuse) { 1741509Smrj mutex_exit(&dma->dp_mutex); 1742509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1743509Smrj return (DDI_DMA_INUSE); 1744509Smrj } 1745509Smrj dma->dp_inuse = B_TRUE; 1746509Smrj mutex_exit(&dma->dp_mutex); 1747509Smrj } 1748509Smrj 1749509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1750509Smrj if (rootnex_bind_check_parms) { 1751509Smrj e = rootnex_valid_bind_parms(dmareq, attr); 1752509Smrj if (e != DDI_SUCCESS) { 1753509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1754509Smrj rootnex_clean_dmahdl(hp); 1755509Smrj return (e); 1756509Smrj } 1757509Smrj } 1758509Smrj 1759509Smrj /* save away the original bind info */ 1760509Smrj dma->dp_dma = dmareq->dmar_object; 1761509Smrj 1762509Smrj /* 1763509Smrj * Figure out a rough estimate of what maximum number of pages this 1764509Smrj * buffer could use (a high estimate of course). 1765509Smrj */ 1766509Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1767509Smrj 1768509Smrj /* 1769509Smrj * We'll use the pre-allocated cookies for any bind that will *always* 1770509Smrj * fit (more important to be consistent, we don't want to create 1771509Smrj * additional degenerate cases). 1772509Smrj */ 1773509Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1774509Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1775509Smrj dma->dp_need_to_free_cookie = B_FALSE; 1776509Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1777509Smrj uint_t, sinfo->si_max_pages); 1778509Smrj 1779509Smrj /* 1780509Smrj * For anything larger than that, we'll go ahead and allocate the 1781509Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 1782509Smrj * seeing this path in the fast path for high performance devices very 1783509Smrj * frequently. 1784509Smrj * 1785509Smrj * a ddi bind interface that allowed the driver to provide storage to 1786509Smrj * the bind interface would speed this case up. 1787509Smrj */ 1788509Smrj } else { 1789509Smrj /* convert the sleep flags */ 1790509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1791509Smrj kmflag = KM_SLEEP; 1792509Smrj } else { 1793509Smrj kmflag = KM_NOSLEEP; 1794509Smrj } 1795509Smrj 1796509Smrj /* 1797509Smrj * Save away how much memory we allocated. If we're doing a 1798509Smrj * nosleep, the alloc could fail... 1799509Smrj */ 1800509Smrj dma->dp_cookie_size = sinfo->si_max_pages * 1801509Smrj sizeof (ddi_dma_cookie_t); 1802509Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1803509Smrj if (dma->dp_cookies == NULL) { 1804509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1805509Smrj rootnex_clean_dmahdl(hp); 1806509Smrj return (DDI_DMA_NORESOURCES); 1807509Smrj } 1808509Smrj dma->dp_need_to_free_cookie = B_TRUE; 1809509Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1810509Smrj sinfo->si_max_pages); 1811509Smrj } 1812509Smrj hp->dmai_cookie = dma->dp_cookies; 1813509Smrj 1814509Smrj /* 1815509Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1816509Smrj * looking at the contraints in the dma structure. It will then put some 1817509Smrj * additional state about the sgl in the dma struct (i.e. is the sgl 1818509Smrj * clean, or do we need to do some munging; how many pages need to be 1819509Smrj * copied, etc.) 1820509Smrj */ 1821509Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1822509Smrj &dma->dp_sglinfo); 1823509Smrj ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1824509Smrj 1825509Smrj /* if we don't need a copy buffer, we don't need to sync */ 1826509Smrj if (sinfo->si_copybuf_req == 0) { 1827509Smrj hp->dmai_rflags |= DMP_NOSYNC; 1828509Smrj } 1829509Smrj 1830509Smrj /* 18311865Sdilpreet * If the driver supports FMA, insert the handle in the FMA DMA handle 18321865Sdilpreet * cache. 18331865Sdilpreet */ 18341865Sdilpreet if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 18351865Sdilpreet hp->dmai_error.err_cf = rootnex_dma_check; 18361865Sdilpreet (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 18371865Sdilpreet } 18381865Sdilpreet 18391865Sdilpreet /* 1840509Smrj * if we don't need the copybuf and we don't need to do a partial, we 1841509Smrj * hit the fast path. All the high performance devices should be trying 1842509Smrj * to hit this path. To hit this path, a device should be able to reach 1843509Smrj * all of memory, shouldn't try to bind more than it can transfer, and 1844509Smrj * the buffer shouldn't require more cookies than the driver/device can 1845509Smrj * handle [sgllen]). 1846509Smrj */ 1847509Smrj if ((sinfo->si_copybuf_req == 0) && 1848509Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1849509Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1850509Smrj /* 1851509Smrj * copy out the first cookie and ccountp, set the cookie 1852509Smrj * pointer to the second cookie. The first cookie is passed 1853509Smrj * back on the stack. Additional cookies are accessed via 1854509Smrj * ddi_dma_nextcookie() 1855509Smrj */ 1856509Smrj *cookiep = dma->dp_cookies[0]; 1857509Smrj *ccountp = sinfo->si_sgl_size; 1858509Smrj hp->dmai_cookie++; 1859509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1860509Smrj hp->dmai_nwin = 1; 1861509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1862509Smrj DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 1863509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1864509Smrj dma->dp_dma.dmao_size); 1865509Smrj return (DDI_DMA_MAPPED); 1866509Smrj } 1867509Smrj 1868509Smrj /* 1869509Smrj * go to the slow path, we may need to alloc more memory, create 1870509Smrj * multiple windows, and munge up a sgl to make the device happy. 1871509Smrj */ 1872509Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 1873509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 1874509Smrj if (dma->dp_need_to_free_cookie) { 1875509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 1876509Smrj } 1877509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1878509Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 1879509Smrj return (e); 1880509Smrj } 1881509Smrj 1882509Smrj /* if the first window uses the copy buffer, sync it for the device */ 1883509Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 1884509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 1885509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1886509Smrj DDI_DMA_SYNC_FORDEV); 1887509Smrj } 1888509Smrj 1889509Smrj /* 1890509Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 1891509Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 1892509Smrj * If we have a partial map (i.e. multiple windows), the number of 1893509Smrj * cookies we return is the number of cookies in the first window. 1894509Smrj */ 1895509Smrj if (e == DDI_DMA_MAPPED) { 1896509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 1897509Smrj *ccountp = sinfo->si_sgl_size; 1898509Smrj } else { 1899509Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 1900509Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 1901509Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 1902509Smrj } 1903509Smrj *cookiep = dma->dp_cookies[0]; 1904509Smrj hp->dmai_cookie++; 1905509Smrj 1906509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1907509Smrj DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 1908509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 1909509Smrj dma->dp_dma.dmao_size); 1910509Smrj return (e); 1911509Smrj } 1912509Smrj 1913509Smrj 1914509Smrj /* 1915509Smrj * rootnex_dma_unbindhdl() 1916509Smrj * called from ddi_dma_unbind_handle() 1917509Smrj */ 1918509Smrj /*ARGSUSED*/ 1919509Smrj static int 1920509Smrj rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 1921509Smrj ddi_dma_handle_t handle) 1922509Smrj { 1923509Smrj ddi_dma_impl_t *hp; 1924509Smrj rootnex_dma_t *dma; 1925509Smrj int e; 1926509Smrj 1927509Smrj 1928509Smrj hp = (ddi_dma_impl_t *)handle; 1929509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1930509Smrj 1931509Smrj /* make sure the buffer wasn't free'd before calling unbind */ 1932509Smrj if (rootnex_unbind_verify_buffer) { 1933509Smrj e = rootnex_verify_buffer(dma); 1934509Smrj if (e != DDI_SUCCESS) { 1935509Smrj ASSERT(0); 1936509Smrj return (DDI_FAILURE); 1937509Smrj } 1938509Smrj } 1939509Smrj 1940509Smrj /* sync the current window before unbinding the buffer */ 1941509Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 1942509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 1943509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 1944509Smrj DDI_DMA_SYNC_FORCPU); 1945509Smrj } 1946509Smrj 1947509Smrj /* 19481865Sdilpreet * If the driver supports FMA, remove the handle in the FMA DMA handle 19491865Sdilpreet * cache. 19501865Sdilpreet */ 19511865Sdilpreet if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 19521865Sdilpreet if ((DEVI(rdip)->devi_fmhdl != NULL) && 19531865Sdilpreet (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) { 19541865Sdilpreet (void) ndi_fmc_remove(rdip, DMA_HANDLE, hp); 19551865Sdilpreet } 19561865Sdilpreet } 19571865Sdilpreet 19581865Sdilpreet /* 1959509Smrj * cleanup and copy buffer or window state. if we didn't use the copy 1960509Smrj * buffer or windows, there won't be much to do :-) 1961509Smrj */ 1962509Smrj rootnex_teardown_copybuf(dma); 1963509Smrj rootnex_teardown_windows(dma); 1964509Smrj 1965509Smrj /* 1966509Smrj * If we had to allocate space to for the worse case sgl (it didn't 1967509Smrj * fit into our pre-allocate buffer), free that up now 1968509Smrj */ 1969509Smrj if (dma->dp_need_to_free_cookie) { 1970509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 1971509Smrj } 1972509Smrj 1973509Smrj /* 1974509Smrj * clean up the handle so it's ready for the next bind (i.e. if the 1975509Smrj * handle is reused). 1976509Smrj */ 1977509Smrj rootnex_clean_dmahdl(hp); 1978509Smrj 1979509Smrj if (rootnex_state->r_dvma_call_list_id) 1980509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1981509Smrj 1982509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1983509Smrj DTRACE_PROBE1(rootnex__unbind, uint64_t, 1984509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 1985509Smrj 1986509Smrj return (DDI_SUCCESS); 1987509Smrj } 1988509Smrj 1989509Smrj 1990509Smrj /* 1991509Smrj * rootnex_verify_buffer() 1992509Smrj * verify buffer wasn't free'd 1993509Smrj */ 1994509Smrj static int 1995509Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 1996509Smrj { 1997509Smrj page_t **pplist; 1998509Smrj caddr_t vaddr; 1999509Smrj uint_t pcnt; 2000509Smrj uint_t poff; 2001509Smrj page_t *pp; 20021865Sdilpreet char b; 2003509Smrj int i; 2004509Smrj 2005509Smrj /* Figure out how many pages this buffer occupies */ 2006509Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2007509Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2008509Smrj } else { 2009509Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2010509Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2011509Smrj } 2012509Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2013509Smrj 2014509Smrj switch (dma->dp_dma.dmao_type) { 20150Sstevel@tonic-gate case DMA_OTYP_PAGES: 2016509Smrj /* 2017509Smrj * for a linked list of pp's walk through them to make sure 2018509Smrj * they're locked and not free. 2019509Smrj */ 2020509Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2021509Smrj for (i = 0; i < pcnt; i++) { 2022509Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2023509Smrj return (DDI_FAILURE); 20240Sstevel@tonic-gate } 2025509Smrj pp = pp->p_next; 20260Sstevel@tonic-gate } 20270Sstevel@tonic-gate break; 2028509Smrj 20290Sstevel@tonic-gate case DMA_OTYP_VADDR: 20300Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 2031509Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2032509Smrj /* 2033509Smrj * for an array of pp's walk through them to make sure they're 2034509Smrj * not free. It's possible that they may not be locked. 2035509Smrj */ 2036509Smrj if (pplist) { 2037509Smrj for (i = 0; i < pcnt; i++) { 2038509Smrj if (PP_ISFREE(pplist[i])) { 2039509Smrj return (DDI_FAILURE); 2040509Smrj } 2041509Smrj } 2042509Smrj 2043509Smrj /* For a virtual address, try to peek at each page */ 2044509Smrj } else { 2045509Smrj if (dma->dp_sglinfo.si_asp == &kas) { 2046509Smrj for (i = 0; i < pcnt; i++) { 20471865Sdilpreet if (ddi_peek8(NULL, vaddr, &b) == 20481865Sdilpreet DDI_FAILURE) 2049509Smrj return (DDI_FAILURE); 20501865Sdilpreet vaddr += MMU_PAGESIZE; 2051509Smrj } 2052509Smrj } 2053509Smrj } 2054509Smrj break; 2055509Smrj 2056509Smrj default: 2057509Smrj ASSERT(0); 2058509Smrj break; 2059509Smrj } 2060509Smrj 2061509Smrj return (DDI_SUCCESS); 2062509Smrj } 2063509Smrj 2064509Smrj 2065509Smrj /* 2066509Smrj * rootnex_clean_dmahdl() 2067509Smrj * Clean the dma handle. This should be called on a handle alloc and an 2068509Smrj * unbind handle. Set the handle state to the default settings. 2069509Smrj */ 2070509Smrj static void 2071509Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2072509Smrj { 2073509Smrj rootnex_dma_t *dma; 2074509Smrj 2075509Smrj 2076509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2077509Smrj 2078509Smrj hp->dmai_nwin = 0; 2079509Smrj dma->dp_current_cookie = 0; 2080509Smrj dma->dp_copybuf_size = 0; 2081509Smrj dma->dp_window = NULL; 2082509Smrj dma->dp_cbaddr = NULL; 2083509Smrj dma->dp_inuse = B_FALSE; 2084509Smrj dma->dp_need_to_free_cookie = B_FALSE; 2085509Smrj dma->dp_need_to_free_window = B_FALSE; 2086509Smrj dma->dp_partial_required = B_FALSE; 2087509Smrj dma->dp_trim_required = B_FALSE; 2088509Smrj dma->dp_sglinfo.si_copybuf_req = 0; 2089509Smrj #if !defined(__amd64) 2090509Smrj dma->dp_cb_remaping = B_FALSE; 2091509Smrj dma->dp_kva = NULL; 2092509Smrj #endif 2093509Smrj 2094509Smrj /* FMA related initialization */ 2095509Smrj hp->dmai_fault = 0; 2096509Smrj hp->dmai_fault_check = NULL; 2097509Smrj hp->dmai_fault_notify = NULL; 2098509Smrj hp->dmai_error.err_ena = 0; 2099509Smrj hp->dmai_error.err_status = DDI_FM_OK; 2100509Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2101509Smrj hp->dmai_error.err_ontrap = NULL; 2102509Smrj hp->dmai_error.err_fep = NULL; 21031865Sdilpreet hp->dmai_error.err_cf = NULL; 2104509Smrj } 2105509Smrj 2106509Smrj 2107509Smrj /* 2108509Smrj * rootnex_valid_alloc_parms() 2109509Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 2110509Smrj */ 2111509Smrj static int 2112509Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2113509Smrj { 2114509Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2115509Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2116509Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 2117509Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2118509Smrj return (DDI_DMA_BADATTR); 2119509Smrj } 2120509Smrj 2121509Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2122509Smrj return (DDI_DMA_BADATTR); 2123509Smrj } 2124509Smrj 2125509Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2126509Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2127509Smrj attr->dma_attr_sgllen <= 0) { 2128509Smrj return (DDI_DMA_BADATTR); 2129509Smrj } 2130509Smrj 2131509Smrj /* We should be able to DMA into every byte offset in a page */ 2132509Smrj if (maxsegmentsize < MMU_PAGESIZE) { 2133509Smrj return (DDI_DMA_BADATTR); 2134509Smrj } 2135509Smrj 2136509Smrj return (DDI_SUCCESS); 2137509Smrj } 2138509Smrj 2139509Smrj 2140509Smrj /* 2141509Smrj * rootnex_valid_bind_parms() 2142509Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 2143509Smrj */ 2144509Smrj /* ARGSUSED */ 2145509Smrj static int 2146509Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2147509Smrj { 2148509Smrj #if !defined(__amd64) 2149509Smrj /* 2150509Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 2151509Smrj * we can track the offset for the obsoleted interfaces. 2152509Smrj */ 2153509Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2154509Smrj return (DDI_DMA_TOOBIG); 2155509Smrj } 2156509Smrj #endif 2157509Smrj 2158509Smrj return (DDI_SUCCESS); 2159509Smrj } 2160509Smrj 2161509Smrj 2162509Smrj /* 2163509Smrj * rootnex_get_sgl() 2164509Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 2165509Smrj * with a call to the vm layer when vm2.0 comes around... 2166509Smrj */ 2167509Smrj static void 2168509Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2169509Smrj rootnex_sglinfo_t *sglinfo) 2170509Smrj { 2171509Smrj ddi_dma_atyp_t buftype; 21725084Sjohnlev rootnex_addr_t raddr; 2173509Smrj uint64_t last_page; 2174509Smrj uint64_t offset; 2175509Smrj uint64_t addrhi; 2176509Smrj uint64_t addrlo; 2177509Smrj uint64_t maxseg; 2178509Smrj page_t **pplist; 2179509Smrj uint64_t paddr; 2180509Smrj uint32_t psize; 2181509Smrj uint32_t size; 2182509Smrj caddr_t vaddr; 2183509Smrj uint_t pcnt; 2184509Smrj page_t *pp; 2185509Smrj uint_t cnt; 2186509Smrj 2187509Smrj 2188509Smrj /* shortcuts */ 2189509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2190509Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2191509Smrj maxseg = sglinfo->si_max_cookie_size; 2192509Smrj buftype = dmar_object->dmao_type; 2193509Smrj addrhi = sglinfo->si_max_addr; 2194509Smrj addrlo = sglinfo->si_min_addr; 2195509Smrj size = dmar_object->dmao_size; 2196509Smrj 2197509Smrj pcnt = 0; 2198509Smrj cnt = 0; 2199509Smrj 2200509Smrj /* 2201509Smrj * if we were passed down a linked list of pages, i.e. pointer to 2202509Smrj * page_t, use this to get our physical address and buf offset. 2203509Smrj */ 2204509Smrj if (buftype == DMA_OTYP_PAGES) { 2205509Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2206509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2207509Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2208509Smrj MMU_PAGEOFFSET; 22095084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum) + offset; 2210509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2211509Smrj pp = pp->p_next; 2212509Smrj sglinfo->si_asp = NULL; 2213509Smrj 2214509Smrj /* 2215509Smrj * We weren't passed down a linked list of pages, but if we were passed 2216509Smrj * down an array of pages, use this to get our physical address and buf 2217509Smrj * offset. 2218509Smrj */ 2219509Smrj } else if (pplist != NULL) { 2220509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2221509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2222509Smrj 2223509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2224509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2225509Smrj if (sglinfo->si_asp == NULL) { 2226509Smrj sglinfo->si_asp = &kas; 2227509Smrj } 2228509Smrj 2229509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 22305084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2231509Smrj paddr += offset; 2232509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2233509Smrj pcnt++; 2234509Smrj 2235509Smrj /* 2236509Smrj * All we have is a virtual address, we'll need to call into the VM 2237509Smrj * to get the physical address. 2238509Smrj */ 2239509Smrj } else { 2240509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2241509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2242509Smrj 2243509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2244509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2245509Smrj if (sglinfo->si_asp == NULL) { 2246509Smrj sglinfo->si_asp = &kas; 2247509Smrj } 2248509Smrj 22495084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2250509Smrj paddr += offset; 2251509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2252509Smrj vaddr += psize; 2253509Smrj } 2254509Smrj 22555084Sjohnlev #ifdef __xpv 22565084Sjohnlev /* 22575084Sjohnlev * If we're dom0, we're using a real device so we need to load 22585084Sjohnlev * the cookies with MFNs instead of PFNs. 22595084Sjohnlev */ 22605084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 22615084Sjohnlev #else 22625084Sjohnlev raddr = paddr; 22635084Sjohnlev #endif 22645084Sjohnlev 2265509Smrj /* 2266509Smrj * Setup the first cookie with the physical address of the page and the 2267509Smrj * size of the page (which takes into account the initial offset into 2268509Smrj * the page. 2269509Smrj */ 22705084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2271509Smrj sgl[cnt].dmac_size = psize; 2272509Smrj sgl[cnt].dmac_type = 0; 2273509Smrj 2274509Smrj /* 2275509Smrj * Save away the buffer offset into the page. We'll need this later in 2276509Smrj * the copy buffer code to help figure out the page index within the 2277509Smrj * buffer and the offset into the current page. 2278509Smrj */ 2279509Smrj sglinfo->si_buf_offset = offset; 2280509Smrj 2281509Smrj /* 2282509Smrj * If the DMA engine can't reach the physical address, increase how 2283509Smrj * much copy buffer we need. We always increase by pagesize so we don't 2284509Smrj * have to worry about converting offsets. Set a flag in the cookies 2285509Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 2286509Smrj * last cookie, go to the next cookie (since we separate each page which 2287509Smrj * uses the copy buffer in case the copy buffer is not physically 2288509Smrj * contiguous. 2289509Smrj */ 22905084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2291509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2292509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2293509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2294509Smrj cnt++; 2295509Smrj sgl[cnt].dmac_laddress = 0; 2296509Smrj sgl[cnt].dmac_size = 0; 2297509Smrj sgl[cnt].dmac_type = 0; 2298509Smrj } 2299509Smrj } 2300509Smrj 2301509Smrj /* 2302509Smrj * save this page's physical address so we can figure out if the next 2303509Smrj * page is physically contiguous. Keep decrementing size until we are 2304509Smrj * done with the buffer. 2305509Smrj */ 23065084Sjohnlev last_page = raddr & MMU_PAGEMASK; 2307509Smrj size -= psize; 2308509Smrj 2309509Smrj while (size > 0) { 2310509Smrj /* Get the size for this page (i.e. partial or full page) */ 2311509Smrj psize = MIN(size, MMU_PAGESIZE); 2312509Smrj 2313509Smrj if (buftype == DMA_OTYP_PAGES) { 2314509Smrj /* get the paddr from the page_t */ 2315509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 23165084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum); 2317509Smrj pp = pp->p_next; 2318509Smrj } else if (pplist != NULL) { 2319509Smrj /* index into the array of page_t's to get the paddr */ 2320509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 23215084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2322509Smrj pcnt++; 23230Sstevel@tonic-gate } else { 2324509Smrj /* call into the VM to get the paddr */ 23255084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2326509Smrj vaddr)); 2327509Smrj vaddr += psize; 2328509Smrj } 2329509Smrj 23305084Sjohnlev #ifdef __xpv 23315084Sjohnlev /* 23325084Sjohnlev * If we're dom0, we're using a real device so we need to load 23335084Sjohnlev * the cookies with MFNs instead of PFNs. 23345084Sjohnlev */ 23355084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 23365084Sjohnlev #else 23375084Sjohnlev raddr = paddr; 23385084Sjohnlev #endif 23395084Sjohnlev 2340509Smrj /* check to see if this page needs the copy buffer */ 23415084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2342509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2343509Smrj 23440Sstevel@tonic-gate /* 2345509Smrj * if there is something in the current cookie, go to 2346509Smrj * the next one. We only want one page in a cookie which 2347509Smrj * uses the copybuf since the copybuf doesn't have to 2348509Smrj * be physically contiguous. 2349509Smrj */ 2350509Smrj if (sgl[cnt].dmac_size != 0) { 2351509Smrj cnt++; 2352509Smrj } 23535084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2354509Smrj sgl[cnt].dmac_size = psize; 2355509Smrj #if defined(__amd64) 2356509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2357509Smrj #else 2358509Smrj /* 2359509Smrj * save the buf offset for 32-bit kernel. used in the 2360509Smrj * obsoleted interfaces. 2361509Smrj */ 2362509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2363509Smrj (dmar_object->dmao_size - size); 2364509Smrj #endif 2365509Smrj /* if this isn't the last cookie, go to the next one */ 2366509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2367509Smrj cnt++; 2368509Smrj sgl[cnt].dmac_laddress = 0; 2369509Smrj sgl[cnt].dmac_size = 0; 2370509Smrj sgl[cnt].dmac_type = 0; 2371509Smrj } 2372509Smrj 2373509Smrj /* 2374509Smrj * this page didn't need the copy buffer, if it's not physically 2375509Smrj * contiguous, or it would put us over a segment boundary, or it 2376509Smrj * puts us over the max cookie size, or the current sgl doesn't 2377509Smrj * have anything in it. 2378509Smrj */ 23795084Sjohnlev } else if (((last_page + MMU_PAGESIZE) != raddr) || 23805084Sjohnlev !(raddr & sglinfo->si_segmask) || 2381509Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 2382509Smrj (sgl[cnt].dmac_size == 0)) { 2383509Smrj /* 2384509Smrj * if we're not already in a new cookie, go to the next 2385509Smrj * cookie. 2386509Smrj */ 2387509Smrj if (sgl[cnt].dmac_size != 0) { 2388509Smrj cnt++; 2389509Smrj } 2390509Smrj 2391509Smrj /* save the cookie information */ 23925084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2393509Smrj sgl[cnt].dmac_size = psize; 2394509Smrj #if defined(__amd64) 2395509Smrj sgl[cnt].dmac_type = 0; 2396509Smrj #else 2397509Smrj /* 2398509Smrj * save the buf offset for 32-bit kernel. used in the 2399509Smrj * obsoleted interfaces. 2400509Smrj */ 2401509Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2402509Smrj #endif 2403509Smrj 2404509Smrj /* 2405509Smrj * this page didn't need the copy buffer, it is physically 2406509Smrj * contiguous with the last page, and it's <= the max cookie 2407509Smrj * size. 2408509Smrj */ 2409509Smrj } else { 2410509Smrj sgl[cnt].dmac_size += psize; 2411509Smrj 2412509Smrj /* 2413509Smrj * if this exactly == the maximum cookie size, and 2414509Smrj * it isn't the last cookie, go to the next cookie. 2415509Smrj */ 2416509Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 2417509Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 2418509Smrj cnt++; 2419509Smrj sgl[cnt].dmac_laddress = 0; 2420509Smrj sgl[cnt].dmac_size = 0; 2421509Smrj sgl[cnt].dmac_type = 0; 2422509Smrj } 2423509Smrj } 2424509Smrj 2425509Smrj /* 2426509Smrj * save this page's physical address so we can figure out if the 2427509Smrj * next page is physically contiguous. Keep decrementing size 2428509Smrj * until we are done with the buffer. 2429509Smrj */ 24305084Sjohnlev last_page = raddr; 2431509Smrj size -= psize; 2432509Smrj } 2433509Smrj 2434509Smrj /* we're done, save away how many cookies the sgl has */ 2435509Smrj if (sgl[cnt].dmac_size == 0) { 2436509Smrj ASSERT(cnt < sglinfo->si_max_pages); 2437509Smrj sglinfo->si_sgl_size = cnt; 2438509Smrj } else { 2439509Smrj sglinfo->si_sgl_size = cnt + 1; 2440509Smrj } 2441509Smrj } 2442509Smrj 2443509Smrj 2444509Smrj /* 2445509Smrj * rootnex_bind_slowpath() 2446509Smrj * Call in the bind path if the calling driver can't use the sgl without 2447509Smrj * modifying it. We either need to use the copy buffer and/or we will end up 2448509Smrj * with a partial bind. 2449509Smrj */ 2450509Smrj static int 2451509Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2452509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2453509Smrj { 2454509Smrj rootnex_sglinfo_t *sinfo; 2455509Smrj rootnex_window_t *window; 2456509Smrj ddi_dma_cookie_t *cookie; 2457509Smrj size_t copybuf_used; 2458509Smrj size_t dmac_size; 2459509Smrj boolean_t partial; 2460509Smrj off_t cur_offset; 2461509Smrj page_t *cur_pp; 2462509Smrj major_t mnum; 2463509Smrj int e; 2464509Smrj int i; 2465509Smrj 2466509Smrj 2467509Smrj sinfo = &dma->dp_sglinfo; 2468509Smrj copybuf_used = 0; 2469509Smrj partial = B_FALSE; 2470509Smrj 2471509Smrj /* 2472509Smrj * If we're using the copybuf, set the copybuf state in dma struct. 2473509Smrj * Needs to be first since it sets the copy buffer size. 2474509Smrj */ 2475509Smrj if (sinfo->si_copybuf_req != 0) { 2476509Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2477509Smrj if (e != DDI_SUCCESS) { 2478509Smrj return (e); 2479509Smrj } 2480509Smrj } else { 2481509Smrj dma->dp_copybuf_size = 0; 2482509Smrj } 2483509Smrj 2484509Smrj /* 2485509Smrj * Figure out if we need to do a partial mapping. If so, figure out 2486509Smrj * if we need to trim the buffers when we munge the sgl. 2487509Smrj */ 2488509Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2489509Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2490509Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2491509Smrj dma->dp_partial_required = B_TRUE; 2492509Smrj if (attr->dma_attr_granular != 1) { 2493509Smrj dma->dp_trim_required = B_TRUE; 2494509Smrj } 2495509Smrj } else { 2496509Smrj dma->dp_partial_required = B_FALSE; 2497509Smrj dma->dp_trim_required = B_FALSE; 2498509Smrj } 2499509Smrj 2500509Smrj /* If we need to do a partial bind, make sure the driver supports it */ 2501509Smrj if (dma->dp_partial_required && 2502509Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2503509Smrj 2504509Smrj mnum = ddi_driver_major(dma->dp_dip); 2505509Smrj /* 2506509Smrj * patchable which allows us to print one warning per major 2507509Smrj * number. 2508509Smrj */ 2509509Smrj if ((rootnex_bind_warn) && 2510509Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2511509Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2512509Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 2513509Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 2514509Smrj "There is a small risk of data corruption in " 2515509Smrj "particular with large I/Os. The driver should be " 2516509Smrj "replaced with a corrected version for proper " 2517509Smrj "system operation. To disable this warning, add " 2518509Smrj "'set rootnex:rootnex_bind_warn=0' to " 2519509Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2520509Smrj } 2521509Smrj return (DDI_DMA_TOOBIG); 2522509Smrj } 2523509Smrj 2524509Smrj /* 2525509Smrj * we might need multiple windows, setup state to handle them. In this 2526509Smrj * code path, we will have at least one window. 2527509Smrj */ 2528509Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 2529509Smrj if (e != DDI_SUCCESS) { 2530509Smrj rootnex_teardown_copybuf(dma); 2531509Smrj return (e); 2532509Smrj } 2533509Smrj 2534509Smrj window = &dma->dp_window[0]; 2535509Smrj cookie = &dma->dp_cookies[0]; 2536509Smrj cur_offset = 0; 2537509Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 2538509Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2539509Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2540509Smrj } 2541509Smrj 2542509Smrj /* loop though all the cookies we got back from get_sgl() */ 2543509Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 2544509Smrj /* 2545509Smrj * If we're using the copy buffer, check this cookie and setup 2546509Smrj * its associated copy buffer state. If this cookie uses the 2547509Smrj * copy buffer, make sure we sync this window during dma_sync. 2548509Smrj */ 2549509Smrj if (dma->dp_copybuf_size > 0) { 2550509Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2551509Smrj cur_offset, ©buf_used, &cur_pp); 2552509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2553509Smrj window->wd_dosync = B_TRUE; 2554509Smrj } 2555509Smrj } 2556509Smrj 2557509Smrj /* 2558509Smrj * save away the cookie size, since it could be modified in 2559509Smrj * the windowing code. 2560509Smrj */ 2561509Smrj dmac_size = cookie->dmac_size; 2562509Smrj 2563509Smrj /* if we went over max copybuf size */ 2564509Smrj if (dma->dp_copybuf_size && 2565509Smrj (copybuf_used > dma->dp_copybuf_size)) { 2566509Smrj partial = B_TRUE; 2567509Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 2568509Smrj cookie, cur_offset, ©buf_used); 2569509Smrj if (e != DDI_SUCCESS) { 2570509Smrj rootnex_teardown_copybuf(dma); 2571509Smrj rootnex_teardown_windows(dma); 2572509Smrj return (e); 2573509Smrj } 2574509Smrj 2575509Smrj /* 2576509Smrj * if the coookie uses the copy buffer, make sure the 2577509Smrj * new window we just moved to is set to sync. 2578509Smrj */ 2579509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2580509Smrj window->wd_dosync = B_TRUE; 2581509Smrj } 2582509Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2583509Smrj dma->dp_dip); 2584509Smrj 2585509Smrj /* if the cookie cnt == max sgllen, move to the next window */ 2586509Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2587509Smrj partial = B_TRUE; 2588509Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2589509Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 2590509Smrj cookie, attr, cur_offset); 2591509Smrj if (e != DDI_SUCCESS) { 2592509Smrj rootnex_teardown_copybuf(dma); 2593509Smrj rootnex_teardown_windows(dma); 2594509Smrj return (e); 2595509Smrj } 2596509Smrj 2597509Smrj /* 2598509Smrj * if the coookie uses the copy buffer, make sure the 2599509Smrj * new window we just moved to is set to sync. 2600509Smrj */ 2601509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2602509Smrj window->wd_dosync = B_TRUE; 2603509Smrj } 2604509Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2605509Smrj dma->dp_dip); 2606509Smrj 2607509Smrj /* else if we will be over maxxfer */ 2608509Smrj } else if ((window->wd_size + dmac_size) > 2609509Smrj dma->dp_maxxfer) { 2610509Smrj partial = B_TRUE; 2611509Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2612509Smrj cookie); 2613509Smrj if (e != DDI_SUCCESS) { 2614509Smrj rootnex_teardown_copybuf(dma); 2615509Smrj rootnex_teardown_windows(dma); 2616509Smrj return (e); 2617509Smrj } 2618509Smrj 2619509Smrj /* 2620509Smrj * if the coookie uses the copy buffer, make sure the 2621509Smrj * new window we just moved to is set to sync. 26220Sstevel@tonic-gate */ 2623509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2624509Smrj window->wd_dosync = B_TRUE; 2625509Smrj } 2626509Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2627509Smrj dma->dp_dip); 2628509Smrj 2629509Smrj /* else this cookie fits in the current window */ 2630509Smrj } else { 2631509Smrj window->wd_cookie_cnt++; 2632509Smrj window->wd_size += dmac_size; 2633509Smrj } 2634509Smrj 2635509Smrj /* track our offset into the buffer, go to the next cookie */ 2636509Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2637509Smrj ASSERT(cookie->dmac_size <= dmac_size); 2638509Smrj cur_offset += dmac_size; 2639509Smrj cookie++; 2640509Smrj } 2641509Smrj 2642509Smrj /* if we ended up with a zero sized window in the end, clean it up */ 2643509Smrj if (window->wd_size == 0) { 2644509Smrj hp->dmai_nwin--; 2645509Smrj window--; 2646509Smrj } 2647509Smrj 2648509Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 2649509Smrj 2650509Smrj if (!partial) { 2651509Smrj return (DDI_DMA_MAPPED); 2652509Smrj } 2653509Smrj 2654509Smrj ASSERT(dma->dp_partial_required); 2655509Smrj return (DDI_DMA_PARTIAL_MAP); 2656509Smrj } 2657509Smrj 2658509Smrj 2659509Smrj /* 2660509Smrj * rootnex_setup_copybuf() 2661509Smrj * Called in bind slowpath. Figures out if we're going to use the copy 2662509Smrj * buffer, and if we do, sets up the basic state to handle it. 2663509Smrj */ 2664509Smrj static int 2665509Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2666509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 2667509Smrj { 2668509Smrj rootnex_sglinfo_t *sinfo; 2669509Smrj ddi_dma_attr_t lattr; 2670509Smrj size_t max_copybuf; 2671509Smrj int cansleep; 2672509Smrj int e; 2673509Smrj #if !defined(__amd64) 2674509Smrj int vmflag; 2675509Smrj #endif 2676509Smrj 2677509Smrj 2678509Smrj sinfo = &dma->dp_sglinfo; 2679509Smrj 2680*5251Smrj /* read this first so it's consistent through the routine */ 2681*5251Smrj max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 2682509Smrj 2683509Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 2684509Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 2685509Smrj 2686509Smrj /* make sure the copybuf size <= the max size */ 2687509Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 2688509Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 2689509Smrj 2690509Smrj #if !defined(__amd64) 2691509Smrj /* 2692509Smrj * if we don't have kva space to copy to/from, allocate the KVA space 2693509Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 2694509Smrj * the 64-bit kernel. 2695509Smrj */ 2696509Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 2697509Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 2698509Smrj 2699509Smrj /* convert the sleep flags */ 2700509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2701509Smrj vmflag = VM_SLEEP; 2702509Smrj } else { 2703509Smrj vmflag = VM_NOSLEEP; 2704509Smrj } 2705509Smrj 2706509Smrj /* allocate Kernel VA space that we can bcopy to/from */ 2707509Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 2708509Smrj vmflag); 2709509Smrj if (dma->dp_kva == NULL) { 2710509Smrj return (DDI_DMA_NORESOURCES); 2711509Smrj } 2712509Smrj } 2713509Smrj #endif 2714509Smrj 2715509Smrj /* convert the sleep flags */ 2716509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 2717509Smrj cansleep = 1; 2718509Smrj } else { 2719509Smrj cansleep = 0; 2720509Smrj } 2721509Smrj 2722509Smrj /* 2723509Smrj * Allocated the actual copy buffer. This needs to fit within the DMA 2724509Smrj * engines limits, so we can't use kmem_alloc... 2725509Smrj */ 2726509Smrj lattr = *attr; 2727509Smrj lattr.dma_attr_align = MMU_PAGESIZE; 2728509Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 2729509Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 2730509Smrj if (e != DDI_SUCCESS) { 2731509Smrj #if !defined(__amd64) 2732509Smrj if (dma->dp_kva != NULL) { 2733509Smrj vmem_free(heap_arena, dma->dp_kva, 2734509Smrj dma->dp_copybuf_size); 2735509Smrj } 2736509Smrj #endif 2737509Smrj return (DDI_DMA_NORESOURCES); 2738509Smrj } 2739509Smrj 2740509Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 2741509Smrj size_t, dma->dp_copybuf_size); 2742509Smrj 2743509Smrj return (DDI_SUCCESS); 2744509Smrj } 2745509Smrj 2746509Smrj 2747509Smrj /* 2748509Smrj * rootnex_setup_windows() 2749509Smrj * Called in bind slowpath to setup the window state. We always have windows 2750509Smrj * in the slowpath. Even if the window count = 1. 2751509Smrj */ 2752509Smrj static int 2753509Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2754509Smrj ddi_dma_attr_t *attr, int kmflag) 2755509Smrj { 2756509Smrj rootnex_window_t *windowp; 2757509Smrj rootnex_sglinfo_t *sinfo; 2758509Smrj size_t copy_state_size; 2759509Smrj size_t win_state_size; 2760509Smrj size_t state_available; 2761509Smrj size_t space_needed; 2762509Smrj uint_t copybuf_win; 2763509Smrj uint_t maxxfer_win; 2764509Smrj size_t space_used; 2765509Smrj uint_t sglwin; 2766509Smrj 2767509Smrj 2768509Smrj sinfo = &dma->dp_sglinfo; 2769509Smrj 2770509Smrj dma->dp_current_win = 0; 2771509Smrj hp->dmai_nwin = 0; 2772509Smrj 2773509Smrj /* If we don't need to do a partial, we only have one window */ 2774509Smrj if (!dma->dp_partial_required) { 2775509Smrj dma->dp_max_win = 1; 2776509Smrj 2777509Smrj /* 2778509Smrj * we need multiple windows, need to figure out the worse case number 2779509Smrj * of windows. 2780509Smrj */ 2781509Smrj } else { 2782509Smrj /* 2783509Smrj * if we need windows because we need more copy buffer that 2784509Smrj * we allow, the worse case number of windows we could need 2785509Smrj * here would be (copybuf space required / copybuf space that 2786509Smrj * we have) plus one for remainder, and plus 2 to handle the 2787509Smrj * extra pages on the trim for the first and last pages of the 2788509Smrj * buffer (a page is the minimum window size so under the right 2789509Smrj * attr settings, you could have a window for each page). 2790509Smrj * The last page will only be hit here if the size is not a 2791509Smrj * multiple of the granularity (which theoretically shouldn't 2792509Smrj * be the case but never has been enforced, so we could have 2793509Smrj * broken things without it). 2794509Smrj */ 2795509Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 2796509Smrj ASSERT(dma->dp_copybuf_size > 0); 2797509Smrj copybuf_win = (sinfo->si_copybuf_req / 2798509Smrj dma->dp_copybuf_size) + 1 + 2; 2799509Smrj } else { 2800509Smrj copybuf_win = 0; 2801509Smrj } 2802509Smrj 2803509Smrj /* 2804509Smrj * if we need windows because we have more cookies than the H/W 2805509Smrj * can handle, the number of windows we would need here would 2806509Smrj * be (cookie count / cookies count H/W supports) plus one for 2807509Smrj * remainder, and plus 2 to handle the extra pages on the trim 2808509Smrj * (see above comment about trim) 2809509Smrj */ 2810509Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 2811509Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 2812509Smrj + 1) + 2; 2813509Smrj } else { 2814509Smrj sglwin = 0; 2815509Smrj } 2816509Smrj 2817509Smrj /* 2818509Smrj * if we need windows because we're binding more memory than the 2819509Smrj * H/W can transfer at once, the number of windows we would need 2820509Smrj * here would be (xfer count / max xfer H/W supports) plus one 2821509Smrj * for remainder, and plus 2 to handle the extra pages on the 2822509Smrj * trim (see above comment about trim) 2823509Smrj */ 2824509Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 2825509Smrj maxxfer_win = (dma->dp_dma.dmao_size / 2826509Smrj dma->dp_maxxfer) + 1 + 2; 2827509Smrj } else { 2828509Smrj maxxfer_win = 0; 2829509Smrj } 2830509Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 2831509Smrj ASSERT(dma->dp_max_win > 0); 2832509Smrj } 2833509Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 2834509Smrj 2835509Smrj /* 2836509Smrj * Get space for window and potential copy buffer state. Before we 2837509Smrj * go and allocate memory, see if we can get away with using what's 2838509Smrj * left in the pre-allocted state or the dynamically allocated sgl. 2839509Smrj */ 2840509Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 2841509Smrj sizeof (ddi_dma_cookie_t)); 2842509Smrj 2843509Smrj /* if we dynamically allocated space for the cookies */ 2844509Smrj if (dma->dp_need_to_free_cookie) { 2845509Smrj /* if we have more space in the pre-allocted buffer, use it */ 2846509Smrj ASSERT(space_used <= dma->dp_cookie_size); 2847509Smrj if ((dma->dp_cookie_size - space_used) <= 2848509Smrj rootnex_state->r_prealloc_size) { 2849509Smrj state_available = rootnex_state->r_prealloc_size; 2850509Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 2851509Smrj 2852509Smrj /* 2853509Smrj * else, we have more free space in the dynamically allocated 2854509Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 2855509Smrj * didn't need a lot of cookies. 2856509Smrj */ 2857509Smrj } else { 2858509Smrj state_available = dma->dp_cookie_size - space_used; 2859509Smrj windowp = (rootnex_window_t *) 2860509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2861509Smrj } 2862509Smrj 2863509Smrj /* we used the pre-alloced buffer */ 2864509Smrj } else { 2865509Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 2866509Smrj state_available = rootnex_state->r_prealloc_size - space_used; 2867509Smrj windowp = (rootnex_window_t *) 2868509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 2869509Smrj } 2870509Smrj 2871509Smrj /* 2872509Smrj * figure out how much state we need to track the copy buffer. Add an 2873509Smrj * addition 8 bytes for pointer alignemnt later. 2874509Smrj */ 2875509Smrj if (dma->dp_copybuf_size > 0) { 2876509Smrj copy_state_size = sinfo->si_max_pages * 2877509Smrj sizeof (rootnex_pgmap_t); 2878509Smrj } else { 2879509Smrj copy_state_size = 0; 2880509Smrj } 2881509Smrj /* add an additional 8 bytes for pointer alignment */ 2882509Smrj space_needed = win_state_size + copy_state_size + 0x8; 2883509Smrj 2884509Smrj /* if we have enough space already, use it */ 2885509Smrj if (state_available >= space_needed) { 2886509Smrj dma->dp_window = windowp; 2887509Smrj dma->dp_need_to_free_window = B_FALSE; 2888509Smrj 2889509Smrj /* not enough space, need to allocate more. */ 2890509Smrj } else { 2891509Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 2892509Smrj if (dma->dp_window == NULL) { 2893509Smrj return (DDI_DMA_NORESOURCES); 2894509Smrj } 2895509Smrj dma->dp_need_to_free_window = B_TRUE; 2896509Smrj dma->dp_window_size = space_needed; 2897509Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 2898509Smrj dma->dp_dip, size_t, space_needed); 2899509Smrj } 2900509Smrj 2901509Smrj /* 2902509Smrj * we allocate copy buffer state and window state at the same time. 2903509Smrj * setup our copy buffer state pointers. Make sure it's aligned. 2904509Smrj */ 2905509Smrj if (dma->dp_copybuf_size > 0) { 2906509Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 2907509Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 2908509Smrj 2909509Smrj #if !defined(__amd64) 2910509Smrj /* 2911509Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 2912509Smrj * false/NULL. Should be quicker to bzero vs loop and set. 2913509Smrj */ 2914509Smrj bzero(dma->dp_pgmap, copy_state_size); 2915509Smrj #endif 2916509Smrj } else { 2917509Smrj dma->dp_pgmap = NULL; 2918509Smrj } 2919509Smrj 2920509Smrj return (DDI_SUCCESS); 2921509Smrj } 2922509Smrj 2923509Smrj 2924509Smrj /* 2925509Smrj * rootnex_teardown_copybuf() 2926509Smrj * cleans up after rootnex_setup_copybuf() 2927509Smrj */ 2928509Smrj static void 2929509Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 2930509Smrj { 2931509Smrj #if !defined(__amd64) 2932509Smrj int i; 2933509Smrj 2934509Smrj /* 2935509Smrj * if we allocated kernel heap VMEM space, go through all the pages and 2936509Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 2937509Smrj * arena. Then free the VMEM space. 2938509Smrj */ 2939509Smrj if (dma->dp_kva != NULL) { 2940509Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 2941509Smrj if (dma->dp_pgmap[i].pm_mapped) { 2942509Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 2943509Smrj MMU_PAGESIZE, HAT_UNLOAD); 2944509Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 2945509Smrj } 2946509Smrj } 2947509Smrj 2948509Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 2949509Smrj } 2950509Smrj 2951509Smrj #endif 2952509Smrj 2953509Smrj /* if we allocated a copy buffer, free it */ 2954509Smrj if (dma->dp_cbaddr != NULL) { 29551900Seota i_ddi_mem_free(dma->dp_cbaddr, NULL); 2956509Smrj } 2957509Smrj } 2958509Smrj 2959509Smrj 2960509Smrj /* 2961509Smrj * rootnex_teardown_windows() 2962509Smrj * cleans up after rootnex_setup_windows() 2963509Smrj */ 2964509Smrj static void 2965509Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 2966509Smrj { 2967509Smrj /* 2968509Smrj * if we had to allocate window state on the last bind (because we 2969509Smrj * didn't have enough pre-allocated space in the handle), free it. 2970509Smrj */ 2971509Smrj if (dma->dp_need_to_free_window) { 2972509Smrj kmem_free(dma->dp_window, dma->dp_window_size); 2973509Smrj } 2974509Smrj } 2975509Smrj 2976509Smrj 2977509Smrj /* 2978509Smrj * rootnex_init_win() 2979509Smrj * Called in bind slow path during creation of a new window. Initializes 2980509Smrj * window state to default values. 2981509Smrj */ 2982509Smrj /*ARGSUSED*/ 2983509Smrj static void 2984509Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 2985509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 2986509Smrj { 2987509Smrj hp->dmai_nwin++; 2988509Smrj window->wd_dosync = B_FALSE; 2989509Smrj window->wd_offset = cur_offset; 2990509Smrj window->wd_size = 0; 2991509Smrj window->wd_first_cookie = cookie; 2992509Smrj window->wd_cookie_cnt = 0; 2993509Smrj window->wd_trim.tr_trim_first = B_FALSE; 2994509Smrj window->wd_trim.tr_trim_last = B_FALSE; 2995509Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 2996509Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 2997509Smrj #if !defined(__amd64) 2998509Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 2999509Smrj #endif 3000509Smrj } 3001509Smrj 3002509Smrj 3003509Smrj /* 3004509Smrj * rootnex_setup_cookie() 3005509Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 3006509Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 3007509Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 3008509Smrj * need during sync. 3009509Smrj */ 3010509Smrj static void 3011509Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3012509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3013509Smrj page_t **cur_pp) 3014509Smrj { 3015509Smrj boolean_t copybuf_sz_power_2; 3016509Smrj rootnex_sglinfo_t *sinfo; 30175084Sjohnlev paddr_t paddr; 3018509Smrj uint_t pidx; 3019509Smrj uint_t pcnt; 3020509Smrj off_t poff; 3021509Smrj #if defined(__amd64) 3022509Smrj pfn_t pfn; 3023509Smrj #else 3024509Smrj page_t **pplist; 3025509Smrj #endif 3026509Smrj 3027509Smrj sinfo = &dma->dp_sglinfo; 3028509Smrj 3029509Smrj /* 3030509Smrj * Calculate the page index relative to the start of the buffer. The 3031509Smrj * index to the current page for our buffer is the offset into the 3032509Smrj * first page of the buffer plus our current offset into the buffer 3033509Smrj * itself, shifted of course... 3034509Smrj */ 3035509Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3036509Smrj ASSERT(pidx < sinfo->si_max_pages); 3037509Smrj 3038509Smrj /* if this cookie uses the copy buffer */ 3039509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3040509Smrj /* 3041509Smrj * NOTE: we know that since this cookie uses the copy buffer, it 3042509Smrj * is <= MMU_PAGESIZE. 3043509Smrj */ 3044509Smrj 3045509Smrj /* 3046509Smrj * get the offset into the page. For the 64-bit kernel, get the 3047509Smrj * pfn which we'll use with seg kpm. 3048509Smrj */ 30495084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3050509Smrj #if defined(__amd64) 30515084Sjohnlev /* mfn_to_pfn() is a NOP on i86pc */ 30525084Sjohnlev pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 30535084Sjohnlev #endif /* __amd64 */ 3054509Smrj 3055509Smrj /* figure out if the copybuf size is a power of 2 */ 3056509Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3057509Smrj copybuf_sz_power_2 = B_FALSE; 3058509Smrj } else { 3059509Smrj copybuf_sz_power_2 = B_TRUE; 3060509Smrj } 3061509Smrj 3062509Smrj /* This page uses the copy buffer */ 3063509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3064509Smrj 3065509Smrj /* 3066509Smrj * save the copy buffer KVA that we'll use with this page. 3067509Smrj * if we still fit within the copybuf, it's a simple add. 3068509Smrj * otherwise, we need to wrap over using & or % accordingly. 3069509Smrj */ 3070509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3071509Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3072509Smrj *copybuf_used; 3073509Smrj } else { 3074509Smrj if (copybuf_sz_power_2) { 3075509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3076509Smrj (uintptr_t)dma->dp_cbaddr + 3077509Smrj (*copybuf_used & 3078509Smrj (dma->dp_copybuf_size - 1))); 30790Sstevel@tonic-gate } else { 3080509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3081509Smrj (uintptr_t)dma->dp_cbaddr + 3082509Smrj (*copybuf_used % dma->dp_copybuf_size)); 30830Sstevel@tonic-gate } 3084509Smrj } 3085509Smrj 3086509Smrj /* 3087509Smrj * over write the cookie physical address with the address of 3088509Smrj * the physical address of the copy buffer page that we will 3089509Smrj * use. 3090509Smrj */ 30915084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3092509Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3093509Smrj 30945084Sjohnlev #ifdef __xpv 30955084Sjohnlev /* 30965084Sjohnlev * If we're dom0, we're using a real device so we need to load 30975084Sjohnlev * the cookies with MAs instead of PAs. 30985084Sjohnlev */ 30995084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 31005084Sjohnlev #else 31015084Sjohnlev cookie->dmac_laddress = paddr; 31025084Sjohnlev #endif 31035084Sjohnlev 3104509Smrj /* if we have a kernel VA, it's easy, just save that address */ 3105509Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3106509Smrj (sinfo->si_asp == &kas)) { 3107509Smrj /* 3108509Smrj * save away the page aligned virtual address of the 3109509Smrj * driver buffer. Offsets are handled in the sync code. 3110509Smrj */ 3111509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3112509Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3113509Smrj & MMU_PAGEMASK); 3114509Smrj #if !defined(__amd64) 3115509Smrj /* 3116509Smrj * we didn't need to, and will never need to map this 3117509Smrj * page. 3118509Smrj */ 3119509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3120509Smrj #endif 3121509Smrj 3122509Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 3123509Smrj } else { 3124509Smrj #if defined(__amd64) 3125509Smrj /* 3126509Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 3127509Smrj * get a Kernel VA for the corresponding pfn. 3128509Smrj */ 3129509Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3130509Smrj #else 3131509Smrj /* 3132509Smrj * for the 32-bit kernel, this is a pain. First we'll 3133509Smrj * save away the page_t or user VA for this page. This 3134509Smrj * is needed in rootnex_dma_win() when we switch to a 3135509Smrj * new window which requires us to re-map the copy 3136509Smrj * buffer. 3137509Smrj */ 3138509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3139509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3140509Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3141509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3142509Smrj } else if (pplist != NULL) { 3143509Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3144509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3145509Smrj } else { 3146509Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 3147509Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3148509Smrj (((uintptr_t) 3149509Smrj dmar_object->dmao_obj.virt_obj.v_addr + 3150509Smrj cur_offset) & MMU_PAGEMASK); 3151509Smrj } 3152509Smrj 3153509Smrj /* 3154509Smrj * save away the page aligned virtual address which was 3155509Smrj * allocated from the kernel heap arena (taking into 3156509Smrj * account if we need more copy buffer than we alloced 3157509Smrj * and use multiple windows to handle this, i.e. &,%). 3158509Smrj * NOTE: there isn't and physical memory backing up this 3159509Smrj * virtual address space currently. 3160509Smrj */ 3161509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 3162509Smrj dma->dp_copybuf_size) { 3163509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3164509Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 3165509Smrj MMU_PAGEMASK); 3166509Smrj } else { 3167509Smrj if (copybuf_sz_power_2) { 3168509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3169509Smrj (((uintptr_t)dma->dp_kva + 3170509Smrj (*copybuf_used & 3171509Smrj (dma->dp_copybuf_size - 1))) & 3172509Smrj MMU_PAGEMASK); 3173509Smrj } else { 3174509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3175509Smrj (((uintptr_t)dma->dp_kva + 3176509Smrj (*copybuf_used % 3177509Smrj dma->dp_copybuf_size)) & 3178509Smrj MMU_PAGEMASK); 3179509Smrj } 3180509Smrj } 3181509Smrj 3182509Smrj /* 3183509Smrj * if we haven't used up the available copy buffer yet, 3184509Smrj * map the kva to the physical page. 3185509Smrj */ 3186509Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 3187509Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3188509Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3189509Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3190509Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3191509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3192509Smrj } else { 3193509Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3194509Smrj sinfo->si_asp, 3195509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3196509Smrj } 3197509Smrj 3198509Smrj /* 3199509Smrj * we've used up the available copy buffer, this page 3200509Smrj * will have to be mapped during rootnex_dma_win() when 3201509Smrj * we switch to a new window which requires a re-map 3202509Smrj * the copy buffer. (32-bit kernel only) 3203509Smrj */ 3204509Smrj } else { 3205509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3206509Smrj } 3207509Smrj #endif 3208509Smrj /* go to the next page_t */ 3209509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3210509Smrj *cur_pp = (*cur_pp)->p_next; 3211509Smrj } 32120Sstevel@tonic-gate } 3213509Smrj 3214509Smrj /* add to the copy buffer count */ 3215509Smrj *copybuf_used += MMU_PAGESIZE; 3216509Smrj 3217509Smrj /* 3218509Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 3219509Smrj * cookie occupies to reflect this. 3220509Smrj */ 3221509Smrj } else { 3222509Smrj /* 3223509Smrj * figure out how many pages the cookie occupies. We need to 3224509Smrj * use the original page offset of the buffer and the cookies 3225509Smrj * offset in the buffer to do this. 3226509Smrj */ 3227509Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3228509Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 3229509Smrj 3230509Smrj while (pcnt > 0) { 3231509Smrj #if !defined(__amd64) 3232509Smrj /* 3233509Smrj * the 32-bit kernel doesn't have seg kpm, so we need 3234509Smrj * to map in the driver buffer (if it didn't come down 3235509Smrj * with a kernel VA) on the fly. Since this page doesn't 3236509Smrj * use the copy buffer, it's not, or will it ever, have 3237509Smrj * to be mapped in. 3238509Smrj */ 3239509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3240509Smrj #endif 3241509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3242509Smrj 3243509Smrj /* 3244509Smrj * we need to update pidx and cur_pp or we'll loose 3245509Smrj * track of where we are. 3246509Smrj */ 3247509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3248509Smrj *cur_pp = (*cur_pp)->p_next; 3249509Smrj } 3250509Smrj pidx++; 3251509Smrj pcnt--; 3252509Smrj } 3253509Smrj } 3254509Smrj } 3255509Smrj 3256509Smrj 3257509Smrj /* 3258509Smrj * rootnex_sgllen_window_boundary() 3259509Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 3260509Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3261509Smrj * length supported by the DMA H/W. 3262509Smrj */ 3263509Smrj static int 3264509Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3265509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3266509Smrj off_t cur_offset) 3267509Smrj { 3268509Smrj off_t new_offset; 3269509Smrj size_t trim_sz; 3270509Smrj off_t coffset; 3271509Smrj 3272509Smrj 3273509Smrj /* 3274509Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 3275509Smrj * the next window and init it. We're done. 3276509Smrj */ 3277509Smrj if (!dma->dp_trim_required) { 3278509Smrj (*windowp)++; 3279509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3280509Smrj (*windowp)->wd_cookie_cnt++; 3281509Smrj (*windowp)->wd_size = cookie->dmac_size; 3282509Smrj return (DDI_SUCCESS); 3283509Smrj } 3284509Smrj 3285509Smrj /* figure out how much we need to trim from the window */ 3286509Smrj ASSERT(attr->dma_attr_granular != 0); 3287509Smrj if (dma->dp_granularity_power_2) { 3288509Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3289509Smrj } else { 3290509Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3291509Smrj } 3292509Smrj 3293509Smrj /* The window's a whole multiple of granularity. We're done */ 3294509Smrj if (trim_sz == 0) { 3295509Smrj (*windowp)++; 3296509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3297509Smrj (*windowp)->wd_cookie_cnt++; 3298509Smrj (*windowp)->wd_size = cookie->dmac_size; 3299509Smrj return (DDI_SUCCESS); 3300509Smrj } 3301509Smrj 3302509Smrj /* 3303509Smrj * The window's not a whole multiple of granularity, since we know this 3304509Smrj * is due to the sgllen, we need to go back to the last cookie and trim 3305509Smrj * that one, add the left over part of the old cookie into the new 3306509Smrj * window, and then add in the new cookie into the new window. 3307509Smrj */ 3308509Smrj 3309509Smrj /* 3310509Smrj * make sure the driver isn't making us do something bad... Trimming and 3311509Smrj * sgllen == 1 don't go together. 3312509Smrj */ 3313509Smrj if (attr->dma_attr_sgllen == 1) { 3314509Smrj return (DDI_DMA_NOMAPPING); 3315509Smrj } 3316509Smrj 3317509Smrj /* 3318509Smrj * first, setup the current window to account for the trim. Need to go 3319509Smrj * back to the last cookie for this. 3320509Smrj */ 3321509Smrj cookie--; 3322509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3323509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 33245084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3325509Smrj ASSERT(cookie->dmac_size > trim_sz); 3326509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3327509Smrj (*windowp)->wd_size -= trim_sz; 3328509Smrj 3329509Smrj /* save the buffer offsets for the next window */ 3330509Smrj coffset = cookie->dmac_size - trim_sz; 3331509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3332509Smrj 3333509Smrj /* 3334509Smrj * set this now in case this is the first window. all other cases are 3335509Smrj * set in dma_win() 3336509Smrj */ 3337509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3338509Smrj 3339509Smrj /* 3340509Smrj * initialize the next window using what's left over in the previous 3341509Smrj * cookie. 3342509Smrj */ 3343509Smrj (*windowp)++; 3344509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3345509Smrj (*windowp)->wd_cookie_cnt++; 3346509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 33475084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3348509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3349509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3350509Smrj (*windowp)->wd_dosync = B_TRUE; 3351509Smrj } 3352509Smrj 3353509Smrj /* 3354509Smrj * now go back to the current cookie and add it to the new window. set 3355509Smrj * the new window size to the what was left over from the previous 3356509Smrj * cookie and what's in the current cookie. 3357509Smrj */ 3358509Smrj cookie++; 3359509Smrj (*windowp)->wd_cookie_cnt++; 3360509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3361509Smrj 3362509Smrj /* 3363509Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 3364509Smrj * a max size of maxxfer). Handle that case. 3365509Smrj */ 3366509Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 3367509Smrj /* 3368509Smrj * maxxfer is already a whole multiple of granularity, and this 3369509Smrj * trim will be <= the previous trim (since a cookie can't be 3370509Smrj * larger than maxxfer). Make things simple here. 3371509Smrj */ 3372509Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3373509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3374509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 33755084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3376509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3377509Smrj (*windowp)->wd_size -= trim_sz; 3378509Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3379509Smrj 3380509Smrj /* save the buffer offsets for the next window */ 3381509Smrj coffset = cookie->dmac_size - trim_sz; 3382509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3383509Smrj 3384509Smrj /* setup the next window */ 3385509Smrj (*windowp)++; 3386509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3387509Smrj (*windowp)->wd_cookie_cnt++; 3388509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 33895084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3390509Smrj coffset; 3391509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3392509Smrj } 3393509Smrj 3394509Smrj return (DDI_SUCCESS); 3395509Smrj } 3396509Smrj 3397509Smrj 3398509Smrj /* 3399509Smrj * rootnex_copybuf_window_boundary() 3400509Smrj * Called in bind slowpath when we get to a window boundary because we used 3401509Smrj * up all the copy buffer that we have. 3402509Smrj */ 3403509Smrj static int 3404509Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3405509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3406509Smrj size_t *copybuf_used) 3407509Smrj { 3408509Smrj rootnex_sglinfo_t *sinfo; 3409509Smrj off_t new_offset; 3410509Smrj size_t trim_sz; 34115084Sjohnlev paddr_t paddr; 3412509Smrj off_t coffset; 3413509Smrj uint_t pidx; 3414509Smrj off_t poff; 3415509Smrj 3416509Smrj 3417509Smrj sinfo = &dma->dp_sglinfo; 3418509Smrj 3419509Smrj /* 3420509Smrj * the copy buffer should be a whole multiple of page size. We know that 3421509Smrj * this cookie is <= MMU_PAGESIZE. 3422509Smrj */ 3423509Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3424509Smrj 3425509Smrj /* 3426509Smrj * from now on, all new windows in this bind need to be re-mapped during 3427509Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3428509Smrj * space... 3429509Smrj */ 3430509Smrj #if !defined(__amd64) 3431509Smrj dma->dp_cb_remaping = B_TRUE; 3432509Smrj #endif 3433509Smrj 3434509Smrj /* reset copybuf used */ 3435509Smrj *copybuf_used = 0; 3436509Smrj 3437509Smrj /* 3438509Smrj * if we don't have to trim (since granularity is set to 1), go to the 3439509Smrj * next window and add the current cookie to it. We know the current 3440509Smrj * cookie uses the copy buffer since we're in this code path. 3441509Smrj */ 3442509Smrj if (!dma->dp_trim_required) { 3443509Smrj (*windowp)++; 3444509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3445509Smrj 3446509Smrj /* Add this cookie to the new window */ 3447509Smrj (*windowp)->wd_cookie_cnt++; 3448509Smrj (*windowp)->wd_size += cookie->dmac_size; 3449509Smrj *copybuf_used += MMU_PAGESIZE; 3450509Smrj return (DDI_SUCCESS); 3451509Smrj } 3452509Smrj 3453509Smrj /* 3454509Smrj * *** may need to trim, figure it out. 3455509Smrj */ 3456509Smrj 3457509Smrj /* figure out how much we need to trim from the window */ 3458509Smrj if (dma->dp_granularity_power_2) { 3459509Smrj trim_sz = (*windowp)->wd_size & 3460509Smrj (hp->dmai_attr.dma_attr_granular - 1); 3461509Smrj } else { 3462509Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3463509Smrj } 3464509Smrj 3465509Smrj /* 3466509Smrj * if the window's a whole multiple of granularity, go to the next 3467509Smrj * window, init it, then add in the current cookie. We know the current 3468509Smrj * cookie uses the copy buffer since we're in this code path. 3469509Smrj */ 3470509Smrj if (trim_sz == 0) { 3471509Smrj (*windowp)++; 3472509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3473509Smrj 3474509Smrj /* Add this cookie to the new window */ 3475509Smrj (*windowp)->wd_cookie_cnt++; 3476509Smrj (*windowp)->wd_size += cookie->dmac_size; 3477509Smrj *copybuf_used += MMU_PAGESIZE; 3478509Smrj return (DDI_SUCCESS); 3479509Smrj } 3480509Smrj 3481509Smrj /* 3482509Smrj * *** We figured it out, we definitly need to trim 3483509Smrj */ 3484509Smrj 3485509Smrj /* 3486509Smrj * make sure the driver isn't making us do something bad... 3487509Smrj * Trimming and sgllen == 1 don't go together. 3488509Smrj */ 3489509Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 3490509Smrj return (DDI_DMA_NOMAPPING); 3491509Smrj } 3492509Smrj 3493509Smrj /* 3494509Smrj * first, setup the current window to account for the trim. Need to go 3495509Smrj * back to the last cookie for this. Some of the last cookie will be in 3496509Smrj * the current window, and some of the last cookie will be in the new 3497509Smrj * window. All of the current cookie will be in the new window. 3498509Smrj */ 3499509Smrj cookie--; 3500509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3501509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 35025084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3503509Smrj ASSERT(cookie->dmac_size > trim_sz); 3504509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3505509Smrj (*windowp)->wd_size -= trim_sz; 3506509Smrj 3507509Smrj /* 3508509Smrj * we're trimming the last cookie (not the current cookie). So that 3509509Smrj * last cookie may have or may not have been using the copy buffer ( 3510509Smrj * we know the cookie passed in uses the copy buffer since we're in 3511509Smrj * this code path). 3512509Smrj * 3513509Smrj * If the last cookie doesn't use the copy buffer, nothing special to 3514509Smrj * do. However, if it does uses the copy buffer, it will be both the 3515509Smrj * last page in the current window and the first page in the next 3516509Smrj * window. Since we are reusing the copy buffer (and KVA space on the 3517509Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 3518509Smrj * current window, and the start of the copy buffer in the next window. 3519509Smrj * Track that info... The cookie physical address was already set to 3520509Smrj * the copy buffer physical address in setup_cookie.. 3521509Smrj */ 3522509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3523509Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3524509Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 3525509Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3526509Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 3527509Smrj (*windowp)->wd_trim.tr_last_cbaddr = 3528509Smrj dma->dp_pgmap[pidx].pm_cbaddr; 3529509Smrj #if !defined(__amd64) 3530509Smrj (*windowp)->wd_trim.tr_last_kaddr = 3531509Smrj dma->dp_pgmap[pidx].pm_kaddr; 3532509Smrj #endif 3533509Smrj } 3534509Smrj 3535509Smrj /* save the buffer offsets for the next window */ 3536509Smrj coffset = cookie->dmac_size - trim_sz; 3537509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3538509Smrj 3539509Smrj /* 3540509Smrj * set this now in case this is the first window. all other cases are 3541509Smrj * set in dma_win() 3542509Smrj */ 3543509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3544509Smrj 3545509Smrj /* 3546509Smrj * initialize the next window using what's left over in the previous 3547509Smrj * cookie. 3548509Smrj */ 3549509Smrj (*windowp)++; 3550509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3551509Smrj (*windowp)->wd_cookie_cnt++; 3552509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 35535084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3554509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3555509Smrj 3556509Smrj /* 3557509Smrj * again, we're tracking if the last cookie uses the copy buffer. 3558509Smrj * read the comment above for more info on why we need to track 3559509Smrj * additional state. 3560509Smrj * 3561509Smrj * For the first cookie in the new window, we need reset the physical 3562509Smrj * address to DMA into to the start of the copy buffer plus any 3563509Smrj * initial page offset which may be present. 3564509Smrj */ 3565509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3566509Smrj (*windowp)->wd_dosync = B_TRUE; 3567509Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3568509Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 3569509Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3570509Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 35715084Sjohnlev 35725084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 35735084Sjohnlev poff; 35745084Sjohnlev #ifdef __xpv 35755084Sjohnlev /* 35765084Sjohnlev * If we're dom0, we're using a real device so we need to load 35775084Sjohnlev * the cookies with MAs instead of PAs. 35785084Sjohnlev */ 35795084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = 35805084Sjohnlev ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 35815084Sjohnlev #else 35825084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = paddr; 35835084Sjohnlev #endif 35845084Sjohnlev 3585509Smrj #if !defined(__amd64) 3586509Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3587509Smrj #endif 3588509Smrj /* account for the cookie copybuf usage in the new window */ 3589509Smrj *copybuf_used += MMU_PAGESIZE; 3590509Smrj 3591509Smrj /* 3592509Smrj * every piece of code has to have a hack, and here is this 3593509Smrj * ones :-) 3594509Smrj * 3595509Smrj * There is a complex interaction between setup_cookie and the 3596509Smrj * copybuf window boundary. The complexity had to be in either 3597509Smrj * the maxxfer window, or the copybuf window, and I chose the 3598509Smrj * copybuf code. 3599509Smrj * 3600509Smrj * So in this code path, we have taken the last cookie, 3601509Smrj * virtually broken it in half due to the trim, and it happens 3602509Smrj * to use the copybuf which further complicates life. At the 3603509Smrj * same time, we have already setup the current cookie, which 3604509Smrj * is now wrong. More background info: the current cookie uses 3605509Smrj * the copybuf, so it is only a page long max. So we need to 3606509Smrj * fix the current cookies copy buffer address, physical 3607509Smrj * address, and kva for the 32-bit kernel. We due this by 3608509Smrj * bumping them by page size (of course, we can't due this on 3609509Smrj * the physical address since the copy buffer may not be 3610509Smrj * physically contiguous). 3611509Smrj */ 3612509Smrj cookie++; 3613509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 36145084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 36155084Sjohnlev 36165084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3617509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 36185084Sjohnlev #ifdef __xpv 36195084Sjohnlev /* 36205084Sjohnlev * If we're dom0, we're using a real device so we need to load 36215084Sjohnlev * the cookies with MAs instead of PAs. 36225084Sjohnlev */ 36235084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 36245084Sjohnlev #else 36255084Sjohnlev cookie->dmac_laddress = paddr; 36265084Sjohnlev #endif 36275084Sjohnlev 3628509Smrj #if !defined(__amd64) 3629509Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3630509Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3631509Smrj #endif 3632509Smrj } else { 3633509Smrj /* go back to the current cookie */ 3634509Smrj cookie++; 3635509Smrj } 3636509Smrj 3637509Smrj /* 3638509Smrj * add the current cookie to the new window. set the new window size to 3639509Smrj * the what was left over from the previous cookie and what's in the 3640509Smrj * current cookie. 3641509Smrj */ 3642509Smrj (*windowp)->wd_cookie_cnt++; 3643509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3644509Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 3645509Smrj 3646509Smrj /* 3647509Smrj * we know that the cookie passed in always uses the copy buffer. We 3648509Smrj * wouldn't be here if it didn't. 3649509Smrj */ 3650509Smrj *copybuf_used += MMU_PAGESIZE; 3651509Smrj 3652509Smrj return (DDI_SUCCESS); 3653509Smrj } 3654509Smrj 3655509Smrj 3656509Smrj /* 3657509Smrj * rootnex_maxxfer_window_boundary() 3658509Smrj * Called in bind slowpath when we get to a window boundary because we will 3659509Smrj * go over maxxfer. 3660509Smrj */ 3661509Smrj static int 3662509Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3663509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 3664509Smrj { 3665509Smrj size_t dmac_size; 3666509Smrj off_t new_offset; 3667509Smrj size_t trim_sz; 3668509Smrj off_t coffset; 3669509Smrj 3670509Smrj 3671509Smrj /* 3672509Smrj * calculate how much we have to trim off of the current cookie to equal 3673509Smrj * maxxfer. We don't have to account for granularity here since our 3674509Smrj * maxxfer already takes that into account. 3675509Smrj */ 3676509Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 3677509Smrj ASSERT(trim_sz <= cookie->dmac_size); 3678509Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 3679509Smrj 3680509Smrj /* save cookie size since we need it later and we might change it */ 3681509Smrj dmac_size = cookie->dmac_size; 3682509Smrj 3683509Smrj /* 3684509Smrj * if we're not trimming the entire cookie, setup the current window to 3685509Smrj * account for the trim. 3686509Smrj */ 3687509Smrj if (trim_sz < cookie->dmac_size) { 3688509Smrj (*windowp)->wd_cookie_cnt++; 3689509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3690509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 36915084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3692509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3693509Smrj (*windowp)->wd_size = dma->dp_maxxfer; 3694509Smrj 3695509Smrj /* 3696509Smrj * set the adjusted cookie size now in case this is the first 3697509Smrj * window. All other windows are taken care of in get win 3698509Smrj */ 3699509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3700509Smrj } 3701509Smrj 3702509Smrj /* 3703509Smrj * coffset is the current offset within the cookie, new_offset is the 3704509Smrj * current offset with the entire buffer. 3705509Smrj */ 3706509Smrj coffset = dmac_size - trim_sz; 3707509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3708509Smrj 3709509Smrj /* initialize the next window */ 3710509Smrj (*windowp)++; 3711509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3712509Smrj (*windowp)->wd_cookie_cnt++; 3713509Smrj (*windowp)->wd_size = trim_sz; 3714509Smrj if (trim_sz < dmac_size) { 3715509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 37165084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3717509Smrj coffset; 3718509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3719509Smrj } 3720509Smrj 3721509Smrj return (DDI_SUCCESS); 3722509Smrj } 3723509Smrj 3724509Smrj 3725509Smrj /* 3726509Smrj * rootnex_dma_sync() 3727509Smrj * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 3728509Smrj * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 3729509Smrj * is set, ddi_dma_sync() returns immediately passing back success. 3730509Smrj */ 3731509Smrj /*ARGSUSED*/ 3732509Smrj static int 3733509Smrj rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3734509Smrj off_t off, size_t len, uint_t cache_flags) 3735509Smrj { 3736509Smrj rootnex_sglinfo_t *sinfo; 3737509Smrj rootnex_pgmap_t *cbpage; 3738509Smrj rootnex_window_t *win; 3739509Smrj ddi_dma_impl_t *hp; 3740509Smrj rootnex_dma_t *dma; 3741509Smrj caddr_t fromaddr; 3742509Smrj caddr_t toaddr; 3743509Smrj uint_t psize; 3744509Smrj off_t offset; 3745509Smrj uint_t pidx; 3746509Smrj size_t size; 3747509Smrj off_t poff; 3748509Smrj int e; 3749509Smrj 3750509Smrj 3751509Smrj hp = (ddi_dma_impl_t *)handle; 3752509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3753509Smrj sinfo = &dma->dp_sglinfo; 3754509Smrj 3755509Smrj /* 3756509Smrj * if we don't have any windows, we don't need to sync. A copybuf 3757509Smrj * will cause us to have at least one window. 3758509Smrj */ 3759509Smrj if (dma->dp_window == NULL) { 3760509Smrj return (DDI_SUCCESS); 3761509Smrj } 3762509Smrj 3763509Smrj /* This window may not need to be sync'd */ 3764509Smrj win = &dma->dp_window[dma->dp_current_win]; 3765509Smrj if (!win->wd_dosync) { 3766509Smrj return (DDI_SUCCESS); 3767509Smrj } 3768509Smrj 3769509Smrj /* handle off and len special cases */ 3770509Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 3771509Smrj offset = win->wd_offset; 3772509Smrj } else { 3773509Smrj offset = off; 3774509Smrj } 3775509Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 3776509Smrj size = win->wd_size; 3777509Smrj } else { 3778509Smrj size = len; 3779509Smrj } 3780509Smrj 3781509Smrj /* check the sync args to make sure they make a little sense */ 3782509Smrj if (rootnex_sync_check_parms) { 3783509Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 3784509Smrj cache_flags); 3785509Smrj if (e != DDI_SUCCESS) { 3786509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 3787509Smrj return (DDI_FAILURE); 3788509Smrj } 3789509Smrj } 3790509Smrj 3791509Smrj /* 3792509Smrj * special case the first page to handle the offset into the page. The 3793509Smrj * offset to the current page for our buffer is the offset into the 3794509Smrj * first page of the buffer plus our current offset into the buffer 3795509Smrj * itself, masked of course. 3796509Smrj */ 3797509Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 3798509Smrj psize = MIN((MMU_PAGESIZE - poff), size); 3799509Smrj 3800509Smrj /* go through all the pages that we want to sync */ 3801509Smrj while (size > 0) { 3802509Smrj /* 3803509Smrj * Calculate the page index relative to the start of the buffer. 3804509Smrj * The index to the current page for our buffer is the offset 3805509Smrj * into the first page of the buffer plus our current offset 3806509Smrj * into the buffer itself, shifted of course... 3807509Smrj */ 3808509Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 3809509Smrj ASSERT(pidx < sinfo->si_max_pages); 3810509Smrj 3811509Smrj /* 3812509Smrj * if this page uses the copy buffer, we need to sync it, 3813509Smrj * otherwise, go on to the next page. 3814509Smrj */ 3815509Smrj cbpage = &dma->dp_pgmap[pidx]; 3816509Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 3817509Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 3818509Smrj if (cbpage->pm_uses_copybuf) { 3819509Smrj /* cbaddr and kaddr should be page aligned */ 3820509Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 3821509Smrj MMU_PAGEOFFSET) == 0); 3822509Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 3823509Smrj MMU_PAGEOFFSET) == 0); 3824509Smrj 3825509Smrj /* 3826509Smrj * if we're copying for the device, we are going to 3827509Smrj * copy from the drivers buffer and to the rootnex 3828509Smrj * allocated copy buffer. 3829509Smrj */ 3830509Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 3831509Smrj fromaddr = cbpage->pm_kaddr + poff; 3832509Smrj toaddr = cbpage->pm_cbaddr + poff; 3833509Smrj DTRACE_PROBE2(rootnex__sync__dev, 3834509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3835509Smrj 3836509Smrj /* 3837509Smrj * if we're copying for the cpu/kernel, we are going to 3838509Smrj * copy from the rootnex allocated copy buffer to the 3839509Smrj * drivers buffer. 3840509Smrj */ 3841509Smrj } else { 3842509Smrj fromaddr = cbpage->pm_cbaddr + poff; 3843509Smrj toaddr = cbpage->pm_kaddr + poff; 3844509Smrj DTRACE_PROBE2(rootnex__sync__cpu, 3845509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 3846509Smrj } 3847509Smrj 3848509Smrj bcopy(fromaddr, toaddr, psize); 3849509Smrj } 3850509Smrj 3851509Smrj /* 3852509Smrj * decrement size until we're done, update our offset into the 3853509Smrj * buffer, and get the next page size. 3854509Smrj */ 3855509Smrj size -= psize; 3856509Smrj offset += psize; 3857509Smrj psize = MIN(MMU_PAGESIZE, size); 3858509Smrj 3859509Smrj /* page offset is zero for the rest of this loop */ 3860509Smrj poff = 0; 3861509Smrj } 3862509Smrj 3863509Smrj return (DDI_SUCCESS); 3864509Smrj } 3865509Smrj 3866509Smrj 3867509Smrj /* 3868509Smrj * rootnex_valid_sync_parms() 3869509Smrj * checks the parameters passed to sync to verify they are correct. 3870509Smrj */ 3871509Smrj static int 3872509Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 3873509Smrj off_t offset, size_t size, uint_t cache_flags) 3874509Smrj { 3875509Smrj off_t woffset; 3876509Smrj 3877509Smrj 3878509Smrj /* 3879509Smrj * the first part of the test to make sure the offset passed in is 3880509Smrj * within the window. 3881509Smrj */ 3882509Smrj if (offset < win->wd_offset) { 3883509Smrj return (DDI_FAILURE); 3884509Smrj } 3885509Smrj 3886509Smrj /* 3887509Smrj * second and last part of the test to make sure the offset and length 3888509Smrj * passed in is within the window. 3889509Smrj */ 3890509Smrj woffset = offset - win->wd_offset; 3891509Smrj if ((woffset + size) > win->wd_size) { 3892509Smrj return (DDI_FAILURE); 3893509Smrj } 3894509Smrj 3895509Smrj /* 3896509Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 3897509Smrj * be set too. 3898509Smrj */ 3899509Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 3900509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 3901509Smrj return (DDI_SUCCESS); 3902509Smrj } 3903509Smrj 3904509Smrj /* 3905509Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 3906509Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 3907509Smrj */ 3908509Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 3909509Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 3910509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 3911509Smrj return (DDI_SUCCESS); 3912509Smrj } 3913509Smrj 3914509Smrj return (DDI_FAILURE); 3915509Smrj } 3916509Smrj 3917509Smrj 3918509Smrj /* 3919509Smrj * rootnex_dma_win() 3920509Smrj * called from ddi_dma_getwin() 3921509Smrj */ 3922509Smrj /*ARGSUSED*/ 3923509Smrj static int 3924509Smrj rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 3925509Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 3926509Smrj uint_t *ccountp) 3927509Smrj { 3928509Smrj rootnex_window_t *window; 3929509Smrj rootnex_trim_t *trim; 3930509Smrj ddi_dma_impl_t *hp; 3931509Smrj rootnex_dma_t *dma; 3932509Smrj #if !defined(__amd64) 3933509Smrj rootnex_sglinfo_t *sinfo; 3934509Smrj rootnex_pgmap_t *pmap; 3935509Smrj uint_t pidx; 3936509Smrj uint_t pcnt; 3937509Smrj off_t poff; 3938509Smrj int i; 3939509Smrj #endif 3940509Smrj 3941509Smrj 3942509Smrj hp = (ddi_dma_impl_t *)handle; 3943509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 3944509Smrj #if !defined(__amd64) 3945509Smrj sinfo = &dma->dp_sglinfo; 3946509Smrj #endif 3947509Smrj 3948509Smrj /* If we try and get a window which doesn't exist, return failure */ 3949509Smrj if (win >= hp->dmai_nwin) { 3950509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3951509Smrj return (DDI_FAILURE); 3952509Smrj } 3953509Smrj 3954509Smrj /* 3955509Smrj * if we don't have any windows, and they're asking for the first 3956509Smrj * window, setup the cookie pointer to the first cookie in the bind. 3957509Smrj * setup our return values, then increment the cookie since we return 3958509Smrj * the first cookie on the stack. 3959509Smrj */ 3960509Smrj if (dma->dp_window == NULL) { 3961509Smrj if (win != 0) { 3962509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 3963509Smrj return (DDI_FAILURE); 3964509Smrj } 3965509Smrj hp->dmai_cookie = dma->dp_cookies; 3966509Smrj *offp = 0; 3967509Smrj *lenp = dma->dp_dma.dmao_size; 3968509Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 3969509Smrj *cookiep = hp->dmai_cookie[0]; 3970509Smrj hp->dmai_cookie++; 3971509Smrj return (DDI_SUCCESS); 3972509Smrj } 3973509Smrj 3974509Smrj /* sync the old window before moving on to the new one */ 3975509Smrj window = &dma->dp_window[dma->dp_current_win]; 3976509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 3977509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 3978509Smrj DDI_DMA_SYNC_FORCPU); 3979509Smrj } 3980509Smrj 3981509Smrj #if !defined(__amd64) 3982509Smrj /* 3983509Smrj * before we move to the next window, if we need to re-map, unmap all 3984509Smrj * the pages in this window. 3985509Smrj */ 3986509Smrj if (dma->dp_cb_remaping) { 3987509Smrj /* 3988509Smrj * If we switch to this window again, we'll need to map in 3989509Smrj * on the fly next time. 3990509Smrj */ 3991509Smrj window->wd_remap_copybuf = B_TRUE; 3992509Smrj 3993509Smrj /* 3994509Smrj * calculate the page index into the buffer where this window 3995509Smrj * starts, and the number of pages this window takes up. 3996509Smrj */ 3997509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 3998509Smrj MMU_PAGESHIFT; 3999509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4000509Smrj MMU_PAGEOFFSET; 4001509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4002509Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4003509Smrj 4004509Smrj /* unmap pages which are currently mapped in this window */ 4005509Smrj for (i = 0; i < pcnt; i++) { 4006509Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 4007509Smrj hat_unload(kas.a_hat, 4008509Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4009509Smrj HAT_UNLOAD); 4010509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4011509Smrj } 4012509Smrj pidx++; 4013509Smrj } 4014509Smrj } 4015509Smrj #endif 4016509Smrj 4017509Smrj /* 4018509Smrj * Move to the new window. 4019509Smrj * NOTE: current_win must be set for sync to work right 4020509Smrj */ 4021509Smrj dma->dp_current_win = win; 4022509Smrj window = &dma->dp_window[win]; 4023509Smrj 4024509Smrj /* if needed, adjust the first and/or last cookies for trim */ 4025509Smrj trim = &window->wd_trim; 4026509Smrj if (trim->tr_trim_first) { 40275084Sjohnlev window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4028509Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 4029509Smrj #if !defined(__amd64) 4030509Smrj window->wd_first_cookie->dmac_type = 4031509Smrj (window->wd_first_cookie->dmac_type & 4032509Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 4033509Smrj #endif 4034509Smrj if (trim->tr_first_copybuf_win) { 4035509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4036509Smrj trim->tr_first_cbaddr; 4037509Smrj #if !defined(__amd64) 4038509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4039509Smrj trim->tr_first_kaddr; 4040509Smrj #endif 4041509Smrj } 4042509Smrj } 4043509Smrj if (trim->tr_trim_last) { 40445084Sjohnlev trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4045509Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4046509Smrj if (trim->tr_last_copybuf_win) { 4047509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4048509Smrj trim->tr_last_cbaddr; 4049509Smrj #if !defined(__amd64) 4050509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4051509Smrj trim->tr_last_kaddr; 4052509Smrj #endif 4053509Smrj } 4054509Smrj } 4055509Smrj 4056509Smrj /* 4057509Smrj * setup the cookie pointer to the first cookie in the window. setup 4058509Smrj * our return values, then increment the cookie since we return the 4059509Smrj * first cookie on the stack. 4060509Smrj */ 4061509Smrj hp->dmai_cookie = window->wd_first_cookie; 4062509Smrj *offp = window->wd_offset; 4063509Smrj *lenp = window->wd_size; 4064509Smrj *ccountp = window->wd_cookie_cnt; 4065509Smrj *cookiep = hp->dmai_cookie[0]; 4066509Smrj hp->dmai_cookie++; 4067509Smrj 4068509Smrj #if !defined(__amd64) 4069509Smrj /* re-map copybuf if required for this window */ 4070509Smrj if (dma->dp_cb_remaping) { 4071509Smrj /* 4072509Smrj * calculate the page index into the buffer where this 4073509Smrj * window starts. 4074509Smrj */ 4075509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4076509Smrj MMU_PAGESHIFT; 4077509Smrj ASSERT(pidx < sinfo->si_max_pages); 4078509Smrj 4079509Smrj /* 4080509Smrj * the first page can get unmapped if it's shared with the 4081509Smrj * previous window. Even if the rest of this window is already 4082509Smrj * mapped in, we need to still check this one. 4083509Smrj */ 4084509Smrj pmap = &dma->dp_pgmap[pidx]; 4085509Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4086509Smrj if (pmap->pm_pp != NULL) { 4087509Smrj pmap->pm_mapped = B_TRUE; 4088509Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4089509Smrj } else if (pmap->pm_vaddr != NULL) { 4090509Smrj pmap->pm_mapped = B_TRUE; 4091509Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4092509Smrj pmap->pm_kaddr); 4093509Smrj } 4094509Smrj } 4095509Smrj pidx++; 4096509Smrj 4097509Smrj /* map in the rest of the pages if required */ 4098509Smrj if (window->wd_remap_copybuf) { 4099509Smrj window->wd_remap_copybuf = B_FALSE; 4100509Smrj 4101509Smrj /* figure out many pages this window takes up */ 4102509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4103509Smrj MMU_PAGEOFFSET; 4104509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4105509Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4106509Smrj 4107509Smrj /* map pages which require it */ 4108509Smrj for (i = 1; i < pcnt; i++) { 4109509Smrj pmap = &dma->dp_pgmap[pidx]; 4110509Smrj if (pmap->pm_uses_copybuf) { 4111509Smrj ASSERT(pmap->pm_mapped == B_FALSE); 4112509Smrj if (pmap->pm_pp != NULL) { 4113509Smrj pmap->pm_mapped = B_TRUE; 4114509Smrj i86_pp_map(pmap->pm_pp, 4115509Smrj pmap->pm_kaddr); 4116509Smrj } else if (pmap->pm_vaddr != NULL) { 4117509Smrj pmap->pm_mapped = B_TRUE; 4118509Smrj i86_va_map(pmap->pm_vaddr, 4119509Smrj sinfo->si_asp, 4120509Smrj pmap->pm_kaddr); 4121509Smrj } 4122509Smrj } 4123509Smrj pidx++; 4124509Smrj } 4125509Smrj } 4126509Smrj } 4127509Smrj #endif 4128509Smrj 4129509Smrj /* if the new window uses the copy buffer, sync it for the device */ 4130509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4131509Smrj (void) rootnex_dma_sync(dip, rdip, handle, 0, 0, 4132509Smrj DDI_DMA_SYNC_FORDEV); 4133509Smrj } 4134509Smrj 4135509Smrj return (DDI_SUCCESS); 4136509Smrj } 4137509Smrj 4138509Smrj 4139509Smrj 4140509Smrj /* 4141509Smrj * ************************ 4142509Smrj * obsoleted dma routines 4143509Smrj * ************************ 4144509Smrj */ 4145509Smrj 4146509Smrj /* 4147509Smrj * rootnex_dma_map() 4148509Smrj * called from ddi_dma_setup() 4149509Smrj */ 4150509Smrj /* ARGSUSED */ 4151509Smrj static int 4152509Smrj rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, struct ddi_dma_req *dmareq, 4153509Smrj ddi_dma_handle_t *handlep) 4154509Smrj { 4155509Smrj #if defined(__amd64) 4156509Smrj /* 4157509Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 4158509Smrj * rootnex_dma_mctl() 4159509Smrj */ 4160509Smrj return (DDI_DMA_NORESOURCES); 4161509Smrj 4162509Smrj #else /* 32-bit x86 kernel */ 4163509Smrj ddi_dma_handle_t *lhandlep; 4164509Smrj ddi_dma_handle_t lhandle; 4165509Smrj ddi_dma_cookie_t cookie; 4166509Smrj ddi_dma_attr_t dma_attr; 4167509Smrj ddi_dma_lim_t *dma_lim; 4168509Smrj uint_t ccnt; 4169509Smrj int e; 4170509Smrj 4171509Smrj 4172509Smrj /* 4173509Smrj * if the driver is just testing to see if it's possible to do the bind, 4174509Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 4175509Smrj */ 4176509Smrj if (handlep == NULL) { 4177509Smrj lhandlep = &lhandle; 4178509Smrj } else { 4179509Smrj lhandlep = handlep; 4180509Smrj } 4181509Smrj 4182509Smrj /* convert the limit structure to a dma_attr one */ 4183509Smrj dma_lim = dmareq->dmar_limits; 4184509Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 4185509Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4186509Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4187509Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4188509Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4189509Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4190509Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4191509Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4192509Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4193509Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4194509Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 4195509Smrj dma_attr.dma_attr_flags = 0; 4196509Smrj 4197509Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4198509Smrj dmareq->dmar_arg, lhandlep); 4199509Smrj if (e != DDI_SUCCESS) { 4200509Smrj return (e); 4201509Smrj } 4202509Smrj 4203509Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4204509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4205509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4206509Smrj return (e); 4207509Smrj } 4208509Smrj 4209509Smrj /* 4210509Smrj * if the driver is just testing to see if it's possible to do the bind, 4211509Smrj * free up the local state and return the result. 4212509Smrj */ 4213509Smrj if (handlep == NULL) { 4214509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4215509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4216509Smrj if (e == DDI_DMA_MAPPED) { 4217509Smrj return (DDI_DMA_MAPOK); 42180Sstevel@tonic-gate } else { 4219509Smrj return (DDI_DMA_NOMAPPING); 4220509Smrj } 4221509Smrj } 4222509Smrj 4223509Smrj return (e); 4224509Smrj #endif /* defined(__amd64) */ 4225509Smrj } 4226509Smrj 4227509Smrj 4228509Smrj /* 4229509Smrj * rootnex_dma_mctl() 4230509Smrj * 4231509Smrj */ 4232509Smrj /* ARGSUSED */ 4233509Smrj static int 4234509Smrj rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4235509Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4236509Smrj uint_t cache_flags) 4237509Smrj { 4238509Smrj #if defined(__amd64) 4239509Smrj /* 4240509Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4241509Smrj * common implementation in genunix, so they no longer have x86 4242509Smrj * specific functionality which called into dma_ctl. 4243509Smrj * 4244509Smrj * The rest of the obsoleted interfaces were never supported in the 4245509Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4246509Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4247509Smrj * implementation issues. 4248509Smrj * 4249509Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4250509Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4251509Smrj * reflect that now too... 4252509Smrj * 4253509Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4254509Smrj * not going to put this functionality into the 64-bit x86 kernel now. 4255509Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 4256509Smrj * that in a future release. 4257509Smrj */ 4258509Smrj return (DDI_FAILURE); 4259509Smrj 4260509Smrj #else /* 32-bit x86 kernel */ 4261509Smrj ddi_dma_cookie_t lcookie; 4262509Smrj ddi_dma_cookie_t *cookie; 4263509Smrj rootnex_window_t *window; 4264509Smrj ddi_dma_impl_t *hp; 4265509Smrj rootnex_dma_t *dma; 4266509Smrj uint_t nwin; 4267509Smrj uint_t ccnt; 4268509Smrj size_t len; 4269509Smrj off_t off; 4270509Smrj int e; 4271509Smrj 4272509Smrj 4273509Smrj /* 4274509Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4275509Smrj * hacky since were optimizing for the current interfaces and so we can 4276509Smrj * cleanup the mess in genunix. Hopefully we will remove the this 4277509Smrj * obsoleted routines someday soon. 4278509Smrj */ 4279509Smrj 4280509Smrj switch (request) { 4281509Smrj 4282509Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4283509Smrj hp = (ddi_dma_impl_t *)handle; 4284509Smrj cookie = (ddi_dma_cookie_t *)objpp; 4285509Smrj 4286509Smrj /* 4287509Smrj * convert segment to cookie. We don't distinguish between the 4288509Smrj * two :-) 4289509Smrj */ 4290509Smrj *cookie = *hp->dmai_cookie; 4291509Smrj *lenp = cookie->dmac_size; 4292509Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4293509Smrj return (DDI_SUCCESS); 4294509Smrj 4295509Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4296509Smrj hp = (ddi_dma_impl_t *)handle; 4297509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4298509Smrj 4299509Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4300509Smrj return (DDI_DMA_STALE); 43010Sstevel@tonic-gate } 4302509Smrj 4303509Smrj /* handle the case where we don't have any windows */ 4304509Smrj if (dma->dp_window == NULL) { 4305509Smrj /* 4306509Smrj * if seg == NULL, and we don't have any windows, 4307509Smrj * return the first cookie in the sgl. 4308509Smrj */ 4309509Smrj if (*lenp == NULL) { 4310509Smrj dma->dp_current_cookie = 0; 4311509Smrj hp->dmai_cookie = dma->dp_cookies; 4312509Smrj *objpp = (caddr_t)handle; 4313509Smrj return (DDI_SUCCESS); 4314509Smrj 4315509Smrj /* if we have more cookies, go to the next cookie */ 4316509Smrj } else { 4317509Smrj if ((dma->dp_current_cookie + 1) >= 4318509Smrj dma->dp_sglinfo.si_sgl_size) { 4319509Smrj return (DDI_DMA_DONE); 4320509Smrj } 4321509Smrj dma->dp_current_cookie++; 4322509Smrj hp->dmai_cookie++; 4323509Smrj return (DDI_SUCCESS); 4324509Smrj } 4325509Smrj } 4326509Smrj 4327509Smrj /* We have one or more windows */ 4328509Smrj window = &dma->dp_window[dma->dp_current_win]; 4329509Smrj 4330509Smrj /* 4331509Smrj * if seg == NULL, return the first cookie in the current 4332509Smrj * window 4333509Smrj */ 4334509Smrj if (*lenp == NULL) { 4335509Smrj dma->dp_current_cookie = 0; 4336683Smrj hp->dmai_cookie = window->wd_first_cookie; 4337509Smrj 4338509Smrj /* 4339509Smrj * go to the next cookie in the window then see if we done with 4340509Smrj * this window. 4341509Smrj */ 4342509Smrj } else { 4343509Smrj if ((dma->dp_current_cookie + 1) >= 4344509Smrj window->wd_cookie_cnt) { 4345509Smrj return (DDI_DMA_DONE); 4346509Smrj } 4347509Smrj dma->dp_current_cookie++; 4348509Smrj hp->dmai_cookie++; 4349509Smrj } 4350509Smrj *objpp = (caddr_t)handle; 4351509Smrj return (DDI_SUCCESS); 4352509Smrj 4353509Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4354509Smrj hp = (ddi_dma_impl_t *)handle; 4355509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4356509Smrj 4357509Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4358509Smrj return (DDI_DMA_STALE); 4359509Smrj } 4360509Smrj 4361509Smrj /* if win == NULL, return the first window in the bind */ 4362509Smrj if (*offp == NULL) { 4363509Smrj nwin = 0; 4364509Smrj 4365509Smrj /* 4366509Smrj * else, go to the next window then see if we're done with all 4367509Smrj * the windows. 4368509Smrj */ 4369509Smrj } else { 4370509Smrj nwin = dma->dp_current_win + 1; 4371509Smrj if (nwin >= hp->dmai_nwin) { 4372509Smrj return (DDI_DMA_DONE); 4373509Smrj } 4374509Smrj } 4375509Smrj 4376509Smrj /* switch to the next window */ 4377509Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4378509Smrj &lcookie, &ccnt); 4379509Smrj ASSERT(e == DDI_SUCCESS); 4380509Smrj if (e != DDI_SUCCESS) { 4381509Smrj return (DDI_DMA_STALE); 4382509Smrj } 4383509Smrj 4384509Smrj /* reset the cookie back to the first cookie in the window */ 4385509Smrj if (dma->dp_window != NULL) { 4386509Smrj window = &dma->dp_window[dma->dp_current_win]; 4387509Smrj hp->dmai_cookie = window->wd_first_cookie; 4388509Smrj } else { 4389509Smrj hp->dmai_cookie = dma->dp_cookies; 4390509Smrj } 4391509Smrj 4392509Smrj *objpp = (caddr_t)handle; 4393509Smrj return (DDI_SUCCESS); 4394509Smrj 4395509Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 4396509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4397509Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 4398509Smrj if (rootnex_state->r_dvma_call_list_id) { 4399509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4400509Smrj } 4401509Smrj return (DDI_SUCCESS); 4402509Smrj 4403509Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4404509Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4405509Smrj /* should never get here, handled in genunix */ 4406509Smrj ASSERT(0); 4407509Smrj return (DDI_FAILURE); 4408509Smrj 4409509Smrj case DDI_DMA_KVADDR: 4410509Smrj case DDI_DMA_GETERR: 4411509Smrj case DDI_DMA_COFF: 4412509Smrj return (DDI_FAILURE); 44130Sstevel@tonic-gate } 4414509Smrj 4415509Smrj return (DDI_FAILURE); 4416509Smrj #endif /* defined(__amd64) */ 44170Sstevel@tonic-gate } 44181414Scindi 44191865Sdilpreet 44201865Sdilpreet /* 44211865Sdilpreet * ********* 44221865Sdilpreet * FMA Code 44231865Sdilpreet * ********* 44241865Sdilpreet */ 44251865Sdilpreet 44261865Sdilpreet /* 44271865Sdilpreet * rootnex_fm_init() 44281865Sdilpreet * FMA init busop 44291865Sdilpreet */ 44301865Sdilpreet /* ARGSUSED */ 44311865Sdilpreet static int 44321865Sdilpreet rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 44331865Sdilpreet ddi_iblock_cookie_t *ibc) 44341865Sdilpreet { 44351865Sdilpreet *ibc = rootnex_state->r_err_ibc; 44361865Sdilpreet 44371865Sdilpreet return (ddi_system_fmcap); 44381865Sdilpreet } 44391865Sdilpreet 44401865Sdilpreet /* 44411865Sdilpreet * rootnex_dma_check() 44421865Sdilpreet * Function called after a dma fault occurred to find out whether the 44431865Sdilpreet * fault address is associated with a driver that is able to handle faults 44441865Sdilpreet * and recover from faults. 44451865Sdilpreet */ 44461865Sdilpreet /* ARGSUSED */ 44471414Scindi static int 44481865Sdilpreet rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 44491865Sdilpreet const void *not_used) 44501414Scindi { 44511865Sdilpreet rootnex_window_t *window; 44521865Sdilpreet uint64_t start_addr; 44531865Sdilpreet uint64_t fault_addr; 44541865Sdilpreet ddi_dma_impl_t *hp; 44551865Sdilpreet rootnex_dma_t *dma; 44561865Sdilpreet uint64_t end_addr; 44571865Sdilpreet size_t csize; 44581865Sdilpreet int i; 44591865Sdilpreet int j; 44601865Sdilpreet 44611865Sdilpreet 44621865Sdilpreet /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 44631865Sdilpreet hp = (ddi_dma_impl_t *)handle; 44641865Sdilpreet ASSERT(hp); 44651865Sdilpreet 44661865Sdilpreet dma = (rootnex_dma_t *)hp->dmai_private; 44671865Sdilpreet 44681865Sdilpreet /* Get the address that we need to search for */ 44691865Sdilpreet fault_addr = *(uint64_t *)addr; 44701865Sdilpreet 44711865Sdilpreet /* 44721865Sdilpreet * if we don't have any windows, we can just walk through all the 44731865Sdilpreet * cookies. 44741865Sdilpreet */ 44751865Sdilpreet if (dma->dp_window == NULL) { 44761865Sdilpreet /* for each cookie */ 44771865Sdilpreet for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 44781865Sdilpreet /* 44791865Sdilpreet * if the faulted address is within the physical address 44801865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 44811865Sdilpreet */ 44821865Sdilpreet if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 44831865Sdilpreet (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 44841865Sdilpreet dma->dp_cookies[i].dmac_size))) { 44851865Sdilpreet return (DDI_FM_NONFATAL); 44861865Sdilpreet } 44871865Sdilpreet } 44881865Sdilpreet 44891865Sdilpreet /* fault_addr not within this DMA handle */ 44901865Sdilpreet return (DDI_FM_UNKNOWN); 44911865Sdilpreet } 44921865Sdilpreet 44931865Sdilpreet /* we have mutiple windows, walk through each window */ 44941865Sdilpreet for (i = 0; i < hp->dmai_nwin; i++) { 44951865Sdilpreet window = &dma->dp_window[i]; 44961865Sdilpreet 44971865Sdilpreet /* Go through all the cookies in the window */ 44981865Sdilpreet for (j = 0; j < window->wd_cookie_cnt; j++) { 44991865Sdilpreet 45001865Sdilpreet start_addr = window->wd_first_cookie[j].dmac_laddress; 45011865Sdilpreet csize = window->wd_first_cookie[j].dmac_size; 45021865Sdilpreet 45031865Sdilpreet /* 45041865Sdilpreet * if we are trimming the first cookie in the window, 45051865Sdilpreet * and this is the first cookie, adjust the start 45061865Sdilpreet * address and size of the cookie to account for the 45071865Sdilpreet * trim. 45081865Sdilpreet */ 45091865Sdilpreet if (window->wd_trim.tr_trim_first && (j == 0)) { 45101865Sdilpreet start_addr = window->wd_trim.tr_first_paddr; 45111865Sdilpreet csize = window->wd_trim.tr_first_size; 45121865Sdilpreet } 45131865Sdilpreet 45141865Sdilpreet /* 45151865Sdilpreet * if we are trimming the last cookie in the window, 45161865Sdilpreet * and this is the last cookie, adjust the start 45171865Sdilpreet * address and size of the cookie to account for the 45181865Sdilpreet * trim. 45191865Sdilpreet */ 45201865Sdilpreet if (window->wd_trim.tr_trim_last && 45211865Sdilpreet (j == (window->wd_cookie_cnt - 1))) { 45221865Sdilpreet start_addr = window->wd_trim.tr_last_paddr; 45231865Sdilpreet csize = window->wd_trim.tr_last_size; 45241865Sdilpreet } 45251865Sdilpreet 45261865Sdilpreet end_addr = start_addr + csize; 45271865Sdilpreet 45281865Sdilpreet /* 45291865Sdilpreet * if the faulted address is within the physical address 45301865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 45311865Sdilpreet */ 45321865Sdilpreet if ((fault_addr >= start_addr) && 45331865Sdilpreet (fault_addr <= end_addr)) { 45341865Sdilpreet return (DDI_FM_NONFATAL); 45351865Sdilpreet } 45361865Sdilpreet } 45371865Sdilpreet } 45381865Sdilpreet 45391865Sdilpreet /* fault_addr not within this DMA handle */ 45401865Sdilpreet return (DDI_FM_UNKNOWN); 45411414Scindi } 4542