10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51865Sdilpreet * Common Development and Distribution License (the "License"). 61865Sdilpreet * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 2210007SVikram.Hegde@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate /* 27509Smrj * x86 root nexus driver 280Sstevel@tonic-gate */ 290Sstevel@tonic-gate 300Sstevel@tonic-gate #include <sys/sysmacros.h> 310Sstevel@tonic-gate #include <sys/conf.h> 320Sstevel@tonic-gate #include <sys/autoconf.h> 330Sstevel@tonic-gate #include <sys/sysmacros.h> 340Sstevel@tonic-gate #include <sys/debug.h> 350Sstevel@tonic-gate #include <sys/psw.h> 360Sstevel@tonic-gate #include <sys/ddidmareq.h> 370Sstevel@tonic-gate #include <sys/promif.h> 380Sstevel@tonic-gate #include <sys/devops.h> 390Sstevel@tonic-gate #include <sys/kmem.h> 400Sstevel@tonic-gate #include <sys/cmn_err.h> 410Sstevel@tonic-gate #include <vm/seg.h> 420Sstevel@tonic-gate #include <vm/seg_kmem.h> 430Sstevel@tonic-gate #include <vm/seg_dev.h> 440Sstevel@tonic-gate #include <sys/vmem.h> 450Sstevel@tonic-gate #include <sys/mman.h> 460Sstevel@tonic-gate #include <vm/hat.h> 470Sstevel@tonic-gate #include <vm/as.h> 480Sstevel@tonic-gate #include <vm/page.h> 490Sstevel@tonic-gate #include <sys/avintr.h> 500Sstevel@tonic-gate #include <sys/errno.h> 510Sstevel@tonic-gate #include <sys/modctl.h> 520Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 530Sstevel@tonic-gate #include <sys/sunddi.h> 540Sstevel@tonic-gate #include <sys/sunndi.h> 55916Sschwartz #include <sys/mach_intr.h> 560Sstevel@tonic-gate #include <sys/psm.h> 570Sstevel@tonic-gate #include <sys/ontrap.h> 58509Smrj #include <sys/atomic.h> 59509Smrj #include <sys/sdt.h> 60509Smrj #include <sys/rootnex.h> 61509Smrj #include <vm/hat_i86.h> 621865Sdilpreet #include <sys/ddifm.h> 635251Smrj #include <sys/ddi_isa.h> 64509Smrj 655084Sjohnlev #ifdef __xpv 665084Sjohnlev #include <sys/bootinfo.h> 675084Sjohnlev #include <sys/hypervisor.h> 685084Sjohnlev #include <sys/bootconf.h> 695084Sjohnlev #include <vm/kboot_mmu.h> 707613SVikram.Hegde@Sun.COM #else 717589SVikram.Hegde@Sun.COM #include <sys/intel_iommu.h> 727613SVikram.Hegde@Sun.COM #endif 737613SVikram.Hegde@Sun.COM 747589SVikram.Hegde@Sun.COM 75509Smrj /* 76509Smrj * enable/disable extra checking of function parameters. Useful for debugging 77509Smrj * drivers. 78509Smrj */ 79509Smrj #ifdef DEBUG 80509Smrj int rootnex_alloc_check_parms = 1; 81509Smrj int rootnex_bind_check_parms = 1; 82509Smrj int rootnex_bind_check_inuse = 1; 83509Smrj int rootnex_unbind_verify_buffer = 0; 84509Smrj int rootnex_sync_check_parms = 1; 85509Smrj #else 86509Smrj int rootnex_alloc_check_parms = 0; 87509Smrj int rootnex_bind_check_parms = 0; 88509Smrj int rootnex_bind_check_inuse = 0; 89509Smrj int rootnex_unbind_verify_buffer = 0; 90509Smrj int rootnex_sync_check_parms = 0; 91509Smrj #endif 92509Smrj 931414Scindi /* Master Abort and Target Abort panic flag */ 941414Scindi int rootnex_fm_ma_ta_panic_flag = 0; 951414Scindi 96509Smrj /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 970Sstevel@tonic-gate int rootnex_bind_fail = 1; 980Sstevel@tonic-gate int rootnex_bind_warn = 1; 990Sstevel@tonic-gate uint8_t *rootnex_warn_list; 1000Sstevel@tonic-gate /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 1010Sstevel@tonic-gate #define ROOTNEX_BIND_WARNING (0x1 << 0) 1020Sstevel@tonic-gate 1030Sstevel@tonic-gate /* 104509Smrj * revert back to old broken behavior of always sync'ing entire copy buffer. 105509Smrj * This is useful if be have a buggy driver which doesn't correctly pass in 106509Smrj * the offset and size into ddi_dma_sync(). 1070Sstevel@tonic-gate */ 108509Smrj int rootnex_sync_ignore_params = 0; 1090Sstevel@tonic-gate 1100Sstevel@tonic-gate /* 111509Smrj * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 112509Smrj * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 113509Smrj * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 114509Smrj * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 115509Smrj * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 116509Smrj * (< 8K). We will still need to allocate the copy buffer during bind though 117509Smrj * (if we need one). These can only be modified in /etc/system before rootnex 118509Smrj * attach. 1190Sstevel@tonic-gate */ 120509Smrj #if defined(__amd64) 121509Smrj int rootnex_prealloc_cookies = 65; 122509Smrj int rootnex_prealloc_windows = 4; 123509Smrj int rootnex_prealloc_copybuf = 2; 124509Smrj #else 125509Smrj int rootnex_prealloc_cookies = 33; 126509Smrj int rootnex_prealloc_windows = 4; 127509Smrj int rootnex_prealloc_copybuf = 2; 128509Smrj #endif 129509Smrj 130509Smrj /* driver global state */ 131509Smrj static rootnex_state_t *rootnex_state; 132509Smrj 133509Smrj /* shortcut to rootnex counters */ 134509Smrj static uint64_t *rootnex_cnt; 1350Sstevel@tonic-gate 1360Sstevel@tonic-gate /* 137509Smrj * XXX - does x86 even need these or are they left over from the SPARC days? 1380Sstevel@tonic-gate */ 139509Smrj /* statically defined integer/boolean properties for the root node */ 140509Smrj static rootnex_intprop_t rootnex_intprp[] = { 141509Smrj { "PAGESIZE", PAGESIZE }, 142509Smrj { "MMU_PAGESIZE", MMU_PAGESIZE }, 143509Smrj { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 144509Smrj { DDI_RELATIVE_ADDRESSING, 1 }, 145509Smrj }; 146509Smrj #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 147509Smrj 1485084Sjohnlev #ifdef __xpv 1495084Sjohnlev typedef maddr_t rootnex_addr_t; 1505084Sjohnlev #define ROOTNEX_PADDR_TO_RBASE(xinfo, pa) \ 1515084Sjohnlev (DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa)) 1525084Sjohnlev #else 1535084Sjohnlev typedef paddr_t rootnex_addr_t; 1545084Sjohnlev #endif 1555084Sjohnlev 1567613SVikram.Hegde@Sun.COM #if !defined(__xpv) 157*10384SVikram.Hegde@Sun.COM char _depends_on[] = "mach/pcplusmp misc/iommulib misc/acpica"; 1587613SVikram.Hegde@Sun.COM #endif 159509Smrj 160509Smrj static struct cb_ops rootnex_cb_ops = { 161509Smrj nodev, /* open */ 162509Smrj nodev, /* close */ 163509Smrj nodev, /* strategy */ 164509Smrj nodev, /* print */ 165509Smrj nodev, /* dump */ 166509Smrj nodev, /* read */ 167509Smrj nodev, /* write */ 168509Smrj nodev, /* ioctl */ 169509Smrj nodev, /* devmap */ 170509Smrj nodev, /* mmap */ 171509Smrj nodev, /* segmap */ 172509Smrj nochpoll, /* chpoll */ 173509Smrj ddi_prop_op, /* cb_prop_op */ 174509Smrj NULL, /* struct streamtab */ 175509Smrj D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 176509Smrj CB_REV, /* Rev */ 177509Smrj nodev, /* cb_aread */ 178509Smrj nodev /* cb_awrite */ 179509Smrj }; 180509Smrj 181509Smrj static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 1820Sstevel@tonic-gate off_t offset, off_t len, caddr_t *vaddrp); 183509Smrj static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 1840Sstevel@tonic-gate struct hat *hat, struct seg *seg, caddr_t addr, 1850Sstevel@tonic-gate struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 186509Smrj static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 1870Sstevel@tonic-gate struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 188509Smrj static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 189509Smrj ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 190509Smrj ddi_dma_handle_t *handlep); 191509Smrj static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 192509Smrj ddi_dma_handle_t handle); 193509Smrj static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 194509Smrj ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 195509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 196509Smrj static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 197509Smrj ddi_dma_handle_t handle); 198509Smrj static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 199509Smrj ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 200509Smrj static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 201509Smrj ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 202509Smrj ddi_dma_cookie_t *cookiep, uint_t *ccountp); 203509Smrj static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 2040Sstevel@tonic-gate ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 2050Sstevel@tonic-gate off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 206509Smrj static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 207509Smrj ddi_ctl_enum_t ctlop, void *arg, void *result); 2081865Sdilpreet static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 2091865Sdilpreet ddi_iblock_cookie_t *ibc); 210509Smrj static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 211509Smrj ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 212509Smrj 2137613SVikram.Hegde@Sun.COM static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 2147613SVikram.Hegde@Sun.COM ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 2157613SVikram.Hegde@Sun.COM ddi_dma_handle_t *handlep); 2167613SVikram.Hegde@Sun.COM static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 2177613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 2187613SVikram.Hegde@Sun.COM static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 2197613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 2207613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp); 2217613SVikram.Hegde@Sun.COM static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2227613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 2237617SVikram.Hegde@Sun.COM #if !defined(__xpv) 2247613SVikram.Hegde@Sun.COM static void rootnex_coredma_reset_cookies(dev_info_t *dip, 2257613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 2267613SVikram.Hegde@Sun.COM static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2278215SVikram.Hegde@Sun.COM ddi_dma_cookie_t **cookiepp, uint_t *ccountp); 2288215SVikram.Hegde@Sun.COM static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2298215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t ccount); 2308215SVikram.Hegde@Sun.COM static int rootnex_coredma_clear_cookies(dev_info_t *dip, 2318215SVikram.Hegde@Sun.COM ddi_dma_handle_t handle); 2328215SVikram.Hegde@Sun.COM static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle); 2337617SVikram.Hegde@Sun.COM #endif 2347613SVikram.Hegde@Sun.COM static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, 2357613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 2367613SVikram.Hegde@Sun.COM static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, 2377613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 2387613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp); 2390Sstevel@tonic-gate 2400Sstevel@tonic-gate static struct bus_ops rootnex_bus_ops = { 2410Sstevel@tonic-gate BUSO_REV, 2420Sstevel@tonic-gate rootnex_map, 2430Sstevel@tonic-gate NULL, 2440Sstevel@tonic-gate NULL, 2450Sstevel@tonic-gate NULL, 2460Sstevel@tonic-gate rootnex_map_fault, 2470Sstevel@tonic-gate rootnex_dma_map, 2480Sstevel@tonic-gate rootnex_dma_allochdl, 2490Sstevel@tonic-gate rootnex_dma_freehdl, 2500Sstevel@tonic-gate rootnex_dma_bindhdl, 2510Sstevel@tonic-gate rootnex_dma_unbindhdl, 252509Smrj rootnex_dma_sync, 2530Sstevel@tonic-gate rootnex_dma_win, 2540Sstevel@tonic-gate rootnex_dma_mctl, 2550Sstevel@tonic-gate rootnex_ctlops, 2560Sstevel@tonic-gate ddi_bus_prop_op, 2570Sstevel@tonic-gate i_ddi_rootnex_get_eventcookie, 2580Sstevel@tonic-gate i_ddi_rootnex_add_eventcall, 2590Sstevel@tonic-gate i_ddi_rootnex_remove_eventcall, 2600Sstevel@tonic-gate i_ddi_rootnex_post_event, 2610Sstevel@tonic-gate 0, /* bus_intr_ctl */ 2620Sstevel@tonic-gate 0, /* bus_config */ 2630Sstevel@tonic-gate 0, /* bus_unconfig */ 2641865Sdilpreet rootnex_fm_init, /* bus_fm_init */ 2650Sstevel@tonic-gate NULL, /* bus_fm_fini */ 2660Sstevel@tonic-gate NULL, /* bus_fm_access_enter */ 2670Sstevel@tonic-gate NULL, /* bus_fm_access_exit */ 2680Sstevel@tonic-gate NULL, /* bus_powr */ 2690Sstevel@tonic-gate rootnex_intr_ops /* bus_intr_op */ 2700Sstevel@tonic-gate }; 2710Sstevel@tonic-gate 272509Smrj static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 273509Smrj static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 2740Sstevel@tonic-gate 2750Sstevel@tonic-gate static struct dev_ops rootnex_ops = { 2760Sstevel@tonic-gate DEVO_REV, 277509Smrj 0, 278509Smrj ddi_no_info, 279509Smrj nulldev, 2800Sstevel@tonic-gate nulldev, 2810Sstevel@tonic-gate rootnex_attach, 282509Smrj rootnex_detach, 283509Smrj nulldev, 284509Smrj &rootnex_cb_ops, 2857656SSherry.Moore@Sun.COM &rootnex_bus_ops, 2867656SSherry.Moore@Sun.COM NULL, 2877656SSherry.Moore@Sun.COM ddi_quiesce_not_needed, /* quiesce */ 2880Sstevel@tonic-gate }; 2890Sstevel@tonic-gate 290509Smrj static struct modldrv rootnex_modldrv = { 291509Smrj &mod_driverops, 2927542SRichard.Bean@Sun.COM "i86pc root nexus", 293509Smrj &rootnex_ops 294509Smrj }; 295509Smrj 296509Smrj static struct modlinkage rootnex_modlinkage = { 297509Smrj MODREV_1, 298509Smrj (void *)&rootnex_modldrv, 299509Smrj NULL 300509Smrj }; 301509Smrj 3027617SVikram.Hegde@Sun.COM #if !defined(__xpv) 3037613SVikram.Hegde@Sun.COM static iommulib_nexops_t iommulib_nexops = { 3047613SVikram.Hegde@Sun.COM IOMMU_NEXOPS_VERSION, 3057613SVikram.Hegde@Sun.COM "Rootnex IOMMU ops Vers 1.1", 3067613SVikram.Hegde@Sun.COM NULL, 3077613SVikram.Hegde@Sun.COM rootnex_coredma_allochdl, 3087613SVikram.Hegde@Sun.COM rootnex_coredma_freehdl, 3097613SVikram.Hegde@Sun.COM rootnex_coredma_bindhdl, 3107613SVikram.Hegde@Sun.COM rootnex_coredma_unbindhdl, 3117613SVikram.Hegde@Sun.COM rootnex_coredma_reset_cookies, 3127613SVikram.Hegde@Sun.COM rootnex_coredma_get_cookies, 3138215SVikram.Hegde@Sun.COM rootnex_coredma_set_cookies, 3148215SVikram.Hegde@Sun.COM rootnex_coredma_clear_cookies, 3158215SVikram.Hegde@Sun.COM rootnex_coredma_get_sleep_flags, 3167613SVikram.Hegde@Sun.COM rootnex_coredma_sync, 3177613SVikram.Hegde@Sun.COM rootnex_coredma_win, 31810216SVikram.Hegde@Sun.COM rootnex_dma_map, 31910216SVikram.Hegde@Sun.COM rootnex_dma_mctl 3207613SVikram.Hegde@Sun.COM }; 3217617SVikram.Hegde@Sun.COM #endif 322509Smrj 323509Smrj /* 324509Smrj * extern hacks 325509Smrj */ 326509Smrj extern struct seg_ops segdev_ops; 327509Smrj extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 328509Smrj #ifdef DDI_MAP_DEBUG 329509Smrj extern int ddi_map_debug_flag; 330509Smrj #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 331509Smrj #endif 332509Smrj extern void i86_pp_map(page_t *pp, caddr_t kaddr); 333509Smrj extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 334509Smrj extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 335509Smrj psm_intr_op_t, int *); 336509Smrj extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 337509Smrj extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 3385251Smrj 339509Smrj /* 340509Smrj * Use device arena to use for device control register mappings. 341509Smrj * Various kernel memory walkers (debugger, dtrace) need to know 342509Smrj * to avoid this address range to prevent undesired device activity. 343509Smrj */ 344509Smrj extern void *device_arena_alloc(size_t size, int vm_flag); 345509Smrj extern void device_arena_free(void * vaddr, size_t size); 346509Smrj 347509Smrj 3480Sstevel@tonic-gate /* 349509Smrj * Internal functions 3500Sstevel@tonic-gate */ 351509Smrj static int rootnex_dma_init(); 352509Smrj static void rootnex_add_props(dev_info_t *); 353509Smrj static int rootnex_ctl_reportdev(dev_info_t *dip); 354509Smrj static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 355509Smrj static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 356509Smrj static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 357509Smrj static int rootnex_map_handle(ddi_map_req_t *mp); 358509Smrj static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 359509Smrj static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 360509Smrj static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 361509Smrj ddi_dma_attr_t *attr); 362509Smrj static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 363509Smrj rootnex_sglinfo_t *sglinfo); 364509Smrj static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 365509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 366509Smrj static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 367509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr); 368509Smrj static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 369509Smrj static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 370509Smrj ddi_dma_attr_t *attr, int kmflag); 371509Smrj static void rootnex_teardown_windows(rootnex_dma_t *dma); 372509Smrj static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 373509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 374509Smrj static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 375509Smrj rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 376509Smrj size_t *copybuf_used, page_t **cur_pp); 377509Smrj static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 378509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 379509Smrj ddi_dma_attr_t *attr, off_t cur_offset); 380509Smrj static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 381509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, 382509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 383509Smrj static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 384509Smrj rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 385509Smrj static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 386509Smrj off_t offset, size_t size, uint_t cache_flags); 387509Smrj static int rootnex_verify_buffer(rootnex_dma_t *dma); 3881865Sdilpreet static int rootnex_dma_check(dev_info_t *dip, const void *handle, 3891865Sdilpreet const void *comp_addr, const void *not_used); 390509Smrj 391509Smrj /* 392509Smrj * _init() 393509Smrj * 394509Smrj */ 3950Sstevel@tonic-gate int 3960Sstevel@tonic-gate _init(void) 3970Sstevel@tonic-gate { 398509Smrj 399509Smrj rootnex_state = NULL; 400509Smrj return (mod_install(&rootnex_modlinkage)); 4010Sstevel@tonic-gate } 4020Sstevel@tonic-gate 403509Smrj 404509Smrj /* 405509Smrj * _info() 406509Smrj * 407509Smrj */ 408509Smrj int 409509Smrj _info(struct modinfo *modinfop) 410509Smrj { 411509Smrj return (mod_info(&rootnex_modlinkage, modinfop)); 412509Smrj } 413509Smrj 414509Smrj 415509Smrj /* 416509Smrj * _fini() 417509Smrj * 418509Smrj */ 4190Sstevel@tonic-gate int 4200Sstevel@tonic-gate _fini(void) 4210Sstevel@tonic-gate { 4220Sstevel@tonic-gate return (EBUSY); 4230Sstevel@tonic-gate } 4240Sstevel@tonic-gate 4250Sstevel@tonic-gate 4260Sstevel@tonic-gate /* 427509Smrj * rootnex_attach() 4280Sstevel@tonic-gate * 4290Sstevel@tonic-gate */ 430509Smrj static int 431509Smrj rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 432509Smrj { 4331414Scindi int fmcap; 434509Smrj int e; 435509Smrj 436509Smrj switch (cmd) { 437509Smrj case DDI_ATTACH: 438509Smrj break; 439509Smrj case DDI_RESUME: 440509Smrj return (DDI_SUCCESS); 441509Smrj default: 442509Smrj return (DDI_FAILURE); 443509Smrj } 444509Smrj 445509Smrj /* 446509Smrj * We should only have one instance of rootnex. Save it away since we 447509Smrj * don't have an easy way to get it back later. 448509Smrj */ 449509Smrj ASSERT(rootnex_state == NULL); 450509Smrj rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 451509Smrj 452509Smrj rootnex_state->r_dip = dip; 4531414Scindi rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 454509Smrj rootnex_state->r_reserved_msg_printed = B_FALSE; 455509Smrj rootnex_cnt = &rootnex_state->r_counters[0]; 4567589SVikram.Hegde@Sun.COM rootnex_state->r_intel_iommu_enabled = B_FALSE; 457509Smrj 4581414Scindi /* 4591414Scindi * Set minimum fm capability level for i86pc platforms and then 4601414Scindi * initialize error handling. Since we're the rootnex, we don't 4611414Scindi * care what's returned in the fmcap field. 4621414Scindi */ 4631865Sdilpreet ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 4641865Sdilpreet DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 4651414Scindi fmcap = ddi_system_fmcap; 4661414Scindi ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 4671414Scindi 468509Smrj /* initialize DMA related state */ 469509Smrj e = rootnex_dma_init(); 470509Smrj if (e != DDI_SUCCESS) { 471509Smrj kmem_free(rootnex_state, sizeof (rootnex_state_t)); 472509Smrj return (DDI_FAILURE); 473509Smrj } 474509Smrj 475509Smrj /* Add static root node properties */ 476509Smrj rootnex_add_props(dip); 477509Smrj 478509Smrj /* since we can't call ddi_report_dev() */ 479509Smrj cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 480509Smrj 481509Smrj /* Initialize rootnex event handle */ 482509Smrj i_ddi_rootnex_init_events(dip); 483509Smrj 4847613SVikram.Hegde@Sun.COM #if !defined(__xpv) 4857589SVikram.Hegde@Sun.COM #if defined(__amd64) 4867589SVikram.Hegde@Sun.COM /* probe intel iommu */ 4877589SVikram.Hegde@Sun.COM intel_iommu_probe_and_parse(); 4887589SVikram.Hegde@Sun.COM 4897589SVikram.Hegde@Sun.COM /* attach the iommu nodes */ 4907589SVikram.Hegde@Sun.COM if (intel_iommu_support) { 4917589SVikram.Hegde@Sun.COM if (intel_iommu_attach_dmar_nodes() == DDI_SUCCESS) { 4927589SVikram.Hegde@Sun.COM rootnex_state->r_intel_iommu_enabled = B_TRUE; 4937589SVikram.Hegde@Sun.COM } else { 4947589SVikram.Hegde@Sun.COM intel_iommu_release_dmar_info(); 4957589SVikram.Hegde@Sun.COM } 4967589SVikram.Hegde@Sun.COM } 4977589SVikram.Hegde@Sun.COM #endif 4987589SVikram.Hegde@Sun.COM 4997613SVikram.Hegde@Sun.COM e = iommulib_nexus_register(dip, &iommulib_nexops, 5007613SVikram.Hegde@Sun.COM &rootnex_state->r_iommulib_handle); 5017613SVikram.Hegde@Sun.COM 5027613SVikram.Hegde@Sun.COM ASSERT(e == DDI_SUCCESS); 5037613SVikram.Hegde@Sun.COM #endif 5047613SVikram.Hegde@Sun.COM 505509Smrj return (DDI_SUCCESS); 506509Smrj } 507509Smrj 508509Smrj 509509Smrj /* 510509Smrj * rootnex_detach() 511509Smrj * 512509Smrj */ 5130Sstevel@tonic-gate /*ARGSUSED*/ 5140Sstevel@tonic-gate static int 515509Smrj rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 516509Smrj { 517509Smrj switch (cmd) { 518509Smrj case DDI_SUSPEND: 519509Smrj break; 520509Smrj default: 521509Smrj return (DDI_FAILURE); 522509Smrj } 523509Smrj 524509Smrj return (DDI_SUCCESS); 525509Smrj } 526509Smrj 527509Smrj 528509Smrj /* 529509Smrj * rootnex_dma_init() 530509Smrj * 531509Smrj */ 532509Smrj /*ARGSUSED*/ 533509Smrj static int 534509Smrj rootnex_dma_init() 5350Sstevel@tonic-gate { 536509Smrj size_t bufsize; 537509Smrj 538509Smrj 539509Smrj /* 540509Smrj * size of our cookie/window/copybuf state needed in dma bind that we 541509Smrj * pre-alloc in dma_alloc_handle 542509Smrj */ 543509Smrj rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 544509Smrj rootnex_state->r_prealloc_size = 545509Smrj (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 546509Smrj (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 547509Smrj (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 548509Smrj 549509Smrj /* 550509Smrj * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 551509Smrj * allocate 16 extra bytes for struct pointer alignment 552509Smrj * (p->dmai_private & dma->dp_prealloc_buffer) 553509Smrj */ 554509Smrj bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 555509Smrj rootnex_state->r_prealloc_size + 0x10; 556509Smrj rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 557509Smrj bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 558509Smrj if (rootnex_state->r_dmahdl_cache == NULL) { 559509Smrj return (DDI_FAILURE); 560509Smrj } 5610Sstevel@tonic-gate 5620Sstevel@tonic-gate /* 5630Sstevel@tonic-gate * allocate array to track which major numbers we have printed warnings 5640Sstevel@tonic-gate * for. 5650Sstevel@tonic-gate */ 5660Sstevel@tonic-gate rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 5670Sstevel@tonic-gate KM_SLEEP); 5680Sstevel@tonic-gate 5690Sstevel@tonic-gate return (DDI_SUCCESS); 5700Sstevel@tonic-gate } 5710Sstevel@tonic-gate 5720Sstevel@tonic-gate 5730Sstevel@tonic-gate /* 574509Smrj * rootnex_add_props() 575509Smrj * 5760Sstevel@tonic-gate */ 5770Sstevel@tonic-gate static void 578509Smrj rootnex_add_props(dev_info_t *dip) 5790Sstevel@tonic-gate { 580509Smrj rootnex_intprop_t *rpp; 5810Sstevel@tonic-gate int i; 582509Smrj 583509Smrj /* Add static integer/boolean properties to the root node */ 584509Smrj rpp = rootnex_intprp; 585509Smrj for (i = 0; i < NROOT_INTPROPS; i++) { 586509Smrj (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 587509Smrj rpp[i].prop_name, rpp[i].prop_value); 5880Sstevel@tonic-gate } 5890Sstevel@tonic-gate } 5900Sstevel@tonic-gate 591509Smrj 592509Smrj 593509Smrj /* 594509Smrj * ************************* 595509Smrj * ctlops related routines 596509Smrj * ************************* 597509Smrj */ 598509Smrj 5990Sstevel@tonic-gate /* 600509Smrj * rootnex_ctlops() 601509Smrj * 6020Sstevel@tonic-gate */ 603693Sgovinda /*ARGSUSED*/ 604509Smrj static int 605509Smrj rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 606509Smrj void *arg, void *result) 607509Smrj { 608509Smrj int n, *ptr; 609509Smrj struct ddi_parent_private_data *pdp; 610509Smrj 611509Smrj switch (ctlop) { 612509Smrj case DDI_CTLOPS_DMAPMAPC: 613509Smrj /* 614509Smrj * Return 'partial' to indicate that dma mapping 615509Smrj * has to be done in the main MMU. 616509Smrj */ 617509Smrj return (DDI_DMA_PARTIAL); 618509Smrj 619509Smrj case DDI_CTLOPS_BTOP: 620509Smrj /* 621509Smrj * Convert byte count input to physical page units. 622509Smrj * (byte counts that are not a page-size multiple 623509Smrj * are rounded down) 624509Smrj */ 625509Smrj *(ulong_t *)result = btop(*(ulong_t *)arg); 626509Smrj return (DDI_SUCCESS); 627509Smrj 628509Smrj case DDI_CTLOPS_PTOB: 629509Smrj /* 630509Smrj * Convert size in physical pages to bytes 631509Smrj */ 632509Smrj *(ulong_t *)result = ptob(*(ulong_t *)arg); 633509Smrj return (DDI_SUCCESS); 634509Smrj 635509Smrj case DDI_CTLOPS_BTOPR: 636509Smrj /* 637509Smrj * Convert byte count input to physical page units 638509Smrj * (byte counts that are not a page-size multiple 639509Smrj * are rounded up) 640509Smrj */ 641509Smrj *(ulong_t *)result = btopr(*(ulong_t *)arg); 642509Smrj return (DDI_SUCCESS); 643509Smrj 644509Smrj case DDI_CTLOPS_INITCHILD: 645509Smrj return (impl_ddi_sunbus_initchild(arg)); 646509Smrj 647509Smrj case DDI_CTLOPS_UNINITCHILD: 648509Smrj impl_ddi_sunbus_removechild(arg); 649509Smrj return (DDI_SUCCESS); 650509Smrj 651509Smrj case DDI_CTLOPS_REPORTDEV: 652509Smrj return (rootnex_ctl_reportdev(rdip)); 653509Smrj 654509Smrj case DDI_CTLOPS_IOMIN: 655509Smrj /* 656509Smrj * Nothing to do here but reflect back.. 657509Smrj */ 658509Smrj return (DDI_SUCCESS); 659509Smrj 660509Smrj case DDI_CTLOPS_REGSIZE: 661509Smrj case DDI_CTLOPS_NREGS: 662509Smrj break; 663509Smrj 664509Smrj case DDI_CTLOPS_SIDDEV: 665509Smrj if (ndi_dev_is_prom_node(rdip)) 666509Smrj return (DDI_SUCCESS); 667509Smrj if (ndi_dev_is_persistent_node(rdip)) 668509Smrj return (DDI_SUCCESS); 669509Smrj return (DDI_FAILURE); 670509Smrj 671509Smrj case DDI_CTLOPS_POWER: 672509Smrj return ((*pm_platform_power)((power_req_t *)arg)); 673509Smrj 674693Sgovinda case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 675509Smrj case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 676509Smrj case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 677509Smrj case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 678693Sgovinda case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 679693Sgovinda case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 680509Smrj if (!rootnex_state->r_reserved_msg_printed) { 681509Smrj rootnex_state->r_reserved_msg_printed = B_TRUE; 682509Smrj cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 683509Smrj "1 or more reserved/obsolete operations."); 684509Smrj } 685509Smrj return (DDI_FAILURE); 686509Smrj 687509Smrj default: 688509Smrj return (DDI_FAILURE); 689509Smrj } 690509Smrj /* 691509Smrj * The rest are for "hardware" properties 692509Smrj */ 693509Smrj if ((pdp = ddi_get_parent_data(rdip)) == NULL) 694509Smrj return (DDI_FAILURE); 695509Smrj 696509Smrj if (ctlop == DDI_CTLOPS_NREGS) { 697509Smrj ptr = (int *)result; 698509Smrj *ptr = pdp->par_nreg; 699509Smrj } else { 700509Smrj off_t *size = (off_t *)result; 701509Smrj 702509Smrj ptr = (int *)arg; 703509Smrj n = *ptr; 704509Smrj if (n >= pdp->par_nreg) { 705509Smrj return (DDI_FAILURE); 706509Smrj } 707509Smrj *size = (off_t)pdp->par_reg[n].regspec_size; 708509Smrj } 709509Smrj return (DDI_SUCCESS); 710509Smrj } 7110Sstevel@tonic-gate 7120Sstevel@tonic-gate 7130Sstevel@tonic-gate /* 714509Smrj * rootnex_ctl_reportdev() 715509Smrj * 7160Sstevel@tonic-gate */ 7170Sstevel@tonic-gate static int 718509Smrj rootnex_ctl_reportdev(dev_info_t *dev) 7190Sstevel@tonic-gate { 720509Smrj int i, n, len, f_len = 0; 721509Smrj char *buf; 722509Smrj 723509Smrj buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 724509Smrj f_len += snprintf(buf, REPORTDEV_BUFSIZE, 725509Smrj "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 726509Smrj len = strlen(buf); 727509Smrj 728509Smrj for (i = 0; i < sparc_pd_getnreg(dev); i++) { 729509Smrj 730509Smrj struct regspec *rp = sparc_pd_getreg(dev, i); 731509Smrj 732509Smrj if (i == 0) 733509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 734509Smrj ": "); 735509Smrj else 736509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 737509Smrj " and "); 738509Smrj len = strlen(buf); 739509Smrj 740509Smrj switch (rp->regspec_bustype) { 741509Smrj 742509Smrj case BTEISA: 743509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 744509Smrj "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 7450Sstevel@tonic-gate break; 746509Smrj 747509Smrj case BTISA: 748509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 749509Smrj "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 7500Sstevel@tonic-gate break; 751509Smrj 752509Smrj default: 753509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 754509Smrj "space %x offset %x", 755509Smrj rp->regspec_bustype, rp->regspec_addr); 7560Sstevel@tonic-gate break; 7570Sstevel@tonic-gate } 758509Smrj len = strlen(buf); 7590Sstevel@tonic-gate } 760509Smrj for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 761509Smrj int pri; 762509Smrj 763509Smrj if (i != 0) { 764509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 765509Smrj ","); 766509Smrj len = strlen(buf); 767509Smrj } 768509Smrj pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 769509Smrj f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 770509Smrj " sparc ipl %d", pri); 771509Smrj len = strlen(buf); 7720Sstevel@tonic-gate } 773509Smrj #ifdef DEBUG 774509Smrj if (f_len + 1 >= REPORTDEV_BUFSIZE) { 775509Smrj cmn_err(CE_NOTE, "next message is truncated: " 776509Smrj "printed length 1024, real length %d", f_len); 777509Smrj } 778509Smrj #endif /* DEBUG */ 779509Smrj cmn_err(CE_CONT, "?%s\n", buf); 780509Smrj kmem_free(buf, REPORTDEV_BUFSIZE); 7810Sstevel@tonic-gate return (DDI_SUCCESS); 7820Sstevel@tonic-gate } 7830Sstevel@tonic-gate 784509Smrj 785509Smrj /* 786509Smrj * ****************** 787509Smrj * map related code 788509Smrj * ****************** 789509Smrj */ 790509Smrj 791509Smrj /* 792509Smrj * rootnex_map() 793509Smrj * 794509Smrj */ 7950Sstevel@tonic-gate static int 796509Smrj rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 797509Smrj off_t len, caddr_t *vaddrp) 7980Sstevel@tonic-gate { 7990Sstevel@tonic-gate struct regspec *rp, tmp_reg; 8000Sstevel@tonic-gate ddi_map_req_t mr = *mp; /* Get private copy of request */ 8010Sstevel@tonic-gate int error; 8020Sstevel@tonic-gate 8030Sstevel@tonic-gate mp = &mr; 8040Sstevel@tonic-gate 8050Sstevel@tonic-gate switch (mp->map_op) { 8060Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 8070Sstevel@tonic-gate case DDI_MO_UNMAP: 8080Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 8090Sstevel@tonic-gate break; 8100Sstevel@tonic-gate default: 8110Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8120Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 8130Sstevel@tonic-gate mp->map_op); 8140Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8150Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8160Sstevel@tonic-gate } 8170Sstevel@tonic-gate 8180Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) { 8190Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8200Sstevel@tonic-gate cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 8210Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8220Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 8230Sstevel@tonic-gate } 8240Sstevel@tonic-gate 8250Sstevel@tonic-gate /* 8260Sstevel@tonic-gate * First, if given an rnumber, convert it to a regspec... 8270Sstevel@tonic-gate * (Presumably, this is on behalf of a child of the root node?) 8280Sstevel@tonic-gate */ 8290Sstevel@tonic-gate 8300Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) { 8310Sstevel@tonic-gate 8320Sstevel@tonic-gate int rnumber = mp->map_obj.rnumber; 8330Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8340Sstevel@tonic-gate static char *out_of_range = 8350Sstevel@tonic-gate "rootnex_map: Out of range rnumber <%d>, device <%s>"; 8360Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8370Sstevel@tonic-gate 8380Sstevel@tonic-gate rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 8390Sstevel@tonic-gate if (rp == NULL) { 8400Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8410Sstevel@tonic-gate cmn_err(CE_WARN, out_of_range, rnumber, 8420Sstevel@tonic-gate ddi_get_name(rdip)); 8430Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8440Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 8450Sstevel@tonic-gate } 8460Sstevel@tonic-gate 8470Sstevel@tonic-gate /* 8480Sstevel@tonic-gate * Convert the given ddi_map_req_t from rnumber to regspec... 8490Sstevel@tonic-gate */ 8500Sstevel@tonic-gate 8510Sstevel@tonic-gate mp->map_type = DDI_MT_REGSPEC; 8520Sstevel@tonic-gate mp->map_obj.rp = rp; 8530Sstevel@tonic-gate } 8540Sstevel@tonic-gate 8550Sstevel@tonic-gate /* 8560Sstevel@tonic-gate * Adjust offset and length correspnding to called values... 8570Sstevel@tonic-gate * XXX: A non-zero length means override the one in the regspec 8580Sstevel@tonic-gate * XXX: (regardless of what's in the parent's range?) 8590Sstevel@tonic-gate */ 8600Sstevel@tonic-gate 8610Sstevel@tonic-gate tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 8620Sstevel@tonic-gate rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 8630Sstevel@tonic-gate 8640Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 8655084Sjohnlev cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 8665084Sjohnlev "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 8675084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 8685084Sjohnlev len, mp->map_handlep); 8690Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 8700Sstevel@tonic-gate 8710Sstevel@tonic-gate /* 8720Sstevel@tonic-gate * I/O or memory mapping: 8730Sstevel@tonic-gate * 8740Sstevel@tonic-gate * <bustype=0, addr=x, len=x>: memory 8750Sstevel@tonic-gate * <bustype=1, addr=x, len=x>: i/o 8760Sstevel@tonic-gate * <bustype>1, addr=0, len=x>: x86-compatibility i/o 8770Sstevel@tonic-gate */ 8780Sstevel@tonic-gate 8790Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 8800Sstevel@tonic-gate cmn_err(CE_WARN, "<%s,%s> invalid register spec" 8810Sstevel@tonic-gate " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 8820Sstevel@tonic-gate ddi_get_name(rdip), rp->regspec_bustype, 8830Sstevel@tonic-gate rp->regspec_addr, rp->regspec_size); 8840Sstevel@tonic-gate return (DDI_ME_INVAL); 8850Sstevel@tonic-gate } 8860Sstevel@tonic-gate 8870Sstevel@tonic-gate if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 8880Sstevel@tonic-gate /* 8890Sstevel@tonic-gate * compatibility i/o mapping 8900Sstevel@tonic-gate */ 8910Sstevel@tonic-gate rp->regspec_bustype += (uint_t)offset; 8920Sstevel@tonic-gate } else { 8930Sstevel@tonic-gate /* 8940Sstevel@tonic-gate * Normal memory or i/o mapping 8950Sstevel@tonic-gate */ 8960Sstevel@tonic-gate rp->regspec_addr += (uint_t)offset; 8970Sstevel@tonic-gate } 8980Sstevel@tonic-gate 8990Sstevel@tonic-gate if (len != 0) 9000Sstevel@tonic-gate rp->regspec_size = (uint_t)len; 9010Sstevel@tonic-gate 9020Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9035084Sjohnlev cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 9045084Sjohnlev "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 9055084Sjohnlev rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 9065084Sjohnlev offset, len, mp->map_handlep); 9070Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9080Sstevel@tonic-gate 9090Sstevel@tonic-gate /* 9100Sstevel@tonic-gate * Apply any parent ranges at this level, if applicable. 9110Sstevel@tonic-gate * (This is where nexus specific regspec translation takes place. 9120Sstevel@tonic-gate * Use of this function is implicit agreement that translation is 9130Sstevel@tonic-gate * provided via ddi_apply_range.) 9140Sstevel@tonic-gate */ 9150Sstevel@tonic-gate 9160Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9170Sstevel@tonic-gate ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 9180Sstevel@tonic-gate ddi_get_name(dip), ddi_get_name(rdip)); 9190Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9200Sstevel@tonic-gate 9210Sstevel@tonic-gate if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 9220Sstevel@tonic-gate return (error); 9230Sstevel@tonic-gate 9240Sstevel@tonic-gate switch (mp->map_op) { 9250Sstevel@tonic-gate case DDI_MO_MAP_LOCKED: 9260Sstevel@tonic-gate 9270Sstevel@tonic-gate /* 9280Sstevel@tonic-gate * Set up the locked down kernel mapping to the regspec... 9290Sstevel@tonic-gate */ 9300Sstevel@tonic-gate 9310Sstevel@tonic-gate return (rootnex_map_regspec(mp, vaddrp)); 9320Sstevel@tonic-gate 9330Sstevel@tonic-gate case DDI_MO_UNMAP: 9340Sstevel@tonic-gate 9350Sstevel@tonic-gate /* 9360Sstevel@tonic-gate * Release mapping... 9370Sstevel@tonic-gate */ 9380Sstevel@tonic-gate 9390Sstevel@tonic-gate return (rootnex_unmap_regspec(mp, vaddrp)); 9400Sstevel@tonic-gate 9410Sstevel@tonic-gate case DDI_MO_MAP_HANDLE: 9420Sstevel@tonic-gate 9430Sstevel@tonic-gate return (rootnex_map_handle(mp)); 9440Sstevel@tonic-gate 9450Sstevel@tonic-gate default: 9460Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 9470Sstevel@tonic-gate } 9480Sstevel@tonic-gate } 9490Sstevel@tonic-gate 9500Sstevel@tonic-gate 9510Sstevel@tonic-gate /* 952509Smrj * rootnex_map_fault() 9530Sstevel@tonic-gate * 9540Sstevel@tonic-gate * fault in mappings for requestors 9550Sstevel@tonic-gate */ 9560Sstevel@tonic-gate /*ARGSUSED*/ 9570Sstevel@tonic-gate static int 958509Smrj rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 959509Smrj struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 960509Smrj uint_t lock) 9610Sstevel@tonic-gate { 9620Sstevel@tonic-gate 9630Sstevel@tonic-gate #ifdef DDI_MAP_DEBUG 9640Sstevel@tonic-gate ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 9650Sstevel@tonic-gate ddi_map_debug(" Seg <%s>\n", 9660Sstevel@tonic-gate seg->s_ops == &segdev_ops ? "segdev" : 9670Sstevel@tonic-gate seg == &kvseg ? "segkmem" : "NONE!"); 9680Sstevel@tonic-gate #endif /* DDI_MAP_DEBUG */ 9690Sstevel@tonic-gate 9700Sstevel@tonic-gate /* 9710Sstevel@tonic-gate * This is all terribly broken, but it is a start 9720Sstevel@tonic-gate * 9730Sstevel@tonic-gate * XXX Note that this test means that segdev_ops 9740Sstevel@tonic-gate * must be exported from seg_dev.c. 9750Sstevel@tonic-gate * XXX What about devices with their own segment drivers? 9760Sstevel@tonic-gate */ 9770Sstevel@tonic-gate if (seg->s_ops == &segdev_ops) { 9785084Sjohnlev struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 9790Sstevel@tonic-gate 9800Sstevel@tonic-gate if (hat == NULL) { 9810Sstevel@tonic-gate /* 9820Sstevel@tonic-gate * This is one plausible interpretation of 9830Sstevel@tonic-gate * a null hat i.e. use the first hat on the 9840Sstevel@tonic-gate * address space hat list which by convention is 9850Sstevel@tonic-gate * the hat of the system MMU. At alternative 9860Sstevel@tonic-gate * would be to panic .. this might well be better .. 9870Sstevel@tonic-gate */ 9880Sstevel@tonic-gate ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 9890Sstevel@tonic-gate hat = seg->s_as->a_hat; 9900Sstevel@tonic-gate cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 9910Sstevel@tonic-gate } 9920Sstevel@tonic-gate hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 9930Sstevel@tonic-gate (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 9940Sstevel@tonic-gate } else if (seg == &kvseg && dp == NULL) { 9950Sstevel@tonic-gate hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 9960Sstevel@tonic-gate HAT_LOAD_LOCK); 9970Sstevel@tonic-gate } else 9980Sstevel@tonic-gate return (DDI_FAILURE); 9990Sstevel@tonic-gate return (DDI_SUCCESS); 10000Sstevel@tonic-gate } 10010Sstevel@tonic-gate 10020Sstevel@tonic-gate 10030Sstevel@tonic-gate /* 1004509Smrj * rootnex_map_regspec() 1005509Smrj * we don't support mapping of I/O cards above 4Gb 10060Sstevel@tonic-gate */ 1007509Smrj static int 1008509Smrj rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1009509Smrj { 10105084Sjohnlev rootnex_addr_t rbase; 1011509Smrj void *cvaddr; 1012509Smrj uint_t npages, pgoffset; 1013509Smrj struct regspec *rp; 1014509Smrj ddi_acc_hdl_t *hp; 1015509Smrj ddi_acc_impl_t *ap; 1016509Smrj uint_t hat_acc_flags; 10175084Sjohnlev paddr_t pbase; 1018509Smrj 1019509Smrj rp = mp->map_obj.rp; 1020509Smrj hp = mp->map_handlep; 1021509Smrj 1022509Smrj #ifdef DDI_MAP_DEBUG 1023509Smrj ddi_map_debug( 1024509Smrj "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1025509Smrj rp->regspec_bustype, rp->regspec_addr, 1026509Smrj rp->regspec_size, mp->map_handlep); 1027509Smrj #endif /* DDI_MAP_DEBUG */ 1028509Smrj 1029509Smrj /* 1030509Smrj * I/O or memory mapping 1031509Smrj * 1032509Smrj * <bustype=0, addr=x, len=x>: memory 1033509Smrj * <bustype=1, addr=x, len=x>: i/o 1034509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1035509Smrj */ 1036509Smrj 1037509Smrj if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1038509Smrj cmn_err(CE_WARN, "rootnex: invalid register spec" 1039509Smrj " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 1040509Smrj rp->regspec_addr, rp->regspec_size); 1041509Smrj return (DDI_FAILURE); 1042509Smrj } 1043509Smrj 1044509Smrj if (rp->regspec_bustype != 0) { 1045509Smrj /* 1046509Smrj * I/O space - needs a handle. 1047509Smrj */ 1048509Smrj if (hp == NULL) { 1049509Smrj return (DDI_FAILURE); 1050509Smrj } 1051509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1052509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1053509Smrj impl_acc_hdl_init(hp); 1054509Smrj 1055509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1056509Smrj #ifdef DDI_MAP_DEBUG 10575084Sjohnlev ddi_map_debug("rootnex_map_regspec: mmap() " 10585084Sjohnlev "to I/O space is not supported.\n"); 1059509Smrj #endif /* DDI_MAP_DEBUG */ 1060509Smrj return (DDI_ME_INVAL); 1061509Smrj } else { 1062509Smrj /* 1063509Smrj * 1275-compliant vs. compatibility i/o mapping 1064509Smrj */ 1065509Smrj *vaddrp = 1066509Smrj (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 10675084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_bustype) : 10685084Sjohnlev ((caddr_t)(uintptr_t)rp->regspec_addr); 10695084Sjohnlev #ifdef __xpv 10705084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 10715084Sjohnlev hp->ah_pfn = xen_assign_pfn( 10725084Sjohnlev mmu_btop((ulong_t)rp->regspec_addr & 10735084Sjohnlev MMU_PAGEMASK)); 10745084Sjohnlev } else { 10755084Sjohnlev hp->ah_pfn = mmu_btop( 10765084Sjohnlev (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 10775084Sjohnlev } 10785084Sjohnlev #else 10791865Sdilpreet hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 10805084Sjohnlev MMU_PAGEMASK); 10815084Sjohnlev #endif 10821865Sdilpreet hp->ah_pnum = mmu_btopr(rp->regspec_size + 10831865Sdilpreet (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1084509Smrj } 1085509Smrj 1086509Smrj #ifdef DDI_MAP_DEBUG 1087509Smrj ddi_map_debug( 1088509Smrj "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1089509Smrj rp->regspec_size, *vaddrp); 1090509Smrj #endif /* DDI_MAP_DEBUG */ 1091509Smrj return (DDI_SUCCESS); 1092509Smrj } 1093509Smrj 1094509Smrj /* 1095509Smrj * Memory space 1096509Smrj */ 1097509Smrj 1098509Smrj if (hp != NULL) { 1099509Smrj /* 1100509Smrj * hat layer ignores 1101509Smrj * hp->ah_acc.devacc_attr_endian_flags. 1102509Smrj */ 1103509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1104509Smrj case DDI_STRICTORDER_ACC: 1105509Smrj hat_acc_flags = HAT_STRICTORDER; 1106509Smrj break; 1107509Smrj case DDI_UNORDERED_OK_ACC: 1108509Smrj hat_acc_flags = HAT_UNORDERED_OK; 1109509Smrj break; 1110509Smrj case DDI_MERGING_OK_ACC: 1111509Smrj hat_acc_flags = HAT_MERGING_OK; 1112509Smrj break; 1113509Smrj case DDI_LOADCACHING_OK_ACC: 1114509Smrj hat_acc_flags = HAT_LOADCACHING_OK; 1115509Smrj break; 1116509Smrj case DDI_STORECACHING_OK_ACC: 1117509Smrj hat_acc_flags = HAT_STORECACHING_OK; 1118509Smrj break; 1119509Smrj } 1120509Smrj ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1121509Smrj ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1122509Smrj impl_acc_hdl_init(hp); 1123509Smrj hp->ah_hat_flags = hat_acc_flags; 1124509Smrj } else { 1125509Smrj hat_acc_flags = HAT_STRICTORDER; 1126509Smrj } 1127509Smrj 11285084Sjohnlev rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 11295084Sjohnlev #ifdef __xpv 11305084Sjohnlev /* 11315084Sjohnlev * If we're dom0, we're using a real device so we need to translate 11325084Sjohnlev * the MA to a PA. 11335084Sjohnlev */ 11345084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 11355084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 11365084Sjohnlev } else { 11375084Sjohnlev pbase = rbase; 11385084Sjohnlev } 11395084Sjohnlev #else 11405084Sjohnlev pbase = rbase; 11415084Sjohnlev #endif 11425084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1143509Smrj 1144509Smrj if (rp->regspec_size == 0) { 1145509Smrj #ifdef DDI_MAP_DEBUG 1146509Smrj ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1147509Smrj #endif /* DDI_MAP_DEBUG */ 1148509Smrj return (DDI_ME_INVAL); 1149509Smrj } 1150509Smrj 1151509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 11525084Sjohnlev /* extra cast to make gcc happy */ 11535084Sjohnlev *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1154509Smrj } else { 1155509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1156509Smrj 1157509Smrj #ifdef DDI_MAP_DEBUG 11585084Sjohnlev ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 11595084Sjohnlev "physical %llx", npages, pbase); 1160509Smrj #endif /* DDI_MAP_DEBUG */ 1161509Smrj 1162509Smrj cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1163509Smrj if (cvaddr == NULL) 1164509Smrj return (DDI_ME_NORESOURCES); 1165509Smrj 1166509Smrj /* 1167509Smrj * Now map in the pages we've allocated... 1168509Smrj */ 11695084Sjohnlev hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 11705084Sjohnlev mmu_btop(pbase), mp->map_prot | hat_acc_flags, 11715084Sjohnlev HAT_LOAD_LOCK); 1172509Smrj *vaddrp = (caddr_t)cvaddr + pgoffset; 11731865Sdilpreet 11741865Sdilpreet /* save away pfn and npages for FMA */ 11751865Sdilpreet hp = mp->map_handlep; 11761865Sdilpreet if (hp) { 11775084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 11781865Sdilpreet hp->ah_pnum = npages; 11791865Sdilpreet } 1180509Smrj } 1181509Smrj 1182509Smrj #ifdef DDI_MAP_DEBUG 1183509Smrj ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1184509Smrj #endif /* DDI_MAP_DEBUG */ 1185509Smrj return (DDI_SUCCESS); 1186509Smrj } 1187509Smrj 11880Sstevel@tonic-gate 11890Sstevel@tonic-gate /* 1190509Smrj * rootnex_unmap_regspec() 1191509Smrj * 1192509Smrj */ 1193509Smrj static int 1194509Smrj rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1195509Smrj { 1196509Smrj caddr_t addr = (caddr_t)*vaddrp; 1197509Smrj uint_t npages, pgoffset; 1198509Smrj struct regspec *rp; 1199509Smrj 1200509Smrj if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1201509Smrj return (0); 1202509Smrj 1203509Smrj rp = mp->map_obj.rp; 1204509Smrj 1205509Smrj if (rp->regspec_size == 0) { 1206509Smrj #ifdef DDI_MAP_DEBUG 1207509Smrj ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1208509Smrj #endif /* DDI_MAP_DEBUG */ 1209509Smrj return (DDI_ME_INVAL); 1210509Smrj } 1211509Smrj 1212509Smrj /* 1213509Smrj * I/O or memory mapping: 1214509Smrj * 1215509Smrj * <bustype=0, addr=x, len=x>: memory 1216509Smrj * <bustype=1, addr=x, len=x>: i/o 1217509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1218509Smrj */ 1219509Smrj if (rp->regspec_bustype != 0) { 1220509Smrj /* 1221509Smrj * This is I/O space, which requires no particular 1222509Smrj * processing on unmap since it isn't mapped in the 1223509Smrj * first place. 1224509Smrj */ 1225509Smrj return (DDI_SUCCESS); 1226509Smrj } 1227509Smrj 1228509Smrj /* 1229509Smrj * Memory space 1230509Smrj */ 1231509Smrj pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1232509Smrj npages = mmu_btopr(rp->regspec_size + pgoffset); 1233509Smrj hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1234509Smrj device_arena_free(addr - pgoffset, ptob(npages)); 1235509Smrj 1236509Smrj /* 1237509Smrj * Destroy the pointer - the mapping has logically gone 1238509Smrj */ 1239509Smrj *vaddrp = NULL; 1240509Smrj 1241509Smrj return (DDI_SUCCESS); 1242509Smrj } 1243509Smrj 1244509Smrj 1245509Smrj /* 1246509Smrj * rootnex_map_handle() 1247509Smrj * 12480Sstevel@tonic-gate */ 1249509Smrj static int 1250509Smrj rootnex_map_handle(ddi_map_req_t *mp) 1251509Smrj { 12525084Sjohnlev rootnex_addr_t rbase; 1253509Smrj ddi_acc_hdl_t *hp; 1254509Smrj uint_t pgoffset; 1255509Smrj struct regspec *rp; 12565084Sjohnlev paddr_t pbase; 1257509Smrj 1258509Smrj rp = mp->map_obj.rp; 1259509Smrj 1260509Smrj #ifdef DDI_MAP_DEBUG 1261509Smrj ddi_map_debug( 1262509Smrj "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1263509Smrj rp->regspec_bustype, rp->regspec_addr, 1264509Smrj rp->regspec_size, mp->map_handlep); 1265509Smrj #endif /* DDI_MAP_DEBUG */ 1266509Smrj 1267509Smrj /* 1268509Smrj * I/O or memory mapping: 1269509Smrj * 1270509Smrj * <bustype=0, addr=x, len=x>: memory 1271509Smrj * <bustype=1, addr=x, len=x>: i/o 1272509Smrj * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1273509Smrj */ 1274509Smrj if (rp->regspec_bustype != 0) { 1275509Smrj /* 1276509Smrj * This refers to I/O space, and we don't support "mapping" 1277509Smrj * I/O space to a user. 1278509Smrj */ 1279509Smrj return (DDI_FAILURE); 1280509Smrj } 1281509Smrj 1282509Smrj /* 1283509Smrj * Set up the hat_flags for the mapping. 1284509Smrj */ 1285509Smrj hp = mp->map_handlep; 1286509Smrj 1287509Smrj switch (hp->ah_acc.devacc_attr_endian_flags) { 1288509Smrj case DDI_NEVERSWAP_ACC: 1289509Smrj hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1290509Smrj break; 1291509Smrj case DDI_STRUCTURE_LE_ACC: 1292509Smrj hp->ah_hat_flags = HAT_STRUCTURE_LE; 1293509Smrj break; 1294509Smrj case DDI_STRUCTURE_BE_ACC: 1295509Smrj return (DDI_FAILURE); 1296509Smrj default: 1297509Smrj return (DDI_REGS_ACC_CONFLICT); 1298509Smrj } 1299509Smrj 1300509Smrj switch (hp->ah_acc.devacc_attr_dataorder) { 1301509Smrj case DDI_STRICTORDER_ACC: 1302509Smrj break; 1303509Smrj case DDI_UNORDERED_OK_ACC: 1304509Smrj hp->ah_hat_flags |= HAT_UNORDERED_OK; 1305509Smrj break; 1306509Smrj case DDI_MERGING_OK_ACC: 1307509Smrj hp->ah_hat_flags |= HAT_MERGING_OK; 1308509Smrj break; 1309509Smrj case DDI_LOADCACHING_OK_ACC: 1310509Smrj hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1311509Smrj break; 1312509Smrj case DDI_STORECACHING_OK_ACC: 1313509Smrj hp->ah_hat_flags |= HAT_STORECACHING_OK; 1314509Smrj break; 1315509Smrj default: 1316509Smrj return (DDI_FAILURE); 1317509Smrj } 1318509Smrj 13195084Sjohnlev rbase = (rootnex_addr_t)rp->regspec_addr & 13205084Sjohnlev (~(rootnex_addr_t)MMU_PAGEOFFSET); 13215084Sjohnlev pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1322509Smrj 1323509Smrj if (rp->regspec_size == 0) 1324509Smrj return (DDI_ME_INVAL); 1325509Smrj 13265084Sjohnlev #ifdef __xpv 13275084Sjohnlev /* 13285084Sjohnlev * If we're dom0, we're using a real device so we need to translate 13295084Sjohnlev * the MA to a PA. 13305084Sjohnlev */ 13315084Sjohnlev if (DOMAIN_IS_INITDOMAIN(xen_info)) { 13325084Sjohnlev pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 13335084Sjohnlev (rbase & MMU_PAGEOFFSET); 13345084Sjohnlev } else { 13355084Sjohnlev pbase = rbase; 13365084Sjohnlev } 13375084Sjohnlev #else 13385084Sjohnlev pbase = rbase; 13395084Sjohnlev #endif 13405084Sjohnlev 13415084Sjohnlev hp->ah_pfn = mmu_btop(pbase); 1342509Smrj hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1343509Smrj 1344509Smrj return (DDI_SUCCESS); 1345509Smrj } 13460Sstevel@tonic-gate 13470Sstevel@tonic-gate 13480Sstevel@tonic-gate 13490Sstevel@tonic-gate /* 1350509Smrj * ************************ 1351509Smrj * interrupt related code 1352509Smrj * ************************ 13530Sstevel@tonic-gate */ 13540Sstevel@tonic-gate 13550Sstevel@tonic-gate /* 1356509Smrj * rootnex_intr_ops() 13570Sstevel@tonic-gate * bus_intr_op() function for interrupt support 13580Sstevel@tonic-gate */ 13590Sstevel@tonic-gate /* ARGSUSED */ 13600Sstevel@tonic-gate static int 13610Sstevel@tonic-gate rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 13620Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 13630Sstevel@tonic-gate { 13640Sstevel@tonic-gate struct intrspec *ispec; 13650Sstevel@tonic-gate struct ddi_parent_private_data *pdp; 13660Sstevel@tonic-gate 13670Sstevel@tonic-gate DDI_INTR_NEXDBG((CE_CONT, 13680Sstevel@tonic-gate "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 13690Sstevel@tonic-gate (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 13700Sstevel@tonic-gate 13710Sstevel@tonic-gate /* Process the interrupt operation */ 13720Sstevel@tonic-gate switch (intr_op) { 13730Sstevel@tonic-gate case DDI_INTROP_GETCAP: 13740Sstevel@tonic-gate /* First check with pcplusmp */ 13750Sstevel@tonic-gate if (psm_intr_ops == NULL) 13760Sstevel@tonic-gate return (DDI_FAILURE); 13770Sstevel@tonic-gate 13780Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 13790Sstevel@tonic-gate *(int *)result = 0; 13800Sstevel@tonic-gate return (DDI_FAILURE); 13810Sstevel@tonic-gate } 13820Sstevel@tonic-gate break; 13830Sstevel@tonic-gate case DDI_INTROP_SETCAP: 13840Sstevel@tonic-gate if (psm_intr_ops == NULL) 13850Sstevel@tonic-gate return (DDI_FAILURE); 13860Sstevel@tonic-gate 13870Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 13880Sstevel@tonic-gate return (DDI_FAILURE); 13890Sstevel@tonic-gate break; 13900Sstevel@tonic-gate case DDI_INTROP_ALLOC: 13910Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 13920Sstevel@tonic-gate return (DDI_FAILURE); 13930Sstevel@tonic-gate hdlp->ih_pri = ispec->intrspec_pri; 13940Sstevel@tonic-gate *(int *)result = hdlp->ih_scratch1; 13950Sstevel@tonic-gate break; 13960Sstevel@tonic-gate case DDI_INTROP_FREE: 13970Sstevel@tonic-gate pdp = ddi_get_parent_data(rdip); 13980Sstevel@tonic-gate /* 13990Sstevel@tonic-gate * Special case for 'pcic' driver' only. 14000Sstevel@tonic-gate * If an intrspec was created for it, clean it up here 14010Sstevel@tonic-gate * See detailed comments on this in the function 14020Sstevel@tonic-gate * rootnex_get_ispec(). 14030Sstevel@tonic-gate */ 14040Sstevel@tonic-gate if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 14050Sstevel@tonic-gate kmem_free(pdp->par_intr, sizeof (struct intrspec) * 14060Sstevel@tonic-gate pdp->par_nintr); 14070Sstevel@tonic-gate /* 14080Sstevel@tonic-gate * Set it to zero; so that 14090Sstevel@tonic-gate * DDI framework doesn't free it again 14100Sstevel@tonic-gate */ 14110Sstevel@tonic-gate pdp->par_intr = NULL; 14120Sstevel@tonic-gate pdp->par_nintr = 0; 14130Sstevel@tonic-gate } 14140Sstevel@tonic-gate break; 14150Sstevel@tonic-gate case DDI_INTROP_GETPRI: 14160Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14170Sstevel@tonic-gate return (DDI_FAILURE); 14180Sstevel@tonic-gate *(int *)result = ispec->intrspec_pri; 14190Sstevel@tonic-gate break; 14200Sstevel@tonic-gate case DDI_INTROP_SETPRI: 14210Sstevel@tonic-gate /* Validate the interrupt priority passed to us */ 14220Sstevel@tonic-gate if (*(int *)result > LOCK_LEVEL) 14230Sstevel@tonic-gate return (DDI_FAILURE); 14240Sstevel@tonic-gate 14250Sstevel@tonic-gate /* Ensure that PSM is all initialized and ispec is ok */ 14260Sstevel@tonic-gate if ((psm_intr_ops == NULL) || 14270Sstevel@tonic-gate ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 14280Sstevel@tonic-gate return (DDI_FAILURE); 14290Sstevel@tonic-gate 14300Sstevel@tonic-gate /* Change the priority */ 14310Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 14320Sstevel@tonic-gate PSM_FAILURE) 14330Sstevel@tonic-gate return (DDI_FAILURE); 14340Sstevel@tonic-gate 14350Sstevel@tonic-gate /* update the ispec with the new priority */ 14360Sstevel@tonic-gate ispec->intrspec_pri = *(int *)result; 14370Sstevel@tonic-gate break; 14380Sstevel@tonic-gate case DDI_INTROP_ADDISR: 14390Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14400Sstevel@tonic-gate return (DDI_FAILURE); 14410Sstevel@tonic-gate ispec->intrspec_func = hdlp->ih_cb_func; 14420Sstevel@tonic-gate break; 14430Sstevel@tonic-gate case DDI_INTROP_REMISR: 14440Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14450Sstevel@tonic-gate return (DDI_FAILURE); 14460Sstevel@tonic-gate ispec->intrspec_func = (uint_t (*)()) 0; 14470Sstevel@tonic-gate break; 14480Sstevel@tonic-gate case DDI_INTROP_ENABLE: 14490Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14500Sstevel@tonic-gate return (DDI_FAILURE); 14510Sstevel@tonic-gate 14520Sstevel@tonic-gate /* Call psmi to translate irq with the dip */ 14530Sstevel@tonic-gate if (psm_intr_ops == NULL) 14540Sstevel@tonic-gate return (DDI_FAILURE); 14550Sstevel@tonic-gate 1456916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14570Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 14580Sstevel@tonic-gate (int *)&hdlp->ih_vector); 14590Sstevel@tonic-gate 14600Sstevel@tonic-gate /* Add the interrupt handler */ 14610Sstevel@tonic-gate if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 14620Sstevel@tonic-gate hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1463916Sschwartz hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 14640Sstevel@tonic-gate return (DDI_FAILURE); 14650Sstevel@tonic-gate break; 14660Sstevel@tonic-gate case DDI_INTROP_DISABLE: 14670Sstevel@tonic-gate if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 14680Sstevel@tonic-gate return (DDI_FAILURE); 14690Sstevel@tonic-gate 14700Sstevel@tonic-gate /* Call psm_ops() to translate irq with the dip */ 14710Sstevel@tonic-gate if (psm_intr_ops == NULL) 14720Sstevel@tonic-gate return (DDI_FAILURE); 14730Sstevel@tonic-gate 1474916Sschwartz ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 14750Sstevel@tonic-gate (void) (*psm_intr_ops)(rdip, hdlp, 14760Sstevel@tonic-gate PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 14770Sstevel@tonic-gate 14780Sstevel@tonic-gate /* Remove the interrupt handler */ 14790Sstevel@tonic-gate rem_avintr((void *)hdlp, ispec->intrspec_pri, 14800Sstevel@tonic-gate hdlp->ih_cb_func, hdlp->ih_vector); 14810Sstevel@tonic-gate break; 14820Sstevel@tonic-gate case DDI_INTROP_SETMASK: 14830Sstevel@tonic-gate if (psm_intr_ops == NULL) 14840Sstevel@tonic-gate return (DDI_FAILURE); 14850Sstevel@tonic-gate 14860Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 14870Sstevel@tonic-gate return (DDI_FAILURE); 14880Sstevel@tonic-gate break; 14890Sstevel@tonic-gate case DDI_INTROP_CLRMASK: 14900Sstevel@tonic-gate if (psm_intr_ops == NULL) 14910Sstevel@tonic-gate return (DDI_FAILURE); 14920Sstevel@tonic-gate 14930Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 14940Sstevel@tonic-gate return (DDI_FAILURE); 14950Sstevel@tonic-gate break; 14960Sstevel@tonic-gate case DDI_INTROP_GETPENDING: 14970Sstevel@tonic-gate if (psm_intr_ops == NULL) 14980Sstevel@tonic-gate return (DDI_FAILURE); 14990Sstevel@tonic-gate 15000Sstevel@tonic-gate if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 15010Sstevel@tonic-gate result)) { 15020Sstevel@tonic-gate *(int *)result = 0; 15030Sstevel@tonic-gate return (DDI_FAILURE); 15040Sstevel@tonic-gate } 15050Sstevel@tonic-gate break; 15062580Sanish case DDI_INTROP_NAVAIL: 15070Sstevel@tonic-gate case DDI_INTROP_NINTRS: 15082580Sanish *(int *)result = i_ddi_get_intx_nintrs(rdip); 15092580Sanish if (*(int *)result == 0) { 15100Sstevel@tonic-gate /* 15110Sstevel@tonic-gate * Special case for 'pcic' driver' only. This driver 15120Sstevel@tonic-gate * driver is a child of 'isa' and 'rootnex' drivers. 15130Sstevel@tonic-gate * 15140Sstevel@tonic-gate * See detailed comments on this in the function 15150Sstevel@tonic-gate * rootnex_get_ispec(). 15160Sstevel@tonic-gate * 15170Sstevel@tonic-gate * Children of 'pcic' send 'NINITR' request all the 15180Sstevel@tonic-gate * way to rootnex driver. But, the 'pdp->par_nintr' 15190Sstevel@tonic-gate * field may not initialized. So, we fake it here 15200Sstevel@tonic-gate * to return 1 (a la what PCMCIA nexus does). 15210Sstevel@tonic-gate */ 15220Sstevel@tonic-gate if (strcmp(ddi_get_name(rdip), "pcic") == 0) 15230Sstevel@tonic-gate *(int *)result = 1; 15242580Sanish else 15252580Sanish return (DDI_FAILURE); 15260Sstevel@tonic-gate } 15270Sstevel@tonic-gate break; 15280Sstevel@tonic-gate case DDI_INTROP_SUPPORTED_TYPES: 15292580Sanish *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 15300Sstevel@tonic-gate break; 15310Sstevel@tonic-gate default: 15320Sstevel@tonic-gate return (DDI_FAILURE); 15330Sstevel@tonic-gate } 15340Sstevel@tonic-gate 15350Sstevel@tonic-gate return (DDI_SUCCESS); 15360Sstevel@tonic-gate } 15370Sstevel@tonic-gate 15380Sstevel@tonic-gate 15390Sstevel@tonic-gate /* 1540509Smrj * rootnex_get_ispec() 1541509Smrj * convert an interrupt number to an interrupt specification. 1542509Smrj * The interrupt number determines which interrupt spec will be 1543509Smrj * returned if more than one exists. 1544509Smrj * 1545509Smrj * Look into the parent private data area of the 'rdip' to find out 1546509Smrj * the interrupt specification. First check to make sure there is 1547509Smrj * one that matchs "inumber" and then return a pointer to it. 1548509Smrj * 1549509Smrj * Return NULL if one could not be found. 1550509Smrj * 1551509Smrj * NOTE: This is needed for rootnex_intr_ops() 1552509Smrj */ 1553509Smrj static struct intrspec * 1554509Smrj rootnex_get_ispec(dev_info_t *rdip, int inum) 1555509Smrj { 1556509Smrj struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1557509Smrj 1558509Smrj /* 1559509Smrj * Special case handling for drivers that provide their own 1560509Smrj * intrspec structures instead of relying on the DDI framework. 1561509Smrj * 1562509Smrj * A broken hardware driver in ON could potentially provide its 1563509Smrj * own intrspec structure, instead of relying on the hardware. 1564509Smrj * If these drivers are children of 'rootnex' then we need to 1565509Smrj * continue to provide backward compatibility to them here. 1566509Smrj * 1567509Smrj * Following check is a special case for 'pcic' driver which 1568509Smrj * was found to have broken hardwre andby provides its own intrspec. 1569509Smrj * 1570509Smrj * Verbatim comments from this driver are shown here: 1571509Smrj * "Don't use the ddi_add_intr since we don't have a 1572509Smrj * default intrspec in all cases." 1573509Smrj * 1574509Smrj * Since an 'ispec' may not be always created for it, 1575509Smrj * check for that and create one if so. 1576509Smrj * 1577509Smrj * NOTE: Currently 'pcic' is the only driver found to do this. 1578509Smrj */ 1579509Smrj if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1580509Smrj pdp->par_nintr = 1; 1581509Smrj pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1582509Smrj pdp->par_nintr, KM_SLEEP); 1583509Smrj } 1584509Smrj 1585509Smrj /* Validate the interrupt number */ 1586509Smrj if (inum >= pdp->par_nintr) 1587509Smrj return (NULL); 1588509Smrj 1589509Smrj /* Get the interrupt structure pointer and return that */ 1590509Smrj return ((struct intrspec *)&pdp->par_intr[inum]); 1591509Smrj } 1592509Smrj 1593509Smrj 1594509Smrj /* 1595509Smrj * ****************** 1596509Smrj * dma related code 1597509Smrj * ****************** 1598509Smrj */ 1599509Smrj 1600509Smrj /*ARGSUSED*/ 1601509Smrj static int 16027613SVikram.Hegde@Sun.COM rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 16037613SVikram.Hegde@Sun.COM ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 16047613SVikram.Hegde@Sun.COM ddi_dma_handle_t *handlep) 1605509Smrj { 1606509Smrj uint64_t maxsegmentsize_ll; 1607509Smrj uint_t maxsegmentsize; 1608509Smrj ddi_dma_impl_t *hp; 1609509Smrj rootnex_dma_t *dma; 1610509Smrj uint64_t count_max; 1611509Smrj uint64_t seg; 1612509Smrj int kmflag; 1613509Smrj int e; 1614509Smrj 1615509Smrj 1616509Smrj /* convert our sleep flags */ 1617509Smrj if (waitfp == DDI_DMA_SLEEP) { 1618509Smrj kmflag = KM_SLEEP; 1619509Smrj } else { 1620509Smrj kmflag = KM_NOSLEEP; 1621509Smrj } 1622509Smrj 1623509Smrj /* 1624509Smrj * We try to do only one memory allocation here. We'll do a little 1625509Smrj * pointer manipulation later. If the bind ends up taking more than 1626509Smrj * our prealloc's space, we'll have to allocate more memory in the 1627509Smrj * bind operation. Not great, but much better than before and the 1628509Smrj * best we can do with the current bind interfaces. 1629509Smrj */ 1630509Smrj hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1631509Smrj if (hp == NULL) { 1632509Smrj if (waitfp != DDI_DMA_DONTWAIT) { 1633509Smrj ddi_set_callback(waitfp, arg, 1634509Smrj &rootnex_state->r_dvma_call_list_id); 1635509Smrj } 1636509Smrj return (DDI_DMA_NORESOURCES); 1637509Smrj } 1638509Smrj 1639509Smrj /* Do our pointer manipulation now, align the structures */ 1640509Smrj hp->dmai_private = (void *)(((uintptr_t)hp + 1641509Smrj (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1642509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1643509Smrj dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1644509Smrj sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1645509Smrj 1646509Smrj /* setup the handle */ 1647509Smrj rootnex_clean_dmahdl(hp); 1648509Smrj dma->dp_dip = rdip; 1649509Smrj dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1650509Smrj dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1651509Smrj hp->dmai_minxfer = attr->dma_attr_minxfer; 1652509Smrj hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1653509Smrj hp->dmai_rdip = rdip; 1654509Smrj hp->dmai_attr = *attr; 1655509Smrj 1656509Smrj /* we don't need to worry about the SPL since we do a tryenter */ 1657509Smrj mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1658509Smrj 1659509Smrj /* 1660509Smrj * Figure out our maximum segment size. If the segment size is greater 1661509Smrj * than 4G, we will limit it to (4G - 1) since the max size of a dma 1662509Smrj * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1663509Smrj * dma_attr_count_max are size-1 type values. 1664509Smrj * 1665509Smrj * Maximum segment size is the largest physically contiguous chunk of 1666509Smrj * memory that we can return from a bind (i.e. the maximum size of a 1667509Smrj * single cookie). 1668509Smrj */ 1669509Smrj 1670509Smrj /* handle the rollover cases */ 1671509Smrj seg = attr->dma_attr_seg + 1; 1672509Smrj if (seg < attr->dma_attr_seg) { 1673509Smrj seg = attr->dma_attr_seg; 1674509Smrj } 1675509Smrj count_max = attr->dma_attr_count_max + 1; 1676509Smrj if (count_max < attr->dma_attr_count_max) { 1677509Smrj count_max = attr->dma_attr_count_max; 1678509Smrj } 1679509Smrj 1680509Smrj /* 1681509Smrj * granularity may or may not be a power of two. If it isn't, we can't 1682509Smrj * use a simple mask. 1683509Smrj */ 1684509Smrj if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1685509Smrj dma->dp_granularity_power_2 = B_FALSE; 1686509Smrj } else { 1687509Smrj dma->dp_granularity_power_2 = B_TRUE; 1688509Smrj } 1689509Smrj 1690509Smrj /* 1691509Smrj * maxxfer should be a whole multiple of granularity. If we're going to 1692509Smrj * break up a window because we're greater than maxxfer, we might as 1693509Smrj * well make sure it's maxxfer is a whole multiple so we don't have to 1694509Smrj * worry about triming the window later on for this case. 1695509Smrj */ 1696509Smrj if (attr->dma_attr_granular > 1) { 1697509Smrj if (dma->dp_granularity_power_2) { 1698509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1699509Smrj (attr->dma_attr_maxxfer & 1700509Smrj (attr->dma_attr_granular - 1)); 1701509Smrj } else { 1702509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer - 1703509Smrj (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1704509Smrj } 1705509Smrj } else { 1706509Smrj dma->dp_maxxfer = attr->dma_attr_maxxfer; 1707509Smrj } 1708509Smrj 1709509Smrj maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1710509Smrj maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1711509Smrj if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1712509Smrj maxsegmentsize = 0xFFFFFFFF; 1713509Smrj } else { 1714509Smrj maxsegmentsize = maxsegmentsize_ll; 1715509Smrj } 1716509Smrj dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1717509Smrj dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1718509Smrj 1719509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1720509Smrj if (rootnex_alloc_check_parms) { 1721509Smrj e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1722509Smrj if (e != DDI_SUCCESS) { 1723509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1724509Smrj (void) rootnex_dma_freehdl(dip, rdip, 1725509Smrj (ddi_dma_handle_t)hp); 1726509Smrj return (e); 1727509Smrj } 1728509Smrj } 1729509Smrj 1730509Smrj *handlep = (ddi_dma_handle_t)hp; 1731509Smrj 1732509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1733509Smrj DTRACE_PROBE1(rootnex__alloc__handle, uint64_t, 1734509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1735509Smrj 1736509Smrj return (DDI_SUCCESS); 1737509Smrj } 1738509Smrj 1739509Smrj 1740509Smrj /* 17417613SVikram.Hegde@Sun.COM * rootnex_dma_allochdl() 17427613SVikram.Hegde@Sun.COM * called from ddi_dma_alloc_handle(). 1743509Smrj */ 17447613SVikram.Hegde@Sun.COM static int 17457613SVikram.Hegde@Sun.COM rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 17467613SVikram.Hegde@Sun.COM int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 17477613SVikram.Hegde@Sun.COM { 17487613SVikram.Hegde@Sun.COM #if !defined(__xpv) 17497613SVikram.Hegde@Sun.COM uint_t error = ENOTSUP; 17507613SVikram.Hegde@Sun.COM int retval; 17517613SVikram.Hegde@Sun.COM 17527613SVikram.Hegde@Sun.COM retval = iommulib_nex_open(rdip, &error); 17537613SVikram.Hegde@Sun.COM 17547613SVikram.Hegde@Sun.COM if (retval != DDI_SUCCESS && error == ENOTSUP) { 17557613SVikram.Hegde@Sun.COM /* No IOMMU */ 17567613SVikram.Hegde@Sun.COM return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 17577613SVikram.Hegde@Sun.COM handlep)); 17587613SVikram.Hegde@Sun.COM } else if (retval != DDI_SUCCESS) { 17597613SVikram.Hegde@Sun.COM return (DDI_FAILURE); 17607613SVikram.Hegde@Sun.COM } 17617613SVikram.Hegde@Sun.COM 176210216SVikram.Hegde@Sun.COM ASSERT(IOMMU_USED(rdip)); 17637613SVikram.Hegde@Sun.COM 17647613SVikram.Hegde@Sun.COM /* has an IOMMU */ 17657613SVikram.Hegde@Sun.COM return (iommulib_nexdma_allochdl(dip, rdip, attr, 17667613SVikram.Hegde@Sun.COM waitfp, arg, handlep)); 17677613SVikram.Hegde@Sun.COM #else 17687613SVikram.Hegde@Sun.COM return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 17697613SVikram.Hegde@Sun.COM handlep)); 17707613SVikram.Hegde@Sun.COM #endif 17717613SVikram.Hegde@Sun.COM } 17727613SVikram.Hegde@Sun.COM 1773509Smrj /*ARGSUSED*/ 1774509Smrj static int 17757613SVikram.Hegde@Sun.COM rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 17767613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle) 1777509Smrj { 1778509Smrj ddi_dma_impl_t *hp; 1779509Smrj rootnex_dma_t *dma; 1780509Smrj 1781509Smrj 1782509Smrj hp = (ddi_dma_impl_t *)handle; 1783509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1784509Smrj 1785509Smrj /* unbind should have been called first */ 1786509Smrj ASSERT(!dma->dp_inuse); 1787509Smrj 1788509Smrj mutex_destroy(&dma->dp_mutex); 1789509Smrj kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1790509Smrj 1791509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1792509Smrj DTRACE_PROBE1(rootnex__free__handle, uint64_t, 1793509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1794509Smrj 1795509Smrj if (rootnex_state->r_dvma_call_list_id) 1796509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1797509Smrj 1798509Smrj return (DDI_SUCCESS); 1799509Smrj } 1800509Smrj 1801509Smrj /* 18027613SVikram.Hegde@Sun.COM * rootnex_dma_freehdl() 18037613SVikram.Hegde@Sun.COM * called from ddi_dma_free_handle(). 1804509Smrj */ 18057613SVikram.Hegde@Sun.COM static int 18067613SVikram.Hegde@Sun.COM rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 18077613SVikram.Hegde@Sun.COM { 18087613SVikram.Hegde@Sun.COM #if !defined(__xpv) 180910216SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 18107613SVikram.Hegde@Sun.COM return (iommulib_nexdma_freehdl(dip, rdip, handle)); 18117613SVikram.Hegde@Sun.COM } 18127613SVikram.Hegde@Sun.COM #endif 18137613SVikram.Hegde@Sun.COM return (rootnex_coredma_freehdl(dip, rdip, handle)); 18147613SVikram.Hegde@Sun.COM } 18157613SVikram.Hegde@Sun.COM 18167613SVikram.Hegde@Sun.COM 1817509Smrj /*ARGSUSED*/ 1818509Smrj static int 18197613SVikram.Hegde@Sun.COM rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 18207613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 18217613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp) 18220Sstevel@tonic-gate { 1823509Smrj rootnex_sglinfo_t *sinfo; 1824509Smrj ddi_dma_attr_t *attr; 1825509Smrj ddi_dma_impl_t *hp; 1826509Smrj rootnex_dma_t *dma; 1827509Smrj int kmflag; 1828509Smrj int e; 1829509Smrj 1830509Smrj 1831509Smrj hp = (ddi_dma_impl_t *)handle; 1832509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 1833509Smrj sinfo = &dma->dp_sglinfo; 1834509Smrj attr = &hp->dmai_attr; 1835509Smrj 18368215SVikram.Hegde@Sun.COM if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 18378215SVikram.Hegde@Sun.COM dma->dp_sleep_flags = KM_SLEEP; 18388215SVikram.Hegde@Sun.COM } else { 18398215SVikram.Hegde@Sun.COM dma->dp_sleep_flags = KM_NOSLEEP; 18408215SVikram.Hegde@Sun.COM } 18418215SVikram.Hegde@Sun.COM 1842509Smrj hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1843509Smrj 1844509Smrj /* 1845509Smrj * This is useful for debugging a driver. Not as useful in a production 1846509Smrj * system. The only time this will fail is if you have a driver bug. 1847509Smrj */ 1848509Smrj if (rootnex_bind_check_inuse) { 1849509Smrj /* 1850509Smrj * No one else should ever have this lock unless someone else 1851509Smrj * is trying to use this handle. So contention on the lock 1852509Smrj * is the same as inuse being set. 1853509Smrj */ 1854509Smrj e = mutex_tryenter(&dma->dp_mutex); 1855509Smrj if (e == 0) { 1856509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1857509Smrj return (DDI_DMA_INUSE); 1858509Smrj } 1859509Smrj if (dma->dp_inuse) { 1860509Smrj mutex_exit(&dma->dp_mutex); 1861509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1862509Smrj return (DDI_DMA_INUSE); 1863509Smrj } 1864509Smrj dma->dp_inuse = B_TRUE; 1865509Smrj mutex_exit(&dma->dp_mutex); 1866509Smrj } 1867509Smrj 1868509Smrj /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1869509Smrj if (rootnex_bind_check_parms) { 1870509Smrj e = rootnex_valid_bind_parms(dmareq, attr); 1871509Smrj if (e != DDI_SUCCESS) { 1872509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1873509Smrj rootnex_clean_dmahdl(hp); 1874509Smrj return (e); 1875509Smrj } 1876509Smrj } 1877509Smrj 1878509Smrj /* save away the original bind info */ 1879509Smrj dma->dp_dma = dmareq->dmar_object; 1880509Smrj 18817613SVikram.Hegde@Sun.COM #if !defined(__xpv) 18827589SVikram.Hegde@Sun.COM if (rootnex_state->r_intel_iommu_enabled) { 18837589SVikram.Hegde@Sun.COM e = intel_iommu_map_sgl(handle, dmareq, 18847589SVikram.Hegde@Sun.COM rootnex_state->r_prealloc_cookies); 18857589SVikram.Hegde@Sun.COM 18867589SVikram.Hegde@Sun.COM switch (e) { 18877589SVikram.Hegde@Sun.COM case IOMMU_SGL_SUCCESS: 18887589SVikram.Hegde@Sun.COM goto rootnex_sgl_end; 18897589SVikram.Hegde@Sun.COM 18907589SVikram.Hegde@Sun.COM case IOMMU_SGL_DISABLE: 18917589SVikram.Hegde@Sun.COM goto rootnex_sgl_start; 18927589SVikram.Hegde@Sun.COM 18937589SVikram.Hegde@Sun.COM case IOMMU_SGL_NORESOURCES: 18947589SVikram.Hegde@Sun.COM cmn_err(CE_WARN, "iommu map sgl failed for %s", 18957589SVikram.Hegde@Sun.COM ddi_node_name(dma->dp_dip)); 18967589SVikram.Hegde@Sun.COM rootnex_clean_dmahdl(hp); 18977589SVikram.Hegde@Sun.COM return (DDI_DMA_NORESOURCES); 18987589SVikram.Hegde@Sun.COM 18997589SVikram.Hegde@Sun.COM default: 19007589SVikram.Hegde@Sun.COM cmn_err(CE_WARN, 19017589SVikram.Hegde@Sun.COM "undefined value returned from" 19027589SVikram.Hegde@Sun.COM " intel_iommu_map_sgl: %d", 19037589SVikram.Hegde@Sun.COM e); 19047589SVikram.Hegde@Sun.COM rootnex_clean_dmahdl(hp); 19057589SVikram.Hegde@Sun.COM return (DDI_DMA_NORESOURCES); 19067589SVikram.Hegde@Sun.COM } 19077589SVikram.Hegde@Sun.COM } 19087613SVikram.Hegde@Sun.COM #endif 19097589SVikram.Hegde@Sun.COM 19107589SVikram.Hegde@Sun.COM rootnex_sgl_start: 1911509Smrj /* 1912509Smrj * Figure out a rough estimate of what maximum number of pages this 1913509Smrj * buffer could use (a high estimate of course). 1914509Smrj */ 1915509Smrj sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1916509Smrj 1917509Smrj /* 1918509Smrj * We'll use the pre-allocated cookies for any bind that will *always* 1919509Smrj * fit (more important to be consistent, we don't want to create 1920509Smrj * additional degenerate cases). 1921509Smrj */ 1922509Smrj if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1923509Smrj dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1924509Smrj dma->dp_need_to_free_cookie = B_FALSE; 1925509Smrj DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1926509Smrj uint_t, sinfo->si_max_pages); 1927509Smrj 1928509Smrj /* 1929509Smrj * For anything larger than that, we'll go ahead and allocate the 1930509Smrj * maximum number of pages we expect to see. Hopefuly, we won't be 1931509Smrj * seeing this path in the fast path for high performance devices very 1932509Smrj * frequently. 1933509Smrj * 1934509Smrj * a ddi bind interface that allowed the driver to provide storage to 1935509Smrj * the bind interface would speed this case up. 1936509Smrj */ 1937509Smrj } else { 1938509Smrj /* convert the sleep flags */ 1939509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1940509Smrj kmflag = KM_SLEEP; 1941509Smrj } else { 1942509Smrj kmflag = KM_NOSLEEP; 1943509Smrj } 1944509Smrj 1945509Smrj /* 1946509Smrj * Save away how much memory we allocated. If we're doing a 1947509Smrj * nosleep, the alloc could fail... 1948509Smrj */ 1949509Smrj dma->dp_cookie_size = sinfo->si_max_pages * 1950509Smrj sizeof (ddi_dma_cookie_t); 1951509Smrj dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1952509Smrj if (dma->dp_cookies == NULL) { 1953509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1954509Smrj rootnex_clean_dmahdl(hp); 1955509Smrj return (DDI_DMA_NORESOURCES); 1956509Smrj } 1957509Smrj dma->dp_need_to_free_cookie = B_TRUE; 1958509Smrj DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1959509Smrj sinfo->si_max_pages); 1960509Smrj } 1961509Smrj hp->dmai_cookie = dma->dp_cookies; 1962509Smrj 1963509Smrj /* 1964509Smrj * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1965509Smrj * looking at the contraints in the dma structure. It will then put some 1966509Smrj * additional state about the sgl in the dma struct (i.e. is the sgl 1967509Smrj * clean, or do we need to do some munging; how many pages need to be 1968509Smrj * copied, etc.) 1969509Smrj */ 1970509Smrj rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1971509Smrj &dma->dp_sglinfo); 19727589SVikram.Hegde@Sun.COM 19737589SVikram.Hegde@Sun.COM rootnex_sgl_end: 1974509Smrj ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1975509Smrj /* if we don't need a copy buffer, we don't need to sync */ 1976509Smrj if (sinfo->si_copybuf_req == 0) { 1977509Smrj hp->dmai_rflags |= DMP_NOSYNC; 1978509Smrj } 1979509Smrj 1980509Smrj /* 1981509Smrj * if we don't need the copybuf and we don't need to do a partial, we 1982509Smrj * hit the fast path. All the high performance devices should be trying 1983509Smrj * to hit this path. To hit this path, a device should be able to reach 1984509Smrj * all of memory, shouldn't try to bind more than it can transfer, and 1985509Smrj * the buffer shouldn't require more cookies than the driver/device can 1986509Smrj * handle [sgllen]). 1987509Smrj */ 1988509Smrj if ((sinfo->si_copybuf_req == 0) && 1989509Smrj (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1990509Smrj (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1991509Smrj /* 19925591Sstephh * If the driver supports FMA, insert the handle in the FMA DMA 19935591Sstephh * handle cache. 19945591Sstephh */ 19955591Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 19965591Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 19975591Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 19985591Sstephh } 19995591Sstephh 20005591Sstephh /* 2001509Smrj * copy out the first cookie and ccountp, set the cookie 2002509Smrj * pointer to the second cookie. The first cookie is passed 2003509Smrj * back on the stack. Additional cookies are accessed via 2004509Smrj * ddi_dma_nextcookie() 2005509Smrj */ 2006509Smrj *cookiep = dma->dp_cookies[0]; 2007509Smrj *ccountp = sinfo->si_sgl_size; 2008509Smrj hp->dmai_cookie++; 2009509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2010509Smrj hp->dmai_nwin = 1; 2011509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2012509Smrj DTRACE_PROBE3(rootnex__bind__fast, dev_info_t *, rdip, uint64_t, 2013509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2014509Smrj dma->dp_dma.dmao_size); 2015509Smrj return (DDI_DMA_MAPPED); 2016509Smrj } 2017509Smrj 2018509Smrj /* 2019509Smrj * go to the slow path, we may need to alloc more memory, create 2020509Smrj * multiple windows, and munge up a sgl to make the device happy. 2021509Smrj */ 2022509Smrj e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 2023509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 2024509Smrj if (dma->dp_need_to_free_cookie) { 2025509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2026509Smrj } 2027509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2028509Smrj rootnex_clean_dmahdl(hp); /* must be after free cookie */ 2029509Smrj return (e); 2030509Smrj } 2031509Smrj 20325591Sstephh /* 20335591Sstephh * If the driver supports FMA, insert the handle in the FMA DMA handle 20345591Sstephh * cache. 20355591Sstephh */ 20365591Sstephh if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 20375591Sstephh hp->dmai_error.err_cf = rootnex_dma_check; 20385591Sstephh (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 20395591Sstephh } 20405591Sstephh 2041509Smrj /* if the first window uses the copy buffer, sync it for the device */ 2042509Smrj if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 2043509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 20448215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2045509Smrj DDI_DMA_SYNC_FORDEV); 2046509Smrj } 2047509Smrj 2048509Smrj /* 2049509Smrj * copy out the first cookie and ccountp, set the cookie pointer to the 2050509Smrj * second cookie. Make sure the partial flag is set/cleared correctly. 2051509Smrj * If we have a partial map (i.e. multiple windows), the number of 2052509Smrj * cookies we return is the number of cookies in the first window. 2053509Smrj */ 2054509Smrj if (e == DDI_DMA_MAPPED) { 2055509Smrj hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2056509Smrj *ccountp = sinfo->si_sgl_size; 2057509Smrj } else { 2058509Smrj hp->dmai_rflags |= DDI_DMA_PARTIAL; 2059509Smrj *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 2060509Smrj ASSERT(hp->dmai_nwin <= dma->dp_max_win); 2061509Smrj } 2062509Smrj *cookiep = dma->dp_cookies[0]; 2063509Smrj hp->dmai_cookie++; 2064509Smrj 2065509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2066509Smrj DTRACE_PROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 2067509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2068509Smrj dma->dp_dma.dmao_size); 2069509Smrj return (e); 2070509Smrj } 2071509Smrj 2072509Smrj 2073509Smrj /* 20747613SVikram.Hegde@Sun.COM * rootnex_dma_bindhdl() 20757613SVikram.Hegde@Sun.COM * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 2076509Smrj */ 20777613SVikram.Hegde@Sun.COM static int 20787613SVikram.Hegde@Sun.COM rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 20797613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 20807613SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t *ccountp) 20817613SVikram.Hegde@Sun.COM { 20827613SVikram.Hegde@Sun.COM #if !defined(__xpv) 208310216SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 20847613SVikram.Hegde@Sun.COM return (iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq, 20857613SVikram.Hegde@Sun.COM cookiep, ccountp)); 20867613SVikram.Hegde@Sun.COM } 20877613SVikram.Hegde@Sun.COM #endif 20887613SVikram.Hegde@Sun.COM return (rootnex_coredma_bindhdl(dip, rdip, handle, dmareq, 20897613SVikram.Hegde@Sun.COM cookiep, ccountp)); 20907613SVikram.Hegde@Sun.COM } 20917613SVikram.Hegde@Sun.COM 2092509Smrj /*ARGSUSED*/ 2093509Smrj static int 20947613SVikram.Hegde@Sun.COM rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2095509Smrj ddi_dma_handle_t handle) 2096509Smrj { 2097509Smrj ddi_dma_impl_t *hp; 2098509Smrj rootnex_dma_t *dma; 2099509Smrj int e; 2100509Smrj 2101509Smrj hp = (ddi_dma_impl_t *)handle; 2102509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2103509Smrj 2104509Smrj /* make sure the buffer wasn't free'd before calling unbind */ 2105509Smrj if (rootnex_unbind_verify_buffer) { 2106509Smrj e = rootnex_verify_buffer(dma); 2107509Smrj if (e != DDI_SUCCESS) { 2108509Smrj ASSERT(0); 2109509Smrj return (DDI_FAILURE); 2110509Smrj } 2111509Smrj } 2112509Smrj 2113509Smrj /* sync the current window before unbinding the buffer */ 2114509Smrj if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 2115509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 21168215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2117509Smrj DDI_DMA_SYNC_FORCPU); 2118509Smrj } 2119509Smrj 2120509Smrj /* 21211865Sdilpreet * If the driver supports FMA, remove the handle in the FMA DMA handle 21221865Sdilpreet * cache. 21231865Sdilpreet */ 21241865Sdilpreet if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 21251865Sdilpreet if ((DEVI(rdip)->devi_fmhdl != NULL) && 21261865Sdilpreet (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) { 21271865Sdilpreet (void) ndi_fmc_remove(rdip, DMA_HANDLE, hp); 21281865Sdilpreet } 21291865Sdilpreet } 21301865Sdilpreet 21311865Sdilpreet /* 2132509Smrj * cleanup and copy buffer or window state. if we didn't use the copy 2133509Smrj * buffer or windows, there won't be much to do :-) 2134509Smrj */ 2135509Smrj rootnex_teardown_copybuf(dma); 2136509Smrj rootnex_teardown_windows(dma); 2137509Smrj 21387613SVikram.Hegde@Sun.COM #if !defined(__xpv) 2139509Smrj /* 21407589SVikram.Hegde@Sun.COM * If intel iommu enabled, clean up the page tables and free the dvma 21417589SVikram.Hegde@Sun.COM */ 21427589SVikram.Hegde@Sun.COM if (rootnex_state->r_intel_iommu_enabled) { 21437589SVikram.Hegde@Sun.COM intel_iommu_unmap_sgl(handle); 21447589SVikram.Hegde@Sun.COM } 21457613SVikram.Hegde@Sun.COM #endif 21467589SVikram.Hegde@Sun.COM 21477589SVikram.Hegde@Sun.COM /* 2148509Smrj * If we had to allocate space to for the worse case sgl (it didn't 2149509Smrj * fit into our pre-allocate buffer), free that up now 2150509Smrj */ 2151509Smrj if (dma->dp_need_to_free_cookie) { 2152509Smrj kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2153509Smrj } 2154509Smrj 2155509Smrj /* 2156509Smrj * clean up the handle so it's ready for the next bind (i.e. if the 2157509Smrj * handle is reused). 2158509Smrj */ 2159509Smrj rootnex_clean_dmahdl(hp); 2160509Smrj 2161509Smrj if (rootnex_state->r_dvma_call_list_id) 2162509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2163509Smrj 2164509Smrj ROOTNEX_PROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2165509Smrj DTRACE_PROBE1(rootnex__unbind, uint64_t, 2166509Smrj rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2167509Smrj 2168509Smrj return (DDI_SUCCESS); 2169509Smrj } 2170509Smrj 21717613SVikram.Hegde@Sun.COM /* 21727613SVikram.Hegde@Sun.COM * rootnex_dma_unbindhdl() 21737613SVikram.Hegde@Sun.COM * called from ddi_dma_unbind_handle() 21747613SVikram.Hegde@Sun.COM */ 21757613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 21767613SVikram.Hegde@Sun.COM static int 21777613SVikram.Hegde@Sun.COM rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 21787613SVikram.Hegde@Sun.COM ddi_dma_handle_t handle) 21797613SVikram.Hegde@Sun.COM { 21807613SVikram.Hegde@Sun.COM #if !defined(__xpv) 218110216SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 21827613SVikram.Hegde@Sun.COM return (iommulib_nexdma_unbindhdl(dip, rdip, handle)); 21837613SVikram.Hegde@Sun.COM } 21847613SVikram.Hegde@Sun.COM #endif 21857613SVikram.Hegde@Sun.COM return (rootnex_coredma_unbindhdl(dip, rdip, handle)); 21867613SVikram.Hegde@Sun.COM } 21877613SVikram.Hegde@Sun.COM 21887617SVikram.Hegde@Sun.COM #if !defined(__xpv) 21898215SVikram.Hegde@Sun.COM 21908215SVikram.Hegde@Sun.COM static int 21918215SVikram.Hegde@Sun.COM rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle) 21928215SVikram.Hegde@Sun.COM { 21938215SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 21948215SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 21958215SVikram.Hegde@Sun.COM 21968215SVikram.Hegde@Sun.COM if (dma->dp_sleep_flags != KM_SLEEP && 21978215SVikram.Hegde@Sun.COM dma->dp_sleep_flags != KM_NOSLEEP) 21988215SVikram.Hegde@Sun.COM cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle"); 21998215SVikram.Hegde@Sun.COM return (dma->dp_sleep_flags); 22008215SVikram.Hegde@Sun.COM } 22017613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 22027613SVikram.Hegde@Sun.COM static void 22037613SVikram.Hegde@Sun.COM rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 22047613SVikram.Hegde@Sun.COM { 22057613SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 22067613SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 22078215SVikram.Hegde@Sun.COM rootnex_window_t *window; 22088215SVikram.Hegde@Sun.COM 22098215SVikram.Hegde@Sun.COM if (dma->dp_window) { 22108215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 22118215SVikram.Hegde@Sun.COM hp->dmai_cookie = window->wd_first_cookie; 22128215SVikram.Hegde@Sun.COM } else { 22138215SVikram.Hegde@Sun.COM hp->dmai_cookie = dma->dp_cookies; 22148215SVikram.Hegde@Sun.COM } 22157613SVikram.Hegde@Sun.COM hp->dmai_cookie++; 22167613SVikram.Hegde@Sun.COM } 22177613SVikram.Hegde@Sun.COM 22187613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 22197613SVikram.Hegde@Sun.COM static int 22207613SVikram.Hegde@Sun.COM rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 22218215SVikram.Hegde@Sun.COM ddi_dma_cookie_t **cookiepp, uint_t *ccountp) 22228215SVikram.Hegde@Sun.COM { 22238215SVikram.Hegde@Sun.COM int i; 22248215SVikram.Hegde@Sun.COM int km_flags; 22258215SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 22268215SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 22278215SVikram.Hegde@Sun.COM rootnex_window_t *window; 22288215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cp; 22298215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookie; 22308215SVikram.Hegde@Sun.COM 22318215SVikram.Hegde@Sun.COM ASSERT(*cookiepp == NULL); 22328215SVikram.Hegde@Sun.COM ASSERT(*ccountp == 0); 22338215SVikram.Hegde@Sun.COM 22348215SVikram.Hegde@Sun.COM if (dma->dp_window) { 22358215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 22368215SVikram.Hegde@Sun.COM cp = window->wd_first_cookie; 22378215SVikram.Hegde@Sun.COM *ccountp = window->wd_cookie_cnt; 22388215SVikram.Hegde@Sun.COM } else { 22398215SVikram.Hegde@Sun.COM cp = dma->dp_cookies; 22408215SVikram.Hegde@Sun.COM *ccountp = dma->dp_sglinfo.si_sgl_size; 22418215SVikram.Hegde@Sun.COM } 22428215SVikram.Hegde@Sun.COM 22438215SVikram.Hegde@Sun.COM km_flags = rootnex_coredma_get_sleep_flags(handle); 22448215SVikram.Hegde@Sun.COM cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags); 22458215SVikram.Hegde@Sun.COM if (cookie == NULL) { 22468215SVikram.Hegde@Sun.COM return (DDI_DMA_NORESOURCES); 22478215SVikram.Hegde@Sun.COM } 22488215SVikram.Hegde@Sun.COM 22498215SVikram.Hegde@Sun.COM for (i = 0; i < *ccountp; i++) { 22508215SVikram.Hegde@Sun.COM cookie[i].dmac_notused = cp[i].dmac_notused; 22518215SVikram.Hegde@Sun.COM cookie[i].dmac_type = cp[i].dmac_type; 22528215SVikram.Hegde@Sun.COM cookie[i].dmac_address = cp[i].dmac_address; 22538215SVikram.Hegde@Sun.COM cookie[i].dmac_size = cp[i].dmac_size; 22548215SVikram.Hegde@Sun.COM } 22558215SVikram.Hegde@Sun.COM 22568215SVikram.Hegde@Sun.COM *cookiepp = cookie; 22578215SVikram.Hegde@Sun.COM 22588215SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 22598215SVikram.Hegde@Sun.COM } 22608215SVikram.Hegde@Sun.COM 22618215SVikram.Hegde@Sun.COM /*ARGSUSED*/ 22628215SVikram.Hegde@Sun.COM static int 22638215SVikram.Hegde@Sun.COM rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 22648215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookiep, uint_t ccount) 22657613SVikram.Hegde@Sun.COM { 22667613SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 22677613SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 22688215SVikram.Hegde@Sun.COM rootnex_window_t *window; 22698215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cur_cookiep; 22708215SVikram.Hegde@Sun.COM 22718215SVikram.Hegde@Sun.COM ASSERT(cookiep); 22728215SVikram.Hegde@Sun.COM ASSERT(ccount != 0); 22738215SVikram.Hegde@Sun.COM ASSERT(dma->dp_need_to_switch_cookies == B_FALSE); 22748215SVikram.Hegde@Sun.COM 22758215SVikram.Hegde@Sun.COM if (dma->dp_window) { 22768215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 22778215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = window->wd_first_cookie; 22788215SVikram.Hegde@Sun.COM window->wd_first_cookie = cookiep; 22798215SVikram.Hegde@Sun.COM ASSERT(ccount == window->wd_cookie_cnt); 22808215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 22818215SVikram.Hegde@Sun.COM + window->wd_first_cookie; 22827613SVikram.Hegde@Sun.COM } else { 22838215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = dma->dp_cookies; 22848215SVikram.Hegde@Sun.COM dma->dp_cookies = cookiep; 22858215SVikram.Hegde@Sun.COM ASSERT(ccount == dma->dp_sglinfo.si_sgl_size); 22868215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 22878215SVikram.Hegde@Sun.COM + dma->dp_cookies; 22887613SVikram.Hegde@Sun.COM } 22898215SVikram.Hegde@Sun.COM 22908215SVikram.Hegde@Sun.COM dma->dp_need_to_switch_cookies = B_TRUE; 22918215SVikram.Hegde@Sun.COM hp->dmai_cookie = cur_cookiep; 22927613SVikram.Hegde@Sun.COM 22937613SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 22947613SVikram.Hegde@Sun.COM } 22958215SVikram.Hegde@Sun.COM 22968215SVikram.Hegde@Sun.COM /*ARGSUSED*/ 22978215SVikram.Hegde@Sun.COM static int 22988215SVikram.Hegde@Sun.COM rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 22998215SVikram.Hegde@Sun.COM { 23008215SVikram.Hegde@Sun.COM ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 23018215SVikram.Hegde@Sun.COM rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 23028215SVikram.Hegde@Sun.COM rootnex_window_t *window; 23038215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cur_cookiep; 23048215SVikram.Hegde@Sun.COM ddi_dma_cookie_t *cookie_array; 23058215SVikram.Hegde@Sun.COM uint_t ccount; 23068215SVikram.Hegde@Sun.COM 23078215SVikram.Hegde@Sun.COM /* check if cookies have not been switched */ 23088215SVikram.Hegde@Sun.COM if (dma->dp_need_to_switch_cookies == B_FALSE) 23098215SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 23108215SVikram.Hegde@Sun.COM 23118215SVikram.Hegde@Sun.COM ASSERT(dma->dp_saved_cookies); 23128215SVikram.Hegde@Sun.COM 23138215SVikram.Hegde@Sun.COM if (dma->dp_window) { 23148215SVikram.Hegde@Sun.COM window = &dma->dp_window[dma->dp_current_win]; 23158215SVikram.Hegde@Sun.COM cookie_array = window->wd_first_cookie; 23168215SVikram.Hegde@Sun.COM window->wd_first_cookie = dma->dp_saved_cookies; 23178215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = NULL; 23188215SVikram.Hegde@Sun.COM ccount = window->wd_cookie_cnt; 23198215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - cookie_array) 23208215SVikram.Hegde@Sun.COM + window->wd_first_cookie; 23218215SVikram.Hegde@Sun.COM } else { 23228215SVikram.Hegde@Sun.COM cookie_array = dma->dp_cookies; 23238215SVikram.Hegde@Sun.COM dma->dp_cookies = dma->dp_saved_cookies; 23248215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = NULL; 23258215SVikram.Hegde@Sun.COM ccount = dma->dp_sglinfo.si_sgl_size; 23268215SVikram.Hegde@Sun.COM cur_cookiep = (hp->dmai_cookie - cookie_array) 23278215SVikram.Hegde@Sun.COM + dma->dp_cookies; 23288215SVikram.Hegde@Sun.COM } 23298215SVikram.Hegde@Sun.COM 23308215SVikram.Hegde@Sun.COM kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount); 23318215SVikram.Hegde@Sun.COM 23328215SVikram.Hegde@Sun.COM hp->dmai_cookie = cur_cookiep; 23338215SVikram.Hegde@Sun.COM 23348215SVikram.Hegde@Sun.COM dma->dp_need_to_switch_cookies = B_FALSE; 23358215SVikram.Hegde@Sun.COM 23368215SVikram.Hegde@Sun.COM return (DDI_SUCCESS); 23378215SVikram.Hegde@Sun.COM } 23388215SVikram.Hegde@Sun.COM 23397617SVikram.Hegde@Sun.COM #endif 2340509Smrj 2341509Smrj /* 2342509Smrj * rootnex_verify_buffer() 2343509Smrj * verify buffer wasn't free'd 2344509Smrj */ 2345509Smrj static int 2346509Smrj rootnex_verify_buffer(rootnex_dma_t *dma) 2347509Smrj { 2348509Smrj page_t **pplist; 2349509Smrj caddr_t vaddr; 2350509Smrj uint_t pcnt; 2351509Smrj uint_t poff; 2352509Smrj page_t *pp; 23531865Sdilpreet char b; 2354509Smrj int i; 2355509Smrj 2356509Smrj /* Figure out how many pages this buffer occupies */ 2357509Smrj if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2358509Smrj poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2359509Smrj } else { 2360509Smrj vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2361509Smrj poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2362509Smrj } 2363509Smrj pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2364509Smrj 2365509Smrj switch (dma->dp_dma.dmao_type) { 23660Sstevel@tonic-gate case DMA_OTYP_PAGES: 2367509Smrj /* 2368509Smrj * for a linked list of pp's walk through them to make sure 2369509Smrj * they're locked and not free. 2370509Smrj */ 2371509Smrj pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2372509Smrj for (i = 0; i < pcnt; i++) { 2373509Smrj if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2374509Smrj return (DDI_FAILURE); 23750Sstevel@tonic-gate } 2376509Smrj pp = pp->p_next; 23770Sstevel@tonic-gate } 23780Sstevel@tonic-gate break; 2379509Smrj 23800Sstevel@tonic-gate case DMA_OTYP_VADDR: 23810Sstevel@tonic-gate case DMA_OTYP_BUFVADDR: 2382509Smrj pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2383509Smrj /* 2384509Smrj * for an array of pp's walk through them to make sure they're 2385509Smrj * not free. It's possible that they may not be locked. 2386509Smrj */ 2387509Smrj if (pplist) { 2388509Smrj for (i = 0; i < pcnt; i++) { 2389509Smrj if (PP_ISFREE(pplist[i])) { 2390509Smrj return (DDI_FAILURE); 2391509Smrj } 2392509Smrj } 2393509Smrj 2394509Smrj /* For a virtual address, try to peek at each page */ 2395509Smrj } else { 2396509Smrj if (dma->dp_sglinfo.si_asp == &kas) { 2397509Smrj for (i = 0; i < pcnt; i++) { 23981865Sdilpreet if (ddi_peek8(NULL, vaddr, &b) == 23991865Sdilpreet DDI_FAILURE) 2400509Smrj return (DDI_FAILURE); 24011865Sdilpreet vaddr += MMU_PAGESIZE; 2402509Smrj } 2403509Smrj } 2404509Smrj } 2405509Smrj break; 2406509Smrj 2407509Smrj default: 2408509Smrj ASSERT(0); 2409509Smrj break; 2410509Smrj } 2411509Smrj 2412509Smrj return (DDI_SUCCESS); 2413509Smrj } 2414509Smrj 2415509Smrj 2416509Smrj /* 2417509Smrj * rootnex_clean_dmahdl() 2418509Smrj * Clean the dma handle. This should be called on a handle alloc and an 2419509Smrj * unbind handle. Set the handle state to the default settings. 2420509Smrj */ 2421509Smrj static void 2422509Smrj rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2423509Smrj { 2424509Smrj rootnex_dma_t *dma; 2425509Smrj 2426509Smrj 2427509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 2428509Smrj 2429509Smrj hp->dmai_nwin = 0; 2430509Smrj dma->dp_current_cookie = 0; 2431509Smrj dma->dp_copybuf_size = 0; 2432509Smrj dma->dp_window = NULL; 2433509Smrj dma->dp_cbaddr = NULL; 2434509Smrj dma->dp_inuse = B_FALSE; 2435509Smrj dma->dp_need_to_free_cookie = B_FALSE; 24368215SVikram.Hegde@Sun.COM dma->dp_need_to_switch_cookies = B_FALSE; 24378215SVikram.Hegde@Sun.COM dma->dp_saved_cookies = NULL; 24388215SVikram.Hegde@Sun.COM dma->dp_sleep_flags = KM_PANIC; 2439509Smrj dma->dp_need_to_free_window = B_FALSE; 2440509Smrj dma->dp_partial_required = B_FALSE; 2441509Smrj dma->dp_trim_required = B_FALSE; 2442509Smrj dma->dp_sglinfo.si_copybuf_req = 0; 2443509Smrj #if !defined(__amd64) 2444509Smrj dma->dp_cb_remaping = B_FALSE; 2445509Smrj dma->dp_kva = NULL; 2446509Smrj #endif 2447509Smrj 2448509Smrj /* FMA related initialization */ 2449509Smrj hp->dmai_fault = 0; 2450509Smrj hp->dmai_fault_check = NULL; 2451509Smrj hp->dmai_fault_notify = NULL; 2452509Smrj hp->dmai_error.err_ena = 0; 2453509Smrj hp->dmai_error.err_status = DDI_FM_OK; 2454509Smrj hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2455509Smrj hp->dmai_error.err_ontrap = NULL; 2456509Smrj hp->dmai_error.err_fep = NULL; 24571865Sdilpreet hp->dmai_error.err_cf = NULL; 2458509Smrj } 2459509Smrj 2460509Smrj 2461509Smrj /* 2462509Smrj * rootnex_valid_alloc_parms() 2463509Smrj * Called in ddi_dma_alloc_handle path to validate its parameters. 2464509Smrj */ 2465509Smrj static int 2466509Smrj rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2467509Smrj { 2468509Smrj if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2469509Smrj (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2470509Smrj (attr->dma_attr_granular > MMU_PAGESIZE) || 2471509Smrj (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2472509Smrj return (DDI_DMA_BADATTR); 2473509Smrj } 2474509Smrj 2475509Smrj if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2476509Smrj return (DDI_DMA_BADATTR); 2477509Smrj } 2478509Smrj 2479509Smrj if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2480509Smrj MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2481509Smrj attr->dma_attr_sgllen <= 0) { 2482509Smrj return (DDI_DMA_BADATTR); 2483509Smrj } 2484509Smrj 2485509Smrj /* We should be able to DMA into every byte offset in a page */ 2486509Smrj if (maxsegmentsize < MMU_PAGESIZE) { 2487509Smrj return (DDI_DMA_BADATTR); 2488509Smrj } 2489509Smrj 2490509Smrj return (DDI_SUCCESS); 2491509Smrj } 2492509Smrj 2493509Smrj 2494509Smrj /* 2495509Smrj * rootnex_valid_bind_parms() 2496509Smrj * Called in ddi_dma_*_bind_handle path to validate its parameters. 2497509Smrj */ 2498509Smrj /* ARGSUSED */ 2499509Smrj static int 2500509Smrj rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2501509Smrj { 2502509Smrj #if !defined(__amd64) 2503509Smrj /* 2504509Smrj * we only support up to a 2G-1 transfer size on 32-bit kernels so 2505509Smrj * we can track the offset for the obsoleted interfaces. 2506509Smrj */ 2507509Smrj if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2508509Smrj return (DDI_DMA_TOOBIG); 2509509Smrj } 2510509Smrj #endif 2511509Smrj 2512509Smrj return (DDI_SUCCESS); 2513509Smrj } 2514509Smrj 2515509Smrj 2516509Smrj /* 2517509Smrj * rootnex_get_sgl() 2518509Smrj * Called in bind fastpath to get the sgl. Most of this will be replaced 2519509Smrj * with a call to the vm layer when vm2.0 comes around... 2520509Smrj */ 2521509Smrj static void 2522509Smrj rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2523509Smrj rootnex_sglinfo_t *sglinfo) 2524509Smrj { 2525509Smrj ddi_dma_atyp_t buftype; 25265084Sjohnlev rootnex_addr_t raddr; 2527509Smrj uint64_t last_page; 2528509Smrj uint64_t offset; 2529509Smrj uint64_t addrhi; 2530509Smrj uint64_t addrlo; 2531509Smrj uint64_t maxseg; 2532509Smrj page_t **pplist; 2533509Smrj uint64_t paddr; 2534509Smrj uint32_t psize; 2535509Smrj uint32_t size; 2536509Smrj caddr_t vaddr; 2537509Smrj uint_t pcnt; 2538509Smrj page_t *pp; 2539509Smrj uint_t cnt; 2540509Smrj 2541509Smrj 2542509Smrj /* shortcuts */ 2543509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2544509Smrj vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2545509Smrj maxseg = sglinfo->si_max_cookie_size; 2546509Smrj buftype = dmar_object->dmao_type; 2547509Smrj addrhi = sglinfo->si_max_addr; 2548509Smrj addrlo = sglinfo->si_min_addr; 2549509Smrj size = dmar_object->dmao_size; 2550509Smrj 2551509Smrj pcnt = 0; 2552509Smrj cnt = 0; 2553509Smrj 2554509Smrj /* 2555509Smrj * if we were passed down a linked list of pages, i.e. pointer to 2556509Smrj * page_t, use this to get our physical address and buf offset. 2557509Smrj */ 2558509Smrj if (buftype == DMA_OTYP_PAGES) { 2559509Smrj pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2560509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2561509Smrj offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2562509Smrj MMU_PAGEOFFSET; 25635084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum) + offset; 2564509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2565509Smrj pp = pp->p_next; 2566509Smrj sglinfo->si_asp = NULL; 2567509Smrj 2568509Smrj /* 2569509Smrj * We weren't passed down a linked list of pages, but if we were passed 2570509Smrj * down an array of pages, use this to get our physical address and buf 2571509Smrj * offset. 2572509Smrj */ 2573509Smrj } else if (pplist != NULL) { 2574509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2575509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2576509Smrj 2577509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2578509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2579509Smrj if (sglinfo->si_asp == NULL) { 2580509Smrj sglinfo->si_asp = &kas; 2581509Smrj } 2582509Smrj 2583509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 25845084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2585509Smrj paddr += offset; 2586509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2587509Smrj pcnt++; 2588509Smrj 2589509Smrj /* 2590509Smrj * All we have is a virtual address, we'll need to call into the VM 2591509Smrj * to get the physical address. 2592509Smrj */ 2593509Smrj } else { 2594509Smrj ASSERT((buftype == DMA_OTYP_VADDR) || 2595509Smrj (buftype == DMA_OTYP_BUFVADDR)); 2596509Smrj 2597509Smrj offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2598509Smrj sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2599509Smrj if (sglinfo->si_asp == NULL) { 2600509Smrj sglinfo->si_asp = &kas; 2601509Smrj } 2602509Smrj 26035084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2604509Smrj paddr += offset; 2605509Smrj psize = MIN(size, (MMU_PAGESIZE - offset)); 2606509Smrj vaddr += psize; 2607509Smrj } 2608509Smrj 26095084Sjohnlev #ifdef __xpv 26105084Sjohnlev /* 26115084Sjohnlev * If we're dom0, we're using a real device so we need to load 26125084Sjohnlev * the cookies with MFNs instead of PFNs. 26135084Sjohnlev */ 26145084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 26155084Sjohnlev #else 26165084Sjohnlev raddr = paddr; 26175084Sjohnlev #endif 26185084Sjohnlev 2619509Smrj /* 2620509Smrj * Setup the first cookie with the physical address of the page and the 2621509Smrj * size of the page (which takes into account the initial offset into 2622509Smrj * the page. 2623509Smrj */ 26245084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2625509Smrj sgl[cnt].dmac_size = psize; 2626509Smrj sgl[cnt].dmac_type = 0; 2627509Smrj 2628509Smrj /* 2629509Smrj * Save away the buffer offset into the page. We'll need this later in 2630509Smrj * the copy buffer code to help figure out the page index within the 2631509Smrj * buffer and the offset into the current page. 2632509Smrj */ 2633509Smrj sglinfo->si_buf_offset = offset; 2634509Smrj 2635509Smrj /* 2636509Smrj * If the DMA engine can't reach the physical address, increase how 2637509Smrj * much copy buffer we need. We always increase by pagesize so we don't 2638509Smrj * have to worry about converting offsets. Set a flag in the cookies 2639509Smrj * dmac_type to indicate that it uses the copy buffer. If this isn't the 2640509Smrj * last cookie, go to the next cookie (since we separate each page which 2641509Smrj * uses the copy buffer in case the copy buffer is not physically 2642509Smrj * contiguous. 2643509Smrj */ 26445084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2645509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2646509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2647509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2648509Smrj cnt++; 2649509Smrj sgl[cnt].dmac_laddress = 0; 2650509Smrj sgl[cnt].dmac_size = 0; 2651509Smrj sgl[cnt].dmac_type = 0; 2652509Smrj } 2653509Smrj } 2654509Smrj 2655509Smrj /* 2656509Smrj * save this page's physical address so we can figure out if the next 2657509Smrj * page is physically contiguous. Keep decrementing size until we are 2658509Smrj * done with the buffer. 2659509Smrj */ 26605084Sjohnlev last_page = raddr & MMU_PAGEMASK; 2661509Smrj size -= psize; 2662509Smrj 2663509Smrj while (size > 0) { 2664509Smrj /* Get the size for this page (i.e. partial or full page) */ 2665509Smrj psize = MIN(size, MMU_PAGESIZE); 2666509Smrj 2667509Smrj if (buftype == DMA_OTYP_PAGES) { 2668509Smrj /* get the paddr from the page_t */ 2669509Smrj ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 26705084Sjohnlev paddr = pfn_to_pa(pp->p_pagenum); 2671509Smrj pp = pp->p_next; 2672509Smrj } else if (pplist != NULL) { 2673509Smrj /* index into the array of page_t's to get the paddr */ 2674509Smrj ASSERT(!PP_ISFREE(pplist[pcnt])); 26755084Sjohnlev paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2676509Smrj pcnt++; 26770Sstevel@tonic-gate } else { 2678509Smrj /* call into the VM to get the paddr */ 26795084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2680509Smrj vaddr)); 2681509Smrj vaddr += psize; 2682509Smrj } 2683509Smrj 26845084Sjohnlev #ifdef __xpv 26855084Sjohnlev /* 26865084Sjohnlev * If we're dom0, we're using a real device so we need to load 26875084Sjohnlev * the cookies with MFNs instead of PFNs. 26885084Sjohnlev */ 26895084Sjohnlev raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 26905084Sjohnlev #else 26915084Sjohnlev raddr = paddr; 26925084Sjohnlev #endif 2693509Smrj /* check to see if this page needs the copy buffer */ 26945084Sjohnlev if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2695509Smrj sglinfo->si_copybuf_req += MMU_PAGESIZE; 2696509Smrj 26970Sstevel@tonic-gate /* 2698509Smrj * if there is something in the current cookie, go to 2699509Smrj * the next one. We only want one page in a cookie which 2700509Smrj * uses the copybuf since the copybuf doesn't have to 2701509Smrj * be physically contiguous. 2702509Smrj */ 2703509Smrj if (sgl[cnt].dmac_size != 0) { 2704509Smrj cnt++; 2705509Smrj } 27065084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2707509Smrj sgl[cnt].dmac_size = psize; 2708509Smrj #if defined(__amd64) 2709509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2710509Smrj #else 2711509Smrj /* 2712509Smrj * save the buf offset for 32-bit kernel. used in the 2713509Smrj * obsoleted interfaces. 2714509Smrj */ 2715509Smrj sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2716509Smrj (dmar_object->dmao_size - size); 2717509Smrj #endif 2718509Smrj /* if this isn't the last cookie, go to the next one */ 2719509Smrj if ((cnt + 1) < sglinfo->si_max_pages) { 2720509Smrj cnt++; 2721509Smrj sgl[cnt].dmac_laddress = 0; 2722509Smrj sgl[cnt].dmac_size = 0; 2723509Smrj sgl[cnt].dmac_type = 0; 2724509Smrj } 2725509Smrj 2726509Smrj /* 2727509Smrj * this page didn't need the copy buffer, if it's not physically 2728509Smrj * contiguous, or it would put us over a segment boundary, or it 2729509Smrj * puts us over the max cookie size, or the current sgl doesn't 2730509Smrj * have anything in it. 2731509Smrj */ 27325084Sjohnlev } else if (((last_page + MMU_PAGESIZE) != raddr) || 27335084Sjohnlev !(raddr & sglinfo->si_segmask) || 2734509Smrj ((sgl[cnt].dmac_size + psize) > maxseg) || 2735509Smrj (sgl[cnt].dmac_size == 0)) { 2736509Smrj /* 2737509Smrj * if we're not already in a new cookie, go to the next 2738509Smrj * cookie. 2739509Smrj */ 2740509Smrj if (sgl[cnt].dmac_size != 0) { 2741509Smrj cnt++; 2742509Smrj } 2743509Smrj 2744509Smrj /* save the cookie information */ 27455084Sjohnlev sgl[cnt].dmac_laddress = raddr; 2746509Smrj sgl[cnt].dmac_size = psize; 2747509Smrj #if defined(__amd64) 2748509Smrj sgl[cnt].dmac_type = 0; 2749509Smrj #else 2750509Smrj /* 2751509Smrj * save the buf offset for 32-bit kernel. used in the 2752509Smrj * obsoleted interfaces. 2753509Smrj */ 2754509Smrj sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2755509Smrj #endif 2756509Smrj 2757509Smrj /* 2758509Smrj * this page didn't need the copy buffer, it is physically 2759509Smrj * contiguous with the last page, and it's <= the max cookie 2760509Smrj * size. 2761509Smrj */ 2762509Smrj } else { 2763509Smrj sgl[cnt].dmac_size += psize; 2764509Smrj 2765509Smrj /* 2766509Smrj * if this exactly == the maximum cookie size, and 2767509Smrj * it isn't the last cookie, go to the next cookie. 2768509Smrj */ 2769509Smrj if (((sgl[cnt].dmac_size + psize) == maxseg) && 2770509Smrj ((cnt + 1) < sglinfo->si_max_pages)) { 2771509Smrj cnt++; 2772509Smrj sgl[cnt].dmac_laddress = 0; 2773509Smrj sgl[cnt].dmac_size = 0; 2774509Smrj sgl[cnt].dmac_type = 0; 2775509Smrj } 2776509Smrj } 2777509Smrj 2778509Smrj /* 2779509Smrj * save this page's physical address so we can figure out if the 2780509Smrj * next page is physically contiguous. Keep decrementing size 2781509Smrj * until we are done with the buffer. 2782509Smrj */ 27835084Sjohnlev last_page = raddr; 2784509Smrj size -= psize; 2785509Smrj } 2786509Smrj 2787509Smrj /* we're done, save away how many cookies the sgl has */ 2788509Smrj if (sgl[cnt].dmac_size == 0) { 2789509Smrj ASSERT(cnt < sglinfo->si_max_pages); 2790509Smrj sglinfo->si_sgl_size = cnt; 2791509Smrj } else { 2792509Smrj sglinfo->si_sgl_size = cnt + 1; 2793509Smrj } 2794509Smrj } 2795509Smrj 2796509Smrj 2797509Smrj /* 2798509Smrj * rootnex_bind_slowpath() 2799509Smrj * Call in the bind path if the calling driver can't use the sgl without 2800509Smrj * modifying it. We either need to use the copy buffer and/or we will end up 2801509Smrj * with a partial bind. 2802509Smrj */ 2803509Smrj static int 2804509Smrj rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2805509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2806509Smrj { 2807509Smrj rootnex_sglinfo_t *sinfo; 2808509Smrj rootnex_window_t *window; 2809509Smrj ddi_dma_cookie_t *cookie; 2810509Smrj size_t copybuf_used; 2811509Smrj size_t dmac_size; 2812509Smrj boolean_t partial; 2813509Smrj off_t cur_offset; 2814509Smrj page_t *cur_pp; 2815509Smrj major_t mnum; 2816509Smrj int e; 2817509Smrj int i; 2818509Smrj 2819509Smrj 2820509Smrj sinfo = &dma->dp_sglinfo; 2821509Smrj copybuf_used = 0; 2822509Smrj partial = B_FALSE; 2823509Smrj 2824509Smrj /* 2825509Smrj * If we're using the copybuf, set the copybuf state in dma struct. 2826509Smrj * Needs to be first since it sets the copy buffer size. 2827509Smrj */ 2828509Smrj if (sinfo->si_copybuf_req != 0) { 2829509Smrj e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2830509Smrj if (e != DDI_SUCCESS) { 2831509Smrj return (e); 2832509Smrj } 2833509Smrj } else { 2834509Smrj dma->dp_copybuf_size = 0; 2835509Smrj } 2836509Smrj 2837509Smrj /* 2838509Smrj * Figure out if we need to do a partial mapping. If so, figure out 2839509Smrj * if we need to trim the buffers when we munge the sgl. 2840509Smrj */ 2841509Smrj if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2842509Smrj (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2843509Smrj (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2844509Smrj dma->dp_partial_required = B_TRUE; 2845509Smrj if (attr->dma_attr_granular != 1) { 2846509Smrj dma->dp_trim_required = B_TRUE; 2847509Smrj } 2848509Smrj } else { 2849509Smrj dma->dp_partial_required = B_FALSE; 2850509Smrj dma->dp_trim_required = B_FALSE; 2851509Smrj } 2852509Smrj 2853509Smrj /* If we need to do a partial bind, make sure the driver supports it */ 2854509Smrj if (dma->dp_partial_required && 2855509Smrj !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2856509Smrj 2857509Smrj mnum = ddi_driver_major(dma->dp_dip); 2858509Smrj /* 2859509Smrj * patchable which allows us to print one warning per major 2860509Smrj * number. 2861509Smrj */ 2862509Smrj if ((rootnex_bind_warn) && 2863509Smrj ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2864509Smrj rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2865509Smrj cmn_err(CE_WARN, "!%s: coding error detected, the " 2866509Smrj "driver is using ddi_dma_attr(9S) incorrectly. " 2867509Smrj "There is a small risk of data corruption in " 2868509Smrj "particular with large I/Os. The driver should be " 2869509Smrj "replaced with a corrected version for proper " 2870509Smrj "system operation. To disable this warning, add " 2871509Smrj "'set rootnex:rootnex_bind_warn=0' to " 2872509Smrj "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2873509Smrj } 2874509Smrj return (DDI_DMA_TOOBIG); 2875509Smrj } 2876509Smrj 2877509Smrj /* 2878509Smrj * we might need multiple windows, setup state to handle them. In this 2879509Smrj * code path, we will have at least one window. 2880509Smrj */ 2881509Smrj e = rootnex_setup_windows(hp, dma, attr, kmflag); 2882509Smrj if (e != DDI_SUCCESS) { 2883509Smrj rootnex_teardown_copybuf(dma); 2884509Smrj return (e); 2885509Smrj } 2886509Smrj 2887509Smrj window = &dma->dp_window[0]; 2888509Smrj cookie = &dma->dp_cookies[0]; 2889509Smrj cur_offset = 0; 2890509Smrj rootnex_init_win(hp, dma, window, cookie, cur_offset); 2891509Smrj if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2892509Smrj cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2893509Smrj } 2894509Smrj 2895509Smrj /* loop though all the cookies we got back from get_sgl() */ 2896509Smrj for (i = 0; i < sinfo->si_sgl_size; i++) { 2897509Smrj /* 2898509Smrj * If we're using the copy buffer, check this cookie and setup 2899509Smrj * its associated copy buffer state. If this cookie uses the 2900509Smrj * copy buffer, make sure we sync this window during dma_sync. 2901509Smrj */ 2902509Smrj if (dma->dp_copybuf_size > 0) { 2903509Smrj rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2904509Smrj cur_offset, ©buf_used, &cur_pp); 2905509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2906509Smrj window->wd_dosync = B_TRUE; 2907509Smrj } 2908509Smrj } 2909509Smrj 2910509Smrj /* 2911509Smrj * save away the cookie size, since it could be modified in 2912509Smrj * the windowing code. 2913509Smrj */ 2914509Smrj dmac_size = cookie->dmac_size; 2915509Smrj 2916509Smrj /* if we went over max copybuf size */ 2917509Smrj if (dma->dp_copybuf_size && 2918509Smrj (copybuf_used > dma->dp_copybuf_size)) { 2919509Smrj partial = B_TRUE; 2920509Smrj e = rootnex_copybuf_window_boundary(hp, dma, &window, 2921509Smrj cookie, cur_offset, ©buf_used); 2922509Smrj if (e != DDI_SUCCESS) { 2923509Smrj rootnex_teardown_copybuf(dma); 2924509Smrj rootnex_teardown_windows(dma); 2925509Smrj return (e); 2926509Smrj } 2927509Smrj 2928509Smrj /* 2929509Smrj * if the coookie uses the copy buffer, make sure the 2930509Smrj * new window we just moved to is set to sync. 2931509Smrj */ 2932509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2933509Smrj window->wd_dosync = B_TRUE; 2934509Smrj } 2935509Smrj DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2936509Smrj dma->dp_dip); 2937509Smrj 2938509Smrj /* if the cookie cnt == max sgllen, move to the next window */ 2939509Smrj } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2940509Smrj partial = B_TRUE; 2941509Smrj ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2942509Smrj e = rootnex_sgllen_window_boundary(hp, dma, &window, 2943509Smrj cookie, attr, cur_offset); 2944509Smrj if (e != DDI_SUCCESS) { 2945509Smrj rootnex_teardown_copybuf(dma); 2946509Smrj rootnex_teardown_windows(dma); 2947509Smrj return (e); 2948509Smrj } 2949509Smrj 2950509Smrj /* 2951509Smrj * if the coookie uses the copy buffer, make sure the 2952509Smrj * new window we just moved to is set to sync. 2953509Smrj */ 2954509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2955509Smrj window->wd_dosync = B_TRUE; 2956509Smrj } 2957509Smrj DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2958509Smrj dma->dp_dip); 2959509Smrj 2960509Smrj /* else if we will be over maxxfer */ 2961509Smrj } else if ((window->wd_size + dmac_size) > 2962509Smrj dma->dp_maxxfer) { 2963509Smrj partial = B_TRUE; 2964509Smrj e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2965509Smrj cookie); 2966509Smrj if (e != DDI_SUCCESS) { 2967509Smrj rootnex_teardown_copybuf(dma); 2968509Smrj rootnex_teardown_windows(dma); 2969509Smrj return (e); 2970509Smrj } 2971509Smrj 2972509Smrj /* 2973509Smrj * if the coookie uses the copy buffer, make sure the 2974509Smrj * new window we just moved to is set to sync. 29750Sstevel@tonic-gate */ 2976509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2977509Smrj window->wd_dosync = B_TRUE; 2978509Smrj } 2979509Smrj DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2980509Smrj dma->dp_dip); 2981509Smrj 2982509Smrj /* else this cookie fits in the current window */ 2983509Smrj } else { 2984509Smrj window->wd_cookie_cnt++; 2985509Smrj window->wd_size += dmac_size; 2986509Smrj } 2987509Smrj 2988509Smrj /* track our offset into the buffer, go to the next cookie */ 2989509Smrj ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2990509Smrj ASSERT(cookie->dmac_size <= dmac_size); 2991509Smrj cur_offset += dmac_size; 2992509Smrj cookie++; 2993509Smrj } 2994509Smrj 2995509Smrj /* if we ended up with a zero sized window in the end, clean it up */ 2996509Smrj if (window->wd_size == 0) { 2997509Smrj hp->dmai_nwin--; 2998509Smrj window--; 2999509Smrj } 3000509Smrj 3001509Smrj ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 3002509Smrj 3003509Smrj if (!partial) { 3004509Smrj return (DDI_DMA_MAPPED); 3005509Smrj } 3006509Smrj 3007509Smrj ASSERT(dma->dp_partial_required); 3008509Smrj return (DDI_DMA_PARTIAL_MAP); 3009509Smrj } 3010509Smrj 3011509Smrj 3012509Smrj /* 3013509Smrj * rootnex_setup_copybuf() 3014509Smrj * Called in bind slowpath. Figures out if we're going to use the copy 3015509Smrj * buffer, and if we do, sets up the basic state to handle it. 3016509Smrj */ 3017509Smrj static int 3018509Smrj rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 3019509Smrj rootnex_dma_t *dma, ddi_dma_attr_t *attr) 3020509Smrj { 3021509Smrj rootnex_sglinfo_t *sinfo; 3022509Smrj ddi_dma_attr_t lattr; 3023509Smrj size_t max_copybuf; 3024509Smrj int cansleep; 3025509Smrj int e; 3026509Smrj #if !defined(__amd64) 3027509Smrj int vmflag; 3028509Smrj #endif 3029509Smrj 3030509Smrj 3031509Smrj sinfo = &dma->dp_sglinfo; 3032509Smrj 30335251Smrj /* read this first so it's consistent through the routine */ 30345251Smrj max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 3035509Smrj 3036509Smrj /* We need to call into the rootnex on ddi_dma_sync() */ 3037509Smrj hp->dmai_rflags &= ~DMP_NOSYNC; 3038509Smrj 3039509Smrj /* make sure the copybuf size <= the max size */ 3040509Smrj dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 3041509Smrj ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 3042509Smrj 3043509Smrj #if !defined(__amd64) 3044509Smrj /* 3045509Smrj * if we don't have kva space to copy to/from, allocate the KVA space 3046509Smrj * now. We only do this for the 32-bit kernel. We use seg kpm space for 3047509Smrj * the 64-bit kernel. 3048509Smrj */ 3049509Smrj if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 3050509Smrj (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 3051509Smrj 3052509Smrj /* convert the sleep flags */ 3053509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3054509Smrj vmflag = VM_SLEEP; 3055509Smrj } else { 3056509Smrj vmflag = VM_NOSLEEP; 3057509Smrj } 3058509Smrj 3059509Smrj /* allocate Kernel VA space that we can bcopy to/from */ 3060509Smrj dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 3061509Smrj vmflag); 3062509Smrj if (dma->dp_kva == NULL) { 3063509Smrj return (DDI_DMA_NORESOURCES); 3064509Smrj } 3065509Smrj } 3066509Smrj #endif 3067509Smrj 3068509Smrj /* convert the sleep flags */ 3069509Smrj if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3070509Smrj cansleep = 1; 3071509Smrj } else { 3072509Smrj cansleep = 0; 3073509Smrj } 3074509Smrj 3075509Smrj /* 30767173Smrj * Allocate the actual copy buffer. This needs to fit within the DMA 30777173Smrj * engine limits, so we can't use kmem_alloc... We don't need 30787173Smrj * contiguous memory (sgllen) since we will be forcing windows on 30797173Smrj * sgllen anyway. 3080509Smrj */ 3081509Smrj lattr = *attr; 3082509Smrj lattr.dma_attr_align = MMU_PAGESIZE; 30837173Smrj /* 30847173Smrj * this should be < 0 to indicate no limit, but due to a bug in 30857173Smrj * the rootnex, we'll set it to the maximum positive int. 30867173Smrj */ 30877173Smrj lattr.dma_attr_sgllen = 0x7fffffff; 3088509Smrj e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 3089509Smrj 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 3090509Smrj if (e != DDI_SUCCESS) { 3091509Smrj #if !defined(__amd64) 3092509Smrj if (dma->dp_kva != NULL) { 3093509Smrj vmem_free(heap_arena, dma->dp_kva, 3094509Smrj dma->dp_copybuf_size); 3095509Smrj } 3096509Smrj #endif 3097509Smrj return (DDI_DMA_NORESOURCES); 3098509Smrj } 3099509Smrj 3100509Smrj DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 3101509Smrj size_t, dma->dp_copybuf_size); 3102509Smrj 3103509Smrj return (DDI_SUCCESS); 3104509Smrj } 3105509Smrj 3106509Smrj 3107509Smrj /* 3108509Smrj * rootnex_setup_windows() 3109509Smrj * Called in bind slowpath to setup the window state. We always have windows 3110509Smrj * in the slowpath. Even if the window count = 1. 3111509Smrj */ 3112509Smrj static int 3113509Smrj rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3114509Smrj ddi_dma_attr_t *attr, int kmflag) 3115509Smrj { 3116509Smrj rootnex_window_t *windowp; 3117509Smrj rootnex_sglinfo_t *sinfo; 3118509Smrj size_t copy_state_size; 3119509Smrj size_t win_state_size; 3120509Smrj size_t state_available; 3121509Smrj size_t space_needed; 3122509Smrj uint_t copybuf_win; 3123509Smrj uint_t maxxfer_win; 3124509Smrj size_t space_used; 3125509Smrj uint_t sglwin; 3126509Smrj 3127509Smrj 3128509Smrj sinfo = &dma->dp_sglinfo; 3129509Smrj 3130509Smrj dma->dp_current_win = 0; 3131509Smrj hp->dmai_nwin = 0; 3132509Smrj 3133509Smrj /* If we don't need to do a partial, we only have one window */ 3134509Smrj if (!dma->dp_partial_required) { 3135509Smrj dma->dp_max_win = 1; 3136509Smrj 3137509Smrj /* 3138509Smrj * we need multiple windows, need to figure out the worse case number 3139509Smrj * of windows. 3140509Smrj */ 3141509Smrj } else { 3142509Smrj /* 3143509Smrj * if we need windows because we need more copy buffer that 3144509Smrj * we allow, the worse case number of windows we could need 3145509Smrj * here would be (copybuf space required / copybuf space that 3146509Smrj * we have) plus one for remainder, and plus 2 to handle the 3147509Smrj * extra pages on the trim for the first and last pages of the 3148509Smrj * buffer (a page is the minimum window size so under the right 3149509Smrj * attr settings, you could have a window for each page). 3150509Smrj * The last page will only be hit here if the size is not a 3151509Smrj * multiple of the granularity (which theoretically shouldn't 3152509Smrj * be the case but never has been enforced, so we could have 3153509Smrj * broken things without it). 3154509Smrj */ 3155509Smrj if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 3156509Smrj ASSERT(dma->dp_copybuf_size > 0); 3157509Smrj copybuf_win = (sinfo->si_copybuf_req / 3158509Smrj dma->dp_copybuf_size) + 1 + 2; 3159509Smrj } else { 3160509Smrj copybuf_win = 0; 3161509Smrj } 3162509Smrj 3163509Smrj /* 3164509Smrj * if we need windows because we have more cookies than the H/W 3165509Smrj * can handle, the number of windows we would need here would 3166509Smrj * be (cookie count / cookies count H/W supports) plus one for 3167509Smrj * remainder, and plus 2 to handle the extra pages on the trim 3168509Smrj * (see above comment about trim) 3169509Smrj */ 3170509Smrj if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 3171509Smrj sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 3172509Smrj + 1) + 2; 3173509Smrj } else { 3174509Smrj sglwin = 0; 3175509Smrj } 3176509Smrj 3177509Smrj /* 3178509Smrj * if we need windows because we're binding more memory than the 3179509Smrj * H/W can transfer at once, the number of windows we would need 3180509Smrj * here would be (xfer count / max xfer H/W supports) plus one 3181509Smrj * for remainder, and plus 2 to handle the extra pages on the 3182509Smrj * trim (see above comment about trim) 3183509Smrj */ 3184509Smrj if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 3185509Smrj maxxfer_win = (dma->dp_dma.dmao_size / 3186509Smrj dma->dp_maxxfer) + 1 + 2; 3187509Smrj } else { 3188509Smrj maxxfer_win = 0; 3189509Smrj } 3190509Smrj dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 3191509Smrj ASSERT(dma->dp_max_win > 0); 3192509Smrj } 3193509Smrj win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 3194509Smrj 3195509Smrj /* 3196509Smrj * Get space for window and potential copy buffer state. Before we 3197509Smrj * go and allocate memory, see if we can get away with using what's 3198509Smrj * left in the pre-allocted state or the dynamically allocated sgl. 3199509Smrj */ 3200509Smrj space_used = (uintptr_t)(sinfo->si_sgl_size * 3201509Smrj sizeof (ddi_dma_cookie_t)); 3202509Smrj 3203509Smrj /* if we dynamically allocated space for the cookies */ 3204509Smrj if (dma->dp_need_to_free_cookie) { 3205509Smrj /* if we have more space in the pre-allocted buffer, use it */ 3206509Smrj ASSERT(space_used <= dma->dp_cookie_size); 3207509Smrj if ((dma->dp_cookie_size - space_used) <= 3208509Smrj rootnex_state->r_prealloc_size) { 3209509Smrj state_available = rootnex_state->r_prealloc_size; 3210509Smrj windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 3211509Smrj 3212509Smrj /* 3213509Smrj * else, we have more free space in the dynamically allocated 3214509Smrj * buffer, i.e. the buffer wasn't worse case fragmented so we 3215509Smrj * didn't need a lot of cookies. 3216509Smrj */ 3217509Smrj } else { 3218509Smrj state_available = dma->dp_cookie_size - space_used; 3219509Smrj windowp = (rootnex_window_t *) 3220509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 3221509Smrj } 3222509Smrj 3223509Smrj /* we used the pre-alloced buffer */ 3224509Smrj } else { 3225509Smrj ASSERT(space_used <= rootnex_state->r_prealloc_size); 3226509Smrj state_available = rootnex_state->r_prealloc_size - space_used; 3227509Smrj windowp = (rootnex_window_t *) 3228509Smrj &dma->dp_cookies[sinfo->si_sgl_size]; 3229509Smrj } 3230509Smrj 3231509Smrj /* 3232509Smrj * figure out how much state we need to track the copy buffer. Add an 3233509Smrj * addition 8 bytes for pointer alignemnt later. 3234509Smrj */ 3235509Smrj if (dma->dp_copybuf_size > 0) { 3236509Smrj copy_state_size = sinfo->si_max_pages * 3237509Smrj sizeof (rootnex_pgmap_t); 3238509Smrj } else { 3239509Smrj copy_state_size = 0; 3240509Smrj } 3241509Smrj /* add an additional 8 bytes for pointer alignment */ 3242509Smrj space_needed = win_state_size + copy_state_size + 0x8; 3243509Smrj 3244509Smrj /* if we have enough space already, use it */ 3245509Smrj if (state_available >= space_needed) { 3246509Smrj dma->dp_window = windowp; 3247509Smrj dma->dp_need_to_free_window = B_FALSE; 3248509Smrj 3249509Smrj /* not enough space, need to allocate more. */ 3250509Smrj } else { 3251509Smrj dma->dp_window = kmem_alloc(space_needed, kmflag); 3252509Smrj if (dma->dp_window == NULL) { 3253509Smrj return (DDI_DMA_NORESOURCES); 3254509Smrj } 3255509Smrj dma->dp_need_to_free_window = B_TRUE; 3256509Smrj dma->dp_window_size = space_needed; 3257509Smrj DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 3258509Smrj dma->dp_dip, size_t, space_needed); 3259509Smrj } 3260509Smrj 3261509Smrj /* 3262509Smrj * we allocate copy buffer state and window state at the same time. 3263509Smrj * setup our copy buffer state pointers. Make sure it's aligned. 3264509Smrj */ 3265509Smrj if (dma->dp_copybuf_size > 0) { 3266509Smrj dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 3267509Smrj &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 3268509Smrj 3269509Smrj #if !defined(__amd64) 3270509Smrj /* 3271509Smrj * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 3272509Smrj * false/NULL. Should be quicker to bzero vs loop and set. 3273509Smrj */ 3274509Smrj bzero(dma->dp_pgmap, copy_state_size); 3275509Smrj #endif 3276509Smrj } else { 3277509Smrj dma->dp_pgmap = NULL; 3278509Smrj } 3279509Smrj 3280509Smrj return (DDI_SUCCESS); 3281509Smrj } 3282509Smrj 3283509Smrj 3284509Smrj /* 3285509Smrj * rootnex_teardown_copybuf() 3286509Smrj * cleans up after rootnex_setup_copybuf() 3287509Smrj */ 3288509Smrj static void 3289509Smrj rootnex_teardown_copybuf(rootnex_dma_t *dma) 3290509Smrj { 3291509Smrj #if !defined(__amd64) 3292509Smrj int i; 3293509Smrj 3294509Smrj /* 3295509Smrj * if we allocated kernel heap VMEM space, go through all the pages and 3296509Smrj * map out any of the ones that we're mapped into the kernel heap VMEM 3297509Smrj * arena. Then free the VMEM space. 3298509Smrj */ 3299509Smrj if (dma->dp_kva != NULL) { 3300509Smrj for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 3301509Smrj if (dma->dp_pgmap[i].pm_mapped) { 3302509Smrj hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 3303509Smrj MMU_PAGESIZE, HAT_UNLOAD); 3304509Smrj dma->dp_pgmap[i].pm_mapped = B_FALSE; 3305509Smrj } 3306509Smrj } 3307509Smrj 3308509Smrj vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 3309509Smrj } 3310509Smrj 3311509Smrj #endif 3312509Smrj 3313509Smrj /* if we allocated a copy buffer, free it */ 3314509Smrj if (dma->dp_cbaddr != NULL) { 33151900Seota i_ddi_mem_free(dma->dp_cbaddr, NULL); 3316509Smrj } 3317509Smrj } 3318509Smrj 3319509Smrj 3320509Smrj /* 3321509Smrj * rootnex_teardown_windows() 3322509Smrj * cleans up after rootnex_setup_windows() 3323509Smrj */ 3324509Smrj static void 3325509Smrj rootnex_teardown_windows(rootnex_dma_t *dma) 3326509Smrj { 3327509Smrj /* 3328509Smrj * if we had to allocate window state on the last bind (because we 3329509Smrj * didn't have enough pre-allocated space in the handle), free it. 3330509Smrj */ 3331509Smrj if (dma->dp_need_to_free_window) { 3332509Smrj kmem_free(dma->dp_window, dma->dp_window_size); 3333509Smrj } 3334509Smrj } 3335509Smrj 3336509Smrj 3337509Smrj /* 3338509Smrj * rootnex_init_win() 3339509Smrj * Called in bind slow path during creation of a new window. Initializes 3340509Smrj * window state to default values. 3341509Smrj */ 3342509Smrj /*ARGSUSED*/ 3343509Smrj static void 3344509Smrj rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3345509Smrj rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3346509Smrj { 3347509Smrj hp->dmai_nwin++; 3348509Smrj window->wd_dosync = B_FALSE; 3349509Smrj window->wd_offset = cur_offset; 3350509Smrj window->wd_size = 0; 3351509Smrj window->wd_first_cookie = cookie; 3352509Smrj window->wd_cookie_cnt = 0; 3353509Smrj window->wd_trim.tr_trim_first = B_FALSE; 3354509Smrj window->wd_trim.tr_trim_last = B_FALSE; 3355509Smrj window->wd_trim.tr_first_copybuf_win = B_FALSE; 3356509Smrj window->wd_trim.tr_last_copybuf_win = B_FALSE; 3357509Smrj #if !defined(__amd64) 3358509Smrj window->wd_remap_copybuf = dma->dp_cb_remaping; 3359509Smrj #endif 3360509Smrj } 3361509Smrj 3362509Smrj 3363509Smrj /* 3364509Smrj * rootnex_setup_cookie() 3365509Smrj * Called in the bind slow path when the sgl uses the copy buffer. If any of 3366509Smrj * the sgl uses the copy buffer, we need to go through each cookie, figure 3367509Smrj * out if it uses the copy buffer, and if it does, save away everything we'll 3368509Smrj * need during sync. 3369509Smrj */ 3370509Smrj static void 3371509Smrj rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3372509Smrj ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3373509Smrj page_t **cur_pp) 3374509Smrj { 3375509Smrj boolean_t copybuf_sz_power_2; 3376509Smrj rootnex_sglinfo_t *sinfo; 33775084Sjohnlev paddr_t paddr; 3378509Smrj uint_t pidx; 3379509Smrj uint_t pcnt; 3380509Smrj off_t poff; 3381509Smrj #if defined(__amd64) 3382509Smrj pfn_t pfn; 3383509Smrj #else 3384509Smrj page_t **pplist; 3385509Smrj #endif 3386509Smrj 3387509Smrj sinfo = &dma->dp_sglinfo; 3388509Smrj 3389509Smrj /* 3390509Smrj * Calculate the page index relative to the start of the buffer. The 3391509Smrj * index to the current page for our buffer is the offset into the 3392509Smrj * first page of the buffer plus our current offset into the buffer 3393509Smrj * itself, shifted of course... 3394509Smrj */ 3395509Smrj pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3396509Smrj ASSERT(pidx < sinfo->si_max_pages); 3397509Smrj 3398509Smrj /* if this cookie uses the copy buffer */ 3399509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3400509Smrj /* 3401509Smrj * NOTE: we know that since this cookie uses the copy buffer, it 3402509Smrj * is <= MMU_PAGESIZE. 3403509Smrj */ 3404509Smrj 3405509Smrj /* 3406509Smrj * get the offset into the page. For the 64-bit kernel, get the 3407509Smrj * pfn which we'll use with seg kpm. 3408509Smrj */ 34095084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3410509Smrj #if defined(__amd64) 34115084Sjohnlev /* mfn_to_pfn() is a NOP on i86pc */ 34125084Sjohnlev pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 34135084Sjohnlev #endif /* __amd64 */ 3414509Smrj 3415509Smrj /* figure out if the copybuf size is a power of 2 */ 3416509Smrj if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3417509Smrj copybuf_sz_power_2 = B_FALSE; 3418509Smrj } else { 3419509Smrj copybuf_sz_power_2 = B_TRUE; 3420509Smrj } 3421509Smrj 3422509Smrj /* This page uses the copy buffer */ 3423509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3424509Smrj 3425509Smrj /* 3426509Smrj * save the copy buffer KVA that we'll use with this page. 3427509Smrj * if we still fit within the copybuf, it's a simple add. 3428509Smrj * otherwise, we need to wrap over using & or % accordingly. 3429509Smrj */ 3430509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3431509Smrj dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3432509Smrj *copybuf_used; 3433509Smrj } else { 3434509Smrj if (copybuf_sz_power_2) { 3435509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3436509Smrj (uintptr_t)dma->dp_cbaddr + 3437509Smrj (*copybuf_used & 3438509Smrj (dma->dp_copybuf_size - 1))); 34390Sstevel@tonic-gate } else { 3440509Smrj dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3441509Smrj (uintptr_t)dma->dp_cbaddr + 3442509Smrj (*copybuf_used % dma->dp_copybuf_size)); 34430Sstevel@tonic-gate } 3444509Smrj } 3445509Smrj 3446509Smrj /* 3447509Smrj * over write the cookie physical address with the address of 3448509Smrj * the physical address of the copy buffer page that we will 3449509Smrj * use. 3450509Smrj */ 34515084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3452509Smrj dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3453509Smrj 34545084Sjohnlev #ifdef __xpv 34555084Sjohnlev /* 34565084Sjohnlev * If we're dom0, we're using a real device so we need to load 34575084Sjohnlev * the cookies with MAs instead of PAs. 34585084Sjohnlev */ 34595084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 34605084Sjohnlev #else 34615084Sjohnlev cookie->dmac_laddress = paddr; 34625084Sjohnlev #endif 34635084Sjohnlev 3464509Smrj /* if we have a kernel VA, it's easy, just save that address */ 3465509Smrj if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3466509Smrj (sinfo->si_asp == &kas)) { 3467509Smrj /* 3468509Smrj * save away the page aligned virtual address of the 3469509Smrj * driver buffer. Offsets are handled in the sync code. 3470509Smrj */ 3471509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3472509Smrj dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3473509Smrj & MMU_PAGEMASK); 3474509Smrj #if !defined(__amd64) 3475509Smrj /* 3476509Smrj * we didn't need to, and will never need to map this 3477509Smrj * page. 3478509Smrj */ 3479509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3480509Smrj #endif 3481509Smrj 3482509Smrj /* we don't have a kernel VA. We need one for the bcopy. */ 3483509Smrj } else { 3484509Smrj #if defined(__amd64) 3485509Smrj /* 3486509Smrj * for the 64-bit kernel, it's easy. We use seg kpm to 3487509Smrj * get a Kernel VA for the corresponding pfn. 3488509Smrj */ 3489509Smrj dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3490509Smrj #else 3491509Smrj /* 3492509Smrj * for the 32-bit kernel, this is a pain. First we'll 3493509Smrj * save away the page_t or user VA for this page. This 3494509Smrj * is needed in rootnex_dma_win() when we switch to a 3495509Smrj * new window which requires us to re-map the copy 3496509Smrj * buffer. 3497509Smrj */ 3498509Smrj pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3499509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3500509Smrj dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3501509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3502509Smrj } else if (pplist != NULL) { 3503509Smrj dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3504509Smrj dma->dp_pgmap[pidx].pm_vaddr = NULL; 3505509Smrj } else { 3506509Smrj dma->dp_pgmap[pidx].pm_pp = NULL; 3507509Smrj dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3508509Smrj (((uintptr_t) 3509509Smrj dmar_object->dmao_obj.virt_obj.v_addr + 3510509Smrj cur_offset) & MMU_PAGEMASK); 3511509Smrj } 3512509Smrj 3513509Smrj /* 3514509Smrj * save away the page aligned virtual address which was 3515509Smrj * allocated from the kernel heap arena (taking into 3516509Smrj * account if we need more copy buffer than we alloced 3517509Smrj * and use multiple windows to handle this, i.e. &,%). 3518509Smrj * NOTE: there isn't and physical memory backing up this 3519509Smrj * virtual address space currently. 3520509Smrj */ 3521509Smrj if ((*copybuf_used + MMU_PAGESIZE) <= 3522509Smrj dma->dp_copybuf_size) { 3523509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3524509Smrj (((uintptr_t)dma->dp_kva + *copybuf_used) & 3525509Smrj MMU_PAGEMASK); 3526509Smrj } else { 3527509Smrj if (copybuf_sz_power_2) { 3528509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3529509Smrj (((uintptr_t)dma->dp_kva + 3530509Smrj (*copybuf_used & 3531509Smrj (dma->dp_copybuf_size - 1))) & 3532509Smrj MMU_PAGEMASK); 3533509Smrj } else { 3534509Smrj dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3535509Smrj (((uintptr_t)dma->dp_kva + 3536509Smrj (*copybuf_used % 3537509Smrj dma->dp_copybuf_size)) & 3538509Smrj MMU_PAGEMASK); 3539509Smrj } 3540509Smrj } 3541509Smrj 3542509Smrj /* 3543509Smrj * if we haven't used up the available copy buffer yet, 3544509Smrj * map the kva to the physical page. 3545509Smrj */ 3546509Smrj if (!dma->dp_cb_remaping && ((*copybuf_used + 3547509Smrj MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3548509Smrj dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3549509Smrj if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3550509Smrj i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3551509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3552509Smrj } else { 3553509Smrj i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3554509Smrj sinfo->si_asp, 3555509Smrj dma->dp_pgmap[pidx].pm_kaddr); 3556509Smrj } 3557509Smrj 3558509Smrj /* 3559509Smrj * we've used up the available copy buffer, this page 3560509Smrj * will have to be mapped during rootnex_dma_win() when 3561509Smrj * we switch to a new window which requires a re-map 3562509Smrj * the copy buffer. (32-bit kernel only) 3563509Smrj */ 3564509Smrj } else { 3565509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3566509Smrj } 3567509Smrj #endif 3568509Smrj /* go to the next page_t */ 3569509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3570509Smrj *cur_pp = (*cur_pp)->p_next; 3571509Smrj } 35720Sstevel@tonic-gate } 3573509Smrj 3574509Smrj /* add to the copy buffer count */ 3575509Smrj *copybuf_used += MMU_PAGESIZE; 3576509Smrj 3577509Smrj /* 3578509Smrj * This cookie doesn't use the copy buffer. Walk through the pages this 3579509Smrj * cookie occupies to reflect this. 3580509Smrj */ 3581509Smrj } else { 3582509Smrj /* 3583509Smrj * figure out how many pages the cookie occupies. We need to 3584509Smrj * use the original page offset of the buffer and the cookies 3585509Smrj * offset in the buffer to do this. 3586509Smrj */ 3587509Smrj poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3588509Smrj pcnt = mmu_btopr(cookie->dmac_size + poff); 3589509Smrj 3590509Smrj while (pcnt > 0) { 3591509Smrj #if !defined(__amd64) 3592509Smrj /* 3593509Smrj * the 32-bit kernel doesn't have seg kpm, so we need 3594509Smrj * to map in the driver buffer (if it didn't come down 3595509Smrj * with a kernel VA) on the fly. Since this page doesn't 3596509Smrj * use the copy buffer, it's not, or will it ever, have 3597509Smrj * to be mapped in. 3598509Smrj */ 3599509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3600509Smrj #endif 3601509Smrj dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3602509Smrj 3603509Smrj /* 3604509Smrj * we need to update pidx and cur_pp or we'll loose 3605509Smrj * track of where we are. 3606509Smrj */ 3607509Smrj if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3608509Smrj *cur_pp = (*cur_pp)->p_next; 3609509Smrj } 3610509Smrj pidx++; 3611509Smrj pcnt--; 3612509Smrj } 3613509Smrj } 3614509Smrj } 3615509Smrj 3616509Smrj 3617509Smrj /* 3618509Smrj * rootnex_sgllen_window_boundary() 3619509Smrj * Called in the bind slow path when the next cookie causes us to exceed (in 3620509Smrj * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3621509Smrj * length supported by the DMA H/W. 3622509Smrj */ 3623509Smrj static int 3624509Smrj rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3625509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3626509Smrj off_t cur_offset) 3627509Smrj { 3628509Smrj off_t new_offset; 3629509Smrj size_t trim_sz; 3630509Smrj off_t coffset; 3631509Smrj 3632509Smrj 3633509Smrj /* 3634509Smrj * if we know we'll never have to trim, it's pretty easy. Just move to 3635509Smrj * the next window and init it. We're done. 3636509Smrj */ 3637509Smrj if (!dma->dp_trim_required) { 3638509Smrj (*windowp)++; 3639509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3640509Smrj (*windowp)->wd_cookie_cnt++; 3641509Smrj (*windowp)->wd_size = cookie->dmac_size; 3642509Smrj return (DDI_SUCCESS); 3643509Smrj } 3644509Smrj 3645509Smrj /* figure out how much we need to trim from the window */ 3646509Smrj ASSERT(attr->dma_attr_granular != 0); 3647509Smrj if (dma->dp_granularity_power_2) { 3648509Smrj trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3649509Smrj } else { 3650509Smrj trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3651509Smrj } 3652509Smrj 3653509Smrj /* The window's a whole multiple of granularity. We're done */ 3654509Smrj if (trim_sz == 0) { 3655509Smrj (*windowp)++; 3656509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3657509Smrj (*windowp)->wd_cookie_cnt++; 3658509Smrj (*windowp)->wd_size = cookie->dmac_size; 3659509Smrj return (DDI_SUCCESS); 3660509Smrj } 3661509Smrj 3662509Smrj /* 3663509Smrj * The window's not a whole multiple of granularity, since we know this 3664509Smrj * is due to the sgllen, we need to go back to the last cookie and trim 3665509Smrj * that one, add the left over part of the old cookie into the new 3666509Smrj * window, and then add in the new cookie into the new window. 3667509Smrj */ 3668509Smrj 3669509Smrj /* 3670509Smrj * make sure the driver isn't making us do something bad... Trimming and 3671509Smrj * sgllen == 1 don't go together. 3672509Smrj */ 3673509Smrj if (attr->dma_attr_sgllen == 1) { 3674509Smrj return (DDI_DMA_NOMAPPING); 3675509Smrj } 3676509Smrj 3677509Smrj /* 3678509Smrj * first, setup the current window to account for the trim. Need to go 3679509Smrj * back to the last cookie for this. 3680509Smrj */ 3681509Smrj cookie--; 3682509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3683509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 36845084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3685509Smrj ASSERT(cookie->dmac_size > trim_sz); 3686509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3687509Smrj (*windowp)->wd_size -= trim_sz; 3688509Smrj 3689509Smrj /* save the buffer offsets for the next window */ 3690509Smrj coffset = cookie->dmac_size - trim_sz; 3691509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3692509Smrj 3693509Smrj /* 3694509Smrj * set this now in case this is the first window. all other cases are 3695509Smrj * set in dma_win() 3696509Smrj */ 3697509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3698509Smrj 3699509Smrj /* 3700509Smrj * initialize the next window using what's left over in the previous 3701509Smrj * cookie. 3702509Smrj */ 3703509Smrj (*windowp)++; 3704509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3705509Smrj (*windowp)->wd_cookie_cnt++; 3706509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 37075084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3708509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3709509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3710509Smrj (*windowp)->wd_dosync = B_TRUE; 3711509Smrj } 3712509Smrj 3713509Smrj /* 3714509Smrj * now go back to the current cookie and add it to the new window. set 3715509Smrj * the new window size to the what was left over from the previous 3716509Smrj * cookie and what's in the current cookie. 3717509Smrj */ 3718509Smrj cookie++; 3719509Smrj (*windowp)->wd_cookie_cnt++; 3720509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3721509Smrj 3722509Smrj /* 3723509Smrj * trim plus the next cookie could put us over maxxfer (a cookie can be 3724509Smrj * a max size of maxxfer). Handle that case. 3725509Smrj */ 3726509Smrj if ((*windowp)->wd_size > dma->dp_maxxfer) { 3727509Smrj /* 3728509Smrj * maxxfer is already a whole multiple of granularity, and this 3729509Smrj * trim will be <= the previous trim (since a cookie can't be 3730509Smrj * larger than maxxfer). Make things simple here. 3731509Smrj */ 3732509Smrj trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3733509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3734509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 37355084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3736509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3737509Smrj (*windowp)->wd_size -= trim_sz; 3738509Smrj ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3739509Smrj 3740509Smrj /* save the buffer offsets for the next window */ 3741509Smrj coffset = cookie->dmac_size - trim_sz; 3742509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3743509Smrj 3744509Smrj /* setup the next window */ 3745509Smrj (*windowp)++; 3746509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3747509Smrj (*windowp)->wd_cookie_cnt++; 3748509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 37495084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3750509Smrj coffset; 3751509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3752509Smrj } 3753509Smrj 3754509Smrj return (DDI_SUCCESS); 3755509Smrj } 3756509Smrj 3757509Smrj 3758509Smrj /* 3759509Smrj * rootnex_copybuf_window_boundary() 3760509Smrj * Called in bind slowpath when we get to a window boundary because we used 3761509Smrj * up all the copy buffer that we have. 3762509Smrj */ 3763509Smrj static int 3764509Smrj rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3765509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3766509Smrj size_t *copybuf_used) 3767509Smrj { 3768509Smrj rootnex_sglinfo_t *sinfo; 3769509Smrj off_t new_offset; 3770509Smrj size_t trim_sz; 37715084Sjohnlev paddr_t paddr; 3772509Smrj off_t coffset; 3773509Smrj uint_t pidx; 3774509Smrj off_t poff; 3775509Smrj 3776509Smrj 3777509Smrj sinfo = &dma->dp_sglinfo; 3778509Smrj 3779509Smrj /* 3780509Smrj * the copy buffer should be a whole multiple of page size. We know that 3781509Smrj * this cookie is <= MMU_PAGESIZE. 3782509Smrj */ 3783509Smrj ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3784509Smrj 3785509Smrj /* 3786509Smrj * from now on, all new windows in this bind need to be re-mapped during 3787509Smrj * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3788509Smrj * space... 3789509Smrj */ 3790509Smrj #if !defined(__amd64) 3791509Smrj dma->dp_cb_remaping = B_TRUE; 3792509Smrj #endif 3793509Smrj 3794509Smrj /* reset copybuf used */ 3795509Smrj *copybuf_used = 0; 3796509Smrj 3797509Smrj /* 3798509Smrj * if we don't have to trim (since granularity is set to 1), go to the 3799509Smrj * next window and add the current cookie to it. We know the current 3800509Smrj * cookie uses the copy buffer since we're in this code path. 3801509Smrj */ 3802509Smrj if (!dma->dp_trim_required) { 3803509Smrj (*windowp)++; 3804509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3805509Smrj 3806509Smrj /* Add this cookie to the new window */ 3807509Smrj (*windowp)->wd_cookie_cnt++; 3808509Smrj (*windowp)->wd_size += cookie->dmac_size; 3809509Smrj *copybuf_used += MMU_PAGESIZE; 3810509Smrj return (DDI_SUCCESS); 3811509Smrj } 3812509Smrj 3813509Smrj /* 3814509Smrj * *** may need to trim, figure it out. 3815509Smrj */ 3816509Smrj 3817509Smrj /* figure out how much we need to trim from the window */ 3818509Smrj if (dma->dp_granularity_power_2) { 3819509Smrj trim_sz = (*windowp)->wd_size & 3820509Smrj (hp->dmai_attr.dma_attr_granular - 1); 3821509Smrj } else { 3822509Smrj trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3823509Smrj } 3824509Smrj 3825509Smrj /* 3826509Smrj * if the window's a whole multiple of granularity, go to the next 3827509Smrj * window, init it, then add in the current cookie. We know the current 3828509Smrj * cookie uses the copy buffer since we're in this code path. 3829509Smrj */ 3830509Smrj if (trim_sz == 0) { 3831509Smrj (*windowp)++; 3832509Smrj rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3833509Smrj 3834509Smrj /* Add this cookie to the new window */ 3835509Smrj (*windowp)->wd_cookie_cnt++; 3836509Smrj (*windowp)->wd_size += cookie->dmac_size; 3837509Smrj *copybuf_used += MMU_PAGESIZE; 3838509Smrj return (DDI_SUCCESS); 3839509Smrj } 3840509Smrj 3841509Smrj /* 3842509Smrj * *** We figured it out, we definitly need to trim 3843509Smrj */ 3844509Smrj 3845509Smrj /* 3846509Smrj * make sure the driver isn't making us do something bad... 3847509Smrj * Trimming and sgllen == 1 don't go together. 3848509Smrj */ 3849509Smrj if (hp->dmai_attr.dma_attr_sgllen == 1) { 3850509Smrj return (DDI_DMA_NOMAPPING); 3851509Smrj } 3852509Smrj 3853509Smrj /* 3854509Smrj * first, setup the current window to account for the trim. Need to go 3855509Smrj * back to the last cookie for this. Some of the last cookie will be in 3856509Smrj * the current window, and some of the last cookie will be in the new 3857509Smrj * window. All of the current cookie will be in the new window. 3858509Smrj */ 3859509Smrj cookie--; 3860509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3861509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 38625084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3863509Smrj ASSERT(cookie->dmac_size > trim_sz); 3864509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3865509Smrj (*windowp)->wd_size -= trim_sz; 3866509Smrj 3867509Smrj /* 3868509Smrj * we're trimming the last cookie (not the current cookie). So that 3869509Smrj * last cookie may have or may not have been using the copy buffer ( 3870509Smrj * we know the cookie passed in uses the copy buffer since we're in 3871509Smrj * this code path). 3872509Smrj * 3873509Smrj * If the last cookie doesn't use the copy buffer, nothing special to 3874509Smrj * do. However, if it does uses the copy buffer, it will be both the 3875509Smrj * last page in the current window and the first page in the next 3876509Smrj * window. Since we are reusing the copy buffer (and KVA space on the 3877509Smrj * 32-bit kernel), this page will use the end of the copy buffer in the 3878509Smrj * current window, and the start of the copy buffer in the next window. 3879509Smrj * Track that info... The cookie physical address was already set to 3880509Smrj * the copy buffer physical address in setup_cookie.. 3881509Smrj */ 3882509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3883509Smrj pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3884509Smrj (*windowp)->wd_size) >> MMU_PAGESHIFT; 3885509Smrj (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3886509Smrj (*windowp)->wd_trim.tr_last_pidx = pidx; 3887509Smrj (*windowp)->wd_trim.tr_last_cbaddr = 3888509Smrj dma->dp_pgmap[pidx].pm_cbaddr; 3889509Smrj #if !defined(__amd64) 3890509Smrj (*windowp)->wd_trim.tr_last_kaddr = 3891509Smrj dma->dp_pgmap[pidx].pm_kaddr; 3892509Smrj #endif 3893509Smrj } 3894509Smrj 3895509Smrj /* save the buffer offsets for the next window */ 3896509Smrj coffset = cookie->dmac_size - trim_sz; 3897509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3898509Smrj 3899509Smrj /* 3900509Smrj * set this now in case this is the first window. all other cases are 3901509Smrj * set in dma_win() 3902509Smrj */ 3903509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3904509Smrj 3905509Smrj /* 3906509Smrj * initialize the next window using what's left over in the previous 3907509Smrj * cookie. 3908509Smrj */ 3909509Smrj (*windowp)++; 3910509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3911509Smrj (*windowp)->wd_cookie_cnt++; 3912509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 39135084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3914509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 3915509Smrj 3916509Smrj /* 3917509Smrj * again, we're tracking if the last cookie uses the copy buffer. 3918509Smrj * read the comment above for more info on why we need to track 3919509Smrj * additional state. 3920509Smrj * 3921509Smrj * For the first cookie in the new window, we need reset the physical 3922509Smrj * address to DMA into to the start of the copy buffer plus any 3923509Smrj * initial page offset which may be present. 3924509Smrj */ 3925509Smrj if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3926509Smrj (*windowp)->wd_dosync = B_TRUE; 3927509Smrj (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3928509Smrj (*windowp)->wd_trim.tr_first_pidx = pidx; 3929509Smrj (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3930509Smrj poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 39315084Sjohnlev 39325084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 39335084Sjohnlev poff; 39345084Sjohnlev #ifdef __xpv 39355084Sjohnlev /* 39365084Sjohnlev * If we're dom0, we're using a real device so we need to load 39375084Sjohnlev * the cookies with MAs instead of PAs. 39385084Sjohnlev */ 39395084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = 39405084Sjohnlev ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 39415084Sjohnlev #else 39425084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = paddr; 39435084Sjohnlev #endif 39445084Sjohnlev 3945509Smrj #if !defined(__amd64) 3946509Smrj (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3947509Smrj #endif 3948509Smrj /* account for the cookie copybuf usage in the new window */ 3949509Smrj *copybuf_used += MMU_PAGESIZE; 3950509Smrj 3951509Smrj /* 3952509Smrj * every piece of code has to have a hack, and here is this 3953509Smrj * ones :-) 3954509Smrj * 3955509Smrj * There is a complex interaction between setup_cookie and the 3956509Smrj * copybuf window boundary. The complexity had to be in either 3957509Smrj * the maxxfer window, or the copybuf window, and I chose the 3958509Smrj * copybuf code. 3959509Smrj * 3960509Smrj * So in this code path, we have taken the last cookie, 3961509Smrj * virtually broken it in half due to the trim, and it happens 3962509Smrj * to use the copybuf which further complicates life. At the 3963509Smrj * same time, we have already setup the current cookie, which 3964509Smrj * is now wrong. More background info: the current cookie uses 3965509Smrj * the copybuf, so it is only a page long max. So we need to 3966509Smrj * fix the current cookies copy buffer address, physical 3967509Smrj * address, and kva for the 32-bit kernel. We due this by 3968509Smrj * bumping them by page size (of course, we can't due this on 3969509Smrj * the physical address since the copy buffer may not be 3970509Smrj * physically contiguous). 3971509Smrj */ 3972509Smrj cookie++; 3973509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 39745084Sjohnlev poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 39755084Sjohnlev 39765084Sjohnlev paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3977509Smrj dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 39785084Sjohnlev #ifdef __xpv 39795084Sjohnlev /* 39805084Sjohnlev * If we're dom0, we're using a real device so we need to load 39815084Sjohnlev * the cookies with MAs instead of PAs. 39825084Sjohnlev */ 39835084Sjohnlev cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 39845084Sjohnlev #else 39855084Sjohnlev cookie->dmac_laddress = paddr; 39865084Sjohnlev #endif 39875084Sjohnlev 3988509Smrj #if !defined(__amd64) 3989509Smrj ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3990509Smrj dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3991509Smrj #endif 3992509Smrj } else { 3993509Smrj /* go back to the current cookie */ 3994509Smrj cookie++; 3995509Smrj } 3996509Smrj 3997509Smrj /* 3998509Smrj * add the current cookie to the new window. set the new window size to 3999509Smrj * the what was left over from the previous cookie and what's in the 4000509Smrj * current cookie. 4001509Smrj */ 4002509Smrj (*windowp)->wd_cookie_cnt++; 4003509Smrj (*windowp)->wd_size = trim_sz + cookie->dmac_size; 4004509Smrj ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 4005509Smrj 4006509Smrj /* 4007509Smrj * we know that the cookie passed in always uses the copy buffer. We 4008509Smrj * wouldn't be here if it didn't. 4009509Smrj */ 4010509Smrj *copybuf_used += MMU_PAGESIZE; 4011509Smrj 4012509Smrj return (DDI_SUCCESS); 4013509Smrj } 4014509Smrj 4015509Smrj 4016509Smrj /* 4017509Smrj * rootnex_maxxfer_window_boundary() 4018509Smrj * Called in bind slowpath when we get to a window boundary because we will 4019509Smrj * go over maxxfer. 4020509Smrj */ 4021509Smrj static int 4022509Smrj rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4023509Smrj rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 4024509Smrj { 4025509Smrj size_t dmac_size; 4026509Smrj off_t new_offset; 4027509Smrj size_t trim_sz; 4028509Smrj off_t coffset; 4029509Smrj 4030509Smrj 4031509Smrj /* 4032509Smrj * calculate how much we have to trim off of the current cookie to equal 4033509Smrj * maxxfer. We don't have to account for granularity here since our 4034509Smrj * maxxfer already takes that into account. 4035509Smrj */ 4036509Smrj trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 4037509Smrj ASSERT(trim_sz <= cookie->dmac_size); 4038509Smrj ASSERT(trim_sz <= dma->dp_maxxfer); 4039509Smrj 4040509Smrj /* save cookie size since we need it later and we might change it */ 4041509Smrj dmac_size = cookie->dmac_size; 4042509Smrj 4043509Smrj /* 4044509Smrj * if we're not trimming the entire cookie, setup the current window to 4045509Smrj * account for the trim. 4046509Smrj */ 4047509Smrj if (trim_sz < cookie->dmac_size) { 4048509Smrj (*windowp)->wd_cookie_cnt++; 4049509Smrj (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4050509Smrj (*windowp)->wd_trim.tr_last_cookie = cookie; 40515084Sjohnlev (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4052509Smrj (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4053509Smrj (*windowp)->wd_size = dma->dp_maxxfer; 4054509Smrj 4055509Smrj /* 4056509Smrj * set the adjusted cookie size now in case this is the first 4057509Smrj * window. All other windows are taken care of in get win 4058509Smrj */ 4059509Smrj cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4060509Smrj } 4061509Smrj 4062509Smrj /* 4063509Smrj * coffset is the current offset within the cookie, new_offset is the 4064509Smrj * current offset with the entire buffer. 4065509Smrj */ 4066509Smrj coffset = dmac_size - trim_sz; 4067509Smrj new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4068509Smrj 4069509Smrj /* initialize the next window */ 4070509Smrj (*windowp)++; 4071509Smrj rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4072509Smrj (*windowp)->wd_cookie_cnt++; 4073509Smrj (*windowp)->wd_size = trim_sz; 4074509Smrj if (trim_sz < dmac_size) { 4075509Smrj (*windowp)->wd_trim.tr_trim_first = B_TRUE; 40765084Sjohnlev (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 4077509Smrj coffset; 4078509Smrj (*windowp)->wd_trim.tr_first_size = trim_sz; 4079509Smrj } 4080509Smrj 4081509Smrj return (DDI_SUCCESS); 4082509Smrj } 4083509Smrj 4084509Smrj 4085509Smrj /*ARGSUSED*/ 4086509Smrj static int 40877613SVikram.Hegde@Sun.COM rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4088509Smrj off_t off, size_t len, uint_t cache_flags) 4089509Smrj { 4090509Smrj rootnex_sglinfo_t *sinfo; 4091509Smrj rootnex_pgmap_t *cbpage; 4092509Smrj rootnex_window_t *win; 4093509Smrj ddi_dma_impl_t *hp; 4094509Smrj rootnex_dma_t *dma; 4095509Smrj caddr_t fromaddr; 4096509Smrj caddr_t toaddr; 4097509Smrj uint_t psize; 4098509Smrj off_t offset; 4099509Smrj uint_t pidx; 4100509Smrj size_t size; 4101509Smrj off_t poff; 4102509Smrj int e; 4103509Smrj 4104509Smrj 4105509Smrj hp = (ddi_dma_impl_t *)handle; 4106509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4107509Smrj sinfo = &dma->dp_sglinfo; 4108509Smrj 4109509Smrj /* 4110509Smrj * if we don't have any windows, we don't need to sync. A copybuf 4111509Smrj * will cause us to have at least one window. 4112509Smrj */ 4113509Smrj if (dma->dp_window == NULL) { 4114509Smrj return (DDI_SUCCESS); 4115509Smrj } 4116509Smrj 4117509Smrj /* This window may not need to be sync'd */ 4118509Smrj win = &dma->dp_window[dma->dp_current_win]; 4119509Smrj if (!win->wd_dosync) { 4120509Smrj return (DDI_SUCCESS); 4121509Smrj } 4122509Smrj 41238215SVikram.Hegde@Sun.COM if (strcmp(ddi_driver_name(rdip), "bnx") == 0 || 41248215SVikram.Hegde@Sun.COM strcmp(ddi_driver_name(rdip), "ohci") == 0) 41258215SVikram.Hegde@Sun.COM cmn_err(CE_WARN, "%s: syncing DMA ...", 41268215SVikram.Hegde@Sun.COM ddi_driver_name(rdip)); 41278215SVikram.Hegde@Sun.COM 4128509Smrj /* handle off and len special cases */ 4129509Smrj if ((off == 0) || (rootnex_sync_ignore_params)) { 4130509Smrj offset = win->wd_offset; 4131509Smrj } else { 4132509Smrj offset = off; 4133509Smrj } 4134509Smrj if ((len == 0) || (rootnex_sync_ignore_params)) { 4135509Smrj size = win->wd_size; 4136509Smrj } else { 4137509Smrj size = len; 4138509Smrj } 4139509Smrj 4140509Smrj /* check the sync args to make sure they make a little sense */ 4141509Smrj if (rootnex_sync_check_parms) { 4142509Smrj e = rootnex_valid_sync_parms(hp, win, offset, size, 4143509Smrj cache_flags); 4144509Smrj if (e != DDI_SUCCESS) { 4145509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 4146509Smrj return (DDI_FAILURE); 4147509Smrj } 4148509Smrj } 4149509Smrj 4150509Smrj /* 4151509Smrj * special case the first page to handle the offset into the page. The 4152509Smrj * offset to the current page for our buffer is the offset into the 4153509Smrj * first page of the buffer plus our current offset into the buffer 4154509Smrj * itself, masked of course. 4155509Smrj */ 4156509Smrj poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 4157509Smrj psize = MIN((MMU_PAGESIZE - poff), size); 4158509Smrj 4159509Smrj /* go through all the pages that we want to sync */ 4160509Smrj while (size > 0) { 4161509Smrj /* 4162509Smrj * Calculate the page index relative to the start of the buffer. 4163509Smrj * The index to the current page for our buffer is the offset 4164509Smrj * into the first page of the buffer plus our current offset 4165509Smrj * into the buffer itself, shifted of course... 4166509Smrj */ 4167509Smrj pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 4168509Smrj ASSERT(pidx < sinfo->si_max_pages); 4169509Smrj 4170509Smrj /* 4171509Smrj * if this page uses the copy buffer, we need to sync it, 4172509Smrj * otherwise, go on to the next page. 4173509Smrj */ 4174509Smrj cbpage = &dma->dp_pgmap[pidx]; 4175509Smrj ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 4176509Smrj (cbpage->pm_uses_copybuf == B_FALSE)); 4177509Smrj if (cbpage->pm_uses_copybuf) { 4178509Smrj /* cbaddr and kaddr should be page aligned */ 4179509Smrj ASSERT(((uintptr_t)cbpage->pm_cbaddr & 4180509Smrj MMU_PAGEOFFSET) == 0); 4181509Smrj ASSERT(((uintptr_t)cbpage->pm_kaddr & 4182509Smrj MMU_PAGEOFFSET) == 0); 4183509Smrj 4184509Smrj /* 4185509Smrj * if we're copying for the device, we are going to 4186509Smrj * copy from the drivers buffer and to the rootnex 4187509Smrj * allocated copy buffer. 4188509Smrj */ 4189509Smrj if (cache_flags == DDI_DMA_SYNC_FORDEV) { 4190509Smrj fromaddr = cbpage->pm_kaddr + poff; 4191509Smrj toaddr = cbpage->pm_cbaddr + poff; 4192509Smrj DTRACE_PROBE2(rootnex__sync__dev, 4193509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 4194509Smrj 4195509Smrj /* 4196509Smrj * if we're copying for the cpu/kernel, we are going to 4197509Smrj * copy from the rootnex allocated copy buffer to the 4198509Smrj * drivers buffer. 4199509Smrj */ 4200509Smrj } else { 4201509Smrj fromaddr = cbpage->pm_cbaddr + poff; 4202509Smrj toaddr = cbpage->pm_kaddr + poff; 4203509Smrj DTRACE_PROBE2(rootnex__sync__cpu, 4204509Smrj dev_info_t *, dma->dp_dip, size_t, psize); 4205509Smrj } 4206509Smrj 4207509Smrj bcopy(fromaddr, toaddr, psize); 4208509Smrj } 4209509Smrj 4210509Smrj /* 4211509Smrj * decrement size until we're done, update our offset into the 4212509Smrj * buffer, and get the next page size. 4213509Smrj */ 4214509Smrj size -= psize; 4215509Smrj offset += psize; 4216509Smrj psize = MIN(MMU_PAGESIZE, size); 4217509Smrj 4218509Smrj /* page offset is zero for the rest of this loop */ 4219509Smrj poff = 0; 4220509Smrj } 4221509Smrj 4222509Smrj return (DDI_SUCCESS); 4223509Smrj } 4224509Smrj 42257613SVikram.Hegde@Sun.COM /* 42267613SVikram.Hegde@Sun.COM * rootnex_dma_sync() 42277613SVikram.Hegde@Sun.COM * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 42287613SVikram.Hegde@Sun.COM * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 42297613SVikram.Hegde@Sun.COM * is set, ddi_dma_sync() returns immediately passing back success. 42307613SVikram.Hegde@Sun.COM */ 42317613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 42327613SVikram.Hegde@Sun.COM static int 42337613SVikram.Hegde@Sun.COM rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 42347613SVikram.Hegde@Sun.COM off_t off, size_t len, uint_t cache_flags) 42357613SVikram.Hegde@Sun.COM { 42367613SVikram.Hegde@Sun.COM #if !defined(__xpv) 423710216SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 42387613SVikram.Hegde@Sun.COM return (iommulib_nexdma_sync(dip, rdip, handle, off, len, 42397613SVikram.Hegde@Sun.COM cache_flags)); 42407613SVikram.Hegde@Sun.COM } 42417613SVikram.Hegde@Sun.COM #endif 42427613SVikram.Hegde@Sun.COM return (rootnex_coredma_sync(dip, rdip, handle, off, len, 42437613SVikram.Hegde@Sun.COM cache_flags)); 42447613SVikram.Hegde@Sun.COM } 4245509Smrj 4246509Smrj /* 4247509Smrj * rootnex_valid_sync_parms() 4248509Smrj * checks the parameters passed to sync to verify they are correct. 4249509Smrj */ 4250509Smrj static int 4251509Smrj rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 4252509Smrj off_t offset, size_t size, uint_t cache_flags) 4253509Smrj { 4254509Smrj off_t woffset; 4255509Smrj 4256509Smrj 4257509Smrj /* 4258509Smrj * the first part of the test to make sure the offset passed in is 4259509Smrj * within the window. 4260509Smrj */ 4261509Smrj if (offset < win->wd_offset) { 4262509Smrj return (DDI_FAILURE); 4263509Smrj } 4264509Smrj 4265509Smrj /* 4266509Smrj * second and last part of the test to make sure the offset and length 4267509Smrj * passed in is within the window. 4268509Smrj */ 4269509Smrj woffset = offset - win->wd_offset; 4270509Smrj if ((woffset + size) > win->wd_size) { 4271509Smrj return (DDI_FAILURE); 4272509Smrj } 4273509Smrj 4274509Smrj /* 4275509Smrj * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 4276509Smrj * be set too. 4277509Smrj */ 4278509Smrj if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 4279509Smrj (hp->dmai_rflags & DDI_DMA_WRITE)) { 4280509Smrj return (DDI_SUCCESS); 4281509Smrj } 4282509Smrj 4283509Smrj /* 4284509Smrj * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 4285509Smrj * should be set. Also DDI_DMA_READ should be set in the flags. 4286509Smrj */ 4287509Smrj if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 4288509Smrj (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 4289509Smrj (hp->dmai_rflags & DDI_DMA_READ)) { 4290509Smrj return (DDI_SUCCESS); 4291509Smrj } 4292509Smrj 4293509Smrj return (DDI_FAILURE); 4294509Smrj } 4295509Smrj 4296509Smrj 4297509Smrj /*ARGSUSED*/ 4298509Smrj static int 42997613SVikram.Hegde@Sun.COM rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4300509Smrj uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4301509Smrj uint_t *ccountp) 4302509Smrj { 4303509Smrj rootnex_window_t *window; 4304509Smrj rootnex_trim_t *trim; 4305509Smrj ddi_dma_impl_t *hp; 4306509Smrj rootnex_dma_t *dma; 4307509Smrj #if !defined(__amd64) 4308509Smrj rootnex_sglinfo_t *sinfo; 4309509Smrj rootnex_pgmap_t *pmap; 4310509Smrj uint_t pidx; 4311509Smrj uint_t pcnt; 4312509Smrj off_t poff; 4313509Smrj int i; 4314509Smrj #endif 4315509Smrj 4316509Smrj 4317509Smrj hp = (ddi_dma_impl_t *)handle; 4318509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4319509Smrj #if !defined(__amd64) 4320509Smrj sinfo = &dma->dp_sglinfo; 4321509Smrj #endif 4322509Smrj 4323509Smrj /* If we try and get a window which doesn't exist, return failure */ 4324509Smrj if (win >= hp->dmai_nwin) { 4325509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4326509Smrj return (DDI_FAILURE); 4327509Smrj } 4328509Smrj 4329509Smrj /* 4330509Smrj * if we don't have any windows, and they're asking for the first 4331509Smrj * window, setup the cookie pointer to the first cookie in the bind. 4332509Smrj * setup our return values, then increment the cookie since we return 4333509Smrj * the first cookie on the stack. 4334509Smrj */ 4335509Smrj if (dma->dp_window == NULL) { 4336509Smrj if (win != 0) { 4337509Smrj ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4338509Smrj return (DDI_FAILURE); 4339509Smrj } 4340509Smrj hp->dmai_cookie = dma->dp_cookies; 4341509Smrj *offp = 0; 4342509Smrj *lenp = dma->dp_dma.dmao_size; 4343509Smrj *ccountp = dma->dp_sglinfo.si_sgl_size; 4344509Smrj *cookiep = hp->dmai_cookie[0]; 4345509Smrj hp->dmai_cookie++; 4346509Smrj return (DDI_SUCCESS); 4347509Smrj } 4348509Smrj 4349509Smrj /* sync the old window before moving on to the new one */ 4350509Smrj window = &dma->dp_window[dma->dp_current_win]; 4351509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 43528215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4353509Smrj DDI_DMA_SYNC_FORCPU); 4354509Smrj } 4355509Smrj 4356509Smrj #if !defined(__amd64) 4357509Smrj /* 4358509Smrj * before we move to the next window, if we need to re-map, unmap all 4359509Smrj * the pages in this window. 4360509Smrj */ 4361509Smrj if (dma->dp_cb_remaping) { 4362509Smrj /* 4363509Smrj * If we switch to this window again, we'll need to map in 4364509Smrj * on the fly next time. 4365509Smrj */ 4366509Smrj window->wd_remap_copybuf = B_TRUE; 4367509Smrj 4368509Smrj /* 4369509Smrj * calculate the page index into the buffer where this window 4370509Smrj * starts, and the number of pages this window takes up. 4371509Smrj */ 4372509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4373509Smrj MMU_PAGESHIFT; 4374509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4375509Smrj MMU_PAGEOFFSET; 4376509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4377509Smrj ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4378509Smrj 4379509Smrj /* unmap pages which are currently mapped in this window */ 4380509Smrj for (i = 0; i < pcnt; i++) { 4381509Smrj if (dma->dp_pgmap[pidx].pm_mapped) { 4382509Smrj hat_unload(kas.a_hat, 4383509Smrj dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4384509Smrj HAT_UNLOAD); 4385509Smrj dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4386509Smrj } 4387509Smrj pidx++; 4388509Smrj } 4389509Smrj } 4390509Smrj #endif 4391509Smrj 4392509Smrj /* 4393509Smrj * Move to the new window. 4394509Smrj * NOTE: current_win must be set for sync to work right 4395509Smrj */ 4396509Smrj dma->dp_current_win = win; 4397509Smrj window = &dma->dp_window[win]; 4398509Smrj 4399509Smrj /* if needed, adjust the first and/or last cookies for trim */ 4400509Smrj trim = &window->wd_trim; 4401509Smrj if (trim->tr_trim_first) { 44025084Sjohnlev window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4403509Smrj window->wd_first_cookie->dmac_size = trim->tr_first_size; 4404509Smrj #if !defined(__amd64) 4405509Smrj window->wd_first_cookie->dmac_type = 4406509Smrj (window->wd_first_cookie->dmac_type & 4407509Smrj ROOTNEX_USES_COPYBUF) + window->wd_offset; 4408509Smrj #endif 4409509Smrj if (trim->tr_first_copybuf_win) { 4410509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4411509Smrj trim->tr_first_cbaddr; 4412509Smrj #if !defined(__amd64) 4413509Smrj dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4414509Smrj trim->tr_first_kaddr; 4415509Smrj #endif 4416509Smrj } 4417509Smrj } 4418509Smrj if (trim->tr_trim_last) { 44195084Sjohnlev trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4420509Smrj trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4421509Smrj if (trim->tr_last_copybuf_win) { 4422509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4423509Smrj trim->tr_last_cbaddr; 4424509Smrj #if !defined(__amd64) 4425509Smrj dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4426509Smrj trim->tr_last_kaddr; 4427509Smrj #endif 4428509Smrj } 4429509Smrj } 4430509Smrj 4431509Smrj /* 4432509Smrj * setup the cookie pointer to the first cookie in the window. setup 4433509Smrj * our return values, then increment the cookie since we return the 4434509Smrj * first cookie on the stack. 4435509Smrj */ 4436509Smrj hp->dmai_cookie = window->wd_first_cookie; 4437509Smrj *offp = window->wd_offset; 4438509Smrj *lenp = window->wd_size; 4439509Smrj *ccountp = window->wd_cookie_cnt; 4440509Smrj *cookiep = hp->dmai_cookie[0]; 4441509Smrj hp->dmai_cookie++; 4442509Smrj 4443509Smrj #if !defined(__amd64) 4444509Smrj /* re-map copybuf if required for this window */ 4445509Smrj if (dma->dp_cb_remaping) { 4446509Smrj /* 4447509Smrj * calculate the page index into the buffer where this 4448509Smrj * window starts. 4449509Smrj */ 4450509Smrj pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4451509Smrj MMU_PAGESHIFT; 4452509Smrj ASSERT(pidx < sinfo->si_max_pages); 4453509Smrj 4454509Smrj /* 4455509Smrj * the first page can get unmapped if it's shared with the 4456509Smrj * previous window. Even if the rest of this window is already 4457509Smrj * mapped in, we need to still check this one. 4458509Smrj */ 4459509Smrj pmap = &dma->dp_pgmap[pidx]; 4460509Smrj if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4461509Smrj if (pmap->pm_pp != NULL) { 4462509Smrj pmap->pm_mapped = B_TRUE; 4463509Smrj i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4464509Smrj } else if (pmap->pm_vaddr != NULL) { 4465509Smrj pmap->pm_mapped = B_TRUE; 4466509Smrj i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4467509Smrj pmap->pm_kaddr); 4468509Smrj } 4469509Smrj } 4470509Smrj pidx++; 4471509Smrj 4472509Smrj /* map in the rest of the pages if required */ 4473509Smrj if (window->wd_remap_copybuf) { 4474509Smrj window->wd_remap_copybuf = B_FALSE; 4475509Smrj 4476509Smrj /* figure out many pages this window takes up */ 4477509Smrj poff = (sinfo->si_buf_offset + window->wd_offset) & 4478509Smrj MMU_PAGEOFFSET; 4479509Smrj pcnt = mmu_btopr(window->wd_size + poff); 4480509Smrj ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4481509Smrj 4482509Smrj /* map pages which require it */ 4483509Smrj for (i = 1; i < pcnt; i++) { 4484509Smrj pmap = &dma->dp_pgmap[pidx]; 4485509Smrj if (pmap->pm_uses_copybuf) { 4486509Smrj ASSERT(pmap->pm_mapped == B_FALSE); 4487509Smrj if (pmap->pm_pp != NULL) { 4488509Smrj pmap->pm_mapped = B_TRUE; 4489509Smrj i86_pp_map(pmap->pm_pp, 4490509Smrj pmap->pm_kaddr); 4491509Smrj } else if (pmap->pm_vaddr != NULL) { 4492509Smrj pmap->pm_mapped = B_TRUE; 4493509Smrj i86_va_map(pmap->pm_vaddr, 4494509Smrj sinfo->si_asp, 4495509Smrj pmap->pm_kaddr); 4496509Smrj } 4497509Smrj } 4498509Smrj pidx++; 4499509Smrj } 4500509Smrj } 4501509Smrj } 4502509Smrj #endif 4503509Smrj 4504509Smrj /* if the new window uses the copy buffer, sync it for the device */ 4505509Smrj if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 45068215SVikram.Hegde@Sun.COM (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4507509Smrj DDI_DMA_SYNC_FORDEV); 4508509Smrj } 4509509Smrj 4510509Smrj return (DDI_SUCCESS); 4511509Smrj } 4512509Smrj 45137613SVikram.Hegde@Sun.COM /* 45147613SVikram.Hegde@Sun.COM * rootnex_dma_win() 45157613SVikram.Hegde@Sun.COM * called from ddi_dma_getwin() 45167613SVikram.Hegde@Sun.COM */ 45177613SVikram.Hegde@Sun.COM /*ARGSUSED*/ 45187613SVikram.Hegde@Sun.COM static int 45197613SVikram.Hegde@Sun.COM rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 45207613SVikram.Hegde@Sun.COM uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 45217613SVikram.Hegde@Sun.COM uint_t *ccountp) 45227613SVikram.Hegde@Sun.COM { 45237613SVikram.Hegde@Sun.COM #if !defined(__xpv) 452410216SVikram.Hegde@Sun.COM if (IOMMU_USED(rdip)) { 45257613SVikram.Hegde@Sun.COM return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp, 45267613SVikram.Hegde@Sun.COM cookiep, ccountp)); 45277613SVikram.Hegde@Sun.COM } 45287613SVikram.Hegde@Sun.COM #endif 45297613SVikram.Hegde@Sun.COM 45307613SVikram.Hegde@Sun.COM return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp, 45317613SVikram.Hegde@Sun.COM cookiep, ccountp)); 45327613SVikram.Hegde@Sun.COM } 4533509Smrj 4534509Smrj /* 4535509Smrj * ************************ 4536509Smrj * obsoleted dma routines 4537509Smrj * ************************ 4538509Smrj */ 4539509Smrj 454010216SVikram.Hegde@Sun.COM /* 454110216SVikram.Hegde@Sun.COM * rootnex_dma_map() 454210216SVikram.Hegde@Sun.COM * called from ddi_dma_setup() 454310216SVikram.Hegde@Sun.COM * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode. 454410216SVikram.Hegde@Sun.COM */ 4545509Smrj /* ARGSUSED */ 4546509Smrj static int 454710216SVikram.Hegde@Sun.COM rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 45487613SVikram.Hegde@Sun.COM struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep) 4549509Smrj { 4550509Smrj #if defined(__amd64) 4551509Smrj /* 4552509Smrj * this interface is not supported in 64-bit x86 kernel. See comment in 4553509Smrj * rootnex_dma_mctl() 4554509Smrj */ 4555509Smrj return (DDI_DMA_NORESOURCES); 4556509Smrj 4557509Smrj #else /* 32-bit x86 kernel */ 4558509Smrj ddi_dma_handle_t *lhandlep; 4559509Smrj ddi_dma_handle_t lhandle; 4560509Smrj ddi_dma_cookie_t cookie; 4561509Smrj ddi_dma_attr_t dma_attr; 4562509Smrj ddi_dma_lim_t *dma_lim; 4563509Smrj uint_t ccnt; 4564509Smrj int e; 4565509Smrj 4566509Smrj 4567509Smrj /* 4568509Smrj * if the driver is just testing to see if it's possible to do the bind, 4569509Smrj * we'll use local state. Otherwise, use the handle pointer passed in. 4570509Smrj */ 4571509Smrj if (handlep == NULL) { 4572509Smrj lhandlep = &lhandle; 4573509Smrj } else { 4574509Smrj lhandlep = handlep; 4575509Smrj } 4576509Smrj 4577509Smrj /* convert the limit structure to a dma_attr one */ 4578509Smrj dma_lim = dmareq->dmar_limits; 4579509Smrj dma_attr.dma_attr_version = DMA_ATTR_V0; 4580509Smrj dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4581509Smrj dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4582509Smrj dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4583509Smrj dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4584509Smrj dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4585509Smrj dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4586509Smrj dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4587509Smrj dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4588509Smrj dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4589509Smrj dma_attr.dma_attr_align = MMU_PAGESIZE; 4590509Smrj dma_attr.dma_attr_flags = 0; 4591509Smrj 4592509Smrj e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4593509Smrj dmareq->dmar_arg, lhandlep); 4594509Smrj if (e != DDI_SUCCESS) { 4595509Smrj return (e); 4596509Smrj } 4597509Smrj 4598509Smrj e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4599509Smrj if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4600509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4601509Smrj return (e); 4602509Smrj } 4603509Smrj 4604509Smrj /* 4605509Smrj * if the driver is just testing to see if it's possible to do the bind, 4606509Smrj * free up the local state and return the result. 4607509Smrj */ 4608509Smrj if (handlep == NULL) { 4609509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4610509Smrj (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4611509Smrj if (e == DDI_DMA_MAPPED) { 4612509Smrj return (DDI_DMA_MAPOK); 46130Sstevel@tonic-gate } else { 4614509Smrj return (DDI_DMA_NOMAPPING); 4615509Smrj } 4616509Smrj } 4617509Smrj 4618509Smrj return (e); 4619509Smrj #endif /* defined(__amd64) */ 4620509Smrj } 4621509Smrj 46227613SVikram.Hegde@Sun.COM /* 462310216SVikram.Hegde@Sun.COM * rootnex_dma_mctl() 462410216SVikram.Hegde@Sun.COM * 462510216SVikram.Hegde@Sun.COM * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode. 46267613SVikram.Hegde@Sun.COM */ 46277613SVikram.Hegde@Sun.COM /* ARGSUSED */ 46287613SVikram.Hegde@Sun.COM static int 462910216SVikram.Hegde@Sun.COM rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4630509Smrj enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4631509Smrj uint_t cache_flags) 4632509Smrj { 4633509Smrj #if defined(__amd64) 4634509Smrj /* 4635509Smrj * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4636509Smrj * common implementation in genunix, so they no longer have x86 4637509Smrj * specific functionality which called into dma_ctl. 4638509Smrj * 4639509Smrj * The rest of the obsoleted interfaces were never supported in the 4640509Smrj * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4641509Smrj * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4642509Smrj * implementation issues. 4643509Smrj * 4644509Smrj * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4645509Smrj * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4646509Smrj * reflect that now too... 4647509Smrj * 4648509Smrj * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4649509Smrj * not going to put this functionality into the 64-bit x86 kernel now. 4650509Smrj * It wasn't ported to the 64-bit kernel for s10, no reason to change 4651509Smrj * that in a future release. 4652509Smrj */ 4653509Smrj return (DDI_FAILURE); 4654509Smrj 4655509Smrj #else /* 32-bit x86 kernel */ 4656509Smrj ddi_dma_cookie_t lcookie; 4657509Smrj ddi_dma_cookie_t *cookie; 4658509Smrj rootnex_window_t *window; 4659509Smrj ddi_dma_impl_t *hp; 4660509Smrj rootnex_dma_t *dma; 4661509Smrj uint_t nwin; 4662509Smrj uint_t ccnt; 4663509Smrj size_t len; 4664509Smrj off_t off; 4665509Smrj int e; 4666509Smrj 4667509Smrj 4668509Smrj /* 4669509Smrj * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4670509Smrj * hacky since were optimizing for the current interfaces and so we can 4671509Smrj * cleanup the mess in genunix. Hopefully we will remove the this 4672509Smrj * obsoleted routines someday soon. 4673509Smrj */ 4674509Smrj 4675509Smrj switch (request) { 4676509Smrj 4677509Smrj case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4678509Smrj hp = (ddi_dma_impl_t *)handle; 4679509Smrj cookie = (ddi_dma_cookie_t *)objpp; 4680509Smrj 4681509Smrj /* 4682509Smrj * convert segment to cookie. We don't distinguish between the 4683509Smrj * two :-) 4684509Smrj */ 4685509Smrj *cookie = *hp->dmai_cookie; 4686509Smrj *lenp = cookie->dmac_size; 4687509Smrj *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4688509Smrj return (DDI_SUCCESS); 4689509Smrj 4690509Smrj case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4691509Smrj hp = (ddi_dma_impl_t *)handle; 4692509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4693509Smrj 4694509Smrj if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4695509Smrj return (DDI_DMA_STALE); 46960Sstevel@tonic-gate } 4697509Smrj 4698509Smrj /* handle the case where we don't have any windows */ 4699509Smrj if (dma->dp_window == NULL) { 4700509Smrj /* 4701509Smrj * if seg == NULL, and we don't have any windows, 4702509Smrj * return the first cookie in the sgl. 4703509Smrj */ 4704509Smrj if (*lenp == NULL) { 4705509Smrj dma->dp_current_cookie = 0; 4706509Smrj hp->dmai_cookie = dma->dp_cookies; 4707509Smrj *objpp = (caddr_t)handle; 4708509Smrj return (DDI_SUCCESS); 4709509Smrj 4710509Smrj /* if we have more cookies, go to the next cookie */ 4711509Smrj } else { 4712509Smrj if ((dma->dp_current_cookie + 1) >= 4713509Smrj dma->dp_sglinfo.si_sgl_size) { 4714509Smrj return (DDI_DMA_DONE); 4715509Smrj } 4716509Smrj dma->dp_current_cookie++; 4717509Smrj hp->dmai_cookie++; 4718509Smrj return (DDI_SUCCESS); 4719509Smrj } 4720509Smrj } 4721509Smrj 4722509Smrj /* We have one or more windows */ 4723509Smrj window = &dma->dp_window[dma->dp_current_win]; 4724509Smrj 4725509Smrj /* 4726509Smrj * if seg == NULL, return the first cookie in the current 4727509Smrj * window 4728509Smrj */ 4729509Smrj if (*lenp == NULL) { 4730509Smrj dma->dp_current_cookie = 0; 4731683Smrj hp->dmai_cookie = window->wd_first_cookie; 4732509Smrj 4733509Smrj /* 4734509Smrj * go to the next cookie in the window then see if we done with 4735509Smrj * this window. 4736509Smrj */ 4737509Smrj } else { 4738509Smrj if ((dma->dp_current_cookie + 1) >= 4739509Smrj window->wd_cookie_cnt) { 4740509Smrj return (DDI_DMA_DONE); 4741509Smrj } 4742509Smrj dma->dp_current_cookie++; 4743509Smrj hp->dmai_cookie++; 4744509Smrj } 4745509Smrj *objpp = (caddr_t)handle; 4746509Smrj return (DDI_SUCCESS); 4747509Smrj 4748509Smrj case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4749509Smrj hp = (ddi_dma_impl_t *)handle; 4750509Smrj dma = (rootnex_dma_t *)hp->dmai_private; 4751509Smrj 4752509Smrj if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4753509Smrj return (DDI_DMA_STALE); 4754509Smrj } 4755509Smrj 4756509Smrj /* if win == NULL, return the first window in the bind */ 4757509Smrj if (*offp == NULL) { 4758509Smrj nwin = 0; 4759509Smrj 4760509Smrj /* 4761509Smrj * else, go to the next window then see if we're done with all 4762509Smrj * the windows. 4763509Smrj */ 4764509Smrj } else { 4765509Smrj nwin = dma->dp_current_win + 1; 4766509Smrj if (nwin >= hp->dmai_nwin) { 4767509Smrj return (DDI_DMA_DONE); 4768509Smrj } 4769509Smrj } 4770509Smrj 4771509Smrj /* switch to the next window */ 4772509Smrj e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4773509Smrj &lcookie, &ccnt); 4774509Smrj ASSERT(e == DDI_SUCCESS); 4775509Smrj if (e != DDI_SUCCESS) { 4776509Smrj return (DDI_DMA_STALE); 4777509Smrj } 4778509Smrj 4779509Smrj /* reset the cookie back to the first cookie in the window */ 4780509Smrj if (dma->dp_window != NULL) { 4781509Smrj window = &dma->dp_window[dma->dp_current_win]; 4782509Smrj hp->dmai_cookie = window->wd_first_cookie; 4783509Smrj } else { 4784509Smrj hp->dmai_cookie = dma->dp_cookies; 4785509Smrj } 4786509Smrj 4787509Smrj *objpp = (caddr_t)handle; 4788509Smrj return (DDI_SUCCESS); 4789509Smrj 4790509Smrj case DDI_DMA_FREE: /* ddi_dma_free() */ 4791509Smrj (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4792509Smrj (void) rootnex_dma_freehdl(dip, rdip, handle); 4793509Smrj if (rootnex_state->r_dvma_call_list_id) { 4794509Smrj ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4795509Smrj } 4796509Smrj return (DDI_SUCCESS); 4797509Smrj 4798509Smrj case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4799509Smrj case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4800509Smrj /* should never get here, handled in genunix */ 4801509Smrj ASSERT(0); 4802509Smrj return (DDI_FAILURE); 4803509Smrj 4804509Smrj case DDI_DMA_KVADDR: 4805509Smrj case DDI_DMA_GETERR: 4806509Smrj case DDI_DMA_COFF: 4807509Smrj return (DDI_FAILURE); 48080Sstevel@tonic-gate } 4809509Smrj 4810509Smrj return (DDI_FAILURE); 4811509Smrj #endif /* defined(__amd64) */ 48120Sstevel@tonic-gate } 48131414Scindi 48147613SVikram.Hegde@Sun.COM /* 48151865Sdilpreet * ********* 48161865Sdilpreet * FMA Code 48171865Sdilpreet * ********* 48181865Sdilpreet */ 48191865Sdilpreet 48201865Sdilpreet /* 48211865Sdilpreet * rootnex_fm_init() 48221865Sdilpreet * FMA init busop 48231865Sdilpreet */ 48241865Sdilpreet /* ARGSUSED */ 48251865Sdilpreet static int 48261865Sdilpreet rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 48271865Sdilpreet ddi_iblock_cookie_t *ibc) 48281865Sdilpreet { 48291865Sdilpreet *ibc = rootnex_state->r_err_ibc; 48301865Sdilpreet 48311865Sdilpreet return (ddi_system_fmcap); 48321865Sdilpreet } 48331865Sdilpreet 48341865Sdilpreet /* 48351865Sdilpreet * rootnex_dma_check() 48361865Sdilpreet * Function called after a dma fault occurred to find out whether the 48371865Sdilpreet * fault address is associated with a driver that is able to handle faults 48381865Sdilpreet * and recover from faults. 48391865Sdilpreet */ 48401865Sdilpreet /* ARGSUSED */ 48411414Scindi static int 48421865Sdilpreet rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 48431865Sdilpreet const void *not_used) 48441414Scindi { 48451865Sdilpreet rootnex_window_t *window; 48461865Sdilpreet uint64_t start_addr; 48471865Sdilpreet uint64_t fault_addr; 48481865Sdilpreet ddi_dma_impl_t *hp; 48491865Sdilpreet rootnex_dma_t *dma; 48501865Sdilpreet uint64_t end_addr; 48511865Sdilpreet size_t csize; 48521865Sdilpreet int i; 48531865Sdilpreet int j; 48541865Sdilpreet 48551865Sdilpreet 48561865Sdilpreet /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 48571865Sdilpreet hp = (ddi_dma_impl_t *)handle; 48581865Sdilpreet ASSERT(hp); 48591865Sdilpreet 48601865Sdilpreet dma = (rootnex_dma_t *)hp->dmai_private; 48611865Sdilpreet 48621865Sdilpreet /* Get the address that we need to search for */ 48631865Sdilpreet fault_addr = *(uint64_t *)addr; 48641865Sdilpreet 48651865Sdilpreet /* 48661865Sdilpreet * if we don't have any windows, we can just walk through all the 48671865Sdilpreet * cookies. 48681865Sdilpreet */ 48691865Sdilpreet if (dma->dp_window == NULL) { 48701865Sdilpreet /* for each cookie */ 48711865Sdilpreet for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 48721865Sdilpreet /* 48731865Sdilpreet * if the faulted address is within the physical address 48741865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 48751865Sdilpreet */ 48761865Sdilpreet if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 48771865Sdilpreet (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 48781865Sdilpreet dma->dp_cookies[i].dmac_size))) { 48791865Sdilpreet return (DDI_FM_NONFATAL); 48801865Sdilpreet } 48811865Sdilpreet } 48821865Sdilpreet 48831865Sdilpreet /* fault_addr not within this DMA handle */ 48841865Sdilpreet return (DDI_FM_UNKNOWN); 48851865Sdilpreet } 48861865Sdilpreet 48871865Sdilpreet /* we have mutiple windows, walk through each window */ 48881865Sdilpreet for (i = 0; i < hp->dmai_nwin; i++) { 48891865Sdilpreet window = &dma->dp_window[i]; 48901865Sdilpreet 48911865Sdilpreet /* Go through all the cookies in the window */ 48921865Sdilpreet for (j = 0; j < window->wd_cookie_cnt; j++) { 48931865Sdilpreet 48941865Sdilpreet start_addr = window->wd_first_cookie[j].dmac_laddress; 48951865Sdilpreet csize = window->wd_first_cookie[j].dmac_size; 48961865Sdilpreet 48971865Sdilpreet /* 48981865Sdilpreet * if we are trimming the first cookie in the window, 48991865Sdilpreet * and this is the first cookie, adjust the start 49001865Sdilpreet * address and size of the cookie to account for the 49011865Sdilpreet * trim. 49021865Sdilpreet */ 49031865Sdilpreet if (window->wd_trim.tr_trim_first && (j == 0)) { 49041865Sdilpreet start_addr = window->wd_trim.tr_first_paddr; 49051865Sdilpreet csize = window->wd_trim.tr_first_size; 49061865Sdilpreet } 49071865Sdilpreet 49081865Sdilpreet /* 49091865Sdilpreet * if we are trimming the last cookie in the window, 49101865Sdilpreet * and this is the last cookie, adjust the start 49111865Sdilpreet * address and size of the cookie to account for the 49121865Sdilpreet * trim. 49131865Sdilpreet */ 49141865Sdilpreet if (window->wd_trim.tr_trim_last && 49151865Sdilpreet (j == (window->wd_cookie_cnt - 1))) { 49161865Sdilpreet start_addr = window->wd_trim.tr_last_paddr; 49171865Sdilpreet csize = window->wd_trim.tr_last_size; 49181865Sdilpreet } 49191865Sdilpreet 49201865Sdilpreet end_addr = start_addr + csize; 49211865Sdilpreet 49221865Sdilpreet /* 49231865Sdilpreet * if the faulted address is within the physical address 49241865Sdilpreet * range of the cookie, return DDI_FM_NONFATAL. 49251865Sdilpreet */ 49261865Sdilpreet if ((fault_addr >= start_addr) && 49271865Sdilpreet (fault_addr <= end_addr)) { 49281865Sdilpreet return (DDI_FM_NONFATAL); 49291865Sdilpreet } 49301865Sdilpreet } 49311865Sdilpreet } 49321865Sdilpreet 49331865Sdilpreet /* fault_addr not within this DMA handle */ 49341865Sdilpreet return (DDI_FM_UNKNOWN); 49351414Scindi } 4936