1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 1999,2001-2002 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _PCSER_VAR_H 28 #define _PCSER_VAR_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #define PCSER_DEBUG_LOWMASK 0x0000000ff 37 #define PCSER_DEBUG_DEFAULT 0x000000100 38 #define PCSER_DEBUG_POLL 0x000000200 39 #define PCSER_DEBUG_XMIT 0x000000400 40 #define PCSER_DEBUG_RCV 0x000000800 41 #define PCSER_DEBUG_MODEM 0x000001000 42 #define PCSER_DEBUG_RCVEX 0x000002000 43 #define PCSER_DEBUG_CIS 0x000004000 44 #define PCSER_DEBUG_CIS_SCFT 0x000008000 /* sorted cftable */ 45 #define PCSER_DEBUG_CIS_UCFT 0x000010000 /* unsorted cftable */ 46 #define PCSER_DEBUG_RTSCTS 0x000020000 47 #define PCSER_DEBUG_DRAINSILO 0x000040000 48 #define PCSER_DEBUG_PARAM 0x000080000 49 #define PCSER_DEBUG_READY 0x000100000 50 #define PCSER_DEBUG_MANUSPEC 0x000200000 51 #define PCSER_DEBUG_READY_DELAY 0x000400000 52 #define PCSER_DEBUG_CISVARS 0x000800000 53 #define PCSER_DEBUG_SOFTINT 0x001000000 54 55 /* #define DEBUG_PCSERIOCTL */ 56 57 /* 58 * Values for CS_EVENT_CLIENT_INFO event handler 59 */ 60 #define PCSER_CLIENT_DESCRIPTION "PCMCIA serial/modem card driver" 61 #define PCSER_VENDOR_DESCRIPTION CS_SUN_VENDOR_DESCRIPTION 62 #define PCSER_REV_LEVEL 0x100 63 #define PCSER_REV_DAY 31 64 #define PCSER_REV_MONTH 3 65 #define PCSER_REV_YEAR 16 66 #define PCSER_REV_DATE CS_CLIENT_INFO_MAKE_DATE( \ 67 PCSER_REV_DAY, \ 68 PCSER_REV_MONTH, \ 69 PCSER_REV_YEAR) 70 71 /* 72 * Private data structures for PCMCIA async serial communications cards 73 * and modems using the 8250-type UART. 74 * 75 * various device things 76 */ 77 #define PCSER_NAME "pcser" /* driver name */ 78 #define PCSER_SOCKET(dev) (getminor(dev) & 0x3f) 79 #define PCSER_OUTLINE(dev) (getminor(dev) & 0x80) 80 #define PCSER_CONTROL_LINE(dev) (getminor(dev) & 0x40) 81 #define N_PCSER 2 /* hint to ddi_soft_state_init() */ 82 #define USE_CCSR(L) (L->cis_vars.present & \ 83 CONFIG_STATUS_REG_PRESENT) 84 #define MAX_TX_BUF_SIZE 64 85 86 #define PCSER_HIMUTEX_ENTER(pcser) {mutex_enter(&(pcser)->event_hilock);\ 87 mutex_enter((pcser)->pcser_mutex); } 88 #define PCSER_HIMUTEX_EXIT(pcser) {mutex_exit((pcser)->pcser_mutex); \ 89 mutex_exit(&(pcser)->event_hilock); } 90 91 #ifdef CBAUDEXT 92 #define PCSER_DUALHW_FLOW "pcser_use_dualflow" 93 #endif 94 #ifndef CBAUDEXT 95 #define PCSER_HIGHSPEED_PROP "pcser_use_hispeed" 96 #endif 97 98 /* 99 * These macros return device minor numbers given a socket number. 100 */ 101 #define PCSER_DINODE(skt) (skt & 0x3f) /* dial-in */ 102 #define PCSER_DONODE(skt) ((skt & 0x3f) | 0x80) /* dial-out */ 103 #define PCSER_CTLNODE(skt) ((skt & 0x3f) | 0x40) /* control */ 104 105 /* 106 * The driver uses a two-level interrupt scheme; the hardware interrupts 107 * at a high level, and the driver schedules a softint on a lower 108 * level to deal with the STREAMS processing. 109 */ 110 #define PCSER_SOFT_PREF DDI_SOFTINT_MED /* soft interrupt level */ 111 112 /* 113 * some general sizing and enumeration constants 114 * the silo sizes are the same for both the cd180 and the ppc, and are 115 * located in pcserio.h as PCSER_SILOSIZE 116 * the TXBUF sizes determine how many characters pcser_start() will try to 117 * stuff into the soft tx buffers in the line struct. you should leave 118 * PCSER_TXBUFSIZE at 8 since the interrupt handler for the cd180 doesn't 119 * know what to do if it gets larger. 120 * PPC_TXBUFSIZE is made a little larger since the ppc interrupt handler 121 * is smart enough to take data from the soft tx buffer if there is any 122 * both PCSER_TXBUFSIZE and PPC_TXBUFSIZE must be <= to LINE_TXBUFSIZE 123 */ 124 /* when to disable RTS if we're using CTS/RTS flow control */ 125 #define PCSER_HIWATER 960 126 /* when to enable RTS if we're using CTS/RTS flow control */ 127 #define PCSER_LOWWATER 300 128 /* default STREAMS buffer size in pcser_drainsilo() */ 129 #define PCSER_DRAIN_BSIZE 16 130 131 /* 132 * If CRTSXOFF is not defined, then we're probably being built on 133 * a pre-2.5 kernel, so alias CRTSXOFF to CRTSCTS. This will 134 * cause the driver to treat CRTSCTS as a bidirectional flow 135 * control enable bit rather than a unidirectional flow control 136 * enable bit as it is in 2.5 and above. 137 */ 138 #ifndef CRTSXOFF 139 #define CRTSXOFF CRTSCTS 140 #endif 141 142 /* 143 * The number of unidentified IRQ's that we allow before we 144 * shut down the card. 145 */ 146 #define PCSER_UNID_IRQ_MAX 10 /* max unknown IRQs */ 147 148 /* 149 * The number of different possible line speeds (not all of which 150 * may be supported) 151 */ 152 #define PCSER_MAX_SPEEDS 23 /* max baud rates we support */ 153 154 /* 155 * timeout and timing parameters 156 * 157 * serial lines 158 * NQFRETRY and QFRETRYTIME are used in pcser_drainsilo() 159 */ 160 #define MS2HZ(time) drv_usectohz(time * 1000) 161 /* CSTYLED */ 162 #define PCSER_TIMEOUT (MS2HZ(15000)) /* ctrl lines in close */ 163 /* CSTYLED */ 164 #define PCSER_IGNORE_CD_TIMEOUT 3000 /* ignore CD in mS */ 165 /* CSTYLED */ 166 #define NQFRETRY 26 /* put tries to receive q */ 167 /* CSTYLED */ 168 #define QFRETRYTIME (MS2HZ( 100)) /* queue retry */ 169 /* CSTYLED */ 170 #define BREAK1_TIMEOUT (MS2HZ( 90)) /* 90mS pre-BREAK */ 171 /* CSTYLED */ 172 #define BREAK2_TIMEOUT (MS2HZ( 350)) /* 350mS BREAK */ 173 /* CSTYLED */ 174 #define DRAIN_TIMEOUT (MS2HZ( 10)) /* 10mS DRAIN */ 175 /* CSTYLED */ 176 #define PCSER_READY_TIMEOUT (MS2HZ( 6000)) /* card ready */ 177 /* CSTYLED */ 178 #define PCSER_READYWAIT_TIMEOUT (MS2HZ(20000)) /* wait for ready in attach */ 179 /* CSTYLED */ 180 #define PCSER_DTR_DROP_DELAY (MS2HZ( 200)) /* delay around DTR drop */ 181 182 /* 183 * The next two items are used in pcser_card_insertion() to handle 184 * cards that require a delay after resetting and after 185 * configuring the card. 186 * 187 * PCSER_INSERT_READY_TMO1 - time to wait between checking READY before 188 * doing a RequestConfiguration 189 * PCSER_INSERT_READY_TMO2 - time to wait between checking READY after 190 * doing a RequestConfiguration 191 */ 192 /* CSTYLED */ 193 #define PCSER_INSERT_READY_TMO1 (MS2HZ(20)) /* ready wait in card_insert */ 194 #define PCSER_INSERT_READY_TMO2 (MS2HZ(200)) /* ready wait in card_insert */ 195 #define PCSER_INSERT_READY_CNT 5 /* max times to try */ 196 197 /* 198 * UNTIMEOUT() macro to make sure we're not trying untimeout a bogus timeout 199 */ 200 #define UNTIMEOUT(utt) { \ 201 if (utt) { \ 202 (void) untimeout(utt); \ 203 utt = 0; \ 204 } \ 205 } 206 207 /* 208 * XXX card present macro 209 */ 210 #define CARD_PRESENT(pm) ((pm)->card_state & PCSER_CARD_INSERTED) 211 212 #define CARD_INSERT_CHECK(pm) \ 213 ((pm)->card_state & (PCSER_CARD_INSERTED | PCSER_READY_ERR)) 214 215 /* 216 * user-level audio control - note that we overload the TIOCMBIS and 217 * TIOCMBIC ioctls by using the TIOCM_SR bit to control 218 * the audio signal from the modem to the system speaker XXX 219 */ 220 #define TIOCM_AUDIO TIOCM_SR 221 #define AUDIO_GET(L) (((L->saved_state) & PCSER_AUDIO_ON)?1:0) 222 223 /* 224 * for modem_init() 225 */ 226 #define MODEM_SET_AUDIO_ON 1 /* enable card audio */ 227 #define MODEM_SET_AUDIO_OFF 2 /* disable card audio */ 228 #define MODEM_FIFO_FLUSH 3 /* flush Tx and Rx FIFOs */ 229 230 /* 231 * UART defines 232 */ 233 234 /* 235 * IIR - interrupt identification register 236 */ 237 #define IIR_MASK 0x007 /* the only bits of interest */ 238 #define MODEM_CHANGE 0x000 239 #define XMIT_DATA 0x002 240 #define RCV_DATA 0x004 241 #define RCV_EXP 0x006 242 #define IIR_PENDING 0x001 /* note: 0 == pending!! */ 243 244 /* 245 * IER - interrupt enable register 246 */ 247 #define RX_DATA_E 0x001 /* receive data */ 248 #define TX_READY_E 0x002 /* transmitter empty */ 249 #define TX_EMPTY_E 0x002 /* transmitter empty */ 250 #define RX_EXCEPTION_E 0x004 /* receive exception (line status) */ 251 #define MODEM_CHANGE_E 0x008 /* modem lines changed state */ 252 253 /* 254 * LSR - line status register 255 */ 256 #define RX_DATA_AVAIL 0x001 /* char available */ 257 #define RX_OVERRUN 0x002 /* overrun error */ 258 #define RX_PARITY 0x004 /* parity error */ 259 #define RX_FRAMING 0x008 /* framing error */ 260 #define RX_BREAK 0x010 /* BREAK detected */ 261 #define TX_THR_EMPTY 0x020 /* THR empty */ 262 #define TX_SHIFT_EMPTY 0x040 /* Tx shift register empty */ 263 264 /* 265 * MCR - modem control register 266 */ 267 #define DTR_ON_MCR 0x001 268 #define RTS_ON_MCR 0x002 269 #define OUT1_ON_MCR 0x004 270 #define OUT2_ON_MCR 0x008 271 #define LOOP_ON_MCR 0x010 272 273 /* 274 * MSR - modem status register 275 */ 276 #define CTS_CHANGE 0x001 277 #define DSR_CHANGE 0x002 278 #define RI_CHANGE 0x004 279 #define CD_CHANGE 0x008 280 #define CTS_ON_MSR 0x010 281 #define DSR_ON_MSR 0x020 282 #define RI_ON_MSR 0x040 283 #define CD_ON_MSR 0x080 284 285 /* 286 * LCR - line control register 287 */ 288 #define CHAR_5 0x00 289 #define CHAR_6 0x01 290 #define CHAR_7 0x02 291 #define CHAR_8 0x03 292 293 #define STOP_1 0x00 294 #define STOP_15 0x04 295 #define STOP_2 0x04 296 297 #define USE_P 0x08 298 #define ODD_P 0x00 299 #define EVEN_P 0x10 300 301 #define MARK_P 0x00 302 #define SPACE_P 0x20 303 304 #define IGNORE_P 0x000 /* XXX ?? */ 305 306 #define SET_BREAK 0x040 307 #define DLAB 0x080 308 309 /* 310 * DTR latch values 311 */ 312 #define DTR_OFF_SHADOW 0x000 /* drop DTR */ 313 #define DTR_ON_SHADOW 0x001 /* assert DTR */ 314 315 /* 316 * macros to get/set the shadow state of the line's DTR pin 317 */ 318 #define DTR_GET(L) (((L->dtr_shadow)&DTR_ON_SHADOW)?1:0) 319 #define DTR_SET(L, S) (L->dtr_shadow = S) 320 321 /* 322 * define driver defaults for all the serial lines; these can be manipulated 323 * via the PCSER_SDEFAULTS/PCSER_GDEFAULTS ioctl()'s; see "pcserio.h" 324 */ 325 /* assert DTR on open, use zs DTR semantics on close */ 326 #define SDFLAGS DTR_ASSERT 327 #define CFLAGS (CS8|CREAD|HUPCL) /* UNIX line flags in t_cflag */ 328 #define RX_BAUD B9600 /* default receiver baud rate */ 329 #define TX_BAUD B9600 /* default transmitter baud rate */ 330 331 /* 332 * all the bytes we get from the modem get put into a soft silo before being 333 * handed off to STREAMS; the following macros handle the RTS line if 334 * we're using CTS/RTS flow control: 335 * CHECK_RTS_OFF(line) should be called by the Rx interrupt handler for 336 * each character put into the soft silo; if the soft silo nears 337 * full, RTS will be deasserted 338 * CHECK_RTS_ON(line) should be called by the soft interrupt soft silo 339 * drain code; once the soft silo level has gone below the low 340 * water mark, RTS will be asserted 341 * FLUSHSILO(line) is used to flush the silo in case there's an error 342 * PUTSILO(line,char) puts a character into the soft silo and calls 343 * CHECK_RTS_OFF(line) to see if RTS should be deasserted 344 */ 345 #ifdef USE_MACRO_RTSCTS 346 #define CHECK_RTS_OFF(line) { \ 347 if (line->pcser_ttycommon.t_cflag & CRTSXOFF) { \ 348 if (line->pcser_sscnt > line->pcser_hiwater) \ 349 OUTB(&line->regs->mcr, \ 350 (INB(&line->regs->mcr) & ~RTS_ON_MCR)); \ 351 } \ 352 } 353 #define CHECK_RTS_ON(line) { \ 354 if (line->pcser_ttycommon.t_cflag & CRTSXOFF) { \ 355 if (line->pcser_sscnt < line->pcser_lowwater) \ 356 OUTB(&line->regs->mcr, \ 357 (INB(&line->regs->mcr) | RTS_ON_MCR)); \ 358 } \ 359 } 360 #endif /* USE_MACRO_RTSCTS */ 361 362 #ifdef PX_IFLUSH_DEBUG 363 364 #define FLUSHSILO(zline) { \ 365 cmn_err(CE_CONT, "pcser_FLUSHSILO: socket %d flushing soft silo\n", \ 366 (int)zline->pcser->sn); \ 367 zline->pcser_source = zline->pcser_sink = zline->pcser_ssilo; \ 368 zline->pcser_sscnt = 0; \ 369 } 370 371 #else 372 373 #define FLUSHSILO(line) { \ 374 line->pcser_source = line->pcser_sink = line->pcser_ssilo; \ 375 line->pcser_sscnt = 0; \ 376 } 377 378 #endif /* PX_IFLUSH_DEBUG */ 379 380 #define PUTSILO(zline, c) { \ 381 if (zline->pcser_sscnt < PCSER_SILOSIZE) { \ 382 zline->pcser_sscnt++;\ 383 if (zline->pcser_source == &zline->pcser_ssilo[PCSER_SILOSIZE]) \ 384 zline->pcser_source = zline->pcser_ssilo;\ 385 *zline->pcser_source++ = c; \ 386 CHECK_RTS_OFF(zline); \ 387 } else { \ 388 FLUSHSILO(zline); \ 389 CHECK_RTS_ON(zline); \ 390 cmn_err(CE_CONT, "pcser: socket %d soft silo overflow\n", \ 391 (int)zline->pcser->sn); \ 392 } \ 393 } 394 395 /* 396 * pcser_cftable_t and pcser_cftable_params_t structures are used 397 * to store values from the CISTPL_CFTABLE_ENTRY tuples. 398 */ 399 typedef struct pcser_cftable_params_t { 400 uchar_t config_index; 401 uint32_t addr_lines; /* IO addr lines decoded */ 402 uint32_t length; /* length of IO range */ 403 uint32_t pin; /* PRR bits valid mask */ 404 unsigned modem_vcc; 405 unsigned modem_vpp1; 406 unsigned modem_vpp2; 407 uint32_t modem_base; /* base of UART registers */ 408 } pcser_cftable_params_t; 409 410 typedef struct pcser_cftable_t { 411 uint32_t desireability; /* desireability factor */ 412 pcser_cftable_params_t p; /* parameters */ 413 struct pcser_cftable_t *prev; 414 struct pcser_cftable_t *next; 415 } pcser_cftable_t; 416 417 /* 418 * pcser_cis_vars_t structure used to save interesting information 419 * gleaned from the CIS. 420 * The configuration registers present flags are defined in the Card 421 * Services header files. 422 */ 423 typedef struct pcser_cis_vars_t { 424 uint32_t flags; /* general capability flags */ 425 uint32_t present; /* config register present flags */ 426 char prod_strings[CISTPL_VERS_1_MAX_PROD_STRINGS] 427 [CIS_MAX_TUPLE_DATA_LEN]; 428 uint32_t major_revision; /* card major revision level */ 429 uint32_t minor_revision; /* card minor revision level */ 430 uint32_t manufacturer_id; /* manufacturer ID */ 431 uint32_t card_id; /* card ID */ 432 uint32_t config_base; /* base offset of config registers */ 433 /* resource configuration */ 434 uchar_t config_index; 435 uint32_t addr_lines; /* IO addr lines decoded */ 436 uint32_t length; /* length of IO range */ 437 uint32_t pin; /* PRR bits valid mask */ 438 unsigned modem_vcc; 439 unsigned modem_vpp1; 440 unsigned modem_vpp2; 441 uint32_t modem_base; /* base of UART registers */ 442 /* UART features */ 443 uint32_t txbufsize; /* Tx FIFO buffer size */ 444 uint32_t rxbufsize; /* Rx FIFO buffer size */ 445 uchar_t fifo_enable; /* Tx/Rx FIFO enable code */ 446 uchar_t fifo_disable; /* Tx/Rx FIFO disable code */ 447 uchar_t auto_rts; /* Auto RTS enable code */ 448 uchar_t auto_cts; /* Auto CTS enable code */ 449 uint32_t ready_delay_1; /* READY delay before config in mS */ 450 uint32_t ready_delay_2; /* READY delay after config in mS */ 451 pcser_cftable_t cftable; /* active CFTABLE_ENTRY values */ 452 } pcser_cis_vars_t; 453 454 /* 455 * Flgas for pcser_cis_vars_t.flags field 456 */ 457 #define PCSER_FIFO_ENABLE 0x00000001 /* fifo_enable code OK */ 458 #define PCSER_FIFO_DISABLE 0x00000002 /* fifo_disable code OK */ 459 #define PCSER_AUTO_RTS 0x00000004 /* auto_rts enable code OK */ 460 #define PCSER_AUTO_CTS 0x00000008 /* auto_cts enable code OK */ 461 462 /* 463 * Per line structure 464 * there is one of these for each serial line plus one more for 465 * the ppc. 466 */ 467 typedef struct pcser_line_t { 468 /* stuff common to both the cd180 and the ppc */ 469 unsigned state; /* various state flags */ 470 unsigned flags; /* default mode flags */ 471 unsigned saved_state; /* saved over open/close */ 472 acc_handle_t handle; /* modem registers handle */ 473 pcser_cis_vars_t cis_vars; 474 timeout_id_t pcser_timeout_id; /* timeout id */ 475 timeout_id_t pcser_draintimeout_id; /* timeout id */ 476 timeout_id_t ignore_cd_timeout_id; /* timeout id */ 477 timeout_id_t restart_timeout_id; /* timeout id */ 478 int pcser_ignore_cd_time; /* ignore CD in mS */ 479 struct pcser_unit_t *pcser; 480 kcondvar_t cvp; 481 kmutex_t line_mutex; 482 uchar_t dtr_shadow; /* shadow of DTR latch */ 483 uchar_t pcser_flowc; /* flow control character */ 484 int pcser_max_txbufsize; /* soft Tx buf size */ 485 int pcser_txbufsize; /* soft Tx buf size */ 486 int pcser_rxfifo_size; /* size of Rx FIFO */ 487 uchar_t *pcser_txbuf; /* soft tx buffer */ 488 int pcser_txcount; /* num chars in pcser_txbuf */ 489 int pcser_silosize; /* size of rx silo */ 490 int pcser_sscnt; /* silo count */ 491 uchar_t *pcser_source; /* silo source */ 492 uchar_t *pcser_sink; /* silo sink */ 493 uchar_t pcser_ssilo[PCSER_SILOSIZE]; /* soft silo */ 494 int pcser_qfcnt; /* queue full retry count */ 495 bufcall_id_t pcser_wbufcid; /* write-side bufcall id */ 496 /* stuff that affects the reception of data */ 497 int drain_size; /* buf size pcser_drainsilo */ 498 int pcser_hiwater; /* high water mark CHECK_RTS */ 499 int pcser_lowwater; /* low water mark CHECK_RTS */ 500 int rx_fifo_thld; /* cd-180 RxFIFO threshold */ 501 struct pcser_stats_t pcser_stats; /* support PCSER_GSTATS ioctl */ 502 tty_common_t pcser_ttycommon; /* common tty stuff */ 503 } pcser_line_t; 504 505 /* 506 * flags in pcser_line_t.state field 507 */ 508 #define PCSER_WOPEN 0x00000001 /* wait for open to complete */ 509 #define PCSER_ISOPEN 0x00000002 /* open is complete */ 510 #define PCSER_OUT 0x00000004 /* line used for dialout */ 511 #define PCSER_CARR_ON 0x00000008 /* CD on last time we looked */ 512 #define PCSER_RTSOFF_MESSAGE 0x00000010 513 #define PCSER_STOPPED 0x00000020 /* output is stopped */ 514 #define PCSER_DELAY 0x00000040 /* waiting for delay */ 515 #define PCSER_BREAK 0x00000080 /* waiting for break */ 516 #define PCSER_BUSY 0x00000100 /* waiting for transmission */ 517 #define PCSER_FLUSH 0x00000200 /* flushing Tx output */ 518 #define PCSER_OPEN_READY 0x00000400 /* ready for IRQs in open */ 519 #define PCSER_WCLOSE 0x00000800 /* wakeup from close in open */ 520 #define PCSER_XWAIT 0x00001000 /* waiting for xmtr to drain */ 521 #define PCSER_IXOFF 0x00002000 /* using s/w Rx flow control */ 522 #define PCSER_CANWAIT 0x00004000 /* pcser_drainsilo waiting */ 523 #define PCSER_CONTROL 0x00008000 /* control line */ 524 #define PCSER_SBREAK 0x00010000 /* start BREAK */ 525 #define PCSER_EBREAK 0x00020000 /* end BREAK */ 526 #define PCSER_ISROOT 0x00040000 /* line was root at open */ 527 #define PCSER_CTSWAIT 0x00080000 /* wait for CTS for next Tx */ 528 /* flags used with pcser_softint() */ 529 #define PCSER_TXWORK 0x00100000 /* Tx work to do */ 530 #define PCSER_RXWORK 0x00200000 /* Rx work to do */ 531 #define PCSER_CVBROADCAST 0x00400000 /* need a cv_broadcast */ 532 #define PCSER_UNTIMEOUT 0x00800000 /* need an untimeout */ 533 #define PCSER_MHANGUP 0x01000000 /* send M_HANGUP message */ 534 #define PCSER_MUNHANGUP 0x02000000 /* send M_UNHANGUP message */ 535 #define PCSER_MBREAK 0x04000000 /* send M_BREAK message */ 536 #define PCSER_IGNORE_CD 0x08000000 /* ignore CD transitions */ 537 #define PCSER_FIRST_OPEN 0x10000000 /* first open since config */ 538 #define PCSER_INDRAIN 0x20000000 /* in pcser_drainsilo */ 539 #define PCSER_RTSON_MESSAGE 0x40000000 540 #define PCSER_DRAIN 0x80000000 /* pcser_start flushing */ 541 542 /* 543 * flags in pcser_line_t.saved_state field 544 */ 545 #define PCSER_AUDIO_ON 0x00000001 /* audio enabled */ 546 547 /* 548 * flags in pcser_line_t.flags field are in pcser_io.h 549 */ 550 551 /* 552 * private flags for pcser_xmit and pcser_modem 553 */ 554 #define PCSER_CALL 0x00000001 /* OK to call routine */ 555 #define PCSER_DONTCALL 0x00000002 /* don't call routine */ 556 557 /* 558 * Per board (controller) structure 559 */ 560 typedef struct pcser_unit_t { 561 client_handle_t client_handle; /* client handle for socket */ 562 uint32_t sn; /* socket number */ 563 int instance; /* instance number */ 564 uint32_t card_state; 565 kmutex_t *pcser_mutex; /* protects UART registers */ 566 kmutex_t irq_mutex; 567 kmutex_t noirq_mutex; 568 kmutex_t event_hilock; /* protects hi-level events */ 569 timeout_id_t ready_timeout_id; 570 timeout_id_t readywait_timeout_id; 571 int unid_irq; /* unknown IRQ count */ 572 ddi_iblock_cookie_t soft_blk_cookie; /* soft int cookie */ 573 ddi_softintr_t softint_id; 574 unsigned flags; 575 struct pcser_line_t line; 576 struct pcser_line_t control_line; 577 dev_info_t *dip; /* Device dev_info_t */ 578 kcondvar_t readywait_cv; 579 } pcser_unit_t; 580 581 /* 582 * flags in pcser_unit_t.flags field 583 */ 584 #define PCSER_DIDLOCKS 0x00000001 /* cv/mutex_init in attach */ 585 #define PCSER_REGCLIENT 0x00000002 /* RegisterClient is OK */ 586 #define PCSER_REQSOCKMASK 0x00000004 /* RequestSocketMask is OK */ 587 #define PCSER_SOFTINTROK 0x00000008 /* added to interrupt chain */ 588 #define PCSER_ATTACHOK 0x00000010 /* pcser_attach is OK */ 589 #define PCSER_REQUESTIO 0x00000020 /* did RequestIO */ 590 #define PCSER_REQUESTIRQ 0x00000040 /* did RequestIRQ */ 591 #define PCSER_REQUESTCONFIG 0x00000080 /* did RequestConfiguration */ 592 #define PCSER_MAKEDEVICENODE 0x00000100 /* did MakeDeviceNode */ 593 #ifdef CBAUDEXT 594 #define PCSER_USE_DUALFLOW 0x40000000 /* alias CRTSCTS and CRTSXOF */ 595 #endif 596 #ifndef CBAUDEXT 597 #define PCSER_USE_HIGHSPEED 0x80000000 /* use high baud rates */ 598 #endif 599 600 /* 601 * flags in pcser_unit_t.card_state field 602 */ 603 #define PCSER_CARD_INSERTED 0x00000001 /* card is here */ 604 #define PCSER_WAIT_FOR_READY 0x00000002 /* waiting for card ready */ 605 #define PCSER_CARD_IS_READY 0x00000004 /* card is ready */ 606 #define PCSER_READY_WAIT 0x00000008 /* waiting for READY */ 607 #define PCSER_READY_ERR 0x00000010 /* failure to become ready */ 608 609 /* 610 * the state struct for transparent ioctl()s 611 */ 612 struct pcser_state_t { 613 int state; 614 caddr_t addr; 615 }; 616 617 /* 618 * state for transparent ioctl()'s used in pcser_state_t 619 */ 620 #define PCSER_COPYIN 1 621 #define PCSER_COPYOUT 2 622 623 #ifdef __cplusplus 624 } 625 #endif 626 627 #endif /* _PCSER_VAR_H */ 628