1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved. 24 */ 25 26 /* 27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved. 28 */ 29 30 /* IntelVersion: 1.18 v3_3_14_3_BHSW1 */ 31 32 #ifndef _IGB_MANAGE_H 33 #define _IGB_MANAGE_H 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 bool e1000_check_mng_mode_generic(struct e1000_hw *hw); 40 bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw); 41 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw); 42 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer, 43 u16 length, u16 offset, u8 *sum); 44 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw, 45 struct e1000_host_mng_command_header *hdr); 46 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, 47 u8 *buffer, u16 length); 48 bool e1000_enable_mng_pass_thru(struct e1000_hw *hw); 49 50 enum e1000_mng_mode { 51 e1000_mng_mode_none = 0, 52 e1000_mng_mode_asf, 53 e1000_mng_mode_pt, 54 e1000_mng_mode_ipmi, 55 e1000_mng_mode_host_if_only 56 }; 57 58 #define E1000_FACTPS_MNGCG 0x20000000 59 60 #define E1000_FWSM_MODE_MASK 0xE 61 #define E1000_FWSM_MODE_SHIFT 1 62 63 #define E1000_MNG_IAMT_MODE 0x3 64 #define E1000_MNG_DHCP_COOKIE_LENGTH 0x10 65 #define E1000_MNG_DHCP_COOKIE_OFFSET 0x6F0 66 #define E1000_MNG_DHCP_COMMAND_TIMEOUT 10 67 #define E1000_MNG_DHCP_TX_PAYLOAD_CMD 64 68 #define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1 69 #define E1000_MNG_DHCP_COOKIE_STATUS_VLAN 0x2 70 71 #define E1000_VFTA_ENTRY_SHIFT 5 72 #define E1000_VFTA_ENTRY_MASK 0x7F 73 #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F 74 75 #define E1000_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */ 76 #define E1000_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */ 77 /* Process HI command limit */ 78 #define E1000_HI_COMMAND_TIMEOUT 500 79 80 #define E1000_HICR_EN 0x01 /* Enable bit - RO */ 81 /* Driver sets this bit when done to put command in RAM */ 82 #define E1000_HICR_C 0x02 83 #define E1000_HICR_SV 0x04 /* Status Validity */ 84 #define E1000_HICR_FW_RESET_ENABLE 0x40 85 #define E1000_HICR_FW_RESET 0x80 86 87 /* Intel(R) Active Management Technology signature */ 88 #define E1000_IAMT_SIGNATURE 0x544D4149 89 90 #ifdef __cplusplus 91 } 92 #endif 93 94 #endif /* _IGB_MANAGE_H */ 95