13526Sxy150489 /* 23526Sxy150489 * This file is provided under a CDDLv1 license. When using or 33526Sxy150489 * redistributing this file, you may do so under this license. 43526Sxy150489 * In redistributing this file this license must be included 53526Sxy150489 * and no other modification of this header file is permitted. 63526Sxy150489 * 73526Sxy150489 * CDDL LICENSE SUMMARY 83526Sxy150489 * 98479SChenlu.Chen@Sun.COM * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved. 103526Sxy150489 * 113526Sxy150489 * The contents of this file are subject to the terms of Version 123526Sxy150489 * 1.0 of the Common Development and Distribution License (the "License"). 133526Sxy150489 * 143526Sxy150489 * You should have received a copy of the License with this software. 153526Sxy150489 * You can obtain a copy of the License at 163526Sxy150489 * http://www.opensolaris.org/os/licensing. 173526Sxy150489 * See the License for the specific language governing permissions 183526Sxy150489 * and limitations under the License. 193526Sxy150489 */ 203526Sxy150489 213526Sxy150489 /* 22*11532SGuoqing.Zhu@Sun.COM * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 238118SVasumathi.Sundaram@Sun.COM * Use is subject to license terms. 243526Sxy150489 */ 253526Sxy150489 263526Sxy150489 /* 273526Sxy150489 * ********************************************************************** 283526Sxy150489 * * 293526Sxy150489 * Module Name: * 303526Sxy150489 * e1000g_main.c * 313526Sxy150489 * * 323526Sxy150489 * Abstract: * 334919Sxy150489 * This file contains the interface routines for the solaris OS. * 344919Sxy150489 * It has all DDI entry point routines and GLD entry point routines. * 353526Sxy150489 * * 364919Sxy150489 * This file also contains routines that take care of initialization * 374919Sxy150489 * uninit routine and interrupt routine. * 383526Sxy150489 * * 393526Sxy150489 * ********************************************************************** 403526Sxy150489 */ 413526Sxy150489 423526Sxy150489 #include <sys/dlpi.h> 433526Sxy150489 #include <sys/mac.h> 443526Sxy150489 #include "e1000g_sw.h" 453526Sxy150489 #include "e1000g_debug.h" 463526Sxy150489 477656SSherry.Moore@Sun.COM static char ident[] = "Intel PRO/1000 Ethernet"; 483526Sxy150489 static char e1000g_string[] = "Intel(R) PRO/1000 Network Connection"; 49*11532SGuoqing.Zhu@Sun.COM static char e1000g_version[] = "Driver Ver. 5.3.21"; 503526Sxy150489 513526Sxy150489 /* 523526Sxy150489 * Proto types for DDI entry points 533526Sxy150489 */ 544919Sxy150489 static int e1000g_attach(dev_info_t *, ddi_attach_cmd_t); 554919Sxy150489 static int e1000g_detach(dev_info_t *, ddi_detach_cmd_t); 567656SSherry.Moore@Sun.COM static int e1000g_quiesce(dev_info_t *); 573526Sxy150489 583526Sxy150489 /* 593526Sxy150489 * init and intr routines prototype 603526Sxy150489 */ 614919Sxy150489 static int e1000g_resume(dev_info_t *); 624919Sxy150489 static int e1000g_suspend(dev_info_t *); 633526Sxy150489 static uint_t e1000g_intr_pciexpress(caddr_t); 643526Sxy150489 static uint_t e1000g_intr(caddr_t); 653526Sxy150489 static void e1000g_intr_work(struct e1000g *, uint32_t); 663526Sxy150489 #pragma inline(e1000g_intr_work) 673526Sxy150489 static int e1000g_init(struct e1000g *); 684919Sxy150489 static int e1000g_start(struct e1000g *, boolean_t); 694919Sxy150489 static void e1000g_stop(struct e1000g *, boolean_t); 703526Sxy150489 static int e1000g_m_start(void *); 713526Sxy150489 static void e1000g_m_stop(void *); 723526Sxy150489 static int e1000g_m_promisc(void *, boolean_t); 733526Sxy150489 static boolean_t e1000g_m_getcapab(void *, mac_capab_t, void *); 743526Sxy150489 static int e1000g_m_multicst(void *, boolean_t, const uint8_t *); 753526Sxy150489 static void e1000g_m_ioctl(void *, queue_t *, mblk_t *); 766394Scc210113 static int e1000g_m_setprop(void *, const char *, mac_prop_id_t, 776394Scc210113 uint_t, const void *); 786394Scc210113 static int e1000g_m_getprop(void *, const char *, mac_prop_id_t, 798118SVasumathi.Sundaram@Sun.COM uint_t, uint_t, void *, uint_t *); 806394Scc210113 static int e1000g_set_priv_prop(struct e1000g *, const char *, uint_t, 816394Scc210113 const void *); 826394Scc210113 static int e1000g_get_priv_prop(struct e1000g *, const char *, uint_t, 838118SVasumathi.Sundaram@Sun.COM uint_t, void *, uint_t *); 844919Sxy150489 static void e1000g_init_locks(struct e1000g *); 854919Sxy150489 static void e1000g_destroy_locks(struct e1000g *); 864919Sxy150489 static int e1000g_identify_hardware(struct e1000g *); 874919Sxy150489 static int e1000g_regs_map(struct e1000g *); 884919Sxy150489 static int e1000g_set_driver_params(struct e1000g *); 896394Scc210113 static void e1000g_set_bufsize(struct e1000g *); 904919Sxy150489 static int e1000g_register_mac(struct e1000g *); 914919Sxy150489 static boolean_t e1000g_rx_drain(struct e1000g *); 924919Sxy150489 static boolean_t e1000g_tx_drain(struct e1000g *); 934919Sxy150489 static void e1000g_init_unicst(struct e1000g *); 948275SEric Cheng static int e1000g_unicst_set(struct e1000g *, const uint8_t *, int); 958850SMin.Xu@Sun.COM static int e1000g_alloc_rx_data(struct e1000g *); 969770SChangqing.Li@Sun.COM static void e1000g_release_multicast(struct e1000g *); 9710680SMin.Xu@Sun.COM static void e1000g_pch_limits(struct e1000g *); 9810680SMin.Xu@Sun.COM static uint32_t e1000g_mtu2maxframe(uint32_t); 993526Sxy150489 1003526Sxy150489 /* 1013526Sxy150489 * Local routines 1023526Sxy150489 */ 1037656SSherry.Moore@Sun.COM static boolean_t e1000g_reset_adapter(struct e1000g *); 1044919Sxy150489 static void e1000g_tx_clean(struct e1000g *); 1054919Sxy150489 static void e1000g_rx_clean(struct e1000g *); 1064061Sxy150489 static void e1000g_link_timer(void *); 1074919Sxy150489 static void e1000g_local_timer(void *); 1084061Sxy150489 static boolean_t e1000g_link_check(struct e1000g *); 1093526Sxy150489 static boolean_t e1000g_stall_check(struct e1000g *); 1103526Sxy150489 static void e1000g_smartspeed(struct e1000g *); 1114919Sxy150489 static void e1000g_get_conf(struct e1000g *); 11211339SGuoqing.Zhu@Sun.COM static boolean_t e1000g_get_prop(struct e1000g *, char *, int, int, int, 11311339SGuoqing.Zhu@Sun.COM int *); 1144919Sxy150489 static void enable_watchdog_timer(struct e1000g *); 1154919Sxy150489 static void disable_watchdog_timer(struct e1000g *); 1164919Sxy150489 static void start_watchdog_timer(struct e1000g *); 1174919Sxy150489 static void restart_watchdog_timer(struct e1000g *); 1184919Sxy150489 static void stop_watchdog_timer(struct e1000g *); 1194919Sxy150489 static void stop_link_timer(struct e1000g *); 1204919Sxy150489 static void stop_82547_timer(e1000g_tx_ring_t *); 1214919Sxy150489 static void e1000g_force_speed_duplex(struct e1000g *); 12210680SMin.Xu@Sun.COM static void e1000g_setup_max_mtu(struct e1000g *); 1234919Sxy150489 static void e1000g_get_max_frame_size(struct e1000g *); 1244919Sxy150489 static boolean_t is_valid_mac_addr(uint8_t *); 1253526Sxy150489 static void e1000g_unattach(dev_info_t *, struct e1000g *); 126*11532SGuoqing.Zhu@Sun.COM static int e1000g_get_bar_info(dev_info_t *, int, bar_info_t *); 1274919Sxy150489 #ifdef E1000G_DEBUG 1284919Sxy150489 static void e1000g_ioc_peek_reg(struct e1000g *, e1000g_peekpoke_t *); 1294919Sxy150489 static void e1000g_ioc_poke_reg(struct e1000g *, e1000g_peekpoke_t *); 1304919Sxy150489 static void e1000g_ioc_peek_mem(struct e1000g *, e1000g_peekpoke_t *); 1314919Sxy150489 static void e1000g_ioc_poke_mem(struct e1000g *, e1000g_peekpoke_t *); 1324919Sxy150489 static enum ioc_reply e1000g_pp_ioctl(struct e1000g *, 1334919Sxy150489 struct iocblk *, mblk_t *); 1344919Sxy150489 #endif 1354919Sxy150489 static enum ioc_reply e1000g_loopback_ioctl(struct e1000g *, 1364919Sxy150489 struct iocblk *, mblk_t *); 1377133Scc210113 static boolean_t e1000g_check_loopback_support(struct e1000_hw *); 1384919Sxy150489 static boolean_t e1000g_set_loopback_mode(struct e1000g *, uint32_t); 1394919Sxy150489 static void e1000g_set_internal_loopback(struct e1000g *); 1404919Sxy150489 static void e1000g_set_external_loopback_1000(struct e1000g *); 1414919Sxy150489 static void e1000g_set_external_loopback_100(struct e1000g *); 1424919Sxy150489 static void e1000g_set_external_loopback_10(struct e1000g *); 1434919Sxy150489 static int e1000g_add_intrs(struct e1000g *); 1444919Sxy150489 static int e1000g_intr_add(struct e1000g *, int); 1454919Sxy150489 static int e1000g_rem_intrs(struct e1000g *); 1464919Sxy150489 static int e1000g_enable_intrs(struct e1000g *); 1474919Sxy150489 static int e1000g_disable_intrs(struct e1000g *); 1484919Sxy150489 static boolean_t e1000g_link_up(struct e1000g *); 1493526Sxy150489 #ifdef __sparc 1504919Sxy150489 static boolean_t e1000g_find_mac_address(struct e1000g *); 1513526Sxy150489 #endif 1525082Syy150190 static void e1000g_get_phy_state(struct e1000g *); 1535273Sgl147354 static int e1000g_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, 1545273Sgl147354 const void *impl_data); 1555273Sgl147354 static void e1000g_fm_init(struct e1000g *Adapter); 1565273Sgl147354 static void e1000g_fm_fini(struct e1000g *Adapter); 1576512Ssowmini static int e1000g_get_def_val(struct e1000g *, mac_prop_id_t, uint_t, void *); 1586512Ssowmini static void e1000g_param_sync(struct e1000g *); 1597607STed.You@Sun.COM static void e1000g_get_driver_control(struct e1000_hw *); 1607607STed.You@Sun.COM static void e1000g_release_driver_control(struct e1000_hw *); 1617722SShuguo.Yang@Sun.COM static void e1000g_restore_promisc(struct e1000g *Adapter); 1626512Ssowmini 1636512Ssowmini mac_priv_prop_t e1000g_priv_props[] = { 1646512Ssowmini {"_tx_bcopy_threshold", MAC_PROP_PERM_RW}, 1656512Ssowmini {"_tx_interrupt_enable", MAC_PROP_PERM_RW}, 1666512Ssowmini {"_tx_intr_delay", MAC_PROP_PERM_RW}, 1676512Ssowmini {"_tx_intr_abs_delay", MAC_PROP_PERM_RW}, 1686512Ssowmini {"_rx_bcopy_threshold", MAC_PROP_PERM_RW}, 1696512Ssowmini {"_max_num_rcv_packets", MAC_PROP_PERM_RW}, 1706512Ssowmini {"_rx_intr_delay", MAC_PROP_PERM_RW}, 1716512Ssowmini {"_rx_intr_abs_delay", MAC_PROP_PERM_RW}, 1726512Ssowmini {"_intr_throttling_rate", MAC_PROP_PERM_RW}, 1736512Ssowmini {"_intr_adaptive", MAC_PROP_PERM_RW}, 1746512Ssowmini {"_adv_pause_cap", MAC_PROP_PERM_READ}, 1756512Ssowmini {"_adv_asym_pause_cap", MAC_PROP_PERM_READ}, 1766512Ssowmini }; 1776512Ssowmini #define E1000G_MAX_PRIV_PROPS \ 1786512Ssowmini (sizeof (e1000g_priv_props)/sizeof (mac_priv_prop_t)) 1796512Ssowmini 1803526Sxy150489 1813526Sxy150489 static struct cb_ops cb_ws_ops = { 1823526Sxy150489 nulldev, /* cb_open */ 1833526Sxy150489 nulldev, /* cb_close */ 1843526Sxy150489 nodev, /* cb_strategy */ 1853526Sxy150489 nodev, /* cb_print */ 1863526Sxy150489 nodev, /* cb_dump */ 1873526Sxy150489 nodev, /* cb_read */ 1883526Sxy150489 nodev, /* cb_write */ 1893526Sxy150489 nodev, /* cb_ioctl */ 1903526Sxy150489 nodev, /* cb_devmap */ 1913526Sxy150489 nodev, /* cb_mmap */ 1923526Sxy150489 nodev, /* cb_segmap */ 1933526Sxy150489 nochpoll, /* cb_chpoll */ 1943526Sxy150489 ddi_prop_op, /* cb_prop_op */ 1953526Sxy150489 NULL, /* cb_stream */ 1963526Sxy150489 D_MP | D_HOTPLUG, /* cb_flag */ 1973526Sxy150489 CB_REV, /* cb_rev */ 1983526Sxy150489 nodev, /* cb_aread */ 1993526Sxy150489 nodev /* cb_awrite */ 2003526Sxy150489 }; 2013526Sxy150489 2023526Sxy150489 static struct dev_ops ws_ops = { 2033526Sxy150489 DEVO_REV, /* devo_rev */ 2043526Sxy150489 0, /* devo_refcnt */ 2053526Sxy150489 NULL, /* devo_getinfo */ 2063526Sxy150489 nulldev, /* devo_identify */ 2073526Sxy150489 nulldev, /* devo_probe */ 2084919Sxy150489 e1000g_attach, /* devo_attach */ 2094919Sxy150489 e1000g_detach, /* devo_detach */ 2103526Sxy150489 nodev, /* devo_reset */ 2113526Sxy150489 &cb_ws_ops, /* devo_cb_ops */ 2123526Sxy150489 NULL, /* devo_bus_ops */ 2137656SSherry.Moore@Sun.COM ddi_power, /* devo_power */ 2147656SSherry.Moore@Sun.COM e1000g_quiesce /* devo_quiesce */ 2153526Sxy150489 }; 2163526Sxy150489 2173526Sxy150489 static struct modldrv modldrv = { 2183526Sxy150489 &mod_driverops, /* Type of module. This one is a driver */ 2193526Sxy150489 ident, /* Discription string */ 2203526Sxy150489 &ws_ops, /* driver ops */ 2213526Sxy150489 }; 2223526Sxy150489 2233526Sxy150489 static struct modlinkage modlinkage = { 2243526Sxy150489 MODREV_1, &modldrv, NULL 2253526Sxy150489 }; 2263526Sxy150489 2274919Sxy150489 /* Access attributes for register mapping */ 2284919Sxy150489 static ddi_device_acc_attr_t e1000g_regs_acc_attr = { 22911236SStephen.Hanson@Sun.COM DDI_DEVICE_ATTR_V1, 2303526Sxy150489 DDI_STRUCTURE_LE_ACC, 2313526Sxy150489 DDI_STRICTORDER_ACC, 2325273Sgl147354 DDI_FLAGERR_ACC 2333526Sxy150489 }; 2343526Sxy150489 2356394Scc210113 #define E1000G_M_CALLBACK_FLAGS \ 2366394Scc210113 (MC_IOCTL | MC_GETCAPAB | MC_SETPROP | MC_GETPROP) 2373526Sxy150489 2383526Sxy150489 static mac_callbacks_t e1000g_m_callbacks = { 2393526Sxy150489 E1000G_M_CALLBACK_FLAGS, 2403526Sxy150489 e1000g_m_stat, 2413526Sxy150489 e1000g_m_start, 2423526Sxy150489 e1000g_m_stop, 2433526Sxy150489 e1000g_m_promisc, 2443526Sxy150489 e1000g_m_multicst, 2458275SEric Cheng NULL, 2463526Sxy150489 e1000g_m_tx, 2473526Sxy150489 e1000g_m_ioctl, 2486394Scc210113 e1000g_m_getcapab, 2496394Scc210113 NULL, 2506394Scc210113 NULL, 2516394Scc210113 e1000g_m_setprop, 2526394Scc210113 e1000g_m_getprop 2533526Sxy150489 }; 2543526Sxy150489 2553526Sxy150489 /* 2563526Sxy150489 * Global variables 2573526Sxy150489 */ 2583526Sxy150489 uint32_t e1000g_mblks_pending = 0; 2593526Sxy150489 /* 2604894Syy150190 * Workaround for Dynamic Reconfiguration support, for x86 platform only. 2614349Sxy150489 * Here we maintain a private dev_info list if e1000g_force_detach is 2624349Sxy150489 * enabled. If we force the driver to detach while there are still some 2634349Sxy150489 * rx buffers retained in the upper layer, we have to keep a copy of the 2644349Sxy150489 * dev_info. In some cases (Dynamic Reconfiguration), the dev_info data 2654349Sxy150489 * structure will be freed after the driver is detached. However when we 2664349Sxy150489 * finally free those rx buffers released by the upper layer, we need to 2674349Sxy150489 * refer to the dev_info to free the dma buffers. So we save a copy of 2684894Syy150190 * the dev_info for this purpose. On x86 platform, we assume this copy 2694894Syy150190 * of dev_info is always valid, but on SPARC platform, it could be invalid 2704894Syy150190 * after the system board level DR operation. For this reason, the global 2714894Syy150190 * variable e1000g_force_detach must be B_FALSE on SPARC platform. 2724349Sxy150489 */ 2734894Syy150190 #ifdef __sparc 2744894Syy150190 boolean_t e1000g_force_detach = B_FALSE; 2754894Syy150190 #else 2764894Syy150190 boolean_t e1000g_force_detach = B_TRUE; 2774894Syy150190 #endif 2784349Sxy150489 private_devi_list_t *e1000g_private_devi_list = NULL; 2794894Syy150190 2804349Sxy150489 /* 2818850SMin.Xu@Sun.COM * The mutex e1000g_rx_detach_lock is defined to protect the processing of 2828850SMin.Xu@Sun.COM * the private dev_info list, and to serialize the processing of rx buffer 2838850SMin.Xu@Sun.COM * freeing and rx buffer recycling. 2843526Sxy150489 */ 2858850SMin.Xu@Sun.COM kmutex_t e1000g_rx_detach_lock; 2863526Sxy150489 /* 2873526Sxy150489 * The rwlock e1000g_dma_type_lock is defined to protect the global flag 2883526Sxy150489 * e1000g_dma_type. For SPARC, the initial value of the flag is "USE_DVMA". 2893526Sxy150489 * If there are many e1000g instances, the system may run out of DVMA 2903526Sxy150489 * resources during the initialization of the instances, then the flag will 2913526Sxy150489 * be changed to "USE_DMA". Because different e1000g instances are initialized 2923526Sxy150489 * in parallel, we need to use this lock to protect the flag. 2933526Sxy150489 */ 2943526Sxy150489 krwlock_t e1000g_dma_type_lock; 2953526Sxy150489 2967133Scc210113 /* 2977133Scc210113 * The 82546 chipset is a dual-port device, both the ports share one eeprom. 2987133Scc210113 * Based on the information from Intel, the 82546 chipset has some hardware 2997133Scc210113 * problem. When one port is being reset and the other port is trying to 3007133Scc210113 * access the eeprom, it could cause system hang or panic. To workaround this 3017133Scc210113 * hardware problem, we use a global mutex to prevent such operations from 3027133Scc210113 * happening simultaneously on different instances. This workaround is applied 3037133Scc210113 * to all the devices supported by this driver. 3047133Scc210113 */ 3057133Scc210113 kmutex_t e1000g_nvm_lock; 3063526Sxy150489 3073526Sxy150489 /* 3083526Sxy150489 * Loadable module configuration entry points for the driver 3093526Sxy150489 */ 3103526Sxy150489 3113526Sxy150489 /* 3124919Sxy150489 * _init - module initialization 3133526Sxy150489 */ 3143526Sxy150489 int 3153526Sxy150489 _init(void) 3163526Sxy150489 { 3173526Sxy150489 int status; 3183526Sxy150489 3193526Sxy150489 mac_init_ops(&ws_ops, WSNAME); 3203526Sxy150489 status = mod_install(&modlinkage); 3213526Sxy150489 if (status != DDI_SUCCESS) 3223526Sxy150489 mac_fini_ops(&ws_ops); 3233526Sxy150489 else { 3248850SMin.Xu@Sun.COM mutex_init(&e1000g_rx_detach_lock, NULL, MUTEX_DRIVER, NULL); 3253526Sxy150489 rw_init(&e1000g_dma_type_lock, NULL, RW_DRIVER, NULL); 3267133Scc210113 mutex_init(&e1000g_nvm_lock, NULL, MUTEX_DRIVER, NULL); 3273526Sxy150489 } 3283526Sxy150489 3293526Sxy150489 return (status); 3303526Sxy150489 } 3313526Sxy150489 3323526Sxy150489 /* 3334919Sxy150489 * _fini - module finalization 3343526Sxy150489 */ 3353526Sxy150489 int 3363526Sxy150489 _fini(void) 3373526Sxy150489 { 3383526Sxy150489 int status; 3393526Sxy150489 3408850SMin.Xu@Sun.COM if (e1000g_mblks_pending != 0) 3413526Sxy150489 return (EBUSY); 3423526Sxy150489 3433526Sxy150489 status = mod_remove(&modlinkage); 3443526Sxy150489 if (status == DDI_SUCCESS) { 3453526Sxy150489 mac_fini_ops(&ws_ops); 3464349Sxy150489 3474349Sxy150489 if (e1000g_force_detach) { 3484349Sxy150489 private_devi_list_t *devi_node; 3494349Sxy150489 3508850SMin.Xu@Sun.COM mutex_enter(&e1000g_rx_detach_lock); 3514349Sxy150489 while (e1000g_private_devi_list != NULL) { 3524349Sxy150489 devi_node = e1000g_private_devi_list; 3534349Sxy150489 e1000g_private_devi_list = 3544349Sxy150489 e1000g_private_devi_list->next; 3554349Sxy150489 3564349Sxy150489 kmem_free(devi_node->priv_dip, 3574349Sxy150489 sizeof (struct dev_info)); 3584349Sxy150489 kmem_free(devi_node, 3594349Sxy150489 sizeof (private_devi_list_t)); 3604349Sxy150489 } 3618850SMin.Xu@Sun.COM mutex_exit(&e1000g_rx_detach_lock); 3624349Sxy150489 } 3634349Sxy150489 3648850SMin.Xu@Sun.COM mutex_destroy(&e1000g_rx_detach_lock); 3653526Sxy150489 rw_destroy(&e1000g_dma_type_lock); 3667133Scc210113 mutex_destroy(&e1000g_nvm_lock); 3673526Sxy150489 } 3683526Sxy150489 3693526Sxy150489 return (status); 3703526Sxy150489 } 3713526Sxy150489 3723526Sxy150489 /* 3734919Sxy150489 * _info - module information 3743526Sxy150489 */ 3753526Sxy150489 int 3763526Sxy150489 _info(struct modinfo *modinfop) 3773526Sxy150489 { 3783526Sxy150489 return (mod_info(&modlinkage, modinfop)); 3793526Sxy150489 } 3803526Sxy150489 3813526Sxy150489 /* 3824919Sxy150489 * e1000g_attach - driver attach 3834919Sxy150489 * 3844919Sxy150489 * This function is the device-specific initialization entry 3854919Sxy150489 * point. This entry point is required and must be written. 3864919Sxy150489 * The DDI_ATTACH command must be provided in the attach entry 3874919Sxy150489 * point. When attach() is called with cmd set to DDI_ATTACH, 3884919Sxy150489 * all normal kernel services (such as kmem_alloc(9F)) are 3894919Sxy150489 * available for use by the driver. 3904919Sxy150489 * 3914919Sxy150489 * The attach() function will be called once for each instance 3924919Sxy150489 * of the device on the system with cmd set to DDI_ATTACH. 3934919Sxy150489 * Until attach() succeeds, the only driver entry points which 3944919Sxy150489 * may be called are open(9E) and getinfo(9E). 3953526Sxy150489 */ 3963526Sxy150489 static int 3974919Sxy150489 e1000g_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd) 3983526Sxy150489 { 3993526Sxy150489 struct e1000g *Adapter; 4003526Sxy150489 struct e1000_hw *hw; 4014919Sxy150489 struct e1000g_osdep *osdep; 4023526Sxy150489 int instance; 4033526Sxy150489 4043526Sxy150489 switch (cmd) { 4053526Sxy150489 default: 4063526Sxy150489 e1000g_log(NULL, CE_WARN, 4074919Sxy150489 "Unsupported command send to e1000g_attach... "); 4083526Sxy150489 return (DDI_FAILURE); 4093526Sxy150489 4103526Sxy150489 case DDI_RESUME: 4113526Sxy150489 return (e1000g_resume(devinfo)); 4123526Sxy150489 4133526Sxy150489 case DDI_ATTACH: 4143526Sxy150489 break; 4153526Sxy150489 } 4163526Sxy150489 4173526Sxy150489 /* 4183526Sxy150489 * get device instance number 4193526Sxy150489 */ 4203526Sxy150489 instance = ddi_get_instance(devinfo); 4213526Sxy150489 4223526Sxy150489 /* 4233526Sxy150489 * Allocate soft data structure 4243526Sxy150489 */ 4253526Sxy150489 Adapter = 4263526Sxy150489 (struct e1000g *)kmem_zalloc(sizeof (*Adapter), KM_SLEEP); 4273526Sxy150489 4283526Sxy150489 Adapter->dip = devinfo; 4294919Sxy150489 Adapter->instance = instance; 4303526Sxy150489 Adapter->tx_ring->adapter = Adapter; 4313526Sxy150489 Adapter->rx_ring->adapter = Adapter; 4323526Sxy150489 4334919Sxy150489 hw = &Adapter->shared; 4344919Sxy150489 osdep = &Adapter->osdep; 4354919Sxy150489 hw->back = osdep; 4364919Sxy150489 osdep->adapter = Adapter; 4374919Sxy150489 4383526Sxy150489 ddi_set_driver_private(devinfo, (caddr_t)Adapter); 4393526Sxy150489 4404919Sxy150489 /* 4415273Sgl147354 * Initialize for fma support 4425273Sgl147354 */ 44311339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "fm-capable", 4445273Sgl147354 0, 0x0f, 4455273Sgl147354 DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 44611339SGuoqing.Zhu@Sun.COM DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE, 44711339SGuoqing.Zhu@Sun.COM &Adapter->fm_capabilities); 4485273Sgl147354 e1000g_fm_init(Adapter); 4495273Sgl147354 Adapter->attach_progress |= ATTACH_PROGRESS_FMINIT; 4505273Sgl147354 4515273Sgl147354 /* 4524919Sxy150489 * PCI Configure 4534919Sxy150489 */ 4544919Sxy150489 if (pci_config_setup(devinfo, &osdep->cfg_handle) != DDI_SUCCESS) { 4554919Sxy150489 e1000g_log(Adapter, CE_WARN, "PCI configuration failed"); 4564919Sxy150489 goto attach_fail; 4574919Sxy150489 } 4584919Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_PCI_CONFIG; 4594919Sxy150489 4604919Sxy150489 /* 4614919Sxy150489 * Setup hardware 4624919Sxy150489 */ 4634919Sxy150489 if (e1000g_identify_hardware(Adapter) != DDI_SUCCESS) { 4644919Sxy150489 e1000g_log(Adapter, CE_WARN, "Identify hardware failed"); 4654919Sxy150489 goto attach_fail; 4664919Sxy150489 } 4673526Sxy150489 4683526Sxy150489 /* 4693526Sxy150489 * Map in the device registers. 4703526Sxy150489 */ 4714919Sxy150489 if (e1000g_regs_map(Adapter) != DDI_SUCCESS) { 4724919Sxy150489 e1000g_log(Adapter, CE_WARN, "Mapping registers failed"); 4733526Sxy150489 goto attach_fail; 4743526Sxy150489 } 4754919Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_REGS_MAP; 4763526Sxy150489 4773526Sxy150489 /* 4783526Sxy150489 * Initialize driver parameters 4793526Sxy150489 */ 4803526Sxy150489 if (e1000g_set_driver_params(Adapter) != DDI_SUCCESS) { 4813526Sxy150489 goto attach_fail; 4823526Sxy150489 } 4834919Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_SETUP; 4843526Sxy150489 4855273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.cfg_handle) != DDI_FM_OK) { 4865273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST); 4875273Sgl147354 goto attach_fail; 4885273Sgl147354 } 4895273Sgl147354 4903526Sxy150489 /* 4913526Sxy150489 * Initialize interrupts 4923526Sxy150489 */ 4933526Sxy150489 if (e1000g_add_intrs(Adapter) != DDI_SUCCESS) { 4943526Sxy150489 e1000g_log(Adapter, CE_WARN, "Add interrupts failed"); 4953526Sxy150489 goto attach_fail; 4963526Sxy150489 } 4974919Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_ADD_INTR; 4983526Sxy150489 4993526Sxy150489 /* 5003526Sxy150489 * Initialize mutex's for this device. 5013526Sxy150489 * Do this before enabling the interrupt handler and 5023526Sxy150489 * register the softint to avoid the condition where 5033526Sxy150489 * interrupt handler can try using uninitialized mutex 5043526Sxy150489 */ 5053526Sxy150489 e1000g_init_locks(Adapter); 5063526Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_LOCKS; 5073526Sxy150489 5083526Sxy150489 /* 5093526Sxy150489 * Initialize Driver Counters 5103526Sxy150489 */ 5114919Sxy150489 if (e1000g_init_stats(Adapter) != DDI_SUCCESS) { 5123526Sxy150489 e1000g_log(Adapter, CE_WARN, "Init stats failed"); 5133526Sxy150489 goto attach_fail; 5143526Sxy150489 } 5153526Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_KSTATS; 5163526Sxy150489 5173526Sxy150489 /* 5183526Sxy150489 * Initialize chip hardware and software structures 5193526Sxy150489 */ 5208479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 5213526Sxy150489 if (e1000g_init(Adapter) != DDI_SUCCESS) { 5228479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 5233526Sxy150489 e1000g_log(Adapter, CE_WARN, "Adapter initialization failed"); 5243526Sxy150489 goto attach_fail; 5253526Sxy150489 } 5268479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 5273526Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_INIT; 5283526Sxy150489 5293526Sxy150489 /* 5303526Sxy150489 * Register the driver to the MAC 5313526Sxy150489 */ 5323526Sxy150489 if (e1000g_register_mac(Adapter) != DDI_SUCCESS) { 5333526Sxy150489 e1000g_log(Adapter, CE_WARN, "Register MAC failed"); 5343526Sxy150489 goto attach_fail; 5353526Sxy150489 } 5364919Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_MAC; 5373526Sxy150489 5383526Sxy150489 /* 5393526Sxy150489 * Now that mutex locks are initialized, and the chip is also 5403526Sxy150489 * initialized, enable interrupts. 5413526Sxy150489 */ 5423526Sxy150489 if (e1000g_enable_intrs(Adapter) != DDI_SUCCESS) { 5433526Sxy150489 e1000g_log(Adapter, CE_WARN, "Enable DDI interrupts failed"); 5443526Sxy150489 goto attach_fail; 5453526Sxy150489 } 5464919Sxy150489 Adapter->attach_progress |= ATTACH_PROGRESS_ENABLE_INTR; 5473526Sxy150489 5484982Syy150190 /* 5494982Syy150190 * If e1000g_force_detach is enabled, in global private dip list, 5504982Syy150190 * we will create a new entry, which maintains the priv_dip for DR 5514982Syy150190 * supports after driver detached. 5524982Syy150190 */ 5534982Syy150190 if (e1000g_force_detach) { 5544982Syy150190 private_devi_list_t *devi_node; 5554982Syy150190 5564982Syy150190 Adapter->priv_dip = 5574982Syy150190 kmem_zalloc(sizeof (struct dev_info), KM_SLEEP); 5584982Syy150190 bcopy(DEVI(devinfo), DEVI(Adapter->priv_dip), 5594982Syy150190 sizeof (struct dev_info)); 5604982Syy150190 5614982Syy150190 devi_node = 5624982Syy150190 kmem_zalloc(sizeof (private_devi_list_t), KM_SLEEP); 5634982Syy150190 5648850SMin.Xu@Sun.COM mutex_enter(&e1000g_rx_detach_lock); 5654982Syy150190 devi_node->priv_dip = Adapter->priv_dip; 5664982Syy150190 devi_node->flag = E1000G_PRIV_DEVI_ATTACH; 5678850SMin.Xu@Sun.COM devi_node->pending_rx_count = 0; 5688850SMin.Xu@Sun.COM 5698850SMin.Xu@Sun.COM Adapter->priv_devi_node = devi_node; 5708850SMin.Xu@Sun.COM 5718850SMin.Xu@Sun.COM if (e1000g_private_devi_list == NULL) { 5728850SMin.Xu@Sun.COM devi_node->prev = NULL; 5738850SMin.Xu@Sun.COM devi_node->next = NULL; 5748850SMin.Xu@Sun.COM e1000g_private_devi_list = devi_node; 5758850SMin.Xu@Sun.COM } else { 5768850SMin.Xu@Sun.COM devi_node->prev = NULL; 5778850SMin.Xu@Sun.COM devi_node->next = e1000g_private_devi_list; 5788850SMin.Xu@Sun.COM e1000g_private_devi_list->prev = devi_node; 5798850SMin.Xu@Sun.COM e1000g_private_devi_list = devi_node; 5808850SMin.Xu@Sun.COM } 5818850SMin.Xu@Sun.COM mutex_exit(&e1000g_rx_detach_lock); 5824982Syy150190 } 5834982Syy150190 5843526Sxy150489 cmn_err(CE_CONT, "!%s, %s\n", e1000g_string, e1000g_version); 5858479SChenlu.Chen@Sun.COM Adapter->e1000g_state = E1000G_INITIALIZED; 5863526Sxy150489 5873526Sxy150489 return (DDI_SUCCESS); 5883526Sxy150489 5893526Sxy150489 attach_fail: 5903526Sxy150489 e1000g_unattach(devinfo, Adapter); 5913526Sxy150489 return (DDI_FAILURE); 5923526Sxy150489 } 5933526Sxy150489 5943526Sxy150489 static int 5953526Sxy150489 e1000g_register_mac(struct e1000g *Adapter) 5963526Sxy150489 { 5974919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 5983526Sxy150489 mac_register_t *mac; 5993526Sxy150489 int err; 6003526Sxy150489 6013526Sxy150489 if ((mac = mac_alloc(MAC_VERSION)) == NULL) 6023526Sxy150489 return (DDI_FAILURE); 6034919Sxy150489 6043526Sxy150489 mac->m_type_ident = MAC_PLUGIN_IDENT_ETHER; 6053526Sxy150489 mac->m_driver = Adapter; 6063526Sxy150489 mac->m_dip = Adapter->dip; 6074919Sxy150489 mac->m_src_addr = hw->mac.addr; 6083526Sxy150489 mac->m_callbacks = &e1000g_m_callbacks; 6093526Sxy150489 mac->m_min_sdu = 0; 6106394Scc210113 mac->m_max_sdu = Adapter->default_mtu; 6115895Syz147064 mac->m_margin = VLAN_TAGSZ; 6126512Ssowmini mac->m_priv_props = e1000g_priv_props; 6136512Ssowmini mac->m_priv_prop_count = E1000G_MAX_PRIV_PROPS; 6148275SEric Cheng mac->m_v12n = MAC_VIRT_LEVEL1; 6154919Sxy150489 6163526Sxy150489 err = mac_register(mac, &Adapter->mh); 6173526Sxy150489 mac_free(mac); 6184919Sxy150489 6193526Sxy150489 return (err == 0 ? DDI_SUCCESS : DDI_FAILURE); 6203526Sxy150489 } 6213526Sxy150489 6223526Sxy150489 static int 6234919Sxy150489 e1000g_identify_hardware(struct e1000g *Adapter) 6244919Sxy150489 { 6254919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 6264919Sxy150489 struct e1000g_osdep *osdep = &Adapter->osdep; 6274919Sxy150489 6284919Sxy150489 /* Get the device id */ 6294919Sxy150489 hw->vendor_id = 6304919Sxy150489 pci_config_get16(osdep->cfg_handle, PCI_CONF_VENID); 6314919Sxy150489 hw->device_id = 6324919Sxy150489 pci_config_get16(osdep->cfg_handle, PCI_CONF_DEVID); 6334919Sxy150489 hw->revision_id = 6344919Sxy150489 pci_config_get8(osdep->cfg_handle, PCI_CONF_REVID); 6354919Sxy150489 hw->subsystem_device_id = 6364919Sxy150489 pci_config_get16(osdep->cfg_handle, PCI_CONF_SUBSYSID); 6374919Sxy150489 hw->subsystem_vendor_id = 6384919Sxy150489 pci_config_get16(osdep->cfg_handle, PCI_CONF_SUBVENID); 6394919Sxy150489 6404919Sxy150489 if (e1000_set_mac_type(hw) != E1000_SUCCESS) { 6414919Sxy150489 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 6424919Sxy150489 "MAC type could not be set properly."); 6434919Sxy150489 return (DDI_FAILURE); 6444919Sxy150489 } 6454919Sxy150489 6464919Sxy150489 return (DDI_SUCCESS); 6474919Sxy150489 } 6484919Sxy150489 6494919Sxy150489 static int 6504919Sxy150489 e1000g_regs_map(struct e1000g *Adapter) 6514919Sxy150489 { 6524919Sxy150489 dev_info_t *devinfo = Adapter->dip; 6534919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 6544919Sxy150489 struct e1000g_osdep *osdep = &Adapter->osdep; 6554919Sxy150489 off_t mem_size; 656*11532SGuoqing.Zhu@Sun.COM bar_info_t bar_info; 657*11532SGuoqing.Zhu@Sun.COM int offset, rnumber; 658*11532SGuoqing.Zhu@Sun.COM 659*11532SGuoqing.Zhu@Sun.COM rnumber = ADAPTER_REG_SET; 6607607STed.You@Sun.COM /* Get size of adapter register memory */ 661*11532SGuoqing.Zhu@Sun.COM if (ddi_dev_regsize(devinfo, rnumber, &mem_size) != 6627607STed.You@Sun.COM DDI_SUCCESS) { 6634919Sxy150489 E1000G_DEBUGLOG_0(Adapter, CE_WARN, 6644919Sxy150489 "ddi_dev_regsize for registers failed"); 6654919Sxy150489 return (DDI_FAILURE); 6664919Sxy150489 } 6674919Sxy150489 6687607STed.You@Sun.COM /* Map adapter register memory */ 669*11532SGuoqing.Zhu@Sun.COM if ((ddi_regs_map_setup(devinfo, rnumber, 6704919Sxy150489 (caddr_t *)&hw->hw_addr, 0, mem_size, &e1000g_regs_acc_attr, 6714919Sxy150489 &osdep->reg_handle)) != DDI_SUCCESS) { 6724919Sxy150489 E1000G_DEBUGLOG_0(Adapter, CE_WARN, 6734919Sxy150489 "ddi_regs_map_setup for registers failed"); 6744919Sxy150489 goto regs_map_fail; 6754919Sxy150489 } 6764919Sxy150489 6774919Sxy150489 /* ICH needs to map flash memory */ 678*11532SGuoqing.Zhu@Sun.COM switch (hw->mac.type) { 679*11532SGuoqing.Zhu@Sun.COM case e1000_ich8lan: 680*11532SGuoqing.Zhu@Sun.COM case e1000_ich9lan: 681*11532SGuoqing.Zhu@Sun.COM case e1000_ich10lan: 682*11532SGuoqing.Zhu@Sun.COM case e1000_pchlan: 683*11532SGuoqing.Zhu@Sun.COM rnumber = ICH_FLASH_REG_SET; 684*11532SGuoqing.Zhu@Sun.COM 6854919Sxy150489 /* get flash size */ 686*11532SGuoqing.Zhu@Sun.COM if (ddi_dev_regsize(devinfo, rnumber, 6874919Sxy150489 &mem_size) != DDI_SUCCESS) { 6884919Sxy150489 E1000G_DEBUGLOG_0(Adapter, CE_WARN, 6894919Sxy150489 "ddi_dev_regsize for ICH flash failed"); 6904919Sxy150489 goto regs_map_fail; 6914919Sxy150489 } 6924919Sxy150489 6934919Sxy150489 /* map flash in */ 694*11532SGuoqing.Zhu@Sun.COM if (ddi_regs_map_setup(devinfo, rnumber, 6954919Sxy150489 (caddr_t *)&hw->flash_address, 0, 6964919Sxy150489 mem_size, &e1000g_regs_acc_attr, 6974919Sxy150489 &osdep->ich_flash_handle) != DDI_SUCCESS) { 6984919Sxy150489 E1000G_DEBUGLOG_0(Adapter, CE_WARN, 6994919Sxy150489 "ddi_regs_map_setup for ICH flash failed"); 7004919Sxy150489 goto regs_map_fail; 7014919Sxy150489 } 702*11532SGuoqing.Zhu@Sun.COM break; 703*11532SGuoqing.Zhu@Sun.COM default: 704*11532SGuoqing.Zhu@Sun.COM break; 705*11532SGuoqing.Zhu@Sun.COM } 706*11532SGuoqing.Zhu@Sun.COM 707*11532SGuoqing.Zhu@Sun.COM /* map io space */ 708*11532SGuoqing.Zhu@Sun.COM switch (hw->mac.type) { 709*11532SGuoqing.Zhu@Sun.COM case e1000_82544: 710*11532SGuoqing.Zhu@Sun.COM case e1000_82540: 711*11532SGuoqing.Zhu@Sun.COM case e1000_82545: 712*11532SGuoqing.Zhu@Sun.COM case e1000_82546: 713*11532SGuoqing.Zhu@Sun.COM case e1000_82541: 714*11532SGuoqing.Zhu@Sun.COM case e1000_82541_rev_2: 715*11532SGuoqing.Zhu@Sun.COM /* find the IO bar */ 716*11532SGuoqing.Zhu@Sun.COM rnumber = -1; 717*11532SGuoqing.Zhu@Sun.COM for (offset = PCI_CONF_BASE1; 718*11532SGuoqing.Zhu@Sun.COM offset <= PCI_CONF_BASE5; offset += 4) { 719*11532SGuoqing.Zhu@Sun.COM if (e1000g_get_bar_info(devinfo, offset, &bar_info) 720*11532SGuoqing.Zhu@Sun.COM != DDI_SUCCESS) 721*11532SGuoqing.Zhu@Sun.COM continue; 722*11532SGuoqing.Zhu@Sun.COM if (bar_info.type == E1000G_BAR_IO) { 723*11532SGuoqing.Zhu@Sun.COM rnumber = bar_info.rnumber; 724*11532SGuoqing.Zhu@Sun.COM break; 725*11532SGuoqing.Zhu@Sun.COM } 726*11532SGuoqing.Zhu@Sun.COM } 727*11532SGuoqing.Zhu@Sun.COM 728*11532SGuoqing.Zhu@Sun.COM if (rnumber < 0) { 729*11532SGuoqing.Zhu@Sun.COM E1000G_DEBUGLOG_0(Adapter, CE_WARN, 730*11532SGuoqing.Zhu@Sun.COM "No io space is found"); 731*11532SGuoqing.Zhu@Sun.COM goto regs_map_fail; 732*11532SGuoqing.Zhu@Sun.COM } 733*11532SGuoqing.Zhu@Sun.COM 734*11532SGuoqing.Zhu@Sun.COM /* get io space size */ 735*11532SGuoqing.Zhu@Sun.COM if (ddi_dev_regsize(devinfo, rnumber, 736*11532SGuoqing.Zhu@Sun.COM &mem_size) != DDI_SUCCESS) { 737*11532SGuoqing.Zhu@Sun.COM E1000G_DEBUGLOG_0(Adapter, CE_WARN, 738*11532SGuoqing.Zhu@Sun.COM "ddi_dev_regsize for io space failed"); 739*11532SGuoqing.Zhu@Sun.COM goto regs_map_fail; 740*11532SGuoqing.Zhu@Sun.COM } 741*11532SGuoqing.Zhu@Sun.COM 742*11532SGuoqing.Zhu@Sun.COM /* map io space */ 743*11532SGuoqing.Zhu@Sun.COM if ((ddi_regs_map_setup(devinfo, rnumber, 744*11532SGuoqing.Zhu@Sun.COM (caddr_t *)&hw->io_base, 0, mem_size, 745*11532SGuoqing.Zhu@Sun.COM &e1000g_regs_acc_attr, 746*11532SGuoqing.Zhu@Sun.COM &osdep->io_reg_handle)) != DDI_SUCCESS) { 747*11532SGuoqing.Zhu@Sun.COM E1000G_DEBUGLOG_0(Adapter, CE_WARN, 748*11532SGuoqing.Zhu@Sun.COM "ddi_regs_map_setup for io space failed"); 749*11532SGuoqing.Zhu@Sun.COM goto regs_map_fail; 750*11532SGuoqing.Zhu@Sun.COM } 751*11532SGuoqing.Zhu@Sun.COM break; 752*11532SGuoqing.Zhu@Sun.COM default: 753*11532SGuoqing.Zhu@Sun.COM hw->io_base = 0; 754*11532SGuoqing.Zhu@Sun.COM break; 7554919Sxy150489 } 7564919Sxy150489 7574919Sxy150489 return (DDI_SUCCESS); 7584919Sxy150489 7594919Sxy150489 regs_map_fail: 7604919Sxy150489 if (osdep->reg_handle != NULL) 7614919Sxy150489 ddi_regs_map_free(&osdep->reg_handle); 762*11532SGuoqing.Zhu@Sun.COM if (osdep->ich_flash_handle != NULL) 763*11532SGuoqing.Zhu@Sun.COM ddi_regs_map_free(&osdep->ich_flash_handle); 7644919Sxy150489 return (DDI_FAILURE); 7654919Sxy150489 } 7664919Sxy150489 7674919Sxy150489 static int 7683526Sxy150489 e1000g_set_driver_params(struct e1000g *Adapter) 7693526Sxy150489 { 7703526Sxy150489 struct e1000_hw *hw; 7713526Sxy150489 7724919Sxy150489 hw = &Adapter->shared; 7734919Sxy150489 7744919Sxy150489 /* Set MAC type and initialize hardware functions */ 7754919Sxy150489 if (e1000_setup_init_funcs(hw, B_TRUE) != E1000_SUCCESS) { 7764919Sxy150489 E1000G_DEBUGLOG_0(Adapter, CE_WARN, 7774919Sxy150489 "Could not setup hardware functions"); 7783526Sxy150489 return (DDI_FAILURE); 7793526Sxy150489 } 7803526Sxy150489 7814919Sxy150489 /* Get bus information */ 7824919Sxy150489 if (e1000_get_bus_info(hw) != E1000_SUCCESS) { 7834919Sxy150489 E1000G_DEBUGLOG_0(Adapter, CE_WARN, 7844919Sxy150489 "Could not get bus information"); 7854919Sxy150489 return (DDI_FAILURE); 7863526Sxy150489 } 7873526Sxy150489 7884919Sxy150489 e1000_read_pci_cfg(hw, PCI_COMMAND_REGISTER, &hw->bus.pci_cmd_word); 7894919Sxy150489 7904919Sxy150489 hw->mac.autoneg_failed = B_TRUE; 7914919Sxy150489 7926735Scc210113 /* Set the autoneg_wait_to_complete flag to B_FALSE */ 7936735Scc210113 hw->phy.autoneg_wait_to_complete = B_FALSE; 7943526Sxy150489 7953526Sxy150489 /* Adaptive IFS related changes */ 7964919Sxy150489 hw->mac.adaptive_ifs = B_TRUE; 7974919Sxy150489 7984919Sxy150489 /* Enable phy init script for IGP phy of 82541/82547 */ 7994919Sxy150489 if ((hw->mac.type == e1000_82547) || 8004919Sxy150489 (hw->mac.type == e1000_82541) || 8014919Sxy150489 (hw->mac.type == e1000_82547_rev_2) || 8024919Sxy150489 (hw->mac.type == e1000_82541_rev_2)) 8034919Sxy150489 e1000_init_script_state_82541(hw, B_TRUE); 8044919Sxy150489 8054919Sxy150489 /* Enable the TTL workaround for 82541/82547 */ 8064919Sxy150489 e1000_set_ttl_workaround_state_82541(hw, B_TRUE); 8073526Sxy150489 8084608Syy150190 #ifdef __sparc 8094608Syy150190 Adapter->strip_crc = B_TRUE; 8104608Syy150190 #else 8114608Syy150190 Adapter->strip_crc = B_FALSE; 8124608Syy150190 #endif 8134608Syy150190 81410680SMin.Xu@Sun.COM /* setup the maximum MTU size of the chip */ 81510680SMin.Xu@Sun.COM e1000g_setup_max_mtu(Adapter); 81610680SMin.Xu@Sun.COM 8174919Sxy150489 /* Get speed/duplex settings in conf file */ 8184919Sxy150489 hw->mac.forced_speed_duplex = ADVERTISE_100_FULL; 8194919Sxy150489 hw->phy.autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT; 8203526Sxy150489 e1000g_force_speed_duplex(Adapter); 8213526Sxy150489 8224919Sxy150489 /* Get Jumbo Frames settings in conf file */ 8233526Sxy150489 e1000g_get_max_frame_size(Adapter); 8243526Sxy150489 82511339SGuoqing.Zhu@Sun.COM /* Get conf file properties */ 82611339SGuoqing.Zhu@Sun.COM e1000g_get_conf(Adapter); 82711339SGuoqing.Zhu@Sun.COM 82810680SMin.Xu@Sun.COM /* enforce PCH limits */ 82910680SMin.Xu@Sun.COM e1000g_pch_limits(Adapter); 83010680SMin.Xu@Sun.COM 8313526Sxy150489 /* Set Rx/Tx buffer size */ 8326394Scc210113 e1000g_set_bufsize(Adapter); 8334919Sxy150489 8344919Sxy150489 /* Master Latency Timer */ 8354919Sxy150489 Adapter->master_latency_timer = DEFAULT_MASTER_LATENCY_TIMER; 8364919Sxy150489 8373526Sxy150489 /* copper options */ 8386735Scc210113 if (hw->phy.media_type == e1000_media_type_copper) { 8394919Sxy150489 hw->phy.mdix = 0; /* AUTO_ALL_MODES */ 8404919Sxy150489 hw->phy.disable_polarity_correction = B_FALSE; 8414919Sxy150489 hw->phy.ms_type = e1000_ms_hw_default; /* E1000_MASTER_SLAVE */ 8423526Sxy150489 } 8433526Sxy150489 8444919Sxy150489 /* The initial link state should be "unknown" */ 8454061Sxy150489 Adapter->link_state = LINK_STATE_UNKNOWN; 8464061Sxy150489 8475882Syy150190 /* Initialize rx parameters */ 8485882Syy150190 Adapter->rx_intr_delay = DEFAULT_RX_INTR_DELAY; 8495882Syy150190 Adapter->rx_intr_abs_delay = DEFAULT_RX_INTR_ABS_DELAY; 8505882Syy150190 8514919Sxy150489 /* Initialize tx parameters */ 8524919Sxy150489 Adapter->tx_intr_enable = DEFAULT_TX_INTR_ENABLE; 8534919Sxy150489 Adapter->tx_bcopy_thresh = DEFAULT_TX_BCOPY_THRESHOLD; 8545882Syy150190 Adapter->tx_intr_delay = DEFAULT_TX_INTR_DELAY; 8555882Syy150190 Adapter->tx_intr_abs_delay = DEFAULT_TX_INTR_ABS_DELAY; 8564919Sxy150489 8574919Sxy150489 /* Initialize rx parameters */ 8584919Sxy150489 Adapter->rx_bcopy_thresh = DEFAULT_RX_BCOPY_THRESHOLD; 8594919Sxy150489 8603526Sxy150489 return (DDI_SUCCESS); 8613526Sxy150489 } 8623526Sxy150489 8636394Scc210113 static void 86410680SMin.Xu@Sun.COM e1000g_setup_max_mtu(struct e1000g *Adapter) 86510680SMin.Xu@Sun.COM { 86610680SMin.Xu@Sun.COM struct e1000_mac_info *mac = &Adapter->shared.mac; 86710680SMin.Xu@Sun.COM struct e1000_phy_info *phy = &Adapter->shared.phy; 86810680SMin.Xu@Sun.COM 86910680SMin.Xu@Sun.COM switch (mac->type) { 87010680SMin.Xu@Sun.COM /* types that do not support jumbo frames */ 87110680SMin.Xu@Sun.COM case e1000_ich8lan: 87210680SMin.Xu@Sun.COM case e1000_82573: 87310680SMin.Xu@Sun.COM case e1000_82583: 87410680SMin.Xu@Sun.COM Adapter->max_mtu = ETHERMTU; 87510680SMin.Xu@Sun.COM break; 87610680SMin.Xu@Sun.COM /* ich9 supports jumbo frames except on one phy type */ 87710680SMin.Xu@Sun.COM case e1000_ich9lan: 87810680SMin.Xu@Sun.COM if (phy->type == e1000_phy_ife) 87910680SMin.Xu@Sun.COM Adapter->max_mtu = ETHERMTU; 88010680SMin.Xu@Sun.COM else 88110680SMin.Xu@Sun.COM Adapter->max_mtu = MAXIMUM_MTU_9K; 88210680SMin.Xu@Sun.COM break; 88310680SMin.Xu@Sun.COM /* pch can do jumbo frames up to 4K */ 88410680SMin.Xu@Sun.COM case e1000_pchlan: 88510680SMin.Xu@Sun.COM Adapter->max_mtu = MAXIMUM_MTU_4K; 88610680SMin.Xu@Sun.COM break; 88710680SMin.Xu@Sun.COM /* types with a special limit */ 88810680SMin.Xu@Sun.COM case e1000_82571: 88910680SMin.Xu@Sun.COM case e1000_82572: 89010680SMin.Xu@Sun.COM case e1000_82574: 89110680SMin.Xu@Sun.COM case e1000_80003es2lan: 89210680SMin.Xu@Sun.COM case e1000_ich10lan: 89310680SMin.Xu@Sun.COM Adapter->max_mtu = MAXIMUM_MTU_9K; 89410680SMin.Xu@Sun.COM break; 89510680SMin.Xu@Sun.COM /* default limit is 16K */ 89610680SMin.Xu@Sun.COM default: 89710680SMin.Xu@Sun.COM Adapter->max_mtu = FRAME_SIZE_UPTO_16K - 89810680SMin.Xu@Sun.COM sizeof (struct ether_vlan_header) - ETHERFCSL - 89910680SMin.Xu@Sun.COM E1000G_IPALIGNPRESERVEROOM; 90010680SMin.Xu@Sun.COM break; 90110680SMin.Xu@Sun.COM } 90210680SMin.Xu@Sun.COM } 90310680SMin.Xu@Sun.COM 90410680SMin.Xu@Sun.COM static void 9056394Scc210113 e1000g_set_bufsize(struct e1000g *Adapter) 9066394Scc210113 { 9076394Scc210113 struct e1000_mac_info *mac = &Adapter->shared.mac; 9086394Scc210113 uint64_t rx_size; 9096394Scc210113 uint64_t tx_size; 9106394Scc210113 9118073SMin.Xu@Sun.COM dev_info_t *devinfo = Adapter->dip; 9126394Scc210113 #ifdef __sparc 9136394Scc210113 ulong_t iommu_pagesize; 9148073SMin.Xu@Sun.COM #endif 9156394Scc210113 /* Get the system page size */ 9166394Scc210113 Adapter->sys_page_sz = ddi_ptob(devinfo, (ulong_t)1); 9178073SMin.Xu@Sun.COM 9188073SMin.Xu@Sun.COM #ifdef __sparc 9196394Scc210113 iommu_pagesize = dvma_pagesize(devinfo); 9206394Scc210113 if (iommu_pagesize != 0) { 9216394Scc210113 if (Adapter->sys_page_sz == iommu_pagesize) { 9226394Scc210113 if (iommu_pagesize > 0x4000) 9236394Scc210113 Adapter->sys_page_sz = 0x4000; 9246394Scc210113 } else { 9256394Scc210113 if (Adapter->sys_page_sz > iommu_pagesize) 9266394Scc210113 Adapter->sys_page_sz = iommu_pagesize; 9276394Scc210113 } 9286394Scc210113 } 9296986Smx205022 if (Adapter->lso_enable) { 9306986Smx205022 Adapter->dvma_page_num = E1000_LSO_MAXLEN / 9316986Smx205022 Adapter->sys_page_sz + E1000G_DEFAULT_DVMA_PAGE_NUM; 9326986Smx205022 } else { 9336986Smx205022 Adapter->dvma_page_num = Adapter->max_frame_size / 9346986Smx205022 Adapter->sys_page_sz + E1000G_DEFAULT_DVMA_PAGE_NUM; 9356986Smx205022 } 9366394Scc210113 ASSERT(Adapter->dvma_page_num >= E1000G_DEFAULT_DVMA_PAGE_NUM); 9376394Scc210113 #endif 9386394Scc210113 9396735Scc210113 Adapter->min_frame_size = ETHERMIN + ETHERFCSL; 9406735Scc210113 9418417SChenlu.Chen@Sun.COM if (Adapter->mem_workaround_82546 && 9428417SChenlu.Chen@Sun.COM ((mac->type == e1000_82545) || 9438178SChenlu.Chen@Sun.COM (mac->type == e1000_82546) || 9448417SChenlu.Chen@Sun.COM (mac->type == e1000_82546_rev_3))) { 9456394Scc210113 Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_2K; 9468178SChenlu.Chen@Sun.COM } else { 9478178SChenlu.Chen@Sun.COM rx_size = Adapter->max_frame_size + E1000G_IPALIGNPRESERVEROOM; 9488178SChenlu.Chen@Sun.COM if ((rx_size > FRAME_SIZE_UPTO_2K) && 9498178SChenlu.Chen@Sun.COM (rx_size <= FRAME_SIZE_UPTO_4K)) 9508178SChenlu.Chen@Sun.COM Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_4K; 9518178SChenlu.Chen@Sun.COM else if ((rx_size > FRAME_SIZE_UPTO_4K) && 9528178SChenlu.Chen@Sun.COM (rx_size <= FRAME_SIZE_UPTO_8K)) 9538178SChenlu.Chen@Sun.COM Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_8K; 9548178SChenlu.Chen@Sun.COM else if ((rx_size > FRAME_SIZE_UPTO_8K) && 9558178SChenlu.Chen@Sun.COM (rx_size <= FRAME_SIZE_UPTO_16K)) 9568178SChenlu.Chen@Sun.COM Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_16K; 9578178SChenlu.Chen@Sun.COM else 9588178SChenlu.Chen@Sun.COM Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_2K; 9598178SChenlu.Chen@Sun.COM } 9606394Scc210113 9616735Scc210113 tx_size = Adapter->max_frame_size; 9626394Scc210113 if ((tx_size > FRAME_SIZE_UPTO_2K) && (tx_size <= FRAME_SIZE_UPTO_4K)) 9636394Scc210113 Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_4K; 9646394Scc210113 else if ((tx_size > FRAME_SIZE_UPTO_4K) && 9656394Scc210113 (tx_size <= FRAME_SIZE_UPTO_8K)) 9666394Scc210113 Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_8K; 9676394Scc210113 else if ((tx_size > FRAME_SIZE_UPTO_8K) && 9686394Scc210113 (tx_size <= FRAME_SIZE_UPTO_16K)) 9696394Scc210113 Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_16K; 9706394Scc210113 else 9716394Scc210113 Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_2K; 9726394Scc210113 9736394Scc210113 /* 9746394Scc210113 * For Wiseman adapters we have an requirement of having receive 9756394Scc210113 * buffers aligned at 256 byte boundary. Since Livengood does not 9766394Scc210113 * require this and forcing it for all hardwares will have 9776394Scc210113 * performance implications, I am making it applicable only for 9786394Scc210113 * Wiseman and for Jumbo frames enabled mode as rest of the time, 9796394Scc210113 * it is okay to have normal frames...but it does involve a 9806394Scc210113 * potential risk where we may loose data if buffer is not 9816394Scc210113 * aligned...so all wiseman boards to have 256 byte aligned 9826394Scc210113 * buffers 9836394Scc210113 */ 9846394Scc210113 if (mac->type < e1000_82543) 9856394Scc210113 Adapter->rx_buf_align = RECEIVE_BUFFER_ALIGN_SIZE; 9866394Scc210113 else 9876394Scc210113 Adapter->rx_buf_align = 1; 9886394Scc210113 } 9896394Scc210113 9903526Sxy150489 /* 9914919Sxy150489 * e1000g_detach - driver detach 9924919Sxy150489 * 9934919Sxy150489 * The detach() function is the complement of the attach routine. 9944919Sxy150489 * If cmd is set to DDI_DETACH, detach() is used to remove the 9954919Sxy150489 * state associated with a given instance of a device node 9964919Sxy150489 * prior to the removal of that instance from the system. 9974919Sxy150489 * 9984919Sxy150489 * The detach() function will be called once for each instance 9994919Sxy150489 * of the device for which there has been a successful attach() 10004919Sxy150489 * once there are no longer any opens on the device. 10014919Sxy150489 * 10024919Sxy150489 * Interrupts routine are disabled, All memory allocated by this 10034919Sxy150489 * driver are freed. 10043526Sxy150489 */ 10053526Sxy150489 static int 10064919Sxy150489 e1000g_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd) 10073526Sxy150489 { 10083526Sxy150489 struct e1000g *Adapter; 10094982Syy150190 boolean_t rx_drain; 10103526Sxy150489 10113526Sxy150489 switch (cmd) { 10123526Sxy150489 default: 10133526Sxy150489 return (DDI_FAILURE); 10143526Sxy150489 10153526Sxy150489 case DDI_SUSPEND: 10163526Sxy150489 return (e1000g_suspend(devinfo)); 10173526Sxy150489 10183526Sxy150489 case DDI_DETACH: 10193526Sxy150489 break; 10203526Sxy150489 } 10213526Sxy150489 10223526Sxy150489 Adapter = (struct e1000g *)ddi_get_driver_private(devinfo); 10233526Sxy150489 if (Adapter == NULL) 10243526Sxy150489 return (DDI_FAILURE); 10253526Sxy150489 10268275SEric Cheng rx_drain = e1000g_rx_drain(Adapter); 10278275SEric Cheng if (!rx_drain && !e1000g_force_detach) 10288275SEric Cheng return (DDI_FAILURE); 10298275SEric Cheng 10304919Sxy150489 if (mac_unregister(Adapter->mh) != 0) { 10314919Sxy150489 e1000g_log(Adapter, CE_WARN, "Unregister MAC failed"); 10324919Sxy150489 return (DDI_FAILURE); 10334919Sxy150489 } 10344919Sxy150489 Adapter->attach_progress &= ~ATTACH_PROGRESS_MAC; 10354919Sxy150489 10368479SChenlu.Chen@Sun.COM ASSERT(!(Adapter->e1000g_state & E1000G_STARTED)); 10374982Syy150190 10388850SMin.Xu@Sun.COM if (!e1000g_force_detach && !rx_drain) 10398850SMin.Xu@Sun.COM return (DDI_FAILURE); 10403526Sxy150489 10413526Sxy150489 e1000g_unattach(devinfo, Adapter); 10423526Sxy150489 10433526Sxy150489 return (DDI_SUCCESS); 10443526Sxy150489 } 10453526Sxy150489 10464982Syy150190 /* 10474982Syy150190 * e1000g_free_priv_devi_node - free a priv_dip entry for driver instance 10484982Syy150190 */ 10498850SMin.Xu@Sun.COM void 10508850SMin.Xu@Sun.COM e1000g_free_priv_devi_node(private_devi_list_t *devi_node) 10514982Syy150190 { 10524982Syy150190 ASSERT(e1000g_private_devi_list != NULL); 10538850SMin.Xu@Sun.COM ASSERT(devi_node != NULL); 10548850SMin.Xu@Sun.COM 10558850SMin.Xu@Sun.COM if (devi_node->prev != NULL) 10568850SMin.Xu@Sun.COM devi_node->prev->next = devi_node->next; 10578850SMin.Xu@Sun.COM if (devi_node->next != NULL) 10588850SMin.Xu@Sun.COM devi_node->next->prev = devi_node->prev; 10598850SMin.Xu@Sun.COM if (devi_node == e1000g_private_devi_list) 10608850SMin.Xu@Sun.COM e1000g_private_devi_list = devi_node->next; 10618850SMin.Xu@Sun.COM 10628850SMin.Xu@Sun.COM kmem_free(devi_node->priv_dip, 10638850SMin.Xu@Sun.COM sizeof (struct dev_info)); 10648850SMin.Xu@Sun.COM kmem_free(devi_node, 10658850SMin.Xu@Sun.COM sizeof (private_devi_list_t)); 10664982Syy150190 } 10674982Syy150190 10683526Sxy150489 static void 10693526Sxy150489 e1000g_unattach(dev_info_t *devinfo, struct e1000g *Adapter) 10703526Sxy150489 { 10718850SMin.Xu@Sun.COM private_devi_list_t *devi_node; 10727133Scc210113 int result; 10737133Scc210113 10744919Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_ENABLE_INTR) { 10753526Sxy150489 (void) e1000g_disable_intrs(Adapter); 10763526Sxy150489 } 10773526Sxy150489 10784919Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_MAC) { 10793526Sxy150489 (void) mac_unregister(Adapter->mh); 10803526Sxy150489 } 10813526Sxy150489 10824919Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_ADD_INTR) { 10833526Sxy150489 (void) e1000g_rem_intrs(Adapter); 10843526Sxy150489 } 10853526Sxy150489 10864919Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_SETUP) { 10873526Sxy150489 (void) ddi_prop_remove_all(devinfo); 10883526Sxy150489 } 10893526Sxy150489 10903526Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_KSTATS) { 10913526Sxy150489 kstat_delete((kstat_t *)Adapter->e1000g_ksp); 10923526Sxy150489 } 10933526Sxy150489 10943526Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_INIT) { 10954919Sxy150489 stop_link_timer(Adapter); 10967133Scc210113 10977133Scc210113 mutex_enter(&e1000g_nvm_lock); 10987133Scc210113 result = e1000_reset_hw(&Adapter->shared); 10997133Scc210113 mutex_exit(&e1000g_nvm_lock); 11007133Scc210113 11017133Scc210113 if (result != E1000_SUCCESS) { 11025273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 11035273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST); 11045273Sgl147354 } 11053526Sxy150489 } 11063526Sxy150489 11079770SChangqing.Li@Sun.COM e1000g_release_multicast(Adapter); 11089770SChangqing.Li@Sun.COM 11094919Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_REGS_MAP) { 11104919Sxy150489 if (Adapter->osdep.reg_handle != NULL) 11114919Sxy150489 ddi_regs_map_free(&Adapter->osdep.reg_handle); 11124919Sxy150489 if (Adapter->osdep.ich_flash_handle != NULL) 11134919Sxy150489 ddi_regs_map_free(&Adapter->osdep.ich_flash_handle); 1114*11532SGuoqing.Zhu@Sun.COM if (Adapter->osdep.io_reg_handle != NULL) 1115*11532SGuoqing.Zhu@Sun.COM ddi_regs_map_free(&Adapter->osdep.io_reg_handle); 11163526Sxy150489 } 11173526Sxy150489 11184919Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_PCI_CONFIG) { 11194919Sxy150489 if (Adapter->osdep.cfg_handle != NULL) 11204919Sxy150489 pci_config_teardown(&Adapter->osdep.cfg_handle); 11213526Sxy150489 } 11223526Sxy150489 11233526Sxy150489 if (Adapter->attach_progress & ATTACH_PROGRESS_LOCKS) { 11243526Sxy150489 e1000g_destroy_locks(Adapter); 11253526Sxy150489 } 11263526Sxy150489 11275273Sgl147354 if (Adapter->attach_progress & ATTACH_PROGRESS_FMINIT) { 11285273Sgl147354 e1000g_fm_fini(Adapter); 11295273Sgl147354 } 11305273Sgl147354 11318850SMin.Xu@Sun.COM mutex_enter(&e1000g_rx_detach_lock); 11329190SMin.Xu@Sun.COM if (e1000g_force_detach && (Adapter->priv_devi_node != NULL)) { 11338850SMin.Xu@Sun.COM devi_node = Adapter->priv_devi_node; 11348850SMin.Xu@Sun.COM devi_node->flag |= E1000G_PRIV_DEVI_DETACH; 11358850SMin.Xu@Sun.COM 11368850SMin.Xu@Sun.COM if (devi_node->pending_rx_count == 0) { 11378850SMin.Xu@Sun.COM e1000g_free_priv_devi_node(devi_node); 11388850SMin.Xu@Sun.COM } 11398850SMin.Xu@Sun.COM } 11408850SMin.Xu@Sun.COM mutex_exit(&e1000g_rx_detach_lock); 11418850SMin.Xu@Sun.COM 11423526Sxy150489 kmem_free((caddr_t)Adapter, sizeof (struct e1000g)); 11433526Sxy150489 11443526Sxy150489 /* 11453526Sxy150489 * Another hotplug spec requirement, 11463526Sxy150489 * run ddi_set_driver_private(devinfo, null); 11473526Sxy150489 */ 11483526Sxy150489 ddi_set_driver_private(devinfo, NULL); 11493526Sxy150489 } 11503526Sxy150489 1151*11532SGuoqing.Zhu@Sun.COM /* 1152*11532SGuoqing.Zhu@Sun.COM * Get the BAR type and rnumber for a given PCI BAR offset 1153*11532SGuoqing.Zhu@Sun.COM */ 1154*11532SGuoqing.Zhu@Sun.COM static int 1155*11532SGuoqing.Zhu@Sun.COM e1000g_get_bar_info(dev_info_t *dip, int bar_offset, bar_info_t *bar_info) 1156*11532SGuoqing.Zhu@Sun.COM { 1157*11532SGuoqing.Zhu@Sun.COM pci_regspec_t *regs; 1158*11532SGuoqing.Zhu@Sun.COM uint_t regs_length; 1159*11532SGuoqing.Zhu@Sun.COM int type, rnumber; 1160*11532SGuoqing.Zhu@Sun.COM 1161*11532SGuoqing.Zhu@Sun.COM ASSERT((bar_offset >= PCI_CONF_BASE0) && 1162*11532SGuoqing.Zhu@Sun.COM (bar_offset <= PCI_CONF_BASE5)); 1163*11532SGuoqing.Zhu@Sun.COM 1164*11532SGuoqing.Zhu@Sun.COM /* 1165*11532SGuoqing.Zhu@Sun.COM * Get the DDI "reg" property 1166*11532SGuoqing.Zhu@Sun.COM */ 1167*11532SGuoqing.Zhu@Sun.COM if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip, 1168*11532SGuoqing.Zhu@Sun.COM DDI_PROP_DONTPASS, "reg", (int **)®s, 1169*11532SGuoqing.Zhu@Sun.COM ®s_length) != DDI_PROP_SUCCESS) { 1170*11532SGuoqing.Zhu@Sun.COM return (DDI_FAILURE); 1171*11532SGuoqing.Zhu@Sun.COM } 1172*11532SGuoqing.Zhu@Sun.COM 1173*11532SGuoqing.Zhu@Sun.COM /* 1174*11532SGuoqing.Zhu@Sun.COM * Check the BAR offset 1175*11532SGuoqing.Zhu@Sun.COM */ 1176*11532SGuoqing.Zhu@Sun.COM for (rnumber = 0; rnumber < regs_length; ++rnumber) { 1177*11532SGuoqing.Zhu@Sun.COM if (PCI_REG_REG_G(regs[rnumber].pci_phys_hi) == bar_offset) { 1178*11532SGuoqing.Zhu@Sun.COM type = regs[rnumber].pci_phys_hi & PCI_ADDR_MASK; 1179*11532SGuoqing.Zhu@Sun.COM break; 1180*11532SGuoqing.Zhu@Sun.COM } 1181*11532SGuoqing.Zhu@Sun.COM } 1182*11532SGuoqing.Zhu@Sun.COM 1183*11532SGuoqing.Zhu@Sun.COM ddi_prop_free(regs); 1184*11532SGuoqing.Zhu@Sun.COM 1185*11532SGuoqing.Zhu@Sun.COM if (rnumber >= regs_length) 1186*11532SGuoqing.Zhu@Sun.COM return (DDI_FAILURE); 1187*11532SGuoqing.Zhu@Sun.COM 1188*11532SGuoqing.Zhu@Sun.COM switch (type) { 1189*11532SGuoqing.Zhu@Sun.COM case PCI_ADDR_CONFIG: 1190*11532SGuoqing.Zhu@Sun.COM bar_info->type = E1000G_BAR_CONFIG; 1191*11532SGuoqing.Zhu@Sun.COM break; 1192*11532SGuoqing.Zhu@Sun.COM case PCI_ADDR_IO: 1193*11532SGuoqing.Zhu@Sun.COM bar_info->type = E1000G_BAR_IO; 1194*11532SGuoqing.Zhu@Sun.COM break; 1195*11532SGuoqing.Zhu@Sun.COM case PCI_ADDR_MEM32: 1196*11532SGuoqing.Zhu@Sun.COM bar_info->type = E1000G_BAR_MEM32; 1197*11532SGuoqing.Zhu@Sun.COM break; 1198*11532SGuoqing.Zhu@Sun.COM case PCI_ADDR_MEM64: 1199*11532SGuoqing.Zhu@Sun.COM bar_info->type = E1000G_BAR_MEM64; 1200*11532SGuoqing.Zhu@Sun.COM break; 1201*11532SGuoqing.Zhu@Sun.COM default: 1202*11532SGuoqing.Zhu@Sun.COM return (DDI_FAILURE); 1203*11532SGuoqing.Zhu@Sun.COM } 1204*11532SGuoqing.Zhu@Sun.COM bar_info->rnumber = rnumber; 1205*11532SGuoqing.Zhu@Sun.COM return (DDI_SUCCESS); 1206*11532SGuoqing.Zhu@Sun.COM } 1207*11532SGuoqing.Zhu@Sun.COM 12083526Sxy150489 static void 12093526Sxy150489 e1000g_init_locks(struct e1000g *Adapter) 12103526Sxy150489 { 12113526Sxy150489 e1000g_tx_ring_t *tx_ring; 12123526Sxy150489 e1000g_rx_ring_t *rx_ring; 12133526Sxy150489 12143526Sxy150489 rw_init(&Adapter->chip_lock, NULL, 12153526Sxy150489 RW_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 12164919Sxy150489 mutex_init(&Adapter->link_lock, NULL, 12173526Sxy150489 MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 12184919Sxy150489 mutex_init(&Adapter->watchdog_lock, NULL, 12193526Sxy150489 MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 12203526Sxy150489 12213526Sxy150489 tx_ring = Adapter->tx_ring; 12223526Sxy150489 12233526Sxy150489 mutex_init(&tx_ring->tx_lock, NULL, 12243526Sxy150489 MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 12253526Sxy150489 mutex_init(&tx_ring->usedlist_lock, NULL, 12263526Sxy150489 MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 12273526Sxy150489 mutex_init(&tx_ring->freelist_lock, NULL, 12283526Sxy150489 MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 12293526Sxy150489 12303526Sxy150489 rx_ring = Adapter->rx_ring; 12313526Sxy150489 12327436STed.You@Sun.COM mutex_init(&rx_ring->rx_lock, NULL, 12337436STed.You@Sun.COM MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 12343526Sxy150489 } 12353526Sxy150489 12363526Sxy150489 static void 12373526Sxy150489 e1000g_destroy_locks(struct e1000g *Adapter) 12383526Sxy150489 { 12393526Sxy150489 e1000g_tx_ring_t *tx_ring; 12403526Sxy150489 e1000g_rx_ring_t *rx_ring; 12413526Sxy150489 12423526Sxy150489 tx_ring = Adapter->tx_ring; 12433526Sxy150489 mutex_destroy(&tx_ring->tx_lock); 12443526Sxy150489 mutex_destroy(&tx_ring->usedlist_lock); 12453526Sxy150489 mutex_destroy(&tx_ring->freelist_lock); 12463526Sxy150489 12473526Sxy150489 rx_ring = Adapter->rx_ring; 12487436STed.You@Sun.COM mutex_destroy(&rx_ring->rx_lock); 12493526Sxy150489 12504919Sxy150489 mutex_destroy(&Adapter->link_lock); 12514919Sxy150489 mutex_destroy(&Adapter->watchdog_lock); 12523526Sxy150489 rw_destroy(&Adapter->chip_lock); 125310680SMin.Xu@Sun.COM 125410680SMin.Xu@Sun.COM /* destory mutex initialized in shared code */ 125510680SMin.Xu@Sun.COM e1000_destroy_hw_mutex(&Adapter->shared); 12563526Sxy150489 } 12573526Sxy150489 12583526Sxy150489 static int 12593526Sxy150489 e1000g_resume(dev_info_t *devinfo) 12603526Sxy150489 { 12613526Sxy150489 struct e1000g *Adapter; 12623526Sxy150489 12633526Sxy150489 Adapter = (struct e1000g *)ddi_get_driver_private(devinfo); 12643526Sxy150489 if (Adapter == NULL) 12658479SChenlu.Chen@Sun.COM e1000g_log(Adapter, CE_PANIC, 12668479SChenlu.Chen@Sun.COM "Instance pointer is null\n"); 12678479SChenlu.Chen@Sun.COM 12688479SChenlu.Chen@Sun.COM if (Adapter->dip != devinfo) 12698479SChenlu.Chen@Sun.COM e1000g_log(Adapter, CE_PANIC, 12708479SChenlu.Chen@Sun.COM "Devinfo is not the same as saved devinfo\n"); 12718479SChenlu.Chen@Sun.COM 12728479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 12738479SChenlu.Chen@Sun.COM 12748479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_STARTED) { 12758479SChenlu.Chen@Sun.COM if (e1000g_start(Adapter, B_FALSE) != DDI_SUCCESS) { 12768479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 12778479SChenlu.Chen@Sun.COM /* 12788479SChenlu.Chen@Sun.COM * We note the failure, but return success, as the 12798479SChenlu.Chen@Sun.COM * system is still usable without this controller. 12808479SChenlu.Chen@Sun.COM */ 12818479SChenlu.Chen@Sun.COM e1000g_log(Adapter, CE_WARN, 12828479SChenlu.Chen@Sun.COM "e1000g_resume: failed to restart controller\n"); 12838479SChenlu.Chen@Sun.COM return (DDI_SUCCESS); 12848479SChenlu.Chen@Sun.COM } 12858479SChenlu.Chen@Sun.COM /* Enable and start the watchdog timer */ 12868479SChenlu.Chen@Sun.COM enable_watchdog_timer(Adapter); 12878479SChenlu.Chen@Sun.COM } 12888479SChenlu.Chen@Sun.COM 12898479SChenlu.Chen@Sun.COM Adapter->e1000g_state &= ~E1000G_SUSPENDED; 12908479SChenlu.Chen@Sun.COM 12918479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 12923526Sxy150489 12933526Sxy150489 return (DDI_SUCCESS); 12943526Sxy150489 } 12953526Sxy150489 12963526Sxy150489 static int 12973526Sxy150489 e1000g_suspend(dev_info_t *devinfo) 12983526Sxy150489 { 12993526Sxy150489 struct e1000g *Adapter; 13003526Sxy150489 13013526Sxy150489 Adapter = (struct e1000g *)ddi_get_driver_private(devinfo); 13023526Sxy150489 if (Adapter == NULL) 13033526Sxy150489 return (DDI_FAILURE); 13043526Sxy150489 13058479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 13068479SChenlu.Chen@Sun.COM 13078479SChenlu.Chen@Sun.COM Adapter->e1000g_state |= E1000G_SUSPENDED; 13088479SChenlu.Chen@Sun.COM 13098479SChenlu.Chen@Sun.COM /* if the port isn't plumbed, we can simply return */ 13108479SChenlu.Chen@Sun.COM if (!(Adapter->e1000g_state & E1000G_STARTED)) { 13118479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 13128479SChenlu.Chen@Sun.COM return (DDI_SUCCESS); 13138479SChenlu.Chen@Sun.COM } 13148479SChenlu.Chen@Sun.COM 13158479SChenlu.Chen@Sun.COM e1000g_stop(Adapter, B_FALSE); 13168479SChenlu.Chen@Sun.COM 13178479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 13188479SChenlu.Chen@Sun.COM 13198479SChenlu.Chen@Sun.COM /* Disable and stop all the timers */ 13208479SChenlu.Chen@Sun.COM disable_watchdog_timer(Adapter); 13218479SChenlu.Chen@Sun.COM stop_link_timer(Adapter); 13228479SChenlu.Chen@Sun.COM stop_82547_timer(Adapter->tx_ring); 13233526Sxy150489 13243526Sxy150489 return (DDI_SUCCESS); 13253526Sxy150489 } 13263526Sxy150489 13273526Sxy150489 static int 13283526Sxy150489 e1000g_init(struct e1000g *Adapter) 13293526Sxy150489 { 13303526Sxy150489 uint32_t pba; 13314919Sxy150489 uint32_t high_water; 13323526Sxy150489 struct e1000_hw *hw; 13334061Sxy150489 clock_t link_timeout; 13347133Scc210113 int result; 13353526Sxy150489 13364919Sxy150489 hw = &Adapter->shared; 13373526Sxy150489 13383526Sxy150489 /* 13393526Sxy150489 * reset to put the hardware in a known state 13403526Sxy150489 * before we try to do anything with the eeprom 13413526Sxy150489 */ 13427133Scc210113 mutex_enter(&e1000g_nvm_lock); 13437133Scc210113 result = e1000_reset_hw(hw); 13447133Scc210113 mutex_exit(&e1000g_nvm_lock); 13457133Scc210113 13467133Scc210113 if (result != E1000_SUCCESS) { 13475273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 13485273Sgl147354 goto init_fail; 13495273Sgl147354 } 13503526Sxy150489 13517133Scc210113 mutex_enter(&e1000g_nvm_lock); 13527133Scc210113 result = e1000_validate_nvm_checksum(hw); 13537133Scc210113 if (result < E1000_SUCCESS) { 13544061Sxy150489 /* 13554061Sxy150489 * Some PCI-E parts fail the first check due to 13564061Sxy150489 * the link being in sleep state. Call it again, 13574061Sxy150489 * if it fails a second time its a real issue. 13584061Sxy150489 */ 13597133Scc210113 result = e1000_validate_nvm_checksum(hw); 13607133Scc210113 } 13617133Scc210113 mutex_exit(&e1000g_nvm_lock); 13627133Scc210113 13637133Scc210113 if (result < E1000_SUCCESS) { 13647133Scc210113 e1000g_log(Adapter, CE_WARN, 13657133Scc210113 "Invalid NVM checksum. Please contact " 13667133Scc210113 "the vendor to update the NVM."); 13677133Scc210113 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 13687133Scc210113 goto init_fail; 13697133Scc210113 } 13707133Scc210113 13717133Scc210113 result = 0; 13723526Sxy150489 #ifdef __sparc 13733526Sxy150489 /* 13747607STed.You@Sun.COM * First, we try to get the local ethernet address from OBP. If 13757133Scc210113 * failed, then we get it from the EEPROM of NIC card. 13763526Sxy150489 */ 13777133Scc210113 result = e1000g_find_mac_address(Adapter); 13787133Scc210113 #endif 13793526Sxy150489 /* Get the local ethernet address. */ 13807133Scc210113 if (!result) { 13817133Scc210113 mutex_enter(&e1000g_nvm_lock); 13827140Scc210113 result = e1000_read_mac_addr(hw); 13837133Scc210113 mutex_exit(&e1000g_nvm_lock); 13847133Scc210113 } 13857133Scc210113 13867133Scc210113 if (result < E1000_SUCCESS) { 13873526Sxy150489 e1000g_log(Adapter, CE_WARN, "Read mac addr failed"); 13885273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 13893526Sxy150489 goto init_fail; 13903526Sxy150489 } 13913526Sxy150489 13923526Sxy150489 /* check for valid mac address */ 13934919Sxy150489 if (!is_valid_mac_addr(hw->mac.addr)) { 13943526Sxy150489 e1000g_log(Adapter, CE_WARN, "Invalid mac addr"); 13955273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 13963526Sxy150489 goto init_fail; 13973526Sxy150489 } 13983526Sxy150489 13994919Sxy150489 /* Set LAA state for 82571 chipset */ 14004919Sxy150489 e1000_set_laa_state_82571(hw, B_TRUE); 14013526Sxy150489 14023526Sxy150489 /* Master Latency Timer implementation */ 14034919Sxy150489 if (Adapter->master_latency_timer) { 14044919Sxy150489 pci_config_put8(Adapter->osdep.cfg_handle, 14054919Sxy150489 PCI_CONF_LATENCY_TIMER, Adapter->master_latency_timer); 14063526Sxy150489 } 14073526Sxy150489 14084919Sxy150489 if (hw->mac.type < e1000_82547) { 14093526Sxy150489 /* 14103526Sxy150489 * Total FIFO is 64K 14113526Sxy150489 */ 14126735Scc210113 if (Adapter->max_frame_size > FRAME_SIZE_UPTO_8K) 14133526Sxy150489 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ 14143526Sxy150489 else 14153526Sxy150489 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ 14167140Scc210113 } else if ((hw->mac.type == e1000_82571) || 14177140Scc210113 (hw->mac.type == e1000_82572) || 14187140Scc210113 (hw->mac.type == e1000_80003es2lan)) { 14193526Sxy150489 /* 14203526Sxy150489 * Total FIFO is 48K 14213526Sxy150489 */ 14226735Scc210113 if (Adapter->max_frame_size > FRAME_SIZE_UPTO_8K) 14233526Sxy150489 pba = E1000_PBA_30K; /* 30K for Rx, 18K for Tx */ 14243526Sxy150489 else 14253526Sxy150489 pba = E1000_PBA_38K; /* 38K for Rx, 10K for Tx */ 14267607STed.You@Sun.COM } else if (hw->mac.type == e1000_82573) { 14277607STed.You@Sun.COM pba = E1000_PBA_20K; /* 20K for Rx, 12K for Tx */ 14287607STed.You@Sun.COM } else if (hw->mac.type == e1000_82574) { 14297607STed.You@Sun.COM /* Keep adapter default: 20K for Rx, 20K for Tx */ 14307607STed.You@Sun.COM pba = E1000_READ_REG(hw, E1000_PBA); 14314919Sxy150489 } else if (hw->mac.type == e1000_ich8lan) { 14323526Sxy150489 pba = E1000_PBA_8K; /* 8K for Rx, 12K for Tx */ 14334919Sxy150489 } else if (hw->mac.type == e1000_ich9lan) { 14347607STed.You@Sun.COM pba = E1000_PBA_10K; 14357607STed.You@Sun.COM } else if (hw->mac.type == e1000_ich10lan) { 14367607STed.You@Sun.COM pba = E1000_PBA_10K; 143710680SMin.Xu@Sun.COM } else if (hw->mac.type == e1000_pchlan) { 143810680SMin.Xu@Sun.COM pba = E1000_PBA_26K; 14393526Sxy150489 } else { 14403526Sxy150489 /* 14413526Sxy150489 * Total FIFO is 40K 14423526Sxy150489 */ 14436735Scc210113 if (Adapter->max_frame_size > FRAME_SIZE_UPTO_8K) 14443526Sxy150489 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ 14453526Sxy150489 else 14463526Sxy150489 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ 14473526Sxy150489 } 14484919Sxy150489 E1000_WRITE_REG(hw, E1000_PBA, pba); 14493526Sxy150489 14503526Sxy150489 /* 14513526Sxy150489 * These parameters set thresholds for the adapter's generation(Tx) 14523526Sxy150489 * and response(Rx) to Ethernet PAUSE frames. These are just threshold 14533526Sxy150489 * settings. Flow control is enabled or disabled in the configuration 14543526Sxy150489 * file. 14553526Sxy150489 * High-water mark is set down from the top of the rx fifo (not 14563526Sxy150489 * sensitive to max_frame_size) and low-water is set just below 14573526Sxy150489 * high-water mark. 14584919Sxy150489 * The high water mark must be low enough to fit one full frame above 14594919Sxy150489 * it in the rx FIFO. Should be the lower of: 14604919Sxy150489 * 90% of the Rx FIFO size and the full Rx FIFO size minus the early 14614919Sxy150489 * receive size (assuming ERT set to E1000_ERT_2048), or the full 14624919Sxy150489 * Rx FIFO size minus one full frame. 14633526Sxy150489 */ 14644919Sxy150489 high_water = min(((pba << 10) * 9 / 10), 14658479SChenlu.Chen@Sun.COM ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574 || 14668479SChenlu.Chen@Sun.COM hw->mac.type == e1000_ich9lan || hw->mac.type == e1000_ich10lan) ? 14674919Sxy150489 ((pba << 10) - (E1000_ERT_2048 << 3)) : 14686735Scc210113 ((pba << 10) - Adapter->max_frame_size))); 14696735Scc210113 14706735Scc210113 hw->fc.high_water = high_water & 0xFFF8; 14716735Scc210113 hw->fc.low_water = hw->fc.high_water - 8; 14724919Sxy150489 14734919Sxy150489 if (hw->mac.type == e1000_80003es2lan) 14746735Scc210113 hw->fc.pause_time = 0xFFFF; 14754919Sxy150489 else 14766735Scc210113 hw->fc.pause_time = E1000_FC_PAUSE_TIME; 14776735Scc210113 hw->fc.send_xon = B_TRUE; 14783526Sxy150489 14793526Sxy150489 /* 14803526Sxy150489 * Reset the adapter hardware the second time. 14813526Sxy150489 */ 14827133Scc210113 mutex_enter(&e1000g_nvm_lock); 14837133Scc210113 result = e1000_reset_hw(hw); 14847133Scc210113 mutex_exit(&e1000g_nvm_lock); 14857133Scc210113 14867133Scc210113 if (result != E1000_SUCCESS) { 14875273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 14885273Sgl147354 goto init_fail; 14895273Sgl147354 } 14903526Sxy150489 14913526Sxy150489 /* disable wakeup control by default */ 14924919Sxy150489 if (hw->mac.type >= e1000_82544) 14934919Sxy150489 E1000_WRITE_REG(hw, E1000_WUC, 0); 14943526Sxy150489 14958178SChenlu.Chen@Sun.COM /* 14968178SChenlu.Chen@Sun.COM * MWI should be disabled on 82546. 14978178SChenlu.Chen@Sun.COM */ 14988178SChenlu.Chen@Sun.COM if (hw->mac.type == e1000_82546) 14998178SChenlu.Chen@Sun.COM e1000_pci_clear_mwi(hw); 15008178SChenlu.Chen@Sun.COM else 15018178SChenlu.Chen@Sun.COM e1000_pci_set_mwi(hw); 15023526Sxy150489 15033526Sxy150489 /* 15043526Sxy150489 * Configure/Initialize hardware 15053526Sxy150489 */ 15067133Scc210113 mutex_enter(&e1000g_nvm_lock); 15077133Scc210113 result = e1000_init_hw(hw); 15087133Scc210113 mutex_exit(&e1000g_nvm_lock); 15097133Scc210113 15107133Scc210113 if (result < E1000_SUCCESS) { 15113526Sxy150489 e1000g_log(Adapter, CE_WARN, "Initialize hw failed"); 15125273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 15133526Sxy150489 goto init_fail; 15143526Sxy150489 } 15153526Sxy150489 15167436STed.You@Sun.COM /* 15177436STed.You@Sun.COM * Restore LED settings to the default from EEPROM 15187436STed.You@Sun.COM * to meet the standard for Sun platforms. 15197436STed.You@Sun.COM */ 152010605SMin.Xu@Sun.COM (void) e1000_cleanup_led(hw); 15217436STed.You@Sun.COM 15223526Sxy150489 /* Disable Smart Power Down */ 15233526Sxy150489 phy_spd_state(hw, B_FALSE); 15243526Sxy150489 15255082Syy150190 /* Make sure driver has control */ 15265082Syy150190 e1000g_get_driver_control(hw); 15275082Syy150190 15283526Sxy150489 /* 15293526Sxy150489 * Initialize unicast addresses. 15303526Sxy150489 */ 15313526Sxy150489 e1000g_init_unicst(Adapter); 15323526Sxy150489 15333526Sxy150489 /* 15343526Sxy150489 * Setup and initialize the mctable structures. After this routine 15353526Sxy150489 * completes Multicast table will be set 15363526Sxy150489 */ 153710680SMin.Xu@Sun.COM e1000_update_mc_addr_list(hw, 153810680SMin.Xu@Sun.COM (uint8_t *)Adapter->mcast_table, Adapter->mcast_count); 15394919Sxy150489 msec_delay(5); 15403526Sxy150489 15413526Sxy150489 /* 15423526Sxy150489 * Implement Adaptive IFS 15433526Sxy150489 */ 15443526Sxy150489 e1000_reset_adaptive(hw); 15453526Sxy150489 15463526Sxy150489 /* Setup Interrupt Throttling Register */ 15475882Syy150190 if (hw->mac.type >= e1000_82540) { 15485882Syy150190 E1000_WRITE_REG(hw, E1000_ITR, Adapter->intr_throttling_rate); 15495882Syy150190 } else 15505882Syy150190 Adapter->intr_adaptive = B_FALSE; 15513526Sxy150489 15524061Sxy150489 /* Start the timer for link setup */ 15534919Sxy150489 if (hw->mac.autoneg) 15544919Sxy150489 link_timeout = PHY_AUTO_NEG_LIMIT * drv_usectohz(100000); 15554061Sxy150489 else 15564919Sxy150489 link_timeout = PHY_FORCE_LIMIT * drv_usectohz(100000); 15574919Sxy150489 15584919Sxy150489 mutex_enter(&Adapter->link_lock); 15596735Scc210113 if (hw->phy.autoneg_wait_to_complete) { 15604061Sxy150489 Adapter->link_complete = B_TRUE; 15613526Sxy150489 } else { 15624061Sxy150489 Adapter->link_complete = B_FALSE; 15634061Sxy150489 Adapter->link_tid = timeout(e1000g_link_timer, 15644061Sxy150489 (void *)Adapter, link_timeout); 15653526Sxy150489 } 15664919Sxy150489 mutex_exit(&Adapter->link_lock); 15673526Sxy150489 15685082Syy150190 /* Save the state of the phy */ 15695082Syy150190 e1000g_get_phy_state(Adapter); 15705082Syy150190 15716512Ssowmini e1000g_param_sync(Adapter); 15726512Ssowmini 15733526Sxy150489 Adapter->init_count++; 15743526Sxy150489 15755273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.cfg_handle) != DDI_FM_OK) { 15765273Sgl147354 goto init_fail; 15775273Sgl147354 } 15785273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 15795273Sgl147354 goto init_fail; 15805273Sgl147354 } 15815273Sgl147354 15828275SEric Cheng Adapter->poll_mode = e1000g_poll_mode; 15838275SEric Cheng 15843526Sxy150489 return (DDI_SUCCESS); 15853526Sxy150489 15863526Sxy150489 init_fail: 15875273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST); 15883526Sxy150489 return (DDI_FAILURE); 15893526Sxy150489 } 15903526Sxy150489 15918850SMin.Xu@Sun.COM static int 15928850SMin.Xu@Sun.COM e1000g_alloc_rx_data(struct e1000g *Adapter) 15938850SMin.Xu@Sun.COM { 15948850SMin.Xu@Sun.COM e1000g_rx_ring_t *rx_ring; 15958850SMin.Xu@Sun.COM e1000g_rx_data_t *rx_data; 15968850SMin.Xu@Sun.COM 15978850SMin.Xu@Sun.COM rx_ring = Adapter->rx_ring; 15988850SMin.Xu@Sun.COM 15998850SMin.Xu@Sun.COM rx_data = kmem_zalloc(sizeof (e1000g_rx_data_t), KM_NOSLEEP); 16008850SMin.Xu@Sun.COM 16018850SMin.Xu@Sun.COM if (rx_data == NULL) 16028850SMin.Xu@Sun.COM return (DDI_FAILURE); 16038850SMin.Xu@Sun.COM 16048850SMin.Xu@Sun.COM rx_data->priv_devi_node = Adapter->priv_devi_node; 16058850SMin.Xu@Sun.COM rx_data->rx_ring = rx_ring; 16068850SMin.Xu@Sun.COM 16078850SMin.Xu@Sun.COM mutex_init(&rx_data->freelist_lock, NULL, 16088850SMin.Xu@Sun.COM MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 16098850SMin.Xu@Sun.COM mutex_init(&rx_data->recycle_lock, NULL, 16108850SMin.Xu@Sun.COM MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri)); 16118850SMin.Xu@Sun.COM 16128850SMin.Xu@Sun.COM rx_ring->rx_data = rx_data; 16138850SMin.Xu@Sun.COM 16148850SMin.Xu@Sun.COM return (DDI_SUCCESS); 16158850SMin.Xu@Sun.COM } 16168850SMin.Xu@Sun.COM 16178850SMin.Xu@Sun.COM void 16188850SMin.Xu@Sun.COM e1000g_free_rx_pending_buffers(e1000g_rx_data_t *rx_data) 16198850SMin.Xu@Sun.COM { 16208850SMin.Xu@Sun.COM rx_sw_packet_t *packet, *next_packet; 16218850SMin.Xu@Sun.COM 16228850SMin.Xu@Sun.COM if (rx_data == NULL) 16238850SMin.Xu@Sun.COM return; 16248850SMin.Xu@Sun.COM 16258850SMin.Xu@Sun.COM packet = rx_data->packet_area; 16268850SMin.Xu@Sun.COM while (packet != NULL) { 16278850SMin.Xu@Sun.COM next_packet = packet->next; 16288850SMin.Xu@Sun.COM e1000g_free_rx_sw_packet(packet, B_TRUE); 16298850SMin.Xu@Sun.COM packet = next_packet; 16308850SMin.Xu@Sun.COM } 16318850SMin.Xu@Sun.COM rx_data->packet_area = NULL; 16328850SMin.Xu@Sun.COM } 16338850SMin.Xu@Sun.COM 16348850SMin.Xu@Sun.COM void 16358850SMin.Xu@Sun.COM e1000g_free_rx_data(e1000g_rx_data_t *rx_data) 16368850SMin.Xu@Sun.COM { 16378850SMin.Xu@Sun.COM if (rx_data == NULL) 16388850SMin.Xu@Sun.COM return; 16398850SMin.Xu@Sun.COM 16408850SMin.Xu@Sun.COM mutex_destroy(&rx_data->freelist_lock); 16418850SMin.Xu@Sun.COM mutex_destroy(&rx_data->recycle_lock); 16428850SMin.Xu@Sun.COM 16438850SMin.Xu@Sun.COM kmem_free(rx_data, sizeof (e1000g_rx_data_t)); 16448850SMin.Xu@Sun.COM } 16458850SMin.Xu@Sun.COM 16463526Sxy150489 /* 16473526Sxy150489 * Check if the link is up 16483526Sxy150489 */ 16493526Sxy150489 static boolean_t 16503526Sxy150489 e1000g_link_up(struct e1000g *Adapter) 16513526Sxy150489 { 165210680SMin.Xu@Sun.COM struct e1000_hw *hw = &Adapter->shared; 165310680SMin.Xu@Sun.COM boolean_t link_up = B_FALSE; 165410680SMin.Xu@Sun.COM 165510680SMin.Xu@Sun.COM /* 165610680SMin.Xu@Sun.COM * get_link_status is set in the interrupt handler on link-status-change 165710680SMin.Xu@Sun.COM * or rx sequence error interrupt. get_link_status will stay 165810680SMin.Xu@Sun.COM * false until the e1000_check_for_link establishes link only 165910680SMin.Xu@Sun.COM * for copper adapters. 166010680SMin.Xu@Sun.COM */ 166110680SMin.Xu@Sun.COM switch (hw->phy.media_type) { 166210680SMin.Xu@Sun.COM case e1000_media_type_copper: 166310680SMin.Xu@Sun.COM if (hw->mac.get_link_status) { 166410680SMin.Xu@Sun.COM (void) e1000_check_for_link(hw); 166510680SMin.Xu@Sun.COM link_up = !hw->mac.get_link_status; 166610680SMin.Xu@Sun.COM } else { 166710680SMin.Xu@Sun.COM link_up = B_TRUE; 166810680SMin.Xu@Sun.COM } 166910680SMin.Xu@Sun.COM break; 167010680SMin.Xu@Sun.COM case e1000_media_type_fiber: 167110680SMin.Xu@Sun.COM (void) e1000_check_for_link(hw); 167210680SMin.Xu@Sun.COM link_up = (E1000_READ_REG(hw, E1000_STATUS) & 167310680SMin.Xu@Sun.COM E1000_STATUS_LU); 167410680SMin.Xu@Sun.COM break; 167510680SMin.Xu@Sun.COM case e1000_media_type_internal_serdes: 167610680SMin.Xu@Sun.COM (void) e1000_check_for_link(hw); 167710680SMin.Xu@Sun.COM link_up = hw->mac.serdes_has_link; 167810680SMin.Xu@Sun.COM break; 16793526Sxy150489 } 16803526Sxy150489 16813526Sxy150489 return (link_up); 16823526Sxy150489 } 16833526Sxy150489 16843526Sxy150489 static void 16853526Sxy150489 e1000g_m_ioctl(void *arg, queue_t *q, mblk_t *mp) 16863526Sxy150489 { 16873526Sxy150489 struct iocblk *iocp; 16883526Sxy150489 struct e1000g *e1000gp; 16893526Sxy150489 enum ioc_reply status; 16907426SChenliang.Xu@Sun.COM 16917426SChenliang.Xu@Sun.COM iocp = (struct iocblk *)(uintptr_t)mp->b_rptr; 16923526Sxy150489 iocp->ioc_error = 0; 16933526Sxy150489 e1000gp = (struct e1000g *)arg; 16943526Sxy150489 16953526Sxy150489 ASSERT(e1000gp); 16963526Sxy150489 if (e1000gp == NULL) { 16973526Sxy150489 miocnak(q, mp, 0, EINVAL); 16983526Sxy150489 return; 16993526Sxy150489 } 17003526Sxy150489 17018479SChenlu.Chen@Sun.COM rw_enter(&e1000gp->chip_lock, RW_READER); 17028479SChenlu.Chen@Sun.COM if (e1000gp->e1000g_state & E1000G_SUSPENDED) { 17038479SChenlu.Chen@Sun.COM rw_exit(&e1000gp->chip_lock); 17048479SChenlu.Chen@Sun.COM miocnak(q, mp, 0, EINVAL); 17058479SChenlu.Chen@Sun.COM return; 17068479SChenlu.Chen@Sun.COM } 17078479SChenlu.Chen@Sun.COM rw_exit(&e1000gp->chip_lock); 17088479SChenlu.Chen@Sun.COM 17093526Sxy150489 switch (iocp->ioc_cmd) { 17103526Sxy150489 17113526Sxy150489 case LB_GET_INFO_SIZE: 17123526Sxy150489 case LB_GET_INFO: 17133526Sxy150489 case LB_GET_MODE: 17143526Sxy150489 case LB_SET_MODE: 17153526Sxy150489 status = e1000g_loopback_ioctl(e1000gp, iocp, mp); 17163526Sxy150489 break; 17173526Sxy150489 17183526Sxy150489 17194919Sxy150489 #ifdef E1000G_DEBUG 17203526Sxy150489 case E1000G_IOC_REG_PEEK: 17213526Sxy150489 case E1000G_IOC_REG_POKE: 17223526Sxy150489 status = e1000g_pp_ioctl(e1000gp, iocp, mp); 17233526Sxy150489 break; 17243526Sxy150489 case E1000G_IOC_CHIP_RESET: 17253526Sxy150489 e1000gp->reset_count++; 17267656SSherry.Moore@Sun.COM if (e1000g_reset_adapter(e1000gp)) 17273526Sxy150489 status = IOC_ACK; 17283526Sxy150489 else 17293526Sxy150489 status = IOC_INVAL; 17303526Sxy150489 break; 17314919Sxy150489 #endif 17323526Sxy150489 default: 17333526Sxy150489 status = IOC_INVAL; 17343526Sxy150489 break; 17353526Sxy150489 } 17363526Sxy150489 17373526Sxy150489 /* 17383526Sxy150489 * Decide how to reply 17393526Sxy150489 */ 17403526Sxy150489 switch (status) { 17413526Sxy150489 default: 17423526Sxy150489 case IOC_INVAL: 17433526Sxy150489 /* 17443526Sxy150489 * Error, reply with a NAK and EINVAL or the specified error 17453526Sxy150489 */ 17463526Sxy150489 miocnak(q, mp, 0, iocp->ioc_error == 0 ? 17474349Sxy150489 EINVAL : iocp->ioc_error); 17483526Sxy150489 break; 17493526Sxy150489 17503526Sxy150489 case IOC_DONE: 17513526Sxy150489 /* 17523526Sxy150489 * OK, reply already sent 17533526Sxy150489 */ 17543526Sxy150489 break; 17553526Sxy150489 17563526Sxy150489 case IOC_ACK: 17573526Sxy150489 /* 17583526Sxy150489 * OK, reply with an ACK 17593526Sxy150489 */ 17603526Sxy150489 miocack(q, mp, 0, 0); 17613526Sxy150489 break; 17623526Sxy150489 17633526Sxy150489 case IOC_REPLY: 17643526Sxy150489 /* 17653526Sxy150489 * OK, send prepared reply as ACK or NAK 17663526Sxy150489 */ 17673526Sxy150489 mp->b_datap->db_type = iocp->ioc_error == 0 ? 17684349Sxy150489 M_IOCACK : M_IOCNAK; 17693526Sxy150489 qreply(q, mp); 17703526Sxy150489 break; 17713526Sxy150489 } 17723526Sxy150489 } 17733526Sxy150489 17748275SEric Cheng /* 17758275SEric Cheng * The default value of e1000g_poll_mode == 0 assumes that the NIC is 17768275SEric Cheng * capable of supporting only one interrupt and we shouldn't disable 17778275SEric Cheng * the physical interrupt. In this case we let the interrupt come and 17788275SEric Cheng * we queue the packets in the rx ring itself in case we are in polling 17798275SEric Cheng * mode (better latency but slightly lower performance and a very 17808275SEric Cheng * high intrrupt count in mpstat which is harmless). 17818275SEric Cheng * 17828275SEric Cheng * e1000g_poll_mode == 1 assumes that we have per Rx ring interrupt 17838275SEric Cheng * which can be disabled in poll mode. This gives better overall 17848275SEric Cheng * throughput (compared to the mode above), shows very low interrupt 17858275SEric Cheng * count but has slightly higher latency since we pick the packets when 17868275SEric Cheng * the poll thread does polling. 17878275SEric Cheng * 17888275SEric Cheng * Currently, this flag should be enabled only while doing performance 17898275SEric Cheng * measurement or when it can be guaranteed that entire NIC going 17908275SEric Cheng * in poll mode will not harm any traffic like cluster heartbeat etc. 17918275SEric Cheng */ 17928275SEric Cheng int e1000g_poll_mode = 0; 17938275SEric Cheng 17948275SEric Cheng /* 17958275SEric Cheng * Called from the upper layers when driver is in polling mode to 17968275SEric Cheng * pick up any queued packets. Care should be taken to not block 17978275SEric Cheng * this thread. 17988275SEric Cheng */ 17998275SEric Cheng static mblk_t *e1000g_poll_ring(void *arg, int bytes_to_pickup) 18008275SEric Cheng { 18018275SEric Cheng e1000g_rx_ring_t *rx_ring = (e1000g_rx_ring_t *)arg; 18028275SEric Cheng mblk_t *mp = NULL; 18038275SEric Cheng mblk_t *tail; 18048275SEric Cheng struct e1000g *adapter; 18058275SEric Cheng 18068275SEric Cheng adapter = rx_ring->adapter; 18078275SEric Cheng 18088479SChenlu.Chen@Sun.COM rw_enter(&adapter->chip_lock, RW_READER); 18098479SChenlu.Chen@Sun.COM 18108479SChenlu.Chen@Sun.COM if (adapter->e1000g_state & E1000G_SUSPENDED) { 18118479SChenlu.Chen@Sun.COM rw_exit(&adapter->chip_lock); 18128479SChenlu.Chen@Sun.COM return (NULL); 18138479SChenlu.Chen@Sun.COM } 18148479SChenlu.Chen@Sun.COM 18158275SEric Cheng mutex_enter(&rx_ring->rx_lock); 18168833SVenu.Iyer@Sun.COM mp = e1000g_receive(rx_ring, &tail, bytes_to_pickup); 18178275SEric Cheng mutex_exit(&rx_ring->rx_lock); 18188479SChenlu.Chen@Sun.COM rw_exit(&adapter->chip_lock); 18198275SEric Cheng return (mp); 18208275SEric Cheng } 18218275SEric Cheng 18223526Sxy150489 static int 18233526Sxy150489 e1000g_m_start(void *arg) 18243526Sxy150489 { 18253526Sxy150489 struct e1000g *Adapter = (struct e1000g *)arg; 18263526Sxy150489 18278479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 18288479SChenlu.Chen@Sun.COM 18298479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 18308479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 18318479SChenlu.Chen@Sun.COM return (ECANCELED); 18328479SChenlu.Chen@Sun.COM } 18338479SChenlu.Chen@Sun.COM 18348479SChenlu.Chen@Sun.COM if (e1000g_start(Adapter, B_TRUE) != DDI_SUCCESS) { 18358479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 18368479SChenlu.Chen@Sun.COM return (ENOTACTIVE); 18378479SChenlu.Chen@Sun.COM } 18388479SChenlu.Chen@Sun.COM 18398479SChenlu.Chen@Sun.COM Adapter->e1000g_state |= E1000G_STARTED; 18408479SChenlu.Chen@Sun.COM 18418479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 18428479SChenlu.Chen@Sun.COM 18438479SChenlu.Chen@Sun.COM /* Enable and start the watchdog timer */ 18448479SChenlu.Chen@Sun.COM enable_watchdog_timer(Adapter); 18458479SChenlu.Chen@Sun.COM 18468479SChenlu.Chen@Sun.COM return (0); 18473526Sxy150489 } 18483526Sxy150489 18493526Sxy150489 static int 18504919Sxy150489 e1000g_start(struct e1000g *Adapter, boolean_t global) 18513526Sxy150489 { 18528850SMin.Xu@Sun.COM e1000g_rx_data_t *rx_data; 18538850SMin.Xu@Sun.COM 18544919Sxy150489 if (global) { 18558850SMin.Xu@Sun.COM if (e1000g_alloc_rx_data(Adapter) != DDI_SUCCESS) { 18568850SMin.Xu@Sun.COM e1000g_log(Adapter, CE_WARN, "Allocate rx data failed"); 18578850SMin.Xu@Sun.COM goto start_fail; 18588850SMin.Xu@Sun.COM } 18598850SMin.Xu@Sun.COM 18604919Sxy150489 /* Allocate dma resources for descriptors and buffers */ 18614919Sxy150489 if (e1000g_alloc_dma_resources(Adapter) != DDI_SUCCESS) { 18624919Sxy150489 e1000g_log(Adapter, CE_WARN, 18634919Sxy150489 "Alloc DMA resources failed"); 18648850SMin.Xu@Sun.COM goto start_fail; 18654919Sxy150489 } 18664919Sxy150489 Adapter->rx_buffer_setup = B_FALSE; 18674919Sxy150489 } 18684919Sxy150489 18693526Sxy150489 if (!(Adapter->attach_progress & ATTACH_PROGRESS_INIT)) { 18703526Sxy150489 if (e1000g_init(Adapter) != DDI_SUCCESS) { 18713526Sxy150489 e1000g_log(Adapter, CE_WARN, 18723526Sxy150489 "Adapter initialization failed"); 18738850SMin.Xu@Sun.COM goto start_fail; 18743526Sxy150489 } 18753526Sxy150489 } 18763526Sxy150489 18774919Sxy150489 /* Setup and initialize the transmit structures */ 18784919Sxy150489 e1000g_tx_setup(Adapter); 18794919Sxy150489 msec_delay(5); 18804919Sxy150489 18814919Sxy150489 /* Setup and initialize the receive structures */ 18824919Sxy150489 e1000g_rx_setup(Adapter); 18834919Sxy150489 msec_delay(5); 18844919Sxy150489 18857722SShuguo.Yang@Sun.COM /* Restore the e1000g promiscuous mode */ 18867722SShuguo.Yang@Sun.COM e1000g_restore_promisc(Adapter); 18877722SShuguo.Yang@Sun.COM 18884919Sxy150489 e1000g_mask_interrupt(Adapter); 18893526Sxy150489 18908479SChenlu.Chen@Sun.COM Adapter->attach_progress |= ATTACH_PROGRESS_INIT; 18918479SChenlu.Chen@Sun.COM 18925273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 18935273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST); 18948850SMin.Xu@Sun.COM goto start_fail; 18958479SChenlu.Chen@Sun.COM } 18968479SChenlu.Chen@Sun.COM 18978479SChenlu.Chen@Sun.COM return (DDI_SUCCESS); 18988850SMin.Xu@Sun.COM 18998850SMin.Xu@Sun.COM start_fail: 19008850SMin.Xu@Sun.COM rx_data = Adapter->rx_ring->rx_data; 19018850SMin.Xu@Sun.COM 19028850SMin.Xu@Sun.COM if (global) { 19038850SMin.Xu@Sun.COM e1000g_release_dma_resources(Adapter); 19048850SMin.Xu@Sun.COM e1000g_free_rx_pending_buffers(rx_data); 19058850SMin.Xu@Sun.COM e1000g_free_rx_data(rx_data); 19068850SMin.Xu@Sun.COM } 19078850SMin.Xu@Sun.COM 19088850SMin.Xu@Sun.COM mutex_enter(&e1000g_nvm_lock); 19098850SMin.Xu@Sun.COM (void) e1000_reset_hw(&Adapter->shared); 19108850SMin.Xu@Sun.COM mutex_exit(&e1000g_nvm_lock); 19118850SMin.Xu@Sun.COM 19128850SMin.Xu@Sun.COM return (DDI_FAILURE); 19133526Sxy150489 } 19143526Sxy150489 19153526Sxy150489 static void 19163526Sxy150489 e1000g_m_stop(void *arg) 19173526Sxy150489 { 19183526Sxy150489 struct e1000g *Adapter = (struct e1000g *)arg; 19193526Sxy150489 19208479SChenlu.Chen@Sun.COM /* Drain tx sessions */ 19218479SChenlu.Chen@Sun.COM (void) e1000g_tx_drain(Adapter); 19228479SChenlu.Chen@Sun.COM 19238479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 19248479SChenlu.Chen@Sun.COM 19258479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 19268479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 19278479SChenlu.Chen@Sun.COM return; 19288479SChenlu.Chen@Sun.COM } 19298479SChenlu.Chen@Sun.COM Adapter->e1000g_state &= ~E1000G_STARTED; 19304919Sxy150489 e1000g_stop(Adapter, B_TRUE); 19318479SChenlu.Chen@Sun.COM 19328479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 19338479SChenlu.Chen@Sun.COM 19348479SChenlu.Chen@Sun.COM /* Disable and stop all the timers */ 19358479SChenlu.Chen@Sun.COM disable_watchdog_timer(Adapter); 19368479SChenlu.Chen@Sun.COM stop_link_timer(Adapter); 19378479SChenlu.Chen@Sun.COM stop_82547_timer(Adapter->tx_ring); 19383526Sxy150489 } 19393526Sxy150489 19403526Sxy150489 static void 19414919Sxy150489 e1000g_stop(struct e1000g *Adapter, boolean_t global) 19423526Sxy150489 { 19438850SMin.Xu@Sun.COM private_devi_list_t *devi_node; 19448850SMin.Xu@Sun.COM e1000g_rx_data_t *rx_data; 19457133Scc210113 int result; 19467133Scc210113 19473526Sxy150489 Adapter->attach_progress &= ~ATTACH_PROGRESS_INIT; 19483526Sxy150489 19493526Sxy150489 /* Stop the chip and release pending resources */ 19503526Sxy150489 19517607STed.You@Sun.COM /* Tell firmware driver is no longer in control */ 19527607STed.You@Sun.COM e1000g_release_driver_control(&Adapter->shared); 19537607STed.You@Sun.COM 19544919Sxy150489 e1000g_clear_all_interrupts(Adapter); 19557133Scc210113 19567133Scc210113 mutex_enter(&e1000g_nvm_lock); 19577133Scc210113 result = e1000_reset_hw(&Adapter->shared); 19587133Scc210113 mutex_exit(&e1000g_nvm_lock); 19597133Scc210113 19607133Scc210113 if (result != E1000_SUCCESS) { 19615273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE); 19625273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST); 19635273Sgl147354 } 19643526Sxy150489 19653526Sxy150489 /* Release resources still held by the TX descriptors */ 19664919Sxy150489 e1000g_tx_clean(Adapter); 19674061Sxy150489 19685273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 19695273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST); 19705273Sgl147354 19714061Sxy150489 /* Clean the pending rx jumbo packet fragment */ 19724919Sxy150489 e1000g_rx_clean(Adapter); 19734061Sxy150489 19748850SMin.Xu@Sun.COM if (global) { 19754919Sxy150489 e1000g_release_dma_resources(Adapter); 19768850SMin.Xu@Sun.COM 19778850SMin.Xu@Sun.COM mutex_enter(&e1000g_rx_detach_lock); 19788850SMin.Xu@Sun.COM rx_data = Adapter->rx_ring->rx_data; 19798850SMin.Xu@Sun.COM rx_data->flag |= E1000G_RX_STOPPED; 19808850SMin.Xu@Sun.COM 19818850SMin.Xu@Sun.COM if (rx_data->pending_count == 0) { 19828850SMin.Xu@Sun.COM e1000g_free_rx_pending_buffers(rx_data); 19838850SMin.Xu@Sun.COM e1000g_free_rx_data(rx_data); 19848850SMin.Xu@Sun.COM } else { 19858850SMin.Xu@Sun.COM devi_node = rx_data->priv_devi_node; 19868850SMin.Xu@Sun.COM if (devi_node != NULL) 19878850SMin.Xu@Sun.COM atomic_inc_32(&devi_node->pending_rx_count); 19888850SMin.Xu@Sun.COM else 19898850SMin.Xu@Sun.COM atomic_inc_32(&Adapter->pending_rx_count); 19908850SMin.Xu@Sun.COM } 19918850SMin.Xu@Sun.COM mutex_exit(&e1000g_rx_detach_lock); 19928850SMin.Xu@Sun.COM } 19939190SMin.Xu@Sun.COM 19949190SMin.Xu@Sun.COM if (Adapter->link_state == LINK_STATE_UP) { 19959190SMin.Xu@Sun.COM Adapter->link_state = LINK_STATE_UNKNOWN; 199611402SChangqing.Li@Sun.COM if (!Adapter->reset_flag) 199711402SChangqing.Li@Sun.COM mac_link_update(Adapter->mh, Adapter->link_state); 19989190SMin.Xu@Sun.COM } 19994061Sxy150489 } 20004061Sxy150489 20014061Sxy150489 static void 20024919Sxy150489 e1000g_rx_clean(struct e1000g *Adapter) 20034919Sxy150489 { 20048850SMin.Xu@Sun.COM e1000g_rx_data_t *rx_data = Adapter->rx_ring->rx_data; 20058850SMin.Xu@Sun.COM 20068850SMin.Xu@Sun.COM if (rx_data == NULL) 20078850SMin.Xu@Sun.COM return; 20088850SMin.Xu@Sun.COM 20098850SMin.Xu@Sun.COM if (rx_data->rx_mblk != NULL) { 20108850SMin.Xu@Sun.COM freemsg(rx_data->rx_mblk); 20118850SMin.Xu@Sun.COM rx_data->rx_mblk = NULL; 20128850SMin.Xu@Sun.COM rx_data->rx_mblk_tail = NULL; 20138850SMin.Xu@Sun.COM rx_data->rx_mblk_len = 0; 20144919Sxy150489 } 20154919Sxy150489 } 20164919Sxy150489 20174919Sxy150489 static void 20184919Sxy150489 e1000g_tx_clean(struct e1000g *Adapter) 20194061Sxy150489 { 20204061Sxy150489 e1000g_tx_ring_t *tx_ring; 20214919Sxy150489 p_tx_sw_packet_t packet; 20224061Sxy150489 mblk_t *mp; 20234061Sxy150489 mblk_t *nmp; 20244061Sxy150489 uint32_t packet_count; 20254061Sxy150489 20264061Sxy150489 tx_ring = Adapter->tx_ring; 20274061Sxy150489 20283526Sxy150489 /* 20293526Sxy150489 * Here we don't need to protect the lists using 20303526Sxy150489 * the usedlist_lock and freelist_lock, for they 20313526Sxy150489 * have been protected by the chip_lock. 20323526Sxy150489 */ 20333526Sxy150489 mp = NULL; 20343526Sxy150489 nmp = NULL; 20354061Sxy150489 packet_count = 0; 20364919Sxy150489 packet = (p_tx_sw_packet_t)QUEUE_GET_HEAD(&tx_ring->used_list); 20373526Sxy150489 while (packet != NULL) { 20383526Sxy150489 if (packet->mp != NULL) { 20393526Sxy150489 /* Assemble the message chain */ 20403526Sxy150489 if (mp == NULL) { 20413526Sxy150489 mp = packet->mp; 20423526Sxy150489 nmp = packet->mp; 20433526Sxy150489 } else { 20443526Sxy150489 nmp->b_next = packet->mp; 20453526Sxy150489 nmp = packet->mp; 20463526Sxy150489 } 20473526Sxy150489 /* Disconnect the message from the sw packet */ 20483526Sxy150489 packet->mp = NULL; 20493526Sxy150489 } 20503526Sxy150489 20514919Sxy150489 e1000g_free_tx_swpkt(packet); 20524061Sxy150489 packet_count++; 20533526Sxy150489 20544919Sxy150489 packet = (p_tx_sw_packet_t) 20553526Sxy150489 QUEUE_GET_NEXT(&tx_ring->used_list, &packet->Link); 20563526Sxy150489 } 20573526Sxy150489 20585882Syy150190 if (mp != NULL) 20595882Syy150190 freemsgchain(mp); 20604061Sxy150489 20614061Sxy150489 if (packet_count > 0) { 20624061Sxy150489 QUEUE_APPEND(&tx_ring->free_list, &tx_ring->used_list); 20634061Sxy150489 QUEUE_INIT_LIST(&tx_ring->used_list); 20644061Sxy150489 20654061Sxy150489 /* Setup TX descriptor pointers */ 20664061Sxy150489 tx_ring->tbd_next = tx_ring->tbd_first; 20674061Sxy150489 tx_ring->tbd_oldest = tx_ring->tbd_first; 20684061Sxy150489 20694061Sxy150489 /* Setup our HW Tx Head & Tail descriptor pointers */ 20706735Scc210113 E1000_WRITE_REG(&Adapter->shared, E1000_TDH(0), 0); 20716735Scc210113 E1000_WRITE_REG(&Adapter->shared, E1000_TDT(0), 0); 20723526Sxy150489 } 20733526Sxy150489 } 20743526Sxy150489 20753526Sxy150489 static boolean_t 20763526Sxy150489 e1000g_tx_drain(struct e1000g *Adapter) 20773526Sxy150489 { 20783526Sxy150489 int i; 20793526Sxy150489 boolean_t done; 20803526Sxy150489 e1000g_tx_ring_t *tx_ring; 20813526Sxy150489 20823526Sxy150489 tx_ring = Adapter->tx_ring; 20833526Sxy150489 20843526Sxy150489 /* Allow up to 'wsdraintime' for pending xmit's to complete. */ 20854919Sxy150489 for (i = 0; i < TX_DRAIN_TIME; i++) { 20863526Sxy150489 mutex_enter(&tx_ring->usedlist_lock); 20873526Sxy150489 done = IS_QUEUE_EMPTY(&tx_ring->used_list); 20883526Sxy150489 mutex_exit(&tx_ring->usedlist_lock); 20893526Sxy150489 20903526Sxy150489 if (done) 20913526Sxy150489 break; 20923526Sxy150489 20933526Sxy150489 msec_delay(1); 20943526Sxy150489 } 20953526Sxy150489 20963526Sxy150489 return (done); 20973526Sxy150489 } 20983526Sxy150489 20993526Sxy150489 static boolean_t 21003526Sxy150489 e1000g_rx_drain(struct e1000g *Adapter) 21013526Sxy150489 { 21028850SMin.Xu@Sun.COM int i; 21033526Sxy150489 boolean_t done; 21043526Sxy150489 21058850SMin.Xu@Sun.COM /* 21068850SMin.Xu@Sun.COM * Allow up to RX_DRAIN_TIME for pending received packets to complete. 21078850SMin.Xu@Sun.COM */ 21088850SMin.Xu@Sun.COM for (i = 0; i < RX_DRAIN_TIME; i++) { 21098850SMin.Xu@Sun.COM done = (Adapter->pending_rx_count == 0); 21108850SMin.Xu@Sun.COM 21118850SMin.Xu@Sun.COM if (done) 21128850SMin.Xu@Sun.COM break; 21138850SMin.Xu@Sun.COM 21148850SMin.Xu@Sun.COM msec_delay(1); 21158850SMin.Xu@Sun.COM } 21163526Sxy150489 21173526Sxy150489 return (done); 21183526Sxy150489 } 21193526Sxy150489 21207656SSherry.Moore@Sun.COM static boolean_t 21217656SSherry.Moore@Sun.COM e1000g_reset_adapter(struct e1000g *Adapter) 21223526Sxy150489 { 21238479SChenlu.Chen@Sun.COM /* Disable and stop all the timers */ 21248479SChenlu.Chen@Sun.COM disable_watchdog_timer(Adapter); 21258479SChenlu.Chen@Sun.COM stop_link_timer(Adapter); 21268479SChenlu.Chen@Sun.COM stop_82547_timer(Adapter->tx_ring); 21278479SChenlu.Chen@Sun.COM 21288479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 21298479SChenlu.Chen@Sun.COM 213011402SChangqing.Li@Sun.COM if (Adapter->stall_flag) { 213111402SChangqing.Li@Sun.COM Adapter->stall_flag = B_FALSE; 213211402SChangqing.Li@Sun.COM Adapter->reset_flag = B_TRUE; 213311402SChangqing.Li@Sun.COM } 213411402SChangqing.Li@Sun.COM 213510434SGuoqing.Zhu@Sun.COM if (!(Adapter->e1000g_state & E1000G_STARTED)) { 213610434SGuoqing.Zhu@Sun.COM rw_exit(&Adapter->chip_lock); 213710434SGuoqing.Zhu@Sun.COM return (B_TRUE); 213810434SGuoqing.Zhu@Sun.COM } 213910434SGuoqing.Zhu@Sun.COM 21404919Sxy150489 e1000g_stop(Adapter, B_FALSE); 21414919Sxy150489 21428479SChenlu.Chen@Sun.COM if (e1000g_start(Adapter, B_FALSE) != DDI_SUCCESS) { 21438479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 21443526Sxy150489 e1000g_log(Adapter, CE_WARN, "Reset failed"); 21458479SChenlu.Chen@Sun.COM return (B_FALSE); 21468479SChenlu.Chen@Sun.COM } 21478479SChenlu.Chen@Sun.COM 21488479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 21498479SChenlu.Chen@Sun.COM 21508479SChenlu.Chen@Sun.COM /* Enable and start the watchdog timer */ 21518479SChenlu.Chen@Sun.COM enable_watchdog_timer(Adapter); 21523526Sxy150489 21533526Sxy150489 return (B_TRUE); 21543526Sxy150489 } 21553526Sxy150489 21565273Sgl147354 boolean_t 21575273Sgl147354 e1000g_global_reset(struct e1000g *Adapter) 21585273Sgl147354 { 21598479SChenlu.Chen@Sun.COM /* Disable and stop all the timers */ 21608479SChenlu.Chen@Sun.COM disable_watchdog_timer(Adapter); 21618479SChenlu.Chen@Sun.COM stop_link_timer(Adapter); 21628479SChenlu.Chen@Sun.COM stop_82547_timer(Adapter->tx_ring); 21638479SChenlu.Chen@Sun.COM 21648479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 21658479SChenlu.Chen@Sun.COM 21665273Sgl147354 e1000g_stop(Adapter, B_TRUE); 21675273Sgl147354 21685273Sgl147354 Adapter->init_count = 0; 21695273Sgl147354 21708479SChenlu.Chen@Sun.COM if (e1000g_start(Adapter, B_TRUE) != DDI_SUCCESS) { 21718479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 21725273Sgl147354 e1000g_log(Adapter, CE_WARN, "Reset failed"); 21735273Sgl147354 return (B_FALSE); 21745273Sgl147354 } 21755273Sgl147354 21768479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 21778479SChenlu.Chen@Sun.COM 21788479SChenlu.Chen@Sun.COM /* Enable and start the watchdog timer */ 21798479SChenlu.Chen@Sun.COM enable_watchdog_timer(Adapter); 21808479SChenlu.Chen@Sun.COM 21815273Sgl147354 return (B_TRUE); 21825273Sgl147354 } 21835273Sgl147354 21843526Sxy150489 /* 21854919Sxy150489 * e1000g_intr_pciexpress - ISR for PCI Express chipsets 21864919Sxy150489 * 21874919Sxy150489 * This interrupt service routine is for PCI-Express adapters. 21884919Sxy150489 * The ICR contents is valid only when the E1000_ICR_INT_ASSERTED 21894919Sxy150489 * bit is set. 21903526Sxy150489 */ 21913526Sxy150489 static uint_t 21923526Sxy150489 e1000g_intr_pciexpress(caddr_t arg) 21933526Sxy150489 { 21943526Sxy150489 struct e1000g *Adapter; 21954919Sxy150489 uint32_t icr; 21963526Sxy150489 21977426SChenliang.Xu@Sun.COM Adapter = (struct e1000g *)(uintptr_t)arg; 21984919Sxy150489 icr = E1000_READ_REG(&Adapter->shared, E1000_ICR); 21994919Sxy150489 220010805SChangqing.Li@Sun.COM if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 22015273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 220210805SChangqing.Li@Sun.COM return (DDI_INTR_CLAIMED); 220310805SChangqing.Li@Sun.COM } 22045273Sgl147354 22054919Sxy150489 if (icr & E1000_ICR_INT_ASSERTED) { 22063526Sxy150489 /* 22073526Sxy150489 * E1000_ICR_INT_ASSERTED bit was set: 22083526Sxy150489 * Read(Clear) the ICR, claim this interrupt, 22093526Sxy150489 * look for work to do. 22103526Sxy150489 */ 22114919Sxy150489 e1000g_intr_work(Adapter, icr); 22123526Sxy150489 return (DDI_INTR_CLAIMED); 22133526Sxy150489 } else { 22143526Sxy150489 /* 22153526Sxy150489 * E1000_ICR_INT_ASSERTED bit was not set: 22163526Sxy150489 * Don't claim this interrupt, return immediately. 22173526Sxy150489 */ 22183526Sxy150489 return (DDI_INTR_UNCLAIMED); 22193526Sxy150489 } 22203526Sxy150489 } 22213526Sxy150489 22223526Sxy150489 /* 22234919Sxy150489 * e1000g_intr - ISR for PCI/PCI-X chipsets 22244919Sxy150489 * 22254919Sxy150489 * This interrupt service routine is for PCI/PCI-X adapters. 22264919Sxy150489 * We check the ICR contents no matter the E1000_ICR_INT_ASSERTED 22274919Sxy150489 * bit is set or not. 22283526Sxy150489 */ 22293526Sxy150489 static uint_t 22303526Sxy150489 e1000g_intr(caddr_t arg) 22313526Sxy150489 { 22323526Sxy150489 struct e1000g *Adapter; 22334919Sxy150489 uint32_t icr; 22343526Sxy150489 22357426SChenliang.Xu@Sun.COM Adapter = (struct e1000g *)(uintptr_t)arg; 22364919Sxy150489 icr = E1000_READ_REG(&Adapter->shared, E1000_ICR); 22374919Sxy150489 223810805SChangqing.Li@Sun.COM if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 22395273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 224010805SChangqing.Li@Sun.COM return (DDI_INTR_CLAIMED); 224110805SChangqing.Li@Sun.COM } 22425273Sgl147354 22434919Sxy150489 if (icr) { 22443526Sxy150489 /* 22453526Sxy150489 * Any bit was set in ICR: 22463526Sxy150489 * Read(Clear) the ICR, claim this interrupt, 22473526Sxy150489 * look for work to do. 22483526Sxy150489 */ 22494919Sxy150489 e1000g_intr_work(Adapter, icr); 22503526Sxy150489 return (DDI_INTR_CLAIMED); 22513526Sxy150489 } else { 22523526Sxy150489 /* 22533526Sxy150489 * No bit was set in ICR: 22543526Sxy150489 * Don't claim this interrupt, return immediately. 22553526Sxy150489 */ 22563526Sxy150489 return (DDI_INTR_UNCLAIMED); 22573526Sxy150489 } 22583526Sxy150489 } 22593526Sxy150489 22603526Sxy150489 /* 22614919Sxy150489 * e1000g_intr_work - actual processing of ISR 22624919Sxy150489 * 22634919Sxy150489 * Read(clear) the ICR contents and call appropriate interrupt 22644919Sxy150489 * processing routines. 22653526Sxy150489 */ 22663526Sxy150489 static void 22674919Sxy150489 e1000g_intr_work(struct e1000g *Adapter, uint32_t icr) 22683526Sxy150489 { 22695882Syy150190 struct e1000_hw *hw; 22705882Syy150190 hw = &Adapter->shared; 22715882Syy150190 e1000g_tx_ring_t *tx_ring = Adapter->tx_ring; 22725882Syy150190 22735882Syy150190 Adapter->rx_pkt_cnt = 0; 22745882Syy150190 Adapter->tx_pkt_cnt = 0; 22755882Syy150190 22764919Sxy150489 rw_enter(&Adapter->chip_lock, RW_READER); 22778479SChenlu.Chen@Sun.COM 22788479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 22798479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 22808479SChenlu.Chen@Sun.COM return; 22818479SChenlu.Chen@Sun.COM } 22824919Sxy150489 /* 22838479SChenlu.Chen@Sun.COM * Here we need to check the "e1000g_state" flag within the chip_lock to 22844919Sxy150489 * ensure the receive routine will not execute when the adapter is 22854919Sxy150489 * being reset. 22864919Sxy150489 */ 22878479SChenlu.Chen@Sun.COM if (!(Adapter->e1000g_state & E1000G_STARTED)) { 22884919Sxy150489 rw_exit(&Adapter->chip_lock); 22894919Sxy150489 return; 22904919Sxy150489 } 22914919Sxy150489 22924919Sxy150489 if (icr & E1000_ICR_RXT0) { 22938833SVenu.Iyer@Sun.COM mblk_t *mp = NULL; 22948833SVenu.Iyer@Sun.COM mblk_t *tail = NULL; 22958275SEric Cheng e1000g_rx_ring_t *rx_ring; 22968275SEric Cheng 22978275SEric Cheng rx_ring = Adapter->rx_ring; 22988275SEric Cheng mutex_enter(&rx_ring->rx_lock); 22998275SEric Cheng /* 23008833SVenu.Iyer@Sun.COM * Sometimes with legacy interrupts, it possible that 23018833SVenu.Iyer@Sun.COM * there is a single interrupt for Rx/Tx. In which 23028833SVenu.Iyer@Sun.COM * case, if poll flag is set, we shouldn't really 23038833SVenu.Iyer@Sun.COM * be doing Rx processing. 23048275SEric Cheng */ 23058833SVenu.Iyer@Sun.COM if (!rx_ring->poll_flag) 23068833SVenu.Iyer@Sun.COM mp = e1000g_receive(rx_ring, &tail, 23078833SVenu.Iyer@Sun.COM E1000G_CHAIN_NO_LIMIT); 23088833SVenu.Iyer@Sun.COM mutex_exit(&rx_ring->rx_lock); 23094919Sxy150489 rw_exit(&Adapter->chip_lock); 23108833SVenu.Iyer@Sun.COM if (mp != NULL) 23118275SEric Cheng mac_rx_ring(Adapter->mh, rx_ring->mrh, 23128833SVenu.Iyer@Sun.COM mp, rx_ring->ring_gen_num); 23134919Sxy150489 } else 23144919Sxy150489 rw_exit(&Adapter->chip_lock); 23153526Sxy150489 23165882Syy150190 if (icr & E1000_ICR_TXDW) { 23175882Syy150190 if (!Adapter->tx_intr_enable) 23185882Syy150190 e1000g_clear_tx_interrupt(Adapter); 23195882Syy150190 23205882Syy150190 /* Recycle the tx descriptors */ 23215882Syy150190 rw_enter(&Adapter->chip_lock, RW_READER); 23227426SChenliang.Xu@Sun.COM (void) e1000g_recycle(tx_ring); 23235882Syy150190 E1000G_DEBUG_STAT(tx_ring->stat_recycle_intr); 23245882Syy150190 rw_exit(&Adapter->chip_lock); 23255882Syy150190 23265882Syy150190 if (tx_ring->resched_needed && 23275882Syy150190 (tx_ring->tbd_avail > DEFAULT_TX_UPDATE_THRESHOLD)) { 23285882Syy150190 tx_ring->resched_needed = B_FALSE; 23295882Syy150190 mac_tx_update(Adapter->mh); 23305882Syy150190 E1000G_STAT(tx_ring->stat_reschedule); 23315882Syy150190 } 23325882Syy150190 } 23335882Syy150190 23343526Sxy150489 /* 23353526Sxy150489 * The Receive Sequence errors RXSEQ and the link status change LSC 23363526Sxy150489 * are checked to detect that the cable has been pulled out. For 23373526Sxy150489 * the Wiseman 2.0 silicon, the receive sequence errors interrupt 23383526Sxy150489 * are an indication that cable is not connected. 23393526Sxy150489 */ 23404919Sxy150489 if ((icr & E1000_ICR_RXSEQ) || 23414919Sxy150489 (icr & E1000_ICR_LSC) || 23424919Sxy150489 (icr & E1000_ICR_GPI_EN1)) { 23434061Sxy150489 boolean_t link_changed; 23444061Sxy150489 timeout_id_t tid = 0; 23453526Sxy150489 23464919Sxy150489 stop_watchdog_timer(Adapter); 23474919Sxy150489 23485082Syy150190 rw_enter(&Adapter->chip_lock, RW_WRITER); 23495082Syy150190 23505082Syy150190 /* 23515082Syy150190 * Because we got a link-status-change interrupt, force 23525082Syy150190 * e1000_check_for_link() to look at phy 23535082Syy150190 */ 23545082Syy150190 Adapter->shared.mac.get_link_status = B_TRUE; 23555082Syy150190 23564061Sxy150489 /* e1000g_link_check takes care of link status change */ 23574061Sxy150489 link_changed = e1000g_link_check(Adapter); 23585082Syy150190 23595082Syy150190 /* Get new phy state */ 23605082Syy150190 e1000g_get_phy_state(Adapter); 23615082Syy150190 23624061Sxy150489 /* 23634061Sxy150489 * If the link timer has not timed out, we'll not notify 23644919Sxy150489 * the upper layer with any link state until the link is up. 23654061Sxy150489 */ 23664061Sxy150489 if (link_changed && !Adapter->link_complete) { 23674061Sxy150489 if (Adapter->link_state == LINK_STATE_UP) { 23685082Syy150190 mutex_enter(&Adapter->link_lock); 23694061Sxy150489 Adapter->link_complete = B_TRUE; 23704061Sxy150489 tid = Adapter->link_tid; 23714061Sxy150489 Adapter->link_tid = 0; 23725082Syy150190 mutex_exit(&Adapter->link_lock); 23734061Sxy150489 } else { 23744061Sxy150489 link_changed = B_FALSE; 23754061Sxy150489 } 23764061Sxy150489 } 23775082Syy150190 rw_exit(&Adapter->chip_lock); 23783526Sxy150489 23794061Sxy150489 if (link_changed) { 23804061Sxy150489 if (tid != 0) 23814061Sxy150489 (void) untimeout(tid); 23824061Sxy150489 23834139Sxy150489 /* 23844139Sxy150489 * Workaround for esb2. Data stuck in fifo on a link 23857133Scc210113 * down event. Stop receiver here and reset in watchdog. 23864139Sxy150489 */ 23874139Sxy150489 if ((Adapter->link_state == LINK_STATE_DOWN) && 23887133Scc210113 (Adapter->shared.mac.type == e1000_80003es2lan)) { 23897133Scc210113 uint32_t rctl = E1000_READ_REG(hw, E1000_RCTL); 23907133Scc210113 E1000_WRITE_REG(hw, E1000_RCTL, 23917133Scc210113 rctl & ~E1000_RCTL_EN); 23927133Scc210113 e1000g_log(Adapter, CE_WARN, 23937133Scc210113 "ESB2 receiver disabled"); 23947133Scc210113 Adapter->esb2_workaround = B_TRUE; 23957133Scc210113 } 23968850SMin.Xu@Sun.COM if (!Adapter->reset_flag) 23978850SMin.Xu@Sun.COM mac_link_update(Adapter->mh, 23988850SMin.Xu@Sun.COM Adapter->link_state); 23998850SMin.Xu@Sun.COM if (Adapter->link_state == LINK_STATE_UP) 24008850SMin.Xu@Sun.COM Adapter->reset_flag = B_FALSE; 24013526Sxy150489 } 24023526Sxy150489 24034919Sxy150489 start_watchdog_timer(Adapter); 24043526Sxy150489 } 24055882Syy150190 } 24065882Syy150190 24073526Sxy150489 static void 24083526Sxy150489 e1000g_init_unicst(struct e1000g *Adapter) 24093526Sxy150489 { 24103526Sxy150489 struct e1000_hw *hw; 24113526Sxy150489 int slot; 24123526Sxy150489 24134919Sxy150489 hw = &Adapter->shared; 24143526Sxy150489 24158275SEric Cheng if (Adapter->init_count == 0) { 24163526Sxy150489 /* Initialize the multiple unicast addresses */ 24173526Sxy150489 Adapter->unicst_total = MAX_NUM_UNICAST_ADDRESSES; 24183526Sxy150489 24198275SEric Cheng /* Workaround for an erratum of 82571 chipst */ 24204919Sxy150489 if ((hw->mac.type == e1000_82571) && 24214919Sxy150489 (e1000_get_laa_state_82571(hw) == B_TRUE)) 24223526Sxy150489 Adapter->unicst_total--; 24233526Sxy150489 24248275SEric Cheng Adapter->unicst_avail = Adapter->unicst_total; 24258275SEric Cheng 24268275SEric Cheng for (slot = 0; slot < Adapter->unicst_total; slot++) { 24278275SEric Cheng /* Clear both the flag and MAC address */ 24288275SEric Cheng Adapter->unicst_addr[slot].reg.high = 0; 24298275SEric Cheng Adapter->unicst_addr[slot].reg.low = 0; 24308275SEric Cheng } 24313526Sxy150489 } else { 24328275SEric Cheng /* Workaround for an erratum of 82571 chipst */ 24334919Sxy150489 if ((hw->mac.type == e1000_82571) && 24344919Sxy150489 (e1000_get_laa_state_82571(hw) == B_TRUE)) 24354919Sxy150489 e1000_rar_set(hw, hw->mac.addr, LAST_RAR_ENTRY); 24363526Sxy150489 24373526Sxy150489 /* Re-configure the RAR registers */ 24388275SEric Cheng for (slot = 0; slot < Adapter->unicst_total; slot++) 24398275SEric Cheng if (Adapter->unicst_addr[slot].mac.set == 1) 24408275SEric Cheng e1000_rar_set(hw, 24418275SEric Cheng Adapter->unicst_addr[slot].mac.addr, slot); 24423526Sxy150489 } 24435273Sgl147354 24445273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 24455273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 24463526Sxy150489 } 24473526Sxy150489 24483526Sxy150489 static int 24493526Sxy150489 e1000g_unicst_set(struct e1000g *Adapter, const uint8_t *mac_addr, 24508275SEric Cheng int slot) 24513526Sxy150489 { 24523526Sxy150489 struct e1000_hw *hw; 24533526Sxy150489 24544919Sxy150489 hw = &Adapter->shared; 24553526Sxy150489 24563526Sxy150489 /* 24573526Sxy150489 * The first revision of Wiseman silicon (rev 2.0) has an errata 24583526Sxy150489 * that requires the receiver to be in reset when any of the 24593526Sxy150489 * receive address registers (RAR regs) are accessed. The first 24603526Sxy150489 * rev of Wiseman silicon also requires MWI to be disabled when 24613526Sxy150489 * a global reset or a receive reset is issued. So before we 24623526Sxy150489 * initialize the RARs, we check the rev of the Wiseman controller 24633526Sxy150489 * and work around any necessary HW errata. 24643526Sxy150489 */ 24654919Sxy150489 if ((hw->mac.type == e1000_82542) && 24664919Sxy150489 (hw->revision_id == E1000_REVISION_2)) { 24673526Sxy150489 e1000_pci_clear_mwi(hw); 24684919Sxy150489 E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST); 24694919Sxy150489 msec_delay(5); 24703526Sxy150489 } 24718275SEric Cheng if (mac_addr == NULL) { 24728275SEric Cheng E1000_WRITE_REG_ARRAY(hw, E1000_RA, slot << 1, 0); 24738275SEric Cheng E1000_WRITE_FLUSH(hw); 24748275SEric Cheng E1000_WRITE_REG_ARRAY(hw, E1000_RA, (slot << 1) + 1, 0); 24758275SEric Cheng E1000_WRITE_FLUSH(hw); 24768275SEric Cheng /* Clear both the flag and MAC address */ 24778275SEric Cheng Adapter->unicst_addr[slot].reg.high = 0; 24788275SEric Cheng Adapter->unicst_addr[slot].reg.low = 0; 24798275SEric Cheng } else { 24808275SEric Cheng bcopy(mac_addr, Adapter->unicst_addr[slot].mac.addr, 24818275SEric Cheng ETHERADDRL); 24828275SEric Cheng e1000_rar_set(hw, (uint8_t *)mac_addr, slot); 24838275SEric Cheng Adapter->unicst_addr[slot].mac.set = 1; 24848275SEric Cheng } 24858275SEric Cheng 24868275SEric Cheng /* Workaround for an erratum of 82571 chipst */ 24873526Sxy150489 if (slot == 0) { 24884919Sxy150489 if ((hw->mac.type == e1000_82571) && 24894919Sxy150489 (e1000_get_laa_state_82571(hw) == B_TRUE)) 24908275SEric Cheng if (mac_addr == NULL) { 24918275SEric Cheng E1000_WRITE_REG_ARRAY(hw, E1000_RA, 24928275SEric Cheng slot << 1, 0); 24938275SEric Cheng E1000_WRITE_FLUSH(hw); 24948275SEric Cheng E1000_WRITE_REG_ARRAY(hw, E1000_RA, 24958275SEric Cheng (slot << 1) + 1, 0); 24968275SEric Cheng E1000_WRITE_FLUSH(hw); 24978275SEric Cheng } else { 24988275SEric Cheng e1000_rar_set(hw, (uint8_t *)mac_addr, 24998275SEric Cheng LAST_RAR_ENTRY); 25008275SEric Cheng } 25013526Sxy150489 } 25023526Sxy150489 25033526Sxy150489 /* 25043526Sxy150489 * If we are using Wiseman rev 2.0 silicon, we will have previously 25053526Sxy150489 * put the receive in reset, and disabled MWI, to work around some 25063526Sxy150489 * HW errata. Now we should take the receiver out of reset, and 25073526Sxy150489 * re-enabled if MWI if it was previously enabled by the PCI BIOS. 25083526Sxy150489 */ 25094919Sxy150489 if ((hw->mac.type == e1000_82542) && 25104919Sxy150489 (hw->revision_id == E1000_REVISION_2)) { 25114919Sxy150489 E1000_WRITE_REG(hw, E1000_RCTL, 0); 25124919Sxy150489 msec_delay(1); 25134919Sxy150489 if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 25143526Sxy150489 e1000_pci_set_mwi(hw); 25154919Sxy150489 e1000g_rx_setup(Adapter); 25163526Sxy150489 } 25173526Sxy150489 25185273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 25195273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 25205273Sgl147354 return (EIO); 25215273Sgl147354 } 25225273Sgl147354 25233526Sxy150489 return (0); 25243526Sxy150489 } 25253526Sxy150489 25263526Sxy150489 static int 25273526Sxy150489 multicst_add(struct e1000g *Adapter, const uint8_t *multiaddr) 25283526Sxy150489 { 25294919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 25309770SChangqing.Li@Sun.COM struct ether_addr *newtable; 25319770SChangqing.Li@Sun.COM size_t new_len; 25329770SChangqing.Li@Sun.COM size_t old_len; 25333526Sxy150489 int res = 0; 25343526Sxy150489 25353526Sxy150489 if ((multiaddr[0] & 01) == 0) { 25363526Sxy150489 res = EINVAL; 25379770SChangqing.Li@Sun.COM e1000g_log(Adapter, CE_WARN, "Illegal multicast address"); 25383526Sxy150489 goto done; 25393526Sxy150489 } 25403526Sxy150489 25419770SChangqing.Li@Sun.COM if (Adapter->mcast_count >= Adapter->mcast_max_num) { 25423526Sxy150489 res = ENOENT; 25439770SChangqing.Li@Sun.COM e1000g_log(Adapter, CE_WARN, 25449770SChangqing.Li@Sun.COM "Adapter requested more than %d mcast addresses", 25459770SChangqing.Li@Sun.COM Adapter->mcast_max_num); 25463526Sxy150489 goto done; 25473526Sxy150489 } 25483526Sxy150489 25499770SChangqing.Li@Sun.COM 25509770SChangqing.Li@Sun.COM if (Adapter->mcast_count == Adapter->mcast_alloc_count) { 25519770SChangqing.Li@Sun.COM old_len = Adapter->mcast_alloc_count * 25529770SChangqing.Li@Sun.COM sizeof (struct ether_addr); 25539770SChangqing.Li@Sun.COM new_len = (Adapter->mcast_alloc_count + MCAST_ALLOC_SIZE) * 25549770SChangqing.Li@Sun.COM sizeof (struct ether_addr); 25559770SChangqing.Li@Sun.COM 25569770SChangqing.Li@Sun.COM newtable = kmem_alloc(new_len, KM_NOSLEEP); 25579770SChangqing.Li@Sun.COM if (newtable == NULL) { 25589770SChangqing.Li@Sun.COM res = ENOMEM; 25599770SChangqing.Li@Sun.COM e1000g_log(Adapter, CE_WARN, 25609770SChangqing.Li@Sun.COM "Not enough memory to alloc mcast table"); 25619770SChangqing.Li@Sun.COM goto done; 25629770SChangqing.Li@Sun.COM } 25639770SChangqing.Li@Sun.COM 25649770SChangqing.Li@Sun.COM if (Adapter->mcast_table != NULL) { 25659770SChangqing.Li@Sun.COM bcopy(Adapter->mcast_table, newtable, old_len); 25669770SChangqing.Li@Sun.COM kmem_free(Adapter->mcast_table, old_len); 25679770SChangqing.Li@Sun.COM } 25689770SChangqing.Li@Sun.COM Adapter->mcast_alloc_count += MCAST_ALLOC_SIZE; 25699770SChangqing.Li@Sun.COM Adapter->mcast_table = newtable; 25709770SChangqing.Li@Sun.COM } 25719770SChangqing.Li@Sun.COM 25723526Sxy150489 bcopy(multiaddr, 25733526Sxy150489 &Adapter->mcast_table[Adapter->mcast_count], ETHERADDRL); 25743526Sxy150489 Adapter->mcast_count++; 25753526Sxy150489 25763526Sxy150489 /* 25773526Sxy150489 * Update the MC table in the hardware 25783526Sxy150489 */ 25794919Sxy150489 e1000g_clear_interrupt(Adapter); 25804919Sxy150489 258110680SMin.Xu@Sun.COM e1000_update_mc_addr_list(hw, 258210680SMin.Xu@Sun.COM (uint8_t *)Adapter->mcast_table, Adapter->mcast_count); 25834919Sxy150489 25844919Sxy150489 e1000g_mask_interrupt(Adapter); 25853526Sxy150489 25865273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 25875273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 25885273Sgl147354 res = EIO; 25895273Sgl147354 } 25905273Sgl147354 25918479SChenlu.Chen@Sun.COM done: 25923526Sxy150489 return (res); 25933526Sxy150489 } 25943526Sxy150489 25953526Sxy150489 static int 25963526Sxy150489 multicst_remove(struct e1000g *Adapter, const uint8_t *multiaddr) 25973526Sxy150489 { 25984919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 25999770SChangqing.Li@Sun.COM struct ether_addr *newtable; 26009770SChangqing.Li@Sun.COM size_t new_len; 26019770SChangqing.Li@Sun.COM size_t old_len; 26023526Sxy150489 unsigned i; 26033526Sxy150489 26043526Sxy150489 for (i = 0; i < Adapter->mcast_count; i++) { 26053526Sxy150489 if (bcmp(multiaddr, &Adapter->mcast_table[i], 26063526Sxy150489 ETHERADDRL) == 0) { 26073526Sxy150489 for (i++; i < Adapter->mcast_count; i++) { 26083526Sxy150489 Adapter->mcast_table[i - 1] = 26093526Sxy150489 Adapter->mcast_table[i]; 26103526Sxy150489 } 26113526Sxy150489 Adapter->mcast_count--; 26123526Sxy150489 break; 26133526Sxy150489 } 26143526Sxy150489 } 26153526Sxy150489 26169770SChangqing.Li@Sun.COM if ((Adapter->mcast_alloc_count - Adapter->mcast_count) > 26179770SChangqing.Li@Sun.COM MCAST_ALLOC_SIZE) { 26189770SChangqing.Li@Sun.COM old_len = Adapter->mcast_alloc_count * 26199770SChangqing.Li@Sun.COM sizeof (struct ether_addr); 26209770SChangqing.Li@Sun.COM new_len = (Adapter->mcast_alloc_count - MCAST_ALLOC_SIZE) * 26219770SChangqing.Li@Sun.COM sizeof (struct ether_addr); 26229770SChangqing.Li@Sun.COM 26239770SChangqing.Li@Sun.COM newtable = kmem_alloc(new_len, KM_NOSLEEP); 26249770SChangqing.Li@Sun.COM if (newtable != NULL) { 26259770SChangqing.Li@Sun.COM bcopy(Adapter->mcast_table, newtable, new_len); 26269770SChangqing.Li@Sun.COM kmem_free(Adapter->mcast_table, old_len); 26279770SChangqing.Li@Sun.COM 26289770SChangqing.Li@Sun.COM Adapter->mcast_alloc_count -= MCAST_ALLOC_SIZE; 26299770SChangqing.Li@Sun.COM Adapter->mcast_table = newtable; 26309770SChangqing.Li@Sun.COM } 26319770SChangqing.Li@Sun.COM } 26329770SChangqing.Li@Sun.COM 26333526Sxy150489 /* 26343526Sxy150489 * Update the MC table in the hardware 26353526Sxy150489 */ 26364919Sxy150489 e1000g_clear_interrupt(Adapter); 26374919Sxy150489 263810680SMin.Xu@Sun.COM e1000_update_mc_addr_list(hw, 263910680SMin.Xu@Sun.COM (uint8_t *)Adapter->mcast_table, Adapter->mcast_count); 26404919Sxy150489 26414919Sxy150489 e1000g_mask_interrupt(Adapter); 26423526Sxy150489 26435273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 26445273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 26455273Sgl147354 return (EIO); 26465273Sgl147354 } 26475273Sgl147354 26483526Sxy150489 return (0); 26493526Sxy150489 } 26503526Sxy150489 26519770SChangqing.Li@Sun.COM static void 26529770SChangqing.Li@Sun.COM e1000g_release_multicast(struct e1000g *Adapter) 26539770SChangqing.Li@Sun.COM { 26549770SChangqing.Li@Sun.COM if (Adapter->mcast_table != NULL) { 26559770SChangqing.Li@Sun.COM kmem_free(Adapter->mcast_table, 26569770SChangqing.Li@Sun.COM Adapter->mcast_alloc_count * sizeof (struct ether_addr)); 26579770SChangqing.Li@Sun.COM Adapter->mcast_table = NULL; 26589770SChangqing.Li@Sun.COM } 26599770SChangqing.Li@Sun.COM } 26609770SChangqing.Li@Sun.COM 26613526Sxy150489 int 26623526Sxy150489 e1000g_m_multicst(void *arg, boolean_t add, const uint8_t *addr) 26633526Sxy150489 { 26643526Sxy150489 struct e1000g *Adapter = (struct e1000g *)arg; 26658479SChenlu.Chen@Sun.COM int result; 26668479SChenlu.Chen@Sun.COM 26678479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 26688479SChenlu.Chen@Sun.COM 26698479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 26708479SChenlu.Chen@Sun.COM result = ECANCELED; 26718479SChenlu.Chen@Sun.COM goto done; 26728479SChenlu.Chen@Sun.COM } 26738479SChenlu.Chen@Sun.COM 26748479SChenlu.Chen@Sun.COM result = (add) ? multicst_add(Adapter, addr) 26758479SChenlu.Chen@Sun.COM : multicst_remove(Adapter, addr); 26768479SChenlu.Chen@Sun.COM 26778479SChenlu.Chen@Sun.COM done: 26788479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 26798479SChenlu.Chen@Sun.COM return (result); 26808479SChenlu.Chen@Sun.COM 26813526Sxy150489 } 26823526Sxy150489 26833526Sxy150489 int 26843526Sxy150489 e1000g_m_promisc(void *arg, boolean_t on) 26853526Sxy150489 { 26863526Sxy150489 struct e1000g *Adapter = (struct e1000g *)arg; 26874919Sxy150489 uint32_t rctl; 26883526Sxy150489 26893526Sxy150489 rw_enter(&Adapter->chip_lock, RW_WRITER); 26903526Sxy150489 26918479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 26928479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 26938479SChenlu.Chen@Sun.COM return (ECANCELED); 26948479SChenlu.Chen@Sun.COM } 26958479SChenlu.Chen@Sun.COM 26964919Sxy150489 rctl = E1000_READ_REG(&Adapter->shared, E1000_RCTL); 26973526Sxy150489 26983526Sxy150489 if (on) 26994919Sxy150489 rctl |= 27003526Sxy150489 (E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_BAM); 27013526Sxy150489 else 27024919Sxy150489 rctl &= (~(E1000_RCTL_UPE | E1000_RCTL_MPE)); 27034919Sxy150489 27044919Sxy150489 E1000_WRITE_REG(&Adapter->shared, E1000_RCTL, rctl); 27053526Sxy150489 27063526Sxy150489 Adapter->e1000g_promisc = on; 27073526Sxy150489 27083526Sxy150489 rw_exit(&Adapter->chip_lock); 27093526Sxy150489 27105273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 27115273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 27125273Sgl147354 return (EIO); 27135273Sgl147354 } 27145273Sgl147354 27153526Sxy150489 return (0); 27163526Sxy150489 } 27173526Sxy150489 27188275SEric Cheng /* 27198275SEric Cheng * Entry points to enable and disable interrupts at the granularity of 27208275SEric Cheng * a group. 27218275SEric Cheng * Turns the poll_mode for the whole adapter on and off to enable or 27228275SEric Cheng * override the ring level polling control over the hardware interrupts. 27238275SEric Cheng */ 27248275SEric Cheng static int 27258275SEric Cheng e1000g_rx_group_intr_enable(mac_intr_handle_t arg) 27268275SEric Cheng { 27278275SEric Cheng struct e1000g *adapter = (struct e1000g *)arg; 27288275SEric Cheng e1000g_rx_ring_t *rx_ring = adapter->rx_ring; 27298275SEric Cheng 27308275SEric Cheng /* 27318275SEric Cheng * Later interrupts at the granularity of the this ring will 27328275SEric Cheng * invoke mac_rx() with NULL, indicating the need for another 27338275SEric Cheng * software classification. 27348275SEric Cheng * We have a single ring usable per adapter now, so we only need to 27358275SEric Cheng * reset the rx handle for that one. 27368275SEric Cheng * When more RX rings can be used, we should update each one of them. 27378275SEric Cheng */ 27388275SEric Cheng mutex_enter(&rx_ring->rx_lock); 27398275SEric Cheng rx_ring->mrh = NULL; 27408275SEric Cheng adapter->poll_mode = B_FALSE; 27418275SEric Cheng mutex_exit(&rx_ring->rx_lock); 27428275SEric Cheng return (0); 27438275SEric Cheng } 27448275SEric Cheng 27458275SEric Cheng static int 27468275SEric Cheng e1000g_rx_group_intr_disable(mac_intr_handle_t arg) 27478275SEric Cheng { 27488275SEric Cheng struct e1000g *adapter = (struct e1000g *)arg; 27498275SEric Cheng e1000g_rx_ring_t *rx_ring = adapter->rx_ring; 27508275SEric Cheng 27518275SEric Cheng mutex_enter(&rx_ring->rx_lock); 27528275SEric Cheng 27538275SEric Cheng /* 27548275SEric Cheng * Later interrupts at the granularity of the this ring will 27558275SEric Cheng * invoke mac_rx() with the handle for this ring; 27568275SEric Cheng */ 27578275SEric Cheng adapter->poll_mode = B_TRUE; 27588275SEric Cheng rx_ring->mrh = rx_ring->mrh_init; 27598275SEric Cheng mutex_exit(&rx_ring->rx_lock); 27608275SEric Cheng return (0); 27618275SEric Cheng } 27628275SEric Cheng 27638275SEric Cheng /* 27648275SEric Cheng * Entry points to enable and disable interrupts at the granularity of 27658275SEric Cheng * a ring. 27668275SEric Cheng * adapter poll_mode controls whether we actually proceed with hardware 27678275SEric Cheng * interrupt toggling. 27688275SEric Cheng */ 27698275SEric Cheng static int 27708275SEric Cheng e1000g_rx_ring_intr_enable(mac_intr_handle_t intrh) 27718275SEric Cheng { 27728275SEric Cheng e1000g_rx_ring_t *rx_ring = (e1000g_rx_ring_t *)intrh; 27738275SEric Cheng struct e1000g *adapter = rx_ring->adapter; 27748275SEric Cheng struct e1000_hw *hw = &adapter->shared; 27758275SEric Cheng uint32_t intr_mask; 27768275SEric Cheng 27778479SChenlu.Chen@Sun.COM rw_enter(&adapter->chip_lock, RW_READER); 27788479SChenlu.Chen@Sun.COM 27798479SChenlu.Chen@Sun.COM if (adapter->e1000g_state & E1000G_SUSPENDED) { 27808479SChenlu.Chen@Sun.COM rw_exit(&adapter->chip_lock); 27818479SChenlu.Chen@Sun.COM return (0); 27828479SChenlu.Chen@Sun.COM } 27838479SChenlu.Chen@Sun.COM 27848275SEric Cheng mutex_enter(&rx_ring->rx_lock); 27858275SEric Cheng rx_ring->poll_flag = 0; 27868275SEric Cheng mutex_exit(&rx_ring->rx_lock); 27878275SEric Cheng 27888833SVenu.Iyer@Sun.COM /* Rx interrupt enabling for MSI and legacy */ 27898833SVenu.Iyer@Sun.COM intr_mask = E1000_READ_REG(hw, E1000_IMS); 27908833SVenu.Iyer@Sun.COM intr_mask |= E1000_IMS_RXT0; 27918833SVenu.Iyer@Sun.COM E1000_WRITE_REG(hw, E1000_IMS, intr_mask); 27928833SVenu.Iyer@Sun.COM E1000_WRITE_FLUSH(hw); 27938833SVenu.Iyer@Sun.COM 27948833SVenu.Iyer@Sun.COM /* Trigger a Rx interrupt to check Rx ring */ 27958833SVenu.Iyer@Sun.COM E1000_WRITE_REG(hw, E1000_ICS, E1000_IMS_RXT0); 27968833SVenu.Iyer@Sun.COM E1000_WRITE_FLUSH(hw); 27978479SChenlu.Chen@Sun.COM 27988479SChenlu.Chen@Sun.COM rw_exit(&adapter->chip_lock); 27998275SEric Cheng return (0); 28008275SEric Cheng } 28018275SEric Cheng 28028275SEric Cheng static int 28038275SEric Cheng e1000g_rx_ring_intr_disable(mac_intr_handle_t intrh) 28048275SEric Cheng { 28058275SEric Cheng e1000g_rx_ring_t *rx_ring = (e1000g_rx_ring_t *)intrh; 28068275SEric Cheng struct e1000g *adapter = rx_ring->adapter; 28078275SEric Cheng struct e1000_hw *hw = &adapter->shared; 28088275SEric Cheng 28098479SChenlu.Chen@Sun.COM rw_enter(&adapter->chip_lock, RW_READER); 28108479SChenlu.Chen@Sun.COM 28118479SChenlu.Chen@Sun.COM if (adapter->e1000g_state & E1000G_SUSPENDED) { 28128479SChenlu.Chen@Sun.COM rw_exit(&adapter->chip_lock); 28138479SChenlu.Chen@Sun.COM return (0); 28148479SChenlu.Chen@Sun.COM } 28158275SEric Cheng mutex_enter(&rx_ring->rx_lock); 28168275SEric Cheng rx_ring->poll_flag = 1; 28178275SEric Cheng mutex_exit(&rx_ring->rx_lock); 28188275SEric Cheng 28198833SVenu.Iyer@Sun.COM /* Rx interrupt disabling for MSI and legacy */ 28208833SVenu.Iyer@Sun.COM E1000_WRITE_REG(hw, E1000_IMC, E1000_IMS_RXT0); 28218833SVenu.Iyer@Sun.COM E1000_WRITE_FLUSH(hw); 28228479SChenlu.Chen@Sun.COM 28238479SChenlu.Chen@Sun.COM rw_exit(&adapter->chip_lock); 28248275SEric Cheng return (0); 28258275SEric Cheng } 28268275SEric Cheng 28278275SEric Cheng /* 28288275SEric Cheng * e1000g_unicst_find - Find the slot for the specified unicast address 28298275SEric Cheng */ 28308275SEric Cheng static int 28318275SEric Cheng e1000g_unicst_find(struct e1000g *Adapter, const uint8_t *mac_addr) 28328275SEric Cheng { 28338275SEric Cheng int slot; 28348275SEric Cheng 28358275SEric Cheng for (slot = 0; slot < Adapter->unicst_total; slot++) { 28368479SChenlu.Chen@Sun.COM if ((Adapter->unicst_addr[slot].mac.set == 1) && 28378479SChenlu.Chen@Sun.COM (bcmp(Adapter->unicst_addr[slot].mac.addr, 28388479SChenlu.Chen@Sun.COM mac_addr, ETHERADDRL) == 0)) 28398275SEric Cheng return (slot); 28408275SEric Cheng } 28418275SEric Cheng 28428275SEric Cheng return (-1); 28438275SEric Cheng } 28448275SEric Cheng 28458275SEric Cheng /* 28468275SEric Cheng * Entry points to add and remove a MAC address to a ring group. 28478275SEric Cheng * The caller takes care of adding and removing the MAC addresses 28488275SEric Cheng * to the filter via these two routines. 28498275SEric Cheng */ 28508275SEric Cheng 28518275SEric Cheng static int 28528275SEric Cheng e1000g_addmac(void *arg, const uint8_t *mac_addr) 28538275SEric Cheng { 28548275SEric Cheng struct e1000g *Adapter = (struct e1000g *)arg; 28558400SNicolas.Droux@Sun.COM int slot, err; 28568275SEric Cheng 28578479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 28588479SChenlu.Chen@Sun.COM 28598479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 28608479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 28618479SChenlu.Chen@Sun.COM return (ECANCELED); 28628479SChenlu.Chen@Sun.COM } 28638275SEric Cheng 28648275SEric Cheng if (e1000g_unicst_find(Adapter, mac_addr) != -1) { 28658275SEric Cheng /* The same address is already in slot */ 28668479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 28678275SEric Cheng return (0); 28688275SEric Cheng } 28698275SEric Cheng 28708275SEric Cheng if (Adapter->unicst_avail == 0) { 28718275SEric Cheng /* no slots available */ 28728479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 28738275SEric Cheng return (ENOSPC); 28748275SEric Cheng } 28758275SEric Cheng 28768275SEric Cheng /* Search for a free slot */ 28778275SEric Cheng for (slot = 0; slot < Adapter->unicst_total; slot++) { 28788275SEric Cheng if (Adapter->unicst_addr[slot].mac.set == 0) 28798275SEric Cheng break; 28808275SEric Cheng } 28818275SEric Cheng ASSERT(slot < Adapter->unicst_total); 28828275SEric Cheng 28838400SNicolas.Droux@Sun.COM err = e1000g_unicst_set(Adapter, mac_addr, slot); 28848400SNicolas.Droux@Sun.COM if (err == 0) 28858400SNicolas.Droux@Sun.COM Adapter->unicst_avail--; 28868275SEric Cheng 28878479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 28888275SEric Cheng 28898400SNicolas.Droux@Sun.COM return (err); 28908275SEric Cheng } 28918275SEric Cheng 28928275SEric Cheng static int 28938275SEric Cheng e1000g_remmac(void *arg, const uint8_t *mac_addr) 28948275SEric Cheng { 28958275SEric Cheng struct e1000g *Adapter = (struct e1000g *)arg; 28968400SNicolas.Droux@Sun.COM int slot, err; 28978275SEric Cheng 28988479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 28998479SChenlu.Chen@Sun.COM 29008479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 29018479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 29028479SChenlu.Chen@Sun.COM return (ECANCELED); 29038479SChenlu.Chen@Sun.COM } 29048275SEric Cheng 29058275SEric Cheng slot = e1000g_unicst_find(Adapter, mac_addr); 29068275SEric Cheng if (slot == -1) { 29078479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 29088275SEric Cheng return (EINVAL); 29098275SEric Cheng } 29108275SEric Cheng 29118275SEric Cheng ASSERT(Adapter->unicst_addr[slot].mac.set); 29128275SEric Cheng 29138275SEric Cheng /* Clear this slot */ 29148400SNicolas.Droux@Sun.COM err = e1000g_unicst_set(Adapter, NULL, slot); 29158400SNicolas.Droux@Sun.COM if (err == 0) 29168400SNicolas.Droux@Sun.COM Adapter->unicst_avail++; 29178275SEric Cheng 29188479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 29198275SEric Cheng 29208400SNicolas.Droux@Sun.COM return (err); 29218275SEric Cheng } 29228275SEric Cheng 29238275SEric Cheng static int 29248275SEric Cheng e1000g_ring_start(mac_ring_driver_t rh, uint64_t mr_gen_num) 29258275SEric Cheng { 29268275SEric Cheng e1000g_rx_ring_t *rx_ring = (e1000g_rx_ring_t *)rh; 29278275SEric Cheng 29288275SEric Cheng mutex_enter(&rx_ring->rx_lock); 29298275SEric Cheng rx_ring->ring_gen_num = mr_gen_num; 29308275SEric Cheng mutex_exit(&rx_ring->rx_lock); 29318275SEric Cheng return (0); 29328275SEric Cheng } 29338275SEric Cheng 29348275SEric Cheng /* 29358275SEric Cheng * Callback funtion for MAC layer to register all rings. 29368275SEric Cheng * 29378275SEric Cheng * The hardware supports a single group with currently only one ring 29388275SEric Cheng * available. 29398275SEric Cheng * Though not offering virtualization ability per se, exposing the 29408275SEric Cheng * group/ring still enables the polling and interrupt toggling. 29418275SEric Cheng */ 294211143SGuoqing.Zhu@Sun.COM /* ARGSUSED */ 29438275SEric Cheng void 29448275SEric Cheng e1000g_fill_ring(void *arg, mac_ring_type_t rtype, const int grp_index, 29458275SEric Cheng const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh) 29468275SEric Cheng { 29478275SEric Cheng struct e1000g *Adapter = (struct e1000g *)arg; 29488275SEric Cheng e1000g_rx_ring_t *rx_ring = Adapter->rx_ring; 29498275SEric Cheng mac_intr_t *mintr; 29508275SEric Cheng 29518275SEric Cheng /* 29528275SEric Cheng * We advertised only RX group/rings, so the MAC framework shouldn't 29538275SEric Cheng * ask for any thing else. 29548275SEric Cheng */ 29558275SEric Cheng ASSERT(rtype == MAC_RING_TYPE_RX && grp_index == 0 && ring_index == 0); 29568275SEric Cheng 29578275SEric Cheng rx_ring->mrh = rx_ring->mrh_init = rh; 29588275SEric Cheng infop->mri_driver = (mac_ring_driver_t)rx_ring; 29598275SEric Cheng infop->mri_start = e1000g_ring_start; 29608275SEric Cheng infop->mri_stop = NULL; 29618275SEric Cheng infop->mri_poll = e1000g_poll_ring; 29628275SEric Cheng 29638275SEric Cheng /* Ring level interrupts */ 29648275SEric Cheng mintr = &infop->mri_intr; 29658275SEric Cheng mintr->mi_handle = (mac_intr_handle_t)rx_ring; 29668275SEric Cheng mintr->mi_enable = e1000g_rx_ring_intr_enable; 29678275SEric Cheng mintr->mi_disable = e1000g_rx_ring_intr_disable; 29688275SEric Cheng } 29698275SEric Cheng 297011143SGuoqing.Zhu@Sun.COM /* ARGSUSED */ 29718275SEric Cheng static void 29728275SEric Cheng e1000g_fill_group(void *arg, mac_ring_type_t rtype, const int grp_index, 29738275SEric Cheng mac_group_info_t *infop, mac_group_handle_t gh) 29748275SEric Cheng { 29758275SEric Cheng struct e1000g *Adapter = (struct e1000g *)arg; 29768275SEric Cheng mac_intr_t *mintr; 29778275SEric Cheng 29788275SEric Cheng /* 29798275SEric Cheng * We advertised a single RX ring. Getting a request for anything else 29808275SEric Cheng * signifies a bug in the MAC framework. 29818275SEric Cheng */ 29828275SEric Cheng ASSERT(rtype == MAC_RING_TYPE_RX && grp_index == 0); 29838275SEric Cheng 29848275SEric Cheng Adapter->rx_group = gh; 29858275SEric Cheng 29868275SEric Cheng infop->mgi_driver = (mac_group_driver_t)Adapter; 29878275SEric Cheng infop->mgi_start = NULL; 29888275SEric Cheng infop->mgi_stop = NULL; 29898275SEric Cheng infop->mgi_addmac = e1000g_addmac; 29908275SEric Cheng infop->mgi_remmac = e1000g_remmac; 29918275SEric Cheng infop->mgi_count = 1; 29928275SEric Cheng 29938275SEric Cheng /* Group level interrupts */ 29948275SEric Cheng mintr = &infop->mgi_intr; 29958275SEric Cheng mintr->mi_handle = (mac_intr_handle_t)Adapter; 29968275SEric Cheng mintr->mi_enable = e1000g_rx_group_intr_enable; 29978275SEric Cheng mintr->mi_disable = e1000g_rx_group_intr_disable; 29988275SEric Cheng } 29998275SEric Cheng 30003526Sxy150489 static boolean_t 30013526Sxy150489 e1000g_m_getcapab(void *arg, mac_capab_t cap, void *cap_data) 30023526Sxy150489 { 30033526Sxy150489 struct e1000g *Adapter = (struct e1000g *)arg; 30043526Sxy150489 30053526Sxy150489 switch (cap) { 30063526Sxy150489 case MAC_CAPAB_HCKSUM: { 30073526Sxy150489 uint32_t *txflags = cap_data; 30086986Smx205022 30096986Smx205022 if (Adapter->tx_hcksum_enable) 30106986Smx205022 *txflags = HCKSUM_IPHDRCKSUM | 30116986Smx205022 HCKSUM_INET_PARTIAL; 30126986Smx205022 else 30133526Sxy150489 return (B_FALSE); 30143526Sxy150489 break; 30153526Sxy150489 } 30166986Smx205022 30176986Smx205022 case MAC_CAPAB_LSO: { 30186986Smx205022 mac_capab_lso_t *cap_lso = cap_data; 30196986Smx205022 30206986Smx205022 if (Adapter->lso_enable) { 30216986Smx205022 cap_lso->lso_flags = LSO_TX_BASIC_TCP_IPV4; 30226986Smx205022 cap_lso->lso_basic_tcp_ipv4.lso_max = 30236986Smx205022 E1000_LSO_MAXLEN; 30246986Smx205022 } else 30256986Smx205022 return (B_FALSE); 30266986Smx205022 break; 30276986Smx205022 } 30288275SEric Cheng case MAC_CAPAB_RINGS: { 30298275SEric Cheng mac_capab_rings_t *cap_rings = cap_data; 30308275SEric Cheng 30318275SEric Cheng /* No TX rings exposed yet */ 30328275SEric Cheng if (cap_rings->mr_type != MAC_RING_TYPE_RX) 30338275SEric Cheng return (B_FALSE); 30348275SEric Cheng 30358275SEric Cheng cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC; 30368275SEric Cheng cap_rings->mr_rnum = 1; 30378275SEric Cheng cap_rings->mr_gnum = 1; 30388275SEric Cheng cap_rings->mr_rget = e1000g_fill_ring; 30398275SEric Cheng cap_rings->mr_gget = e1000g_fill_group; 30408275SEric Cheng break; 30418275SEric Cheng } 30423526Sxy150489 default: 30433526Sxy150489 return (B_FALSE); 30443526Sxy150489 } 30453526Sxy150489 return (B_TRUE); 30463526Sxy150489 } 30473526Sxy150489 30486394Scc210113 static boolean_t 30496394Scc210113 e1000g_param_locked(mac_prop_id_t pr_num) 30506394Scc210113 { 30516394Scc210113 /* 30526394Scc210113 * All en_* parameters are locked (read-only) while 30536394Scc210113 * the device is in any sort of loopback mode ... 30546394Scc210113 */ 30556394Scc210113 switch (pr_num) { 30566789Sam223141 case MAC_PROP_EN_1000FDX_CAP: 30576789Sam223141 case MAC_PROP_EN_1000HDX_CAP: 30586789Sam223141 case MAC_PROP_EN_100FDX_CAP: 30596789Sam223141 case MAC_PROP_EN_100HDX_CAP: 30606789Sam223141 case MAC_PROP_EN_10FDX_CAP: 30616789Sam223141 case MAC_PROP_EN_10HDX_CAP: 30626789Sam223141 case MAC_PROP_AUTONEG: 30636789Sam223141 case MAC_PROP_FLOWCTRL: 30646394Scc210113 return (B_TRUE); 30656394Scc210113 } 30666394Scc210113 return (B_FALSE); 30676394Scc210113 } 30686394Scc210113 30696394Scc210113 /* 30706394Scc210113 * callback function for set/get of properties 30716394Scc210113 */ 30726394Scc210113 static int 30736394Scc210113 e1000g_m_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num, 30746394Scc210113 uint_t pr_valsize, const void *pr_val) 30756394Scc210113 { 30766394Scc210113 struct e1000g *Adapter = arg; 307710605SMin.Xu@Sun.COM struct e1000_hw *hw = &Adapter->shared; 30786735Scc210113 struct e1000_fc_info *fc = &Adapter->shared.fc; 30796394Scc210113 int err = 0; 30806735Scc210113 link_flowctrl_t flowctrl; 30816512Ssowmini uint32_t cur_mtu, new_mtu; 30826394Scc210113 30836394Scc210113 rw_enter(&Adapter->chip_lock, RW_WRITER); 30848479SChenlu.Chen@Sun.COM 30858479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_SUSPENDED) { 30868479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 30878479SChenlu.Chen@Sun.COM return (ECANCELED); 30888479SChenlu.Chen@Sun.COM } 30898479SChenlu.Chen@Sun.COM 30906394Scc210113 if (Adapter->loopback_mode != E1000G_LB_NONE && 30916394Scc210113 e1000g_param_locked(pr_num)) { 30926394Scc210113 /* 30936394Scc210113 * All en_* parameters are locked (read-only) 30946394Scc210113 * while the device is in any sort of loopback mode. 30956394Scc210113 */ 30966394Scc210113 rw_exit(&Adapter->chip_lock); 30976394Scc210113 return (EBUSY); 30986394Scc210113 } 30996394Scc210113 31006394Scc210113 switch (pr_num) { 31016789Sam223141 case MAC_PROP_EN_1000FDX_CAP: 310210605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) { 310310605SMin.Xu@Sun.COM err = ENOTSUP; 310410605SMin.Xu@Sun.COM break; 310510605SMin.Xu@Sun.COM } 31066394Scc210113 Adapter->param_en_1000fdx = *(uint8_t *)pr_val; 31076394Scc210113 Adapter->param_adv_1000fdx = *(uint8_t *)pr_val; 31086394Scc210113 goto reset; 31096789Sam223141 case MAC_PROP_EN_100FDX_CAP: 311010605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) { 311110605SMin.Xu@Sun.COM err = ENOTSUP; 311210605SMin.Xu@Sun.COM break; 311310605SMin.Xu@Sun.COM } 31146394Scc210113 Adapter->param_en_100fdx = *(uint8_t *)pr_val; 31156394Scc210113 Adapter->param_adv_100fdx = *(uint8_t *)pr_val; 31166394Scc210113 goto reset; 31176789Sam223141 case MAC_PROP_EN_100HDX_CAP: 311810605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) { 311910605SMin.Xu@Sun.COM err = ENOTSUP; 312010605SMin.Xu@Sun.COM break; 312110605SMin.Xu@Sun.COM } 31226394Scc210113 Adapter->param_en_100hdx = *(uint8_t *)pr_val; 31236394Scc210113 Adapter->param_adv_100hdx = *(uint8_t *)pr_val; 31246394Scc210113 goto reset; 31256789Sam223141 case MAC_PROP_EN_10FDX_CAP: 312610605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) { 312710605SMin.Xu@Sun.COM err = ENOTSUP; 312810605SMin.Xu@Sun.COM break; 312910605SMin.Xu@Sun.COM } 31306394Scc210113 Adapter->param_en_10fdx = *(uint8_t *)pr_val; 31316394Scc210113 Adapter->param_adv_10fdx = *(uint8_t *)pr_val; 31326394Scc210113 goto reset; 31336789Sam223141 case MAC_PROP_EN_10HDX_CAP: 313410605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) { 313510605SMin.Xu@Sun.COM err = ENOTSUP; 313610605SMin.Xu@Sun.COM break; 313710605SMin.Xu@Sun.COM } 31386394Scc210113 Adapter->param_en_10hdx = *(uint8_t *)pr_val; 31396394Scc210113 Adapter->param_adv_10hdx = *(uint8_t *)pr_val; 31406394Scc210113 goto reset; 31416789Sam223141 case MAC_PROP_AUTONEG: 314210605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) { 314310605SMin.Xu@Sun.COM err = ENOTSUP; 314410605SMin.Xu@Sun.COM break; 314510605SMin.Xu@Sun.COM } 31466394Scc210113 Adapter->param_adv_autoneg = *(uint8_t *)pr_val; 31476394Scc210113 goto reset; 31486789Sam223141 case MAC_PROP_FLOWCTRL: 31496735Scc210113 fc->send_xon = B_TRUE; 31506735Scc210113 bcopy(pr_val, &flowctrl, sizeof (flowctrl)); 31516735Scc210113 31526735Scc210113 switch (flowctrl) { 31536394Scc210113 default: 31546394Scc210113 err = EINVAL; 31556394Scc210113 break; 31566394Scc210113 case LINK_FLOWCTRL_NONE: 31578539SChenlu.Chen@Sun.COM fc->requested_mode = e1000_fc_none; 31586394Scc210113 break; 31596394Scc210113 case LINK_FLOWCTRL_RX: 31608539SChenlu.Chen@Sun.COM fc->requested_mode = e1000_fc_rx_pause; 31616394Scc210113 break; 31626394Scc210113 case LINK_FLOWCTRL_TX: 31638539SChenlu.Chen@Sun.COM fc->requested_mode = e1000_fc_tx_pause; 31646394Scc210113 break; 31656394Scc210113 case LINK_FLOWCTRL_BI: 31668539SChenlu.Chen@Sun.COM fc->requested_mode = e1000_fc_full; 31676394Scc210113 break; 31686394Scc210113 } 31696394Scc210113 reset: 31706394Scc210113 if (err == 0) { 317110680SMin.Xu@Sun.COM /* check PCH limits & reset the link */ 317210680SMin.Xu@Sun.COM e1000g_pch_limits(Adapter); 31736394Scc210113 if (e1000g_reset_link(Adapter) != DDI_SUCCESS) 31746394Scc210113 err = EINVAL; 31756394Scc210113 } 31766394Scc210113 break; 31776789Sam223141 case MAC_PROP_ADV_1000FDX_CAP: 31786789Sam223141 case MAC_PROP_ADV_1000HDX_CAP: 31796789Sam223141 case MAC_PROP_ADV_100FDX_CAP: 31806789Sam223141 case MAC_PROP_ADV_100HDX_CAP: 31816789Sam223141 case MAC_PROP_ADV_10FDX_CAP: 31826789Sam223141 case MAC_PROP_ADV_10HDX_CAP: 31838118SVasumathi.Sundaram@Sun.COM case MAC_PROP_EN_1000HDX_CAP: 31846789Sam223141 case MAC_PROP_STATUS: 31856789Sam223141 case MAC_PROP_SPEED: 31866789Sam223141 case MAC_PROP_DUPLEX: 31876394Scc210113 err = ENOTSUP; /* read-only prop. Can't set this. */ 31886394Scc210113 break; 31896789Sam223141 case MAC_PROP_MTU: 319010680SMin.Xu@Sun.COM /* adapter must be stopped for an MTU change */ 319110680SMin.Xu@Sun.COM if (Adapter->e1000g_state & E1000G_STARTED) { 319210680SMin.Xu@Sun.COM err = EBUSY; 319310680SMin.Xu@Sun.COM break; 319410680SMin.Xu@Sun.COM } 319510680SMin.Xu@Sun.COM 31966394Scc210113 cur_mtu = Adapter->default_mtu; 319710680SMin.Xu@Sun.COM 319810680SMin.Xu@Sun.COM /* get new requested MTU */ 31996394Scc210113 bcopy(pr_val, &new_mtu, sizeof (new_mtu)); 32006394Scc210113 if (new_mtu == cur_mtu) { 32016394Scc210113 err = 0; 32026394Scc210113 break; 32036394Scc210113 } 32046394Scc210113 320510680SMin.Xu@Sun.COM if ((new_mtu < DEFAULT_MTU) || 320610680SMin.Xu@Sun.COM (new_mtu > Adapter->max_mtu)) { 32076394Scc210113 err = EINVAL; 32086394Scc210113 break; 32096394Scc210113 } 321010680SMin.Xu@Sun.COM 321110680SMin.Xu@Sun.COM /* inform MAC framework of new MTU */ 32126394Scc210113 err = mac_maxsdu_update(Adapter->mh, new_mtu); 321310680SMin.Xu@Sun.COM 32146394Scc210113 if (err == 0) { 32156394Scc210113 Adapter->default_mtu = new_mtu; 321610680SMin.Xu@Sun.COM Adapter->max_frame_size = 321710680SMin.Xu@Sun.COM e1000g_mtu2maxframe(new_mtu); 321810680SMin.Xu@Sun.COM 321910680SMin.Xu@Sun.COM /* 322010680SMin.Xu@Sun.COM * check PCH limits & set buffer sizes to 322110680SMin.Xu@Sun.COM * match new MTU 322210680SMin.Xu@Sun.COM */ 322310680SMin.Xu@Sun.COM e1000g_pch_limits(Adapter); 32246394Scc210113 e1000g_set_bufsize(Adapter); 322511339SGuoqing.Zhu@Sun.COM 322611339SGuoqing.Zhu@Sun.COM /* 322711339SGuoqing.Zhu@Sun.COM * decrease the number of descriptors and free 322811339SGuoqing.Zhu@Sun.COM * packets for jumbo frames to reduce tx/rx 322911339SGuoqing.Zhu@Sun.COM * resource consumption 323011339SGuoqing.Zhu@Sun.COM */ 323111339SGuoqing.Zhu@Sun.COM if (Adapter->max_frame_size >= 323211339SGuoqing.Zhu@Sun.COM (FRAME_SIZE_UPTO_4K - 323311339SGuoqing.Zhu@Sun.COM E1000G_IPALIGNPRESERVEROOM)) { 323411339SGuoqing.Zhu@Sun.COM 323511339SGuoqing.Zhu@Sun.COM if (Adapter->tx_desc_num_flag == 0) 323611339SGuoqing.Zhu@Sun.COM Adapter->tx_desc_num = 323711339SGuoqing.Zhu@Sun.COM DEFAULT_JUMBO_NUM_TX_DESC; 323811339SGuoqing.Zhu@Sun.COM 323911339SGuoqing.Zhu@Sun.COM if (Adapter->rx_desc_num_flag == 0) 324011339SGuoqing.Zhu@Sun.COM Adapter->rx_desc_num = 324111339SGuoqing.Zhu@Sun.COM DEFAULT_JUMBO_NUM_RX_DESC; 324211339SGuoqing.Zhu@Sun.COM 324311339SGuoqing.Zhu@Sun.COM if (Adapter->tx_buf_num_flag == 0) 324411339SGuoqing.Zhu@Sun.COM Adapter->tx_freelist_num = 324511339SGuoqing.Zhu@Sun.COM DEFAULT_JUMBO_NUM_TX_BUF; 324611339SGuoqing.Zhu@Sun.COM 324711339SGuoqing.Zhu@Sun.COM if (Adapter->rx_buf_num_flag == 0) 324811339SGuoqing.Zhu@Sun.COM Adapter->rx_freelist_num = 324911339SGuoqing.Zhu@Sun.COM DEFAULT_JUMBO_NUM_RX_BUF; 325011339SGuoqing.Zhu@Sun.COM } else { 325111339SGuoqing.Zhu@Sun.COM if (Adapter->tx_desc_num_flag == 0) 325211339SGuoqing.Zhu@Sun.COM Adapter->tx_desc_num = 325311339SGuoqing.Zhu@Sun.COM DEFAULT_NUM_TX_DESCRIPTOR; 325411339SGuoqing.Zhu@Sun.COM 325511339SGuoqing.Zhu@Sun.COM if (Adapter->rx_desc_num_flag == 0) 325611339SGuoqing.Zhu@Sun.COM Adapter->rx_desc_num = 325711339SGuoqing.Zhu@Sun.COM DEFAULT_NUM_RX_DESCRIPTOR; 325811339SGuoqing.Zhu@Sun.COM 325911339SGuoqing.Zhu@Sun.COM if (Adapter->tx_buf_num_flag == 0) 326011339SGuoqing.Zhu@Sun.COM Adapter->tx_freelist_num = 326111339SGuoqing.Zhu@Sun.COM DEFAULT_NUM_TX_FREELIST; 326211339SGuoqing.Zhu@Sun.COM 326311339SGuoqing.Zhu@Sun.COM if (Adapter->rx_buf_num_flag == 0) 326411339SGuoqing.Zhu@Sun.COM Adapter->rx_freelist_num = 326511339SGuoqing.Zhu@Sun.COM DEFAULT_NUM_RX_FREELIST; 326611339SGuoqing.Zhu@Sun.COM } 32676394Scc210113 } 32686394Scc210113 break; 32696789Sam223141 case MAC_PROP_PRIVATE: 32706394Scc210113 err = e1000g_set_priv_prop(Adapter, pr_name, 32716394Scc210113 pr_valsize, pr_val); 32726394Scc210113 break; 32736394Scc210113 default: 32746394Scc210113 err = ENOTSUP; 32756394Scc210113 break; 32766394Scc210113 } 32776394Scc210113 rw_exit(&Adapter->chip_lock); 32786394Scc210113 return (err); 32796394Scc210113 } 32806394Scc210113 32816394Scc210113 static int 32826394Scc210113 e1000g_m_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num, 32838118SVasumathi.Sundaram@Sun.COM uint_t pr_flags, uint_t pr_valsize, void *pr_val, uint_t *perm) 32846394Scc210113 { 32856394Scc210113 struct e1000g *Adapter = arg; 32866735Scc210113 struct e1000_fc_info *fc = &Adapter->shared.fc; 328710605SMin.Xu@Sun.COM struct e1000_hw *hw = &Adapter->shared; 32886512Ssowmini int err = 0; 32896735Scc210113 link_flowctrl_t flowctrl; 32906394Scc210113 uint64_t tmp = 0; 32916394Scc210113 32926512Ssowmini if (pr_valsize == 0) 32936512Ssowmini return (EINVAL); 32946512Ssowmini 32958118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_RW; 32968118SVasumathi.Sundaram@Sun.COM 32976394Scc210113 bzero(pr_val, pr_valsize); 32986789Sam223141 if ((pr_flags & MAC_PROP_DEFAULT) && (pr_num != MAC_PROP_PRIVATE)) { 32996512Ssowmini return (e1000g_get_def_val(Adapter, pr_num, 33006512Ssowmini pr_valsize, pr_val)); 33016512Ssowmini } 33026512Ssowmini 33036394Scc210113 switch (pr_num) { 33046789Sam223141 case MAC_PROP_DUPLEX: 33058118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33066512Ssowmini if (pr_valsize >= sizeof (link_duplex_t)) { 33076512Ssowmini bcopy(&Adapter->link_duplex, pr_val, 33086512Ssowmini sizeof (link_duplex_t)); 33096512Ssowmini } else 33106512Ssowmini err = EINVAL; 33116394Scc210113 break; 33126789Sam223141 case MAC_PROP_SPEED: 33138118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33146394Scc210113 if (pr_valsize >= sizeof (uint64_t)) { 33156394Scc210113 tmp = Adapter->link_speed * 1000000ull; 33166394Scc210113 bcopy(&tmp, pr_val, sizeof (tmp)); 33176512Ssowmini } else 33186512Ssowmini err = EINVAL; 33196394Scc210113 break; 33206789Sam223141 case MAC_PROP_AUTONEG: 332110605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 332210605SMin.Xu@Sun.COM *perm = MAC_PROP_PERM_READ; 33236512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_autoneg; 33246394Scc210113 break; 33256789Sam223141 case MAC_PROP_FLOWCTRL: 33266394Scc210113 if (pr_valsize >= sizeof (link_flowctrl_t)) { 33278479SChenlu.Chen@Sun.COM switch (fc->current_mode) { 33286394Scc210113 case e1000_fc_none: 33296735Scc210113 flowctrl = LINK_FLOWCTRL_NONE; 33306394Scc210113 break; 33316394Scc210113 case e1000_fc_rx_pause: 33326735Scc210113 flowctrl = LINK_FLOWCTRL_RX; 33336394Scc210113 break; 33346394Scc210113 case e1000_fc_tx_pause: 33356735Scc210113 flowctrl = LINK_FLOWCTRL_TX; 33366394Scc210113 break; 33376394Scc210113 case e1000_fc_full: 33386735Scc210113 flowctrl = LINK_FLOWCTRL_BI; 33396394Scc210113 break; 33406394Scc210113 } 33416735Scc210113 bcopy(&flowctrl, pr_val, sizeof (flowctrl)); 33426512Ssowmini } else 33436512Ssowmini err = EINVAL; 33446394Scc210113 break; 33456789Sam223141 case MAC_PROP_ADV_1000FDX_CAP: 33468118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33476512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_1000fdx; 33486394Scc210113 break; 33496789Sam223141 case MAC_PROP_EN_1000FDX_CAP: 335010605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 335110605SMin.Xu@Sun.COM *perm = MAC_PROP_PERM_READ; 33526512Ssowmini *(uint8_t *)pr_val = Adapter->param_en_1000fdx; 33536394Scc210113 break; 33546789Sam223141 case MAC_PROP_ADV_1000HDX_CAP: 33558118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33566512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_1000hdx; 33576394Scc210113 break; 33586789Sam223141 case MAC_PROP_EN_1000HDX_CAP: 33598118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33606512Ssowmini *(uint8_t *)pr_val = Adapter->param_en_1000hdx; 33616394Scc210113 break; 33626789Sam223141 case MAC_PROP_ADV_100FDX_CAP: 33638118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33646512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_100fdx; 33656394Scc210113 break; 33666789Sam223141 case MAC_PROP_EN_100FDX_CAP: 336710605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 336810605SMin.Xu@Sun.COM *perm = MAC_PROP_PERM_READ; 33696512Ssowmini *(uint8_t *)pr_val = Adapter->param_en_100fdx; 33706394Scc210113 break; 33716789Sam223141 case MAC_PROP_ADV_100HDX_CAP: 33728118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33736512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_100hdx; 33746394Scc210113 break; 33756789Sam223141 case MAC_PROP_EN_100HDX_CAP: 337610605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 337710605SMin.Xu@Sun.COM *perm = MAC_PROP_PERM_READ; 33786512Ssowmini *(uint8_t *)pr_val = Adapter->param_en_100hdx; 33796394Scc210113 break; 33806789Sam223141 case MAC_PROP_ADV_10FDX_CAP: 33818118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33826512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_10fdx; 33836394Scc210113 break; 33846789Sam223141 case MAC_PROP_EN_10FDX_CAP: 338510605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 338610605SMin.Xu@Sun.COM *perm = MAC_PROP_PERM_READ; 33876512Ssowmini *(uint8_t *)pr_val = Adapter->param_en_10fdx; 33886394Scc210113 break; 33896789Sam223141 case MAC_PROP_ADV_10HDX_CAP: 33908118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 33916512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_10hdx; 33926394Scc210113 break; 33936789Sam223141 case MAC_PROP_EN_10HDX_CAP: 339410605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 339510605SMin.Xu@Sun.COM *perm = MAC_PROP_PERM_READ; 33966512Ssowmini *(uint8_t *)pr_val = Adapter->param_en_10hdx; 33976512Ssowmini break; 33986789Sam223141 case MAC_PROP_ADV_100T4_CAP: 33996789Sam223141 case MAC_PROP_EN_100T4_CAP: 34008118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 34016512Ssowmini *(uint8_t *)pr_val = Adapter->param_adv_100t4; 34026394Scc210113 break; 34036789Sam223141 case MAC_PROP_PRIVATE: 34046394Scc210113 err = e1000g_get_priv_prop(Adapter, pr_name, 34058118SVasumathi.Sundaram@Sun.COM pr_flags, pr_valsize, pr_val, perm); 34066394Scc210113 break; 34079514SGirish.Moodalbail@Sun.COM case MAC_PROP_MTU: { 34089514SGirish.Moodalbail@Sun.COM struct e1000_mac_info *mac = &Adapter->shared.mac; 34099514SGirish.Moodalbail@Sun.COM struct e1000_phy_info *phy = &Adapter->shared.phy; 34109514SGirish.Moodalbail@Sun.COM mac_propval_range_t range; 34119514SGirish.Moodalbail@Sun.COM 34129514SGirish.Moodalbail@Sun.COM if (!(pr_flags & MAC_PROP_POSSIBLE)) 34139514SGirish.Moodalbail@Sun.COM return (ENOTSUP); 34149514SGirish.Moodalbail@Sun.COM if (pr_valsize < sizeof (mac_propval_range_t)) 34159514SGirish.Moodalbail@Sun.COM return (EINVAL); 34169514SGirish.Moodalbail@Sun.COM range.mpr_count = 1; 34179514SGirish.Moodalbail@Sun.COM range.mpr_type = MAC_PROPVAL_UINT32; 34189514SGirish.Moodalbail@Sun.COM range.range_uint32[0].mpur_min = DEFAULT_MTU; 341910680SMin.Xu@Sun.COM range.range_uint32[0].mpur_max = Adapter->max_mtu; 34209514SGirish.Moodalbail@Sun.COM /* following MAC type do not support jumbo frames */ 34219514SGirish.Moodalbail@Sun.COM if ((mac->type == e1000_ich8lan) || 34229514SGirish.Moodalbail@Sun.COM ((mac->type == e1000_ich9lan) && (phy->type == 34239514SGirish.Moodalbail@Sun.COM e1000_phy_ife))) { 34249514SGirish.Moodalbail@Sun.COM range.range_uint32[0].mpur_max = DEFAULT_MTU; 34259514SGirish.Moodalbail@Sun.COM } 34269514SGirish.Moodalbail@Sun.COM bcopy(&range, pr_val, sizeof (range)); 34279514SGirish.Moodalbail@Sun.COM break; 34289514SGirish.Moodalbail@Sun.COM } 34296394Scc210113 default: 34306394Scc210113 err = ENOTSUP; 34316394Scc210113 break; 34326394Scc210113 } 34336394Scc210113 return (err); 34346394Scc210113 } 34356394Scc210113 34367426SChenliang.Xu@Sun.COM /* ARGSUSED2 */ 34376394Scc210113 static int 34386394Scc210113 e1000g_set_priv_prop(struct e1000g *Adapter, const char *pr_name, 34396394Scc210113 uint_t pr_valsize, const void *pr_val) 34406394Scc210113 { 34416394Scc210113 int err = 0; 34426394Scc210113 long result; 34436394Scc210113 struct e1000_hw *hw = &Adapter->shared; 34446394Scc210113 34456394Scc210113 if (strcmp(pr_name, "_tx_bcopy_threshold") == 0) { 34466394Scc210113 if (pr_val == NULL) { 34476394Scc210113 err = EINVAL; 34486394Scc210113 return (err); 34496394Scc210113 } 34506394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 34516394Scc210113 if (result < MIN_TX_BCOPY_THRESHOLD || 34526394Scc210113 result > MAX_TX_BCOPY_THRESHOLD) 34536394Scc210113 err = EINVAL; 34546394Scc210113 else { 34556394Scc210113 Adapter->tx_bcopy_thresh = (uint32_t)result; 34566394Scc210113 } 34576394Scc210113 return (err); 34586394Scc210113 } 34596394Scc210113 if (strcmp(pr_name, "_tx_interrupt_enable") == 0) { 34606394Scc210113 if (pr_val == NULL) { 34616394Scc210113 err = EINVAL; 34626394Scc210113 return (err); 34636394Scc210113 } 34646394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 34656394Scc210113 if (result < 0 || result > 1) 34666394Scc210113 err = EINVAL; 34676394Scc210113 else { 34686394Scc210113 Adapter->tx_intr_enable = (result == 1) ? 34696394Scc210113 B_TRUE: B_FALSE; 34706394Scc210113 if (Adapter->tx_intr_enable) 34716394Scc210113 e1000g_mask_tx_interrupt(Adapter); 34726394Scc210113 else 34736394Scc210113 e1000g_clear_tx_interrupt(Adapter); 34746394Scc210113 if (e1000g_check_acc_handle( 347510805SChangqing.Li@Sun.COM Adapter->osdep.reg_handle) != DDI_FM_OK) { 34766394Scc210113 ddi_fm_service_impact(Adapter->dip, 34776394Scc210113 DDI_SERVICE_DEGRADED); 347810805SChangqing.Li@Sun.COM err = EIO; 347910805SChangqing.Li@Sun.COM } 34806394Scc210113 } 34816394Scc210113 return (err); 34826394Scc210113 } 34836394Scc210113 if (strcmp(pr_name, "_tx_intr_delay") == 0) { 34846394Scc210113 if (pr_val == NULL) { 34856394Scc210113 err = EINVAL; 34866394Scc210113 return (err); 34876394Scc210113 } 34886394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 34896394Scc210113 if (result < MIN_TX_INTR_DELAY || 34906394Scc210113 result > MAX_TX_INTR_DELAY) 34916394Scc210113 err = EINVAL; 34926394Scc210113 else { 34936394Scc210113 Adapter->tx_intr_delay = (uint32_t)result; 34946394Scc210113 E1000_WRITE_REG(hw, E1000_TIDV, Adapter->tx_intr_delay); 34956394Scc210113 if (e1000g_check_acc_handle( 349610805SChangqing.Li@Sun.COM Adapter->osdep.reg_handle) != DDI_FM_OK) { 34976394Scc210113 ddi_fm_service_impact(Adapter->dip, 34986394Scc210113 DDI_SERVICE_DEGRADED); 349910805SChangqing.Li@Sun.COM err = EIO; 350010805SChangqing.Li@Sun.COM } 35016394Scc210113 } 35026394Scc210113 return (err); 35036394Scc210113 } 35046394Scc210113 if (strcmp(pr_name, "_tx_intr_abs_delay") == 0) { 35056394Scc210113 if (pr_val == NULL) { 35066394Scc210113 err = EINVAL; 35076394Scc210113 return (err); 35086394Scc210113 } 35096394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 35106394Scc210113 if (result < MIN_TX_INTR_ABS_DELAY || 35116394Scc210113 result > MAX_TX_INTR_ABS_DELAY) 35126394Scc210113 err = EINVAL; 35136394Scc210113 else { 35146394Scc210113 Adapter->tx_intr_abs_delay = (uint32_t)result; 35156394Scc210113 E1000_WRITE_REG(hw, E1000_TADV, 35166394Scc210113 Adapter->tx_intr_abs_delay); 35176394Scc210113 if (e1000g_check_acc_handle( 351810805SChangqing.Li@Sun.COM Adapter->osdep.reg_handle) != DDI_FM_OK) { 35196394Scc210113 ddi_fm_service_impact(Adapter->dip, 35206394Scc210113 DDI_SERVICE_DEGRADED); 352110805SChangqing.Li@Sun.COM err = EIO; 352210805SChangqing.Li@Sun.COM } 35236394Scc210113 } 35246394Scc210113 return (err); 35256394Scc210113 } 35266394Scc210113 if (strcmp(pr_name, "_rx_bcopy_threshold") == 0) { 35276394Scc210113 if (pr_val == NULL) { 35286394Scc210113 err = EINVAL; 35296394Scc210113 return (err); 35306394Scc210113 } 35316394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 35326394Scc210113 if (result < MIN_RX_BCOPY_THRESHOLD || 35336394Scc210113 result > MAX_RX_BCOPY_THRESHOLD) 35346394Scc210113 err = EINVAL; 35356394Scc210113 else 35366394Scc210113 Adapter->rx_bcopy_thresh = (uint32_t)result; 35376394Scc210113 return (err); 35386394Scc210113 } 35396394Scc210113 if (strcmp(pr_name, "_max_num_rcv_packets") == 0) { 35406394Scc210113 if (pr_val == NULL) { 35416394Scc210113 err = EINVAL; 35426394Scc210113 return (err); 35436394Scc210113 } 35446394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 35456394Scc210113 if (result < MIN_RX_LIMIT_ON_INTR || 35466394Scc210113 result > MAX_RX_LIMIT_ON_INTR) 35476394Scc210113 err = EINVAL; 35486394Scc210113 else 35496394Scc210113 Adapter->rx_limit_onintr = (uint32_t)result; 35506394Scc210113 return (err); 35516394Scc210113 } 35526394Scc210113 if (strcmp(pr_name, "_rx_intr_delay") == 0) { 35536394Scc210113 if (pr_val == NULL) { 35546394Scc210113 err = EINVAL; 35556394Scc210113 return (err); 35566394Scc210113 } 35576394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 35586394Scc210113 if (result < MIN_RX_INTR_DELAY || 35596394Scc210113 result > MAX_RX_INTR_DELAY) 35606394Scc210113 err = EINVAL; 35616394Scc210113 else { 35626394Scc210113 Adapter->rx_intr_delay = (uint32_t)result; 35636394Scc210113 E1000_WRITE_REG(hw, E1000_RDTR, Adapter->rx_intr_delay); 35646394Scc210113 if (e1000g_check_acc_handle( 356510805SChangqing.Li@Sun.COM Adapter->osdep.reg_handle) != DDI_FM_OK) { 35666394Scc210113 ddi_fm_service_impact(Adapter->dip, 35676394Scc210113 DDI_SERVICE_DEGRADED); 356810805SChangqing.Li@Sun.COM err = EIO; 356910805SChangqing.Li@Sun.COM } 35706394Scc210113 } 35716394Scc210113 return (err); 35726394Scc210113 } 35736394Scc210113 if (strcmp(pr_name, "_rx_intr_abs_delay") == 0) { 35746394Scc210113 if (pr_val == NULL) { 35756394Scc210113 err = EINVAL; 35766394Scc210113 return (err); 35776394Scc210113 } 35786394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 35796394Scc210113 if (result < MIN_RX_INTR_ABS_DELAY || 35806394Scc210113 result > MAX_RX_INTR_ABS_DELAY) 35816394Scc210113 err = EINVAL; 35826394Scc210113 else { 35836394Scc210113 Adapter->rx_intr_abs_delay = (uint32_t)result; 35846394Scc210113 E1000_WRITE_REG(hw, E1000_RADV, 35856394Scc210113 Adapter->rx_intr_abs_delay); 35866394Scc210113 if (e1000g_check_acc_handle( 358710805SChangqing.Li@Sun.COM Adapter->osdep.reg_handle) != DDI_FM_OK) { 35886394Scc210113 ddi_fm_service_impact(Adapter->dip, 35896394Scc210113 DDI_SERVICE_DEGRADED); 359010805SChangqing.Li@Sun.COM err = EIO; 359110805SChangqing.Li@Sun.COM } 35926394Scc210113 } 35936394Scc210113 return (err); 35946394Scc210113 } 35956394Scc210113 if (strcmp(pr_name, "_intr_throttling_rate") == 0) { 35966394Scc210113 if (pr_val == NULL) { 35976394Scc210113 err = EINVAL; 35986394Scc210113 return (err); 35996394Scc210113 } 36006394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 36016394Scc210113 if (result < MIN_INTR_THROTTLING || 36026394Scc210113 result > MAX_INTR_THROTTLING) 36036394Scc210113 err = EINVAL; 36046394Scc210113 else { 36056394Scc210113 if (hw->mac.type >= e1000_82540) { 36066394Scc210113 Adapter->intr_throttling_rate = 36076394Scc210113 (uint32_t)result; 36086394Scc210113 E1000_WRITE_REG(hw, E1000_ITR, 36096394Scc210113 Adapter->intr_throttling_rate); 36106394Scc210113 if (e1000g_check_acc_handle( 361110805SChangqing.Li@Sun.COM Adapter->osdep.reg_handle) != DDI_FM_OK) { 36126394Scc210113 ddi_fm_service_impact(Adapter->dip, 36136394Scc210113 DDI_SERVICE_DEGRADED); 361410805SChangqing.Li@Sun.COM err = EIO; 361510805SChangqing.Li@Sun.COM } 36166394Scc210113 } else 36176394Scc210113 err = EINVAL; 36186394Scc210113 } 36196394Scc210113 return (err); 36206394Scc210113 } 36216394Scc210113 if (strcmp(pr_name, "_intr_adaptive") == 0) { 36226394Scc210113 if (pr_val == NULL) { 36236394Scc210113 err = EINVAL; 36246394Scc210113 return (err); 36256394Scc210113 } 36266394Scc210113 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result); 36276394Scc210113 if (result < 0 || result > 1) 36286394Scc210113 err = EINVAL; 36296394Scc210113 else { 36306394Scc210113 if (hw->mac.type >= e1000_82540) { 36316394Scc210113 Adapter->intr_adaptive = (result == 1) ? 36326394Scc210113 B_TRUE : B_FALSE; 36336394Scc210113 } else { 36346394Scc210113 err = EINVAL; 36356394Scc210113 } 36366394Scc210113 } 36376394Scc210113 return (err); 36386394Scc210113 } 36396394Scc210113 return (ENOTSUP); 36406394Scc210113 } 36416394Scc210113 36426394Scc210113 static int 36436394Scc210113 e1000g_get_priv_prop(struct e1000g *Adapter, const char *pr_name, 36448118SVasumathi.Sundaram@Sun.COM uint_t pr_flags, uint_t pr_valsize, void *pr_val, uint_t *perm) 36456394Scc210113 { 36466394Scc210113 int err = ENOTSUP; 36476789Sam223141 boolean_t is_default = (pr_flags & MAC_PROP_DEFAULT); 36486512Ssowmini int value; 36496512Ssowmini 36506512Ssowmini if (strcmp(pr_name, "_adv_pause_cap") == 0) { 36518118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 36526512Ssowmini if (is_default) 36536512Ssowmini goto done; 36546512Ssowmini value = Adapter->param_adv_pause; 36556512Ssowmini err = 0; 36566512Ssowmini goto done; 36576512Ssowmini } 36586512Ssowmini if (strcmp(pr_name, "_adv_asym_pause_cap") == 0) { 36598118SVasumathi.Sundaram@Sun.COM *perm = MAC_PROP_PERM_READ; 36606512Ssowmini if (is_default) 36616512Ssowmini goto done; 36626512Ssowmini value = Adapter->param_adv_asym_pause; 36636512Ssowmini err = 0; 36646512Ssowmini goto done; 36656512Ssowmini } 36666394Scc210113 if (strcmp(pr_name, "_tx_bcopy_threshold") == 0) { 36676512Ssowmini value = (is_default ? DEFAULT_TX_BCOPY_THRESHOLD : 36686512Ssowmini Adapter->tx_bcopy_thresh); 36696394Scc210113 err = 0; 36706394Scc210113 goto done; 36716394Scc210113 } 36726394Scc210113 if (strcmp(pr_name, "_tx_interrupt_enable") == 0) { 36736512Ssowmini value = (is_default ? DEFAULT_TX_INTR_ENABLE : 36746512Ssowmini Adapter->tx_intr_enable); 36756394Scc210113 err = 0; 36766394Scc210113 goto done; 36776394Scc210113 } 36786394Scc210113 if (strcmp(pr_name, "_tx_intr_delay") == 0) { 36796512Ssowmini value = (is_default ? DEFAULT_TX_INTR_DELAY : 36806512Ssowmini Adapter->tx_intr_delay); 36816394Scc210113 err = 0; 36826394Scc210113 goto done; 36836394Scc210113 } 36846394Scc210113 if (strcmp(pr_name, "_tx_intr_abs_delay") == 0) { 36856512Ssowmini value = (is_default ? DEFAULT_TX_INTR_ABS_DELAY : 36866512Ssowmini Adapter->tx_intr_abs_delay); 36876394Scc210113 err = 0; 36886394Scc210113 goto done; 36896394Scc210113 } 36906394Scc210113 if (strcmp(pr_name, "_rx_bcopy_threshold") == 0) { 36916512Ssowmini value = (is_default ? DEFAULT_RX_BCOPY_THRESHOLD : 36926512Ssowmini Adapter->rx_bcopy_thresh); 36936394Scc210113 err = 0; 36946394Scc210113 goto done; 36956394Scc210113 } 36966394Scc210113 if (strcmp(pr_name, "_max_num_rcv_packets") == 0) { 36976512Ssowmini value = (is_default ? DEFAULT_RX_LIMIT_ON_INTR : 36986512Ssowmini Adapter->rx_limit_onintr); 36996394Scc210113 err = 0; 37006394Scc210113 goto done; 37016394Scc210113 } 37026394Scc210113 if (strcmp(pr_name, "_rx_intr_delay") == 0) { 37036512Ssowmini value = (is_default ? DEFAULT_RX_INTR_DELAY : 37046512Ssowmini Adapter->rx_intr_delay); 37056394Scc210113 err = 0; 37066394Scc210113 goto done; 37076394Scc210113 } 37086394Scc210113 if (strcmp(pr_name, "_rx_intr_abs_delay") == 0) { 37096512Ssowmini value = (is_default ? DEFAULT_RX_INTR_ABS_DELAY : 37106512Ssowmini Adapter->rx_intr_abs_delay); 37116394Scc210113 err = 0; 37126394Scc210113 goto done; 37136394Scc210113 } 37146394Scc210113 if (strcmp(pr_name, "_intr_throttling_rate") == 0) { 37156512Ssowmini value = (is_default ? DEFAULT_INTR_THROTTLING : 37166512Ssowmini Adapter->intr_throttling_rate); 37176394Scc210113 err = 0; 37186394Scc210113 goto done; 37196394Scc210113 } 37206394Scc210113 if (strcmp(pr_name, "_intr_adaptive") == 0) { 37216512Ssowmini value = (is_default ? 1 : Adapter->intr_adaptive); 37226394Scc210113 err = 0; 37236394Scc210113 goto done; 37246394Scc210113 } 37256394Scc210113 done: 37266394Scc210113 if (err == 0) { 37276512Ssowmini (void) snprintf(pr_val, pr_valsize, "%d", value); 37286394Scc210113 } 37296394Scc210113 return (err); 37306394Scc210113 } 37316394Scc210113 37323526Sxy150489 /* 37334919Sxy150489 * e1000g_get_conf - get configurations set in e1000g.conf 37344919Sxy150489 * This routine gets user-configured values out of the configuration 37354919Sxy150489 * file e1000g.conf. 37364919Sxy150489 * 37374919Sxy150489 * For each configurable value, there is a minimum, a maximum, and a 37384919Sxy150489 * default. 37394919Sxy150489 * If user does not configure a value, use the default. 37404919Sxy150489 * If user configures below the minimum, use the minumum. 37414919Sxy150489 * If user configures above the maximum, use the maxumum. 37423526Sxy150489 */ 37433526Sxy150489 static void 37444919Sxy150489 e1000g_get_conf(struct e1000g *Adapter) 37453526Sxy150489 { 37464919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 37474919Sxy150489 boolean_t tbi_compatibility = B_FALSE; 374811339SGuoqing.Zhu@Sun.COM boolean_t is_jumbo = B_FALSE; 374911339SGuoqing.Zhu@Sun.COM int propval; 375011339SGuoqing.Zhu@Sun.COM /* 375111339SGuoqing.Zhu@Sun.COM * decrease the number of descriptors and free packets 375211339SGuoqing.Zhu@Sun.COM * for jumbo frames to reduce tx/rx resource consumption 375311339SGuoqing.Zhu@Sun.COM */ 375411339SGuoqing.Zhu@Sun.COM if (Adapter->max_frame_size >= 375511339SGuoqing.Zhu@Sun.COM (FRAME_SIZE_UPTO_4K - 375611339SGuoqing.Zhu@Sun.COM E1000G_IPALIGNPRESERVEROOM)) { 375711339SGuoqing.Zhu@Sun.COM is_jumbo = B_TRUE; 375811339SGuoqing.Zhu@Sun.COM } 37594919Sxy150489 37603526Sxy150489 /* 37613526Sxy150489 * get each configurable property from e1000g.conf 37623526Sxy150489 */ 37633526Sxy150489 37643526Sxy150489 /* 37653526Sxy150489 * NumTxDescriptors 37663526Sxy150489 */ 376711339SGuoqing.Zhu@Sun.COM Adapter->tx_desc_num_flag = 37684919Sxy150489 e1000g_get_prop(Adapter, "NumTxDescriptors", 37694919Sxy150489 MIN_NUM_TX_DESCRIPTOR, MAX_NUM_TX_DESCRIPTOR, 377011339SGuoqing.Zhu@Sun.COM is_jumbo ? DEFAULT_JUMBO_NUM_TX_DESC 377111339SGuoqing.Zhu@Sun.COM : DEFAULT_NUM_TX_DESCRIPTOR, &propval); 377211339SGuoqing.Zhu@Sun.COM Adapter->tx_desc_num = propval; 37733526Sxy150489 37743526Sxy150489 /* 37753526Sxy150489 * NumRxDescriptors 37763526Sxy150489 */ 377711339SGuoqing.Zhu@Sun.COM Adapter->rx_desc_num_flag = 37784919Sxy150489 e1000g_get_prop(Adapter, "NumRxDescriptors", 37794919Sxy150489 MIN_NUM_RX_DESCRIPTOR, MAX_NUM_RX_DESCRIPTOR, 378011339SGuoqing.Zhu@Sun.COM is_jumbo ? DEFAULT_JUMBO_NUM_RX_DESC 378111339SGuoqing.Zhu@Sun.COM : DEFAULT_NUM_RX_DESCRIPTOR, &propval); 378211339SGuoqing.Zhu@Sun.COM Adapter->rx_desc_num = propval; 37833526Sxy150489 37843526Sxy150489 /* 37853526Sxy150489 * NumRxFreeList 37863526Sxy150489 */ 378711339SGuoqing.Zhu@Sun.COM Adapter->rx_buf_num_flag = 37884919Sxy150489 e1000g_get_prop(Adapter, "NumRxFreeList", 37894919Sxy150489 MIN_NUM_RX_FREELIST, MAX_NUM_RX_FREELIST, 379011339SGuoqing.Zhu@Sun.COM is_jumbo ? DEFAULT_JUMBO_NUM_RX_BUF 379111339SGuoqing.Zhu@Sun.COM : DEFAULT_NUM_RX_FREELIST, &propval); 379211339SGuoqing.Zhu@Sun.COM Adapter->rx_freelist_num = propval; 37933526Sxy150489 37943526Sxy150489 /* 37953526Sxy150489 * NumTxPacketList 37963526Sxy150489 */ 379711339SGuoqing.Zhu@Sun.COM Adapter->tx_buf_num_flag = 37984919Sxy150489 e1000g_get_prop(Adapter, "NumTxPacketList", 37994919Sxy150489 MIN_NUM_TX_FREELIST, MAX_NUM_TX_FREELIST, 380011339SGuoqing.Zhu@Sun.COM is_jumbo ? DEFAULT_JUMBO_NUM_TX_BUF 380111339SGuoqing.Zhu@Sun.COM : DEFAULT_NUM_TX_FREELIST, &propval); 380211339SGuoqing.Zhu@Sun.COM Adapter->tx_freelist_num = propval; 38033526Sxy150489 38043526Sxy150489 /* 38053526Sxy150489 * FlowControl 38063526Sxy150489 */ 38076735Scc210113 hw->fc.send_xon = B_TRUE; 380811339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "FlowControl", 380911339SGuoqing.Zhu@Sun.COM e1000_fc_none, 4, DEFAULT_FLOW_CONTROL, &propval); 381011339SGuoqing.Zhu@Sun.COM hw->fc.requested_mode = propval; 38113526Sxy150489 /* 4 is the setting that says "let the eeprom decide" */ 38128539SChenlu.Chen@Sun.COM if (hw->fc.requested_mode == 4) 38138539SChenlu.Chen@Sun.COM hw->fc.requested_mode = e1000_fc_default; 38143526Sxy150489 38153526Sxy150489 /* 38164919Sxy150489 * Max Num Receive Packets on Interrupt 38173526Sxy150489 */ 381811339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "MaxNumReceivePackets", 38194919Sxy150489 MIN_RX_LIMIT_ON_INTR, MAX_RX_LIMIT_ON_INTR, 382011339SGuoqing.Zhu@Sun.COM DEFAULT_RX_LIMIT_ON_INTR, &propval); 382111339SGuoqing.Zhu@Sun.COM Adapter->rx_limit_onintr = propval; 38223526Sxy150489 38233526Sxy150489 /* 38243526Sxy150489 * PHY master slave setting 38253526Sxy150489 */ 382611339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "SetMasterSlave", 38273526Sxy150489 e1000_ms_hw_default, e1000_ms_auto, 382811339SGuoqing.Zhu@Sun.COM e1000_ms_hw_default, &propval); 382911339SGuoqing.Zhu@Sun.COM hw->phy.ms_type = propval; 38303526Sxy150489 38313526Sxy150489 /* 38323526Sxy150489 * Parameter which controls TBI mode workaround, which is only 38333526Sxy150489 * needed on certain switches such as Cisco 6500/Foundry 38343526Sxy150489 */ 383511339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "TbiCompatibilityEnable", 383611339SGuoqing.Zhu@Sun.COM 0, 1, DEFAULT_TBI_COMPAT_ENABLE, &propval); 383711339SGuoqing.Zhu@Sun.COM tbi_compatibility = (propval == 1); 38384919Sxy150489 e1000_set_tbi_compatibility_82543(hw, tbi_compatibility); 38393526Sxy150489 38403526Sxy150489 /* 38413526Sxy150489 * MSI Enable 38423526Sxy150489 */ 384311339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "MSIEnable", 384411339SGuoqing.Zhu@Sun.COM 0, 1, DEFAULT_MSI_ENABLE, &propval); 384511339SGuoqing.Zhu@Sun.COM Adapter->msi_enable = (propval == 1); 38463526Sxy150489 38473526Sxy150489 /* 38483526Sxy150489 * Interrupt Throttling Rate 38493526Sxy150489 */ 385011339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "intr_throttling_rate", 38514919Sxy150489 MIN_INTR_THROTTLING, MAX_INTR_THROTTLING, 385211339SGuoqing.Zhu@Sun.COM DEFAULT_INTR_THROTTLING, &propval); 385311339SGuoqing.Zhu@Sun.COM Adapter->intr_throttling_rate = propval; 38543526Sxy150489 38553526Sxy150489 /* 38563526Sxy150489 * Adaptive Interrupt Blanking Enable/Disable 38573526Sxy150489 * It is enabled by default 38583526Sxy150489 */ 385911339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "intr_adaptive", 0, 1, 1, 386011339SGuoqing.Zhu@Sun.COM &propval); 386111339SGuoqing.Zhu@Sun.COM Adapter->intr_adaptive = (propval == 1); 38625882Syy150190 38635882Syy150190 /* 38646011Ssv141092 * Hardware checksum enable/disable parameter 38656011Ssv141092 */ 386611339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "tx_hcksum_enable", 386711339SGuoqing.Zhu@Sun.COM 0, 1, DEFAULT_TX_HCKSUM_ENABLE, &propval); 386811339SGuoqing.Zhu@Sun.COM Adapter->tx_hcksum_enable = (propval == 1); 38696986Smx205022 /* 38706986Smx205022 * Checksum on/off selection via global parameters. 38716986Smx205022 * 38726986Smx205022 * If the chip is flagged as not capable of (correctly) 38736986Smx205022 * handling checksumming, we don't enable it on either 38746986Smx205022 * Rx or Tx side. Otherwise, we take this chip's settings 38756986Smx205022 * from the patchable global defaults. 38766986Smx205022 * 38776986Smx205022 * We advertise our capabilities only if TX offload is 38786986Smx205022 * enabled. On receive, the stack will accept checksummed 38796986Smx205022 * packets anyway, even if we haven't said we can deliver 38806986Smx205022 * them. 38816986Smx205022 */ 38826986Smx205022 switch (hw->mac.type) { 38836986Smx205022 case e1000_82540: 38846986Smx205022 case e1000_82544: 38856986Smx205022 case e1000_82545: 38866986Smx205022 case e1000_82545_rev_3: 38876986Smx205022 case e1000_82546: 38886986Smx205022 case e1000_82546_rev_3: 38896986Smx205022 case e1000_82571: 38906986Smx205022 case e1000_82572: 38916986Smx205022 case e1000_82573: 38926986Smx205022 case e1000_80003es2lan: 38936986Smx205022 break; 38946986Smx205022 /* 38956986Smx205022 * For the following Intel PRO/1000 chipsets, we have not 38966986Smx205022 * tested the hardware checksum offload capability, so we 38976986Smx205022 * disable the capability for them. 38986986Smx205022 * e1000_82542, 38996986Smx205022 * e1000_82543, 39006986Smx205022 * e1000_82541, 39016986Smx205022 * e1000_82541_rev_2, 39026986Smx205022 * e1000_82547, 39036986Smx205022 * e1000_82547_rev_2, 39046986Smx205022 */ 39056986Smx205022 default: 39066986Smx205022 Adapter->tx_hcksum_enable = B_FALSE; 39076986Smx205022 } 39086986Smx205022 39096986Smx205022 /* 39106986Smx205022 * Large Send Offloading(LSO) Enable/Disable 39116986Smx205022 * If the tx hardware checksum is not enabled, LSO should be 39126986Smx205022 * disabled. 39136986Smx205022 */ 391411339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "lso_enable", 391511339SGuoqing.Zhu@Sun.COM 0, 1, DEFAULT_LSO_ENABLE, &propval); 391611339SGuoqing.Zhu@Sun.COM Adapter->lso_enable = (propval == 1); 39176986Smx205022 39186986Smx205022 switch (hw->mac.type) { 39196986Smx205022 case e1000_82546: 39206986Smx205022 case e1000_82546_rev_3: 39216986Smx205022 if (Adapter->lso_enable) 39226986Smx205022 Adapter->lso_premature_issue = B_TRUE; 39237426SChenliang.Xu@Sun.COM /* FALLTHRU */ 39246986Smx205022 case e1000_82571: 39256986Smx205022 case e1000_82572: 39266986Smx205022 case e1000_82573: 39278073SMin.Xu@Sun.COM case e1000_80003es2lan: 39286986Smx205022 break; 39296986Smx205022 default: 39306986Smx205022 Adapter->lso_enable = B_FALSE; 39316986Smx205022 } 39326986Smx205022 39336986Smx205022 if (!Adapter->tx_hcksum_enable) { 39346986Smx205022 Adapter->lso_premature_issue = B_FALSE; 39356986Smx205022 Adapter->lso_enable = B_FALSE; 39366986Smx205022 } 39378417SChenlu.Chen@Sun.COM 39388417SChenlu.Chen@Sun.COM /* 39398417SChenlu.Chen@Sun.COM * If mem_workaround_82546 is enabled, the rx buffer allocated by 39408417SChenlu.Chen@Sun.COM * e1000_82545, e1000_82546 and e1000_82546_rev_3 39418417SChenlu.Chen@Sun.COM * will not cross 64k boundary. 39428417SChenlu.Chen@Sun.COM */ 394311339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "mem_workaround_82546", 394411339SGuoqing.Zhu@Sun.COM 0, 1, DEFAULT_MEM_WORKAROUND_82546, &propval); 394511339SGuoqing.Zhu@Sun.COM Adapter->mem_workaround_82546 = (propval == 1); 39469770SChangqing.Li@Sun.COM 39479770SChangqing.Li@Sun.COM /* 39489770SChangqing.Li@Sun.COM * Max number of multicast addresses 39499770SChangqing.Li@Sun.COM */ 395011339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "mcast_max_num", 395111339SGuoqing.Zhu@Sun.COM MIN_MCAST_NUM, MAX_MCAST_NUM, hw->mac.mta_reg_count * 32, 395211339SGuoqing.Zhu@Sun.COM &propval); 395311339SGuoqing.Zhu@Sun.COM Adapter->mcast_max_num = propval; 39543526Sxy150489 } 39553526Sxy150489 39563526Sxy150489 /* 39574919Sxy150489 * e1000g_get_prop - routine to read properties 39584919Sxy150489 * 39594919Sxy150489 * Get a user-configure property value out of the configuration 39604919Sxy150489 * file e1000g.conf. 39614919Sxy150489 * 39624919Sxy150489 * Caller provides name of the property, a default value, a minimum 396311339SGuoqing.Zhu@Sun.COM * value, a maximum value and a pointer to the returned property 396411339SGuoqing.Zhu@Sun.COM * value. 39654919Sxy150489 * 396611339SGuoqing.Zhu@Sun.COM * Return B_TRUE if the configured value of the property is not a default 396711339SGuoqing.Zhu@Sun.COM * value, otherwise return B_FALSE. 39683526Sxy150489 */ 396911339SGuoqing.Zhu@Sun.COM static boolean_t 39704919Sxy150489 e1000g_get_prop(struct e1000g *Adapter, /* point to per-adapter structure */ 39713526Sxy150489 char *propname, /* name of the property */ 39723526Sxy150489 int minval, /* minimum acceptable value */ 39733526Sxy150489 int maxval, /* maximim acceptable value */ 397411339SGuoqing.Zhu@Sun.COM int defval, /* default value */ 397511339SGuoqing.Zhu@Sun.COM int *propvalue) /* property value return to caller */ 39763526Sxy150489 { 39773526Sxy150489 int propval; /* value returned for requested property */ 39783526Sxy150489 int *props; /* point to array of properties returned */ 39793526Sxy150489 uint_t nprops; /* number of property value returned */ 398011339SGuoqing.Zhu@Sun.COM boolean_t ret = B_TRUE; 39813526Sxy150489 39823526Sxy150489 /* 39833526Sxy150489 * get the array of properties from the config file 39843526Sxy150489 */ 39853526Sxy150489 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, Adapter->dip, 39863526Sxy150489 DDI_PROP_DONTPASS, propname, &props, &nprops) == DDI_PROP_SUCCESS) { 39873526Sxy150489 /* got some properties, test if we got enough */ 39884919Sxy150489 if (Adapter->instance < nprops) { 39894919Sxy150489 propval = props[Adapter->instance]; 39903526Sxy150489 } else { 39913526Sxy150489 /* not enough properties configured */ 39923526Sxy150489 propval = defval; 39934919Sxy150489 E1000G_DEBUGLOG_2(Adapter, E1000G_INFO_LEVEL, 39943526Sxy150489 "Not Enough %s values found in e1000g.conf" 39953526Sxy150489 " - set to %d\n", 39963526Sxy150489 propname, propval); 399711339SGuoqing.Zhu@Sun.COM ret = B_FALSE; 39983526Sxy150489 } 39993526Sxy150489 40003526Sxy150489 /* free memory allocated for properties */ 40013526Sxy150489 ddi_prop_free(props); 40023526Sxy150489 40033526Sxy150489 } else { 40043526Sxy150489 propval = defval; 400511339SGuoqing.Zhu@Sun.COM ret = B_FALSE; 40063526Sxy150489 } 40073526Sxy150489 40083526Sxy150489 /* 40093526Sxy150489 * enforce limits 40103526Sxy150489 */ 40113526Sxy150489 if (propval > maxval) { 40123526Sxy150489 propval = maxval; 40134919Sxy150489 E1000G_DEBUGLOG_2(Adapter, E1000G_INFO_LEVEL, 40143526Sxy150489 "Too High %s value in e1000g.conf - set to %d\n", 40153526Sxy150489 propname, propval); 40163526Sxy150489 } 40173526Sxy150489 40183526Sxy150489 if (propval < minval) { 40193526Sxy150489 propval = minval; 40204919Sxy150489 E1000G_DEBUGLOG_2(Adapter, E1000G_INFO_LEVEL, 40213526Sxy150489 "Too Low %s value in e1000g.conf - set to %d\n", 40223526Sxy150489 propname, propval); 40233526Sxy150489 } 40243526Sxy150489 402511339SGuoqing.Zhu@Sun.COM *propvalue = propval; 402611339SGuoqing.Zhu@Sun.COM return (ret); 40273526Sxy150489 } 40283526Sxy150489 40293526Sxy150489 static boolean_t 40304061Sxy150489 e1000g_link_check(struct e1000g *Adapter) 40313526Sxy150489 { 40324061Sxy150489 uint16_t speed, duplex, phydata; 40334061Sxy150489 boolean_t link_changed = B_FALSE; 40343526Sxy150489 struct e1000_hw *hw; 40353526Sxy150489 uint32_t reg_tarc; 40363526Sxy150489 40374919Sxy150489 hw = &Adapter->shared; 40383526Sxy150489 40393526Sxy150489 if (e1000g_link_up(Adapter)) { 40403526Sxy150489 /* 40413526Sxy150489 * The Link is up, check whether it was marked as down earlier 40423526Sxy150489 */ 40434061Sxy150489 if (Adapter->link_state != LINK_STATE_UP) { 40447426SChenliang.Xu@Sun.COM (void) e1000_get_speed_and_duplex(hw, &speed, &duplex); 40454061Sxy150489 Adapter->link_speed = speed; 40464061Sxy150489 Adapter->link_duplex = duplex; 40474061Sxy150489 Adapter->link_state = LINK_STATE_UP; 40484061Sxy150489 link_changed = B_TRUE; 40494061Sxy150489 40508850SMin.Xu@Sun.COM if (Adapter->link_speed == SPEED_1000) 40518850SMin.Xu@Sun.COM Adapter->stall_threshold = TX_STALL_TIME_2S; 40528850SMin.Xu@Sun.COM else 40538850SMin.Xu@Sun.COM Adapter->stall_threshold = TX_STALL_TIME_8S; 40548850SMin.Xu@Sun.COM 40554061Sxy150489 Adapter->tx_link_down_timeout = 0; 40564061Sxy150489 40574919Sxy150489 if ((hw->mac.type == e1000_82571) || 40584919Sxy150489 (hw->mac.type == e1000_82572)) { 40596735Scc210113 reg_tarc = E1000_READ_REG(hw, E1000_TARC(0)); 40604061Sxy150489 if (speed == SPEED_1000) 40614061Sxy150489 reg_tarc |= (1 << 21); 40624061Sxy150489 else 40634061Sxy150489 reg_tarc &= ~(1 << 21); 40646735Scc210113 E1000_WRITE_REG(hw, E1000_TARC(0), reg_tarc); 40653526Sxy150489 } 40663526Sxy150489 } 40673526Sxy150489 Adapter->smartspeed = 0; 40683526Sxy150489 } else { 40694061Sxy150489 if (Adapter->link_state != LINK_STATE_DOWN) { 40703526Sxy150489 Adapter->link_speed = 0; 40713526Sxy150489 Adapter->link_duplex = 0; 40724061Sxy150489 Adapter->link_state = LINK_STATE_DOWN; 40734061Sxy150489 link_changed = B_TRUE; 40744061Sxy150489 40753526Sxy150489 /* 40763526Sxy150489 * SmartSpeed workaround for Tabor/TanaX, When the 40773526Sxy150489 * driver loses link disable auto master/slave 40783526Sxy150489 * resolution. 40793526Sxy150489 */ 40804919Sxy150489 if (hw->phy.type == e1000_phy_igp) { 40817426SChenliang.Xu@Sun.COM (void) e1000_read_phy_reg(hw, 40823526Sxy150489 PHY_1000T_CTRL, &phydata); 40833526Sxy150489 phydata |= CR_1000T_MS_ENABLE; 40847426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 40853526Sxy150489 PHY_1000T_CTRL, phydata); 40863526Sxy150489 } 40873526Sxy150489 } else { 40883526Sxy150489 e1000g_smartspeed(Adapter); 40893526Sxy150489 } 40904061Sxy150489 40918479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_STARTED) { 40924061Sxy150489 if (Adapter->tx_link_down_timeout < 40934061Sxy150489 MAX_TX_LINK_DOWN_TIMEOUT) { 40944061Sxy150489 Adapter->tx_link_down_timeout++; 40954061Sxy150489 } else if (Adapter->tx_link_down_timeout == 40964061Sxy150489 MAX_TX_LINK_DOWN_TIMEOUT) { 40974919Sxy150489 e1000g_tx_clean(Adapter); 40984061Sxy150489 Adapter->tx_link_down_timeout++; 40994061Sxy150489 } 41004061Sxy150489 } 41013526Sxy150489 } 41023526Sxy150489 41035273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 41045273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 41055273Sgl147354 41064061Sxy150489 return (link_changed); 41074061Sxy150489 } 41084061Sxy150489 41096394Scc210113 /* 41106394Scc210113 * e1000g_reset_link - Using the link properties to setup the link 41116394Scc210113 */ 41126394Scc210113 int 41136394Scc210113 e1000g_reset_link(struct e1000g *Adapter) 41146394Scc210113 { 41156394Scc210113 struct e1000_mac_info *mac; 41166394Scc210113 struct e1000_phy_info *phy; 411710605SMin.Xu@Sun.COM struct e1000_hw *hw; 41186394Scc210113 boolean_t invalid; 41196394Scc210113 41206394Scc210113 mac = &Adapter->shared.mac; 41216394Scc210113 phy = &Adapter->shared.phy; 412210605SMin.Xu@Sun.COM hw = &Adapter->shared; 41236394Scc210113 invalid = B_FALSE; 41246394Scc210113 412510605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 412610605SMin.Xu@Sun.COM goto out; 412710605SMin.Xu@Sun.COM 41286394Scc210113 if (Adapter->param_adv_autoneg == 1) { 41296394Scc210113 mac->autoneg = B_TRUE; 41306394Scc210113 phy->autoneg_advertised = 0; 41316394Scc210113 41326394Scc210113 /* 41336394Scc210113 * 1000hdx is not supported for autonegotiation 41346394Scc210113 */ 41356394Scc210113 if (Adapter->param_adv_1000fdx == 1) 41366394Scc210113 phy->autoneg_advertised |= ADVERTISE_1000_FULL; 41376394Scc210113 41386394Scc210113 if (Adapter->param_adv_100fdx == 1) 41396394Scc210113 phy->autoneg_advertised |= ADVERTISE_100_FULL; 41406394Scc210113 41416394Scc210113 if (Adapter->param_adv_100hdx == 1) 41426394Scc210113 phy->autoneg_advertised |= ADVERTISE_100_HALF; 41436394Scc210113 41446394Scc210113 if (Adapter->param_adv_10fdx == 1) 41456394Scc210113 phy->autoneg_advertised |= ADVERTISE_10_FULL; 41466394Scc210113 41476394Scc210113 if (Adapter->param_adv_10hdx == 1) 41486394Scc210113 phy->autoneg_advertised |= ADVERTISE_10_HALF; 41496394Scc210113 41506394Scc210113 if (phy->autoneg_advertised == 0) 41516394Scc210113 invalid = B_TRUE; 41526394Scc210113 } else { 41536394Scc210113 mac->autoneg = B_FALSE; 41546394Scc210113 41556394Scc210113 /* 415610605SMin.Xu@Sun.COM * For Intel copper cards, 1000fdx and 1000hdx are not 415710605SMin.Xu@Sun.COM * supported for forced link 41586394Scc210113 */ 41596394Scc210113 if (Adapter->param_adv_100fdx == 1) 41606394Scc210113 mac->forced_speed_duplex = ADVERTISE_100_FULL; 41616394Scc210113 else if (Adapter->param_adv_100hdx == 1) 41626394Scc210113 mac->forced_speed_duplex = ADVERTISE_100_HALF; 41636394Scc210113 else if (Adapter->param_adv_10fdx == 1) 41646394Scc210113 mac->forced_speed_duplex = ADVERTISE_10_FULL; 41656394Scc210113 else if (Adapter->param_adv_10hdx == 1) 41666394Scc210113 mac->forced_speed_duplex = ADVERTISE_10_HALF; 41676394Scc210113 else 41686394Scc210113 invalid = B_TRUE; 41696394Scc210113 41706394Scc210113 } 41716394Scc210113 41726394Scc210113 if (invalid) { 41736394Scc210113 e1000g_log(Adapter, CE_WARN, 417410680SMin.Xu@Sun.COM "Invalid link settings. Setup link to " 41756394Scc210113 "support autonegotiation with all link capabilities."); 41766394Scc210113 mac->autoneg = B_TRUE; 417710680SMin.Xu@Sun.COM phy->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT; 41786394Scc210113 } 41796394Scc210113 418010605SMin.Xu@Sun.COM out: 41816394Scc210113 return (e1000_setup_link(&Adapter->shared)); 41826394Scc210113 } 41836394Scc210113 41844061Sxy150489 static void 41858275SEric Cheng e1000g_timer_tx_resched(struct e1000g *Adapter) 41868275SEric Cheng { 41878275SEric Cheng e1000g_tx_ring_t *tx_ring = Adapter->tx_ring; 41888275SEric Cheng 41898479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_READER); 41908479SChenlu.Chen@Sun.COM 41918275SEric Cheng if (tx_ring->resched_needed && 41928275SEric Cheng ((ddi_get_lbolt() - tx_ring->resched_timestamp) > 41938275SEric Cheng drv_usectohz(1000000)) && 41948479SChenlu.Chen@Sun.COM (Adapter->e1000g_state & E1000G_STARTED) && 41958275SEric Cheng (tx_ring->tbd_avail >= DEFAULT_TX_NO_RESOURCE)) { 41968275SEric Cheng tx_ring->resched_needed = B_FALSE; 41978275SEric Cheng mac_tx_update(Adapter->mh); 41988275SEric Cheng E1000G_STAT(tx_ring->stat_reschedule); 41998275SEric Cheng E1000G_STAT(tx_ring->stat_timer_reschedule); 42008275SEric Cheng } 42018479SChenlu.Chen@Sun.COM 42028479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 42038275SEric Cheng } 42048275SEric Cheng 42058275SEric Cheng static void 42064919Sxy150489 e1000g_local_timer(void *ws) 42074061Sxy150489 { 42084061Sxy150489 struct e1000g *Adapter = (struct e1000g *)ws; 42094061Sxy150489 struct e1000_hw *hw; 42104061Sxy150489 e1000g_ether_addr_t ether_addr; 42114061Sxy150489 boolean_t link_changed; 42124061Sxy150489 42134919Sxy150489 hw = &Adapter->shared; 42144919Sxy150489 42158479SChenlu.Chen@Sun.COM if (Adapter->e1000g_state & E1000G_ERROR) { 42168479SChenlu.Chen@Sun.COM rw_enter(&Adapter->chip_lock, RW_WRITER); 42178479SChenlu.Chen@Sun.COM Adapter->e1000g_state &= ~E1000G_ERROR; 42188479SChenlu.Chen@Sun.COM rw_exit(&Adapter->chip_lock); 42198479SChenlu.Chen@Sun.COM 42205273Sgl147354 Adapter->reset_count++; 42218275SEric Cheng if (e1000g_global_reset(Adapter)) { 42225273Sgl147354 ddi_fm_service_impact(Adapter->dip, 42235273Sgl147354 DDI_SERVICE_RESTORED); 42248275SEric Cheng e1000g_timer_tx_resched(Adapter); 42258275SEric Cheng } else 42265273Sgl147354 ddi_fm_service_impact(Adapter->dip, 42275273Sgl147354 DDI_SERVICE_LOST); 42285273Sgl147354 return; 42295273Sgl147354 } 42305273Sgl147354 42314061Sxy150489 if (e1000g_stall_check(Adapter)) { 42324919Sxy150489 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 42334061Sxy150489 "Tx stall detected. Activate automatic recovery.\n"); 42345273Sgl147354 e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_STALL); 42358479SChenlu.Chen@Sun.COM ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST); 42364061Sxy150489 Adapter->reset_count++; 42378275SEric Cheng if (e1000g_reset_adapter(Adapter)) { 42385273Sgl147354 ddi_fm_service_impact(Adapter->dip, 42395273Sgl147354 DDI_SERVICE_RESTORED); 42408275SEric Cheng e1000g_timer_tx_resched(Adapter); 42418479SChenlu.Chen@Sun.COM } 42425273Sgl147354 return; 42434061Sxy150489 } 42444061Sxy150489 42454061Sxy150489 link_changed = B_FALSE; 42465082Syy150190 rw_enter(&Adapter->chip_lock, RW_READER); 42474061Sxy150489 if (Adapter->link_complete) 42484061Sxy150489 link_changed = e1000g_link_check(Adapter); 42495082Syy150190 rw_exit(&Adapter->chip_lock); 42504061Sxy150489 42518850SMin.Xu@Sun.COM if (link_changed) { 42528850SMin.Xu@Sun.COM if (!Adapter->reset_flag) 42538850SMin.Xu@Sun.COM mac_link_update(Adapter->mh, Adapter->link_state); 42548850SMin.Xu@Sun.COM if (Adapter->link_state == LINK_STATE_UP) 42558850SMin.Xu@Sun.COM Adapter->reset_flag = B_FALSE; 42568850SMin.Xu@Sun.COM } 42577133Scc210113 /* 42587133Scc210113 * Workaround for esb2. Data stuck in fifo on a link 42597133Scc210113 * down event. Reset the adapter to recover it. 42607133Scc210113 */ 42617133Scc210113 if (Adapter->esb2_workaround) { 42627133Scc210113 Adapter->esb2_workaround = B_FALSE; 42637656SSherry.Moore@Sun.COM (void) e1000g_reset_adapter(Adapter); 42648479SChenlu.Chen@Sun.COM return; 42654139Sxy150489 } 42664061Sxy150489 42673526Sxy150489 /* 42683526Sxy150489 * With 82571 controllers, any locally administered address will 42693526Sxy150489 * be overwritten when there is a reset on the other port. 42703526Sxy150489 * Detect this circumstance and correct it. 42713526Sxy150489 */ 42724919Sxy150489 if ((hw->mac.type == e1000_82571) && 42734919Sxy150489 (e1000_get_laa_state_82571(hw) == B_TRUE)) { 42744919Sxy150489 ether_addr.reg.low = E1000_READ_REG_ARRAY(hw, E1000_RA, 0); 42754919Sxy150489 ether_addr.reg.high = E1000_READ_REG_ARRAY(hw, E1000_RA, 1); 42763526Sxy150489 42773526Sxy150489 ether_addr.reg.low = ntohl(ether_addr.reg.low); 42783526Sxy150489 ether_addr.reg.high = ntohl(ether_addr.reg.high); 42793526Sxy150489 42804919Sxy150489 if ((ether_addr.mac.addr[5] != hw->mac.addr[0]) || 42814919Sxy150489 (ether_addr.mac.addr[4] != hw->mac.addr[1]) || 42824919Sxy150489 (ether_addr.mac.addr[3] != hw->mac.addr[2]) || 42834919Sxy150489 (ether_addr.mac.addr[2] != hw->mac.addr[3]) || 42844919Sxy150489 (ether_addr.mac.addr[1] != hw->mac.addr[4]) || 42854919Sxy150489 (ether_addr.mac.addr[0] != hw->mac.addr[5])) { 42864919Sxy150489 e1000_rar_set(hw, hw->mac.addr, 0); 42873526Sxy150489 } 42883526Sxy150489 } 42893526Sxy150489 42903526Sxy150489 /* 42914919Sxy150489 * Long TTL workaround for 82541/82547 42923526Sxy150489 */ 42937426SChenliang.Xu@Sun.COM (void) e1000_igp_ttl_workaround_82547(hw); 42943526Sxy150489 42953526Sxy150489 /* 42963526Sxy150489 * Check for Adaptive IFS settings If there are lots of collisions 42973526Sxy150489 * change the value in steps... 42983526Sxy150489 * These properties should only be set for 10/100 42993526Sxy150489 */ 43006735Scc210113 if ((hw->phy.media_type == e1000_media_type_copper) && 43014061Sxy150489 ((Adapter->link_speed == SPEED_100) || 43024061Sxy150489 (Adapter->link_speed == SPEED_10))) { 43033526Sxy150489 e1000_update_adaptive(hw); 43043526Sxy150489 } 43053526Sxy150489 /* 43063526Sxy150489 * Set Timer Interrupts 43073526Sxy150489 */ 43084919Sxy150489 E1000_WRITE_REG(hw, E1000_ICS, E1000_IMS_RXT0); 43094919Sxy150489 43105273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 43115273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 43128275SEric Cheng else 43138275SEric Cheng e1000g_timer_tx_resched(Adapter); 43145273Sgl147354 43154919Sxy150489 restart_watchdog_timer(Adapter); 43163526Sxy150489 } 43173526Sxy150489 43184061Sxy150489 /* 43194061Sxy150489 * The function e1000g_link_timer() is called when the timer for link setup 43204061Sxy150489 * is expired, which indicates the completion of the link setup. The link 43214061Sxy150489 * state will not be updated until the link setup is completed. And the 43224061Sxy150489 * link state will not be sent to the upper layer through mac_link_update() 43234061Sxy150489 * in this function. It will be updated in the local timer routine or the 43244061Sxy150489 * interrupt service routine after the interface is started (plumbed). 43254061Sxy150489 */ 43263526Sxy150489 static void 43274061Sxy150489 e1000g_link_timer(void *arg) 43283526Sxy150489 { 43294061Sxy150489 struct e1000g *Adapter = (struct e1000g *)arg; 43303526Sxy150489 43314919Sxy150489 mutex_enter(&Adapter->link_lock); 43324061Sxy150489 Adapter->link_complete = B_TRUE; 43334061Sxy150489 Adapter->link_tid = 0; 43344919Sxy150489 mutex_exit(&Adapter->link_lock); 43353526Sxy150489 } 43363526Sxy150489 43373526Sxy150489 /* 43384919Sxy150489 * e1000g_force_speed_duplex - read forced speed/duplex out of e1000g.conf 43394919Sxy150489 * 43404919Sxy150489 * This function read the forced speed and duplex for 10/100 Mbps speeds 43414919Sxy150489 * and also for 1000 Mbps speeds from the e1000g.conf file 43423526Sxy150489 */ 43433526Sxy150489 static void 43443526Sxy150489 e1000g_force_speed_duplex(struct e1000g *Adapter) 43453526Sxy150489 { 43463526Sxy150489 int forced; 434711339SGuoqing.Zhu@Sun.COM int propval; 43484919Sxy150489 struct e1000_mac_info *mac = &Adapter->shared.mac; 43494919Sxy150489 struct e1000_phy_info *phy = &Adapter->shared.phy; 43503526Sxy150489 43513526Sxy150489 /* 43523526Sxy150489 * get value out of config file 43533526Sxy150489 */ 435411339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "ForceSpeedDuplex", 435511339SGuoqing.Zhu@Sun.COM GDIAG_10_HALF, GDIAG_ANY, GDIAG_ANY, &forced); 43563526Sxy150489 43573526Sxy150489 switch (forced) { 43583526Sxy150489 case GDIAG_10_HALF: 43593526Sxy150489 /* 43603526Sxy150489 * Disable Auto Negotiation 43613526Sxy150489 */ 43624919Sxy150489 mac->autoneg = B_FALSE; 43634919Sxy150489 mac->forced_speed_duplex = ADVERTISE_10_HALF; 43643526Sxy150489 break; 43653526Sxy150489 case GDIAG_10_FULL: 43663526Sxy150489 /* 43673526Sxy150489 * Disable Auto Negotiation 43683526Sxy150489 */ 43694919Sxy150489 mac->autoneg = B_FALSE; 43704919Sxy150489 mac->forced_speed_duplex = ADVERTISE_10_FULL; 43713526Sxy150489 break; 43723526Sxy150489 case GDIAG_100_HALF: 43733526Sxy150489 /* 43743526Sxy150489 * Disable Auto Negotiation 43753526Sxy150489 */ 43764919Sxy150489 mac->autoneg = B_FALSE; 43774919Sxy150489 mac->forced_speed_duplex = ADVERTISE_100_HALF; 43783526Sxy150489 break; 43793526Sxy150489 case GDIAG_100_FULL: 43803526Sxy150489 /* 43813526Sxy150489 * Disable Auto Negotiation 43823526Sxy150489 */ 43834919Sxy150489 mac->autoneg = B_FALSE; 43844919Sxy150489 mac->forced_speed_duplex = ADVERTISE_100_FULL; 43853526Sxy150489 break; 43863526Sxy150489 case GDIAG_1000_FULL: 43873526Sxy150489 /* 43883526Sxy150489 * The gigabit spec requires autonegotiation. Therefore, 43893526Sxy150489 * when the user wants to force the speed to 1000Mbps, we 43903526Sxy150489 * enable AutoNeg, but only allow the harware to advertise 43913526Sxy150489 * 1000Mbps. This is different from 10/100 operation, where 43923526Sxy150489 * we are allowed to link without any negotiation. 43933526Sxy150489 */ 43944919Sxy150489 mac->autoneg = B_TRUE; 43954919Sxy150489 phy->autoneg_advertised = ADVERTISE_1000_FULL; 43963526Sxy150489 break; 43973526Sxy150489 default: /* obey the setting of AutoNegAdvertised */ 43984919Sxy150489 mac->autoneg = B_TRUE; 439911339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "AutoNegAdvertised", 44004349Sxy150489 0, AUTONEG_ADVERTISE_SPEED_DEFAULT, 440111339SGuoqing.Zhu@Sun.COM AUTONEG_ADVERTISE_SPEED_DEFAULT, &propval); 440211339SGuoqing.Zhu@Sun.COM phy->autoneg_advertised = (uint16_t)propval; 44033526Sxy150489 break; 44043526Sxy150489 } /* switch */ 44053526Sxy150489 } 44063526Sxy150489 44073526Sxy150489 /* 44084919Sxy150489 * e1000g_get_max_frame_size - get jumbo frame setting from e1000g.conf 44094919Sxy150489 * 44104919Sxy150489 * This function reads MaxFrameSize from e1000g.conf 44113526Sxy150489 */ 44123526Sxy150489 static void 44133526Sxy150489 e1000g_get_max_frame_size(struct e1000g *Adapter) 44143526Sxy150489 { 44153526Sxy150489 int max_frame; 44163526Sxy150489 44173526Sxy150489 /* 44183526Sxy150489 * get value out of config file 44193526Sxy150489 */ 442011339SGuoqing.Zhu@Sun.COM (void) e1000g_get_prop(Adapter, "MaxFrameSize", 0, 3, 0, 442111339SGuoqing.Zhu@Sun.COM &max_frame); 44223526Sxy150489 44233526Sxy150489 switch (max_frame) { 44243526Sxy150489 case 0: 44256394Scc210113 Adapter->default_mtu = ETHERMTU; 44263526Sxy150489 break; 44276394Scc210113 /* 44286394Scc210113 * To avoid excessive memory allocation for rx buffers, 44296394Scc210113 * the bytes of E1000G_IPALIGNPRESERVEROOM are reserved. 44306394Scc210113 */ 44313526Sxy150489 case 1: 44326394Scc210113 Adapter->default_mtu = FRAME_SIZE_UPTO_4K - 44336394Scc210113 sizeof (struct ether_vlan_header) - ETHERFCSL - 44346394Scc210113 E1000G_IPALIGNPRESERVEROOM; 44353526Sxy150489 break; 44363526Sxy150489 case 2: 44376394Scc210113 Adapter->default_mtu = FRAME_SIZE_UPTO_8K - 44386394Scc210113 sizeof (struct ether_vlan_header) - ETHERFCSL - 44396394Scc210113 E1000G_IPALIGNPRESERVEROOM; 44403526Sxy150489 break; 44413526Sxy150489 case 3: 444210680SMin.Xu@Sun.COM Adapter->default_mtu = FRAME_SIZE_UPTO_16K - 444310680SMin.Xu@Sun.COM sizeof (struct ether_vlan_header) - ETHERFCSL - 444410680SMin.Xu@Sun.COM E1000G_IPALIGNPRESERVEROOM; 44453526Sxy150489 break; 44463526Sxy150489 default: 44476394Scc210113 Adapter->default_mtu = ETHERMTU; 44483526Sxy150489 break; 44493526Sxy150489 } /* switch */ 44503526Sxy150489 445110680SMin.Xu@Sun.COM /* 445210680SMin.Xu@Sun.COM * If the user configed MTU is larger than the deivce's maximum MTU, 445310680SMin.Xu@Sun.COM * the MTU is set to the deivce's maximum value. 445410680SMin.Xu@Sun.COM */ 445510680SMin.Xu@Sun.COM if (Adapter->default_mtu > Adapter->max_mtu) 445610680SMin.Xu@Sun.COM Adapter->default_mtu = Adapter->max_mtu; 445710680SMin.Xu@Sun.COM 445810680SMin.Xu@Sun.COM Adapter->max_frame_size = e1000g_mtu2maxframe(Adapter->default_mtu); 445910680SMin.Xu@Sun.COM } 446010680SMin.Xu@Sun.COM 446110680SMin.Xu@Sun.COM /* 446210680SMin.Xu@Sun.COM * e1000g_pch_limits - Apply limits of the PCH silicon type 446310680SMin.Xu@Sun.COM * 446410680SMin.Xu@Sun.COM * At any frame size larger than the ethernet default, 446510680SMin.Xu@Sun.COM * prevent linking at 10/100 speeds. 446610680SMin.Xu@Sun.COM */ 446710680SMin.Xu@Sun.COM static void 446810680SMin.Xu@Sun.COM e1000g_pch_limits(struct e1000g *Adapter) 446910680SMin.Xu@Sun.COM { 447010680SMin.Xu@Sun.COM struct e1000_hw *hw = &Adapter->shared; 447110680SMin.Xu@Sun.COM 447210680SMin.Xu@Sun.COM /* only applies to PCH silicon type */ 447310680SMin.Xu@Sun.COM if (hw->mac.type != e1000_pchlan) 447410680SMin.Xu@Sun.COM return; 447510680SMin.Xu@Sun.COM 447610680SMin.Xu@Sun.COM /* only applies to frames larger than ethernet default */ 447710680SMin.Xu@Sun.COM if (Adapter->max_frame_size > DEFAULT_FRAME_SIZE) { 447810680SMin.Xu@Sun.COM hw->mac.autoneg = B_TRUE; 447910680SMin.Xu@Sun.COM hw->phy.autoneg_advertised = ADVERTISE_1000_FULL; 448010680SMin.Xu@Sun.COM 448110680SMin.Xu@Sun.COM Adapter->param_adv_autoneg = 1; 448210680SMin.Xu@Sun.COM Adapter->param_adv_1000fdx = 1; 448310680SMin.Xu@Sun.COM 448410680SMin.Xu@Sun.COM Adapter->param_adv_100fdx = 0; 448510680SMin.Xu@Sun.COM Adapter->param_adv_100hdx = 0; 448610680SMin.Xu@Sun.COM Adapter->param_adv_10fdx = 0; 448710680SMin.Xu@Sun.COM Adapter->param_adv_10hdx = 0; 448810680SMin.Xu@Sun.COM 448910680SMin.Xu@Sun.COM e1000g_param_sync(Adapter); 449010680SMin.Xu@Sun.COM } 449110680SMin.Xu@Sun.COM } 449210680SMin.Xu@Sun.COM 449310680SMin.Xu@Sun.COM /* 449410680SMin.Xu@Sun.COM * e1000g_mtu2maxframe - convert given MTU to maximum frame size 449510680SMin.Xu@Sun.COM */ 449610680SMin.Xu@Sun.COM static uint32_t 449710680SMin.Xu@Sun.COM e1000g_mtu2maxframe(uint32_t mtu) 449810680SMin.Xu@Sun.COM { 449910680SMin.Xu@Sun.COM uint32_t maxframe; 450010680SMin.Xu@Sun.COM 450110680SMin.Xu@Sun.COM maxframe = mtu + sizeof (struct ether_vlan_header) + ETHERFCSL; 450210680SMin.Xu@Sun.COM 450310680SMin.Xu@Sun.COM return (maxframe); 45043526Sxy150489 } 45053526Sxy150489 45063526Sxy150489 static void 45074919Sxy150489 arm_watchdog_timer(struct e1000g *Adapter) 45083526Sxy150489 { 45094919Sxy150489 Adapter->watchdog_tid = 45104919Sxy150489 timeout(e1000g_local_timer, 45113526Sxy150489 (void *)Adapter, 1 * drv_usectohz(1000000)); 45123526Sxy150489 } 45134919Sxy150489 #pragma inline(arm_watchdog_timer) 45144919Sxy150489 45154919Sxy150489 static void 45164919Sxy150489 enable_watchdog_timer(struct e1000g *Adapter) 45174919Sxy150489 { 45184919Sxy150489 mutex_enter(&Adapter->watchdog_lock); 45194919Sxy150489 45204919Sxy150489 if (!Adapter->watchdog_timer_enabled) { 45214919Sxy150489 Adapter->watchdog_timer_enabled = B_TRUE; 45224919Sxy150489 Adapter->watchdog_timer_started = B_TRUE; 45234919Sxy150489 arm_watchdog_timer(Adapter); 45244919Sxy150489 } 45254919Sxy150489 45264919Sxy150489 mutex_exit(&Adapter->watchdog_lock); 45274919Sxy150489 } 45283526Sxy150489 45293526Sxy150489 static void 45304919Sxy150489 disable_watchdog_timer(struct e1000g *Adapter) 45313526Sxy150489 { 45323526Sxy150489 timeout_id_t tid; 45333526Sxy150489 45344919Sxy150489 mutex_enter(&Adapter->watchdog_lock); 45354919Sxy150489 45364919Sxy150489 Adapter->watchdog_timer_enabled = B_FALSE; 45374919Sxy150489 Adapter->watchdog_timer_started = B_FALSE; 45384919Sxy150489 tid = Adapter->watchdog_tid; 45394919Sxy150489 Adapter->watchdog_tid = 0; 45404919Sxy150489 45414919Sxy150489 mutex_exit(&Adapter->watchdog_lock); 45423526Sxy150489 45433526Sxy150489 if (tid != 0) 45443526Sxy150489 (void) untimeout(tid); 45453526Sxy150489 } 45463526Sxy150489 45473526Sxy150489 static void 45484919Sxy150489 start_watchdog_timer(struct e1000g *Adapter) 45493526Sxy150489 { 45504919Sxy150489 mutex_enter(&Adapter->watchdog_lock); 45514919Sxy150489 45524919Sxy150489 if (Adapter->watchdog_timer_enabled) { 45534919Sxy150489 if (!Adapter->watchdog_timer_started) { 45544919Sxy150489 Adapter->watchdog_timer_started = B_TRUE; 45554919Sxy150489 arm_watchdog_timer(Adapter); 45563526Sxy150489 } 45573526Sxy150489 } 45583526Sxy150489 45594919Sxy150489 mutex_exit(&Adapter->watchdog_lock); 45604919Sxy150489 } 45614919Sxy150489 45624919Sxy150489 static void 45634919Sxy150489 restart_watchdog_timer(struct e1000g *Adapter) 45644919Sxy150489 { 45654919Sxy150489 mutex_enter(&Adapter->watchdog_lock); 45664919Sxy150489 45674919Sxy150489 if (Adapter->watchdog_timer_started) 45684919Sxy150489 arm_watchdog_timer(Adapter); 45694919Sxy150489 45704919Sxy150489 mutex_exit(&Adapter->watchdog_lock); 45713526Sxy150489 } 45723526Sxy150489 45733526Sxy150489 static void 45744919Sxy150489 stop_watchdog_timer(struct e1000g *Adapter) 45753526Sxy150489 { 45764919Sxy150489 timeout_id_t tid; 45774919Sxy150489 45784919Sxy150489 mutex_enter(&Adapter->watchdog_lock); 45794919Sxy150489 45804919Sxy150489 Adapter->watchdog_timer_started = B_FALSE; 45814919Sxy150489 tid = Adapter->watchdog_tid; 45824919Sxy150489 Adapter->watchdog_tid = 0; 45834919Sxy150489 45844919Sxy150489 mutex_exit(&Adapter->watchdog_lock); 45854919Sxy150489 45864919Sxy150489 if (tid != 0) 45874919Sxy150489 (void) untimeout(tid); 45883526Sxy150489 } 45893526Sxy150489 45903526Sxy150489 static void 45914919Sxy150489 stop_link_timer(struct e1000g *Adapter) 45923526Sxy150489 { 45933526Sxy150489 timeout_id_t tid; 45943526Sxy150489 45954919Sxy150489 /* Disable the link timer */ 45964919Sxy150489 mutex_enter(&Adapter->link_lock); 45974919Sxy150489 45984919Sxy150489 tid = Adapter->link_tid; 45994919Sxy150489 Adapter->link_tid = 0; 46004919Sxy150489 46014919Sxy150489 mutex_exit(&Adapter->link_lock); 46024919Sxy150489 46034919Sxy150489 if (tid != 0) 46044919Sxy150489 (void) untimeout(tid); 46054919Sxy150489 } 46064919Sxy150489 46074919Sxy150489 static void 46084919Sxy150489 stop_82547_timer(e1000g_tx_ring_t *tx_ring) 46094919Sxy150489 { 46104919Sxy150489 timeout_id_t tid; 46114919Sxy150489 46124919Sxy150489 /* Disable the tx timer for 82547 chipset */ 46134919Sxy150489 mutex_enter(&tx_ring->tx_lock); 46144919Sxy150489 46154919Sxy150489 tx_ring->timer_enable_82547 = B_FALSE; 46164919Sxy150489 tid = tx_ring->timer_id_82547; 46174919Sxy150489 tx_ring->timer_id_82547 = 0; 46184919Sxy150489 46194919Sxy150489 mutex_exit(&tx_ring->tx_lock); 46203526Sxy150489 46213526Sxy150489 if (tid != 0) 46223526Sxy150489 (void) untimeout(tid); 46233526Sxy150489 } 46243526Sxy150489 46253526Sxy150489 void 46264919Sxy150489 e1000g_clear_interrupt(struct e1000g *Adapter) 46273526Sxy150489 { 46284919Sxy150489 E1000_WRITE_REG(&Adapter->shared, E1000_IMC, 46294919Sxy150489 0xffffffff & ~E1000_IMS_RXSEQ); 46303526Sxy150489 } 46313526Sxy150489 46323526Sxy150489 void 46334919Sxy150489 e1000g_mask_interrupt(struct e1000g *Adapter) 46343526Sxy150489 { 46354919Sxy150489 E1000_WRITE_REG(&Adapter->shared, E1000_IMS, 46365882Syy150190 IMS_ENABLE_MASK & ~E1000_IMS_TXDW); 46375882Syy150190 46385882Syy150190 if (Adapter->tx_intr_enable) 46395882Syy150190 e1000g_mask_tx_interrupt(Adapter); 46403526Sxy150489 } 46413526Sxy150489 46427656SSherry.Moore@Sun.COM /* 46437656SSherry.Moore@Sun.COM * This routine is called by e1000g_quiesce(), therefore must not block. 46447656SSherry.Moore@Sun.COM */ 46453526Sxy150489 void 46464919Sxy150489 e1000g_clear_all_interrupts(struct e1000g *Adapter) 46473526Sxy150489 { 46484919Sxy150489 E1000_WRITE_REG(&Adapter->shared, E1000_IMC, 0xffffffff); 46493526Sxy150489 } 46503526Sxy150489 46513526Sxy150489 void 46524919Sxy150489 e1000g_mask_tx_interrupt(struct e1000g *Adapter) 46533526Sxy150489 { 46545882Syy150190 E1000_WRITE_REG(&Adapter->shared, E1000_IMS, E1000_IMS_TXDW); 46553526Sxy150489 } 46563526Sxy150489 46573526Sxy150489 void 46584919Sxy150489 e1000g_clear_tx_interrupt(struct e1000g *Adapter) 46593526Sxy150489 { 46605882Syy150190 E1000_WRITE_REG(&Adapter->shared, E1000_IMC, E1000_IMS_TXDW); 46613526Sxy150489 } 46623526Sxy150489 46633526Sxy150489 static void 46644919Sxy150489 e1000g_smartspeed(struct e1000g *Adapter) 46653526Sxy150489 { 46664919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 46673526Sxy150489 uint16_t phy_status; 46683526Sxy150489 uint16_t phy_ctrl; 46693526Sxy150489 46703526Sxy150489 /* 46713526Sxy150489 * If we're not T-or-T, or we're not autoneg'ing, or we're not 46723526Sxy150489 * advertising 1000Full, we don't even use the workaround 46733526Sxy150489 */ 46744919Sxy150489 if ((hw->phy.type != e1000_phy_igp) || 46754919Sxy150489 !hw->mac.autoneg || 46764919Sxy150489 !(hw->phy.autoneg_advertised & ADVERTISE_1000_FULL)) 46773526Sxy150489 return; 46783526Sxy150489 46793526Sxy150489 /* 46803526Sxy150489 * True if this is the first call of this function or after every 46813526Sxy150489 * 30 seconds of not having link 46823526Sxy150489 */ 46834919Sxy150489 if (Adapter->smartspeed == 0) { 46843526Sxy150489 /* 46853526Sxy150489 * If Master/Slave config fault is asserted twice, we 46863526Sxy150489 * assume back-to-back 46873526Sxy150489 */ 46887426SChenliang.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status); 46893526Sxy150489 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) 46903526Sxy150489 return; 46913526Sxy150489 46927426SChenliang.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status); 46933526Sxy150489 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) 46943526Sxy150489 return; 46953526Sxy150489 /* 46963526Sxy150489 * We're assuming back-2-back because our status register 46973526Sxy150489 * insists! there's a fault in the master/slave 46983526Sxy150489 * relationship that was "negotiated" 46993526Sxy150489 */ 47007426SChenliang.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); 47013526Sxy150489 /* 47023526Sxy150489 * Is the phy configured for manual configuration of 47033526Sxy150489 * master/slave? 47043526Sxy150489 */ 47053526Sxy150489 if (phy_ctrl & CR_1000T_MS_ENABLE) { 47063526Sxy150489 /* 47073526Sxy150489 * Yes. Then disable manual configuration (enable 47083526Sxy150489 * auto configuration) of master/slave 47093526Sxy150489 */ 47103526Sxy150489 phy_ctrl &= ~CR_1000T_MS_ENABLE; 47117426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 47123526Sxy150489 PHY_1000T_CTRL, phy_ctrl); 47133526Sxy150489 /* 47143526Sxy150489 * Effectively starting the clock 47153526Sxy150489 */ 47164919Sxy150489 Adapter->smartspeed++; 47173526Sxy150489 /* 47183526Sxy150489 * Restart autonegotiation 47193526Sxy150489 */ 47204919Sxy150489 if (!e1000_phy_setup_autoneg(hw) && 47214919Sxy150489 !e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl)) { 47223526Sxy150489 phy_ctrl |= (MII_CR_AUTO_NEG_EN | 47233526Sxy150489 MII_CR_RESTART_AUTO_NEG); 47247426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 47254919Sxy150489 PHY_CONTROL, phy_ctrl); 47263526Sxy150489 } 47273526Sxy150489 } 47283526Sxy150489 return; 47293526Sxy150489 /* 47303526Sxy150489 * Has 6 seconds transpired still without link? Remember, 47313526Sxy150489 * you should reset the smartspeed counter once you obtain 47323526Sxy150489 * link 47333526Sxy150489 */ 47344919Sxy150489 } else if (Adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { 47353526Sxy150489 /* 47363526Sxy150489 * Yes. Remember, we did at the start determine that 47373526Sxy150489 * there's a master/slave configuration fault, so we're 47383526Sxy150489 * still assuming there's someone on the other end, but we 47393526Sxy150489 * just haven't yet been able to talk to it. We then 47403526Sxy150489 * re-enable auto configuration of master/slave to see if 47413526Sxy150489 * we're running 2/3 pair cables. 47423526Sxy150489 */ 47433526Sxy150489 /* 47443526Sxy150489 * If still no link, perhaps using 2/3 pair cable 47453526Sxy150489 */ 47467426SChenliang.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl); 47473526Sxy150489 phy_ctrl |= CR_1000T_MS_ENABLE; 47487426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl); 47493526Sxy150489 /* 47503526Sxy150489 * Restart autoneg with phy enabled for manual 47513526Sxy150489 * configuration of master/slave 47523526Sxy150489 */ 47534919Sxy150489 if (!e1000_phy_setup_autoneg(hw) && 47544919Sxy150489 !e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl)) { 47553526Sxy150489 phy_ctrl |= 47563526Sxy150489 (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); 47577426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl); 47583526Sxy150489 } 47593526Sxy150489 /* 47603526Sxy150489 * Hopefully, there are no more faults and we've obtained 47613526Sxy150489 * link as a result. 47623526Sxy150489 */ 47633526Sxy150489 } 47643526Sxy150489 /* 47653526Sxy150489 * Restart process after E1000_SMARTSPEED_MAX iterations (30 47663526Sxy150489 * seconds) 47673526Sxy150489 */ 47684919Sxy150489 if (Adapter->smartspeed++ == E1000_SMARTSPEED_MAX) 47694919Sxy150489 Adapter->smartspeed = 0; 47703526Sxy150489 } 47713526Sxy150489 47723526Sxy150489 static boolean_t 47733526Sxy150489 is_valid_mac_addr(uint8_t *mac_addr) 47743526Sxy150489 { 47753526Sxy150489 const uint8_t addr_test1[6] = { 0, 0, 0, 0, 0, 0 }; 47763526Sxy150489 const uint8_t addr_test2[6] = 47773526Sxy150489 { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; 47783526Sxy150489 47793526Sxy150489 if (!(bcmp(addr_test1, mac_addr, ETHERADDRL)) || 47803526Sxy150489 !(bcmp(addr_test2, mac_addr, ETHERADDRL))) 47813526Sxy150489 return (B_FALSE); 47823526Sxy150489 47833526Sxy150489 return (B_TRUE); 47843526Sxy150489 } 47853526Sxy150489 47863526Sxy150489 /* 47874919Sxy150489 * e1000g_stall_check - check for tx stall 47884919Sxy150489 * 47894919Sxy150489 * This function checks if the adapter is stalled (in transmit). 47904919Sxy150489 * 47914919Sxy150489 * It is called each time the watchdog timeout is invoked. 47924919Sxy150489 * If the transmit descriptor reclaim continuously fails, 47934919Sxy150489 * the watchdog value will increment by 1. If the watchdog 47944919Sxy150489 * value exceeds the threshold, the adapter is assumed to 47954919Sxy150489 * have stalled and need to be reset. 47963526Sxy150489 */ 47973526Sxy150489 static boolean_t 47983526Sxy150489 e1000g_stall_check(struct e1000g *Adapter) 47993526Sxy150489 { 48004919Sxy150489 e1000g_tx_ring_t *tx_ring; 48014919Sxy150489 48024919Sxy150489 tx_ring = Adapter->tx_ring; 48034919Sxy150489 48044061Sxy150489 if (Adapter->link_state != LINK_STATE_UP) 48053526Sxy150489 return (B_FALSE); 48063526Sxy150489 48078850SMin.Xu@Sun.COM (void) e1000g_recycle(tx_ring); 48088850SMin.Xu@Sun.COM 480911402SChangqing.Li@Sun.COM if (Adapter->stall_flag) 48108850SMin.Xu@Sun.COM return (B_TRUE); 48118850SMin.Xu@Sun.COM 48128850SMin.Xu@Sun.COM return (B_FALSE); 48133526Sxy150489 } 48143526Sxy150489 48154919Sxy150489 #ifdef E1000G_DEBUG 48163526Sxy150489 static enum ioc_reply 48173526Sxy150489 e1000g_pp_ioctl(struct e1000g *e1000gp, struct iocblk *iocp, mblk_t *mp) 48183526Sxy150489 { 48193526Sxy150489 void (*ppfn)(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd); 48203526Sxy150489 e1000g_peekpoke_t *ppd; 48213526Sxy150489 uint64_t mem_va; 48223526Sxy150489 uint64_t maxoff; 48233526Sxy150489 boolean_t peek; 48243526Sxy150489 48253526Sxy150489 switch (iocp->ioc_cmd) { 48263526Sxy150489 48273526Sxy150489 case E1000G_IOC_REG_PEEK: 48283526Sxy150489 peek = B_TRUE; 48293526Sxy150489 break; 48303526Sxy150489 48313526Sxy150489 case E1000G_IOC_REG_POKE: 48323526Sxy150489 peek = B_FALSE; 48333526Sxy150489 break; 48343526Sxy150489 48353526Sxy150489 deault: 48364919Sxy150489 E1000G_DEBUGLOG_1(e1000gp, E1000G_INFO_LEVEL, 48374349Sxy150489 "e1000g_diag_ioctl: invalid ioctl command 0x%X\n", 48384349Sxy150489 iocp->ioc_cmd); 48393526Sxy150489 return (IOC_INVAL); 48403526Sxy150489 } 48413526Sxy150489 48423526Sxy150489 /* 48433526Sxy150489 * Validate format of ioctl 48443526Sxy150489 */ 48453526Sxy150489 if (iocp->ioc_count != sizeof (e1000g_peekpoke_t)) 48463526Sxy150489 return (IOC_INVAL); 48473526Sxy150489 if (mp->b_cont == NULL) 48483526Sxy150489 return (IOC_INVAL); 48493526Sxy150489 48507426SChenliang.Xu@Sun.COM ppd = (e1000g_peekpoke_t *)(uintptr_t)mp->b_cont->b_rptr; 48513526Sxy150489 48523526Sxy150489 /* 48533526Sxy150489 * Validate request parameters 48543526Sxy150489 */ 48553526Sxy150489 switch (ppd->pp_acc_space) { 48563526Sxy150489 48573526Sxy150489 default: 48584919Sxy150489 E1000G_DEBUGLOG_1(e1000gp, E1000G_INFO_LEVEL, 48594349Sxy150489 "e1000g_diag_ioctl: invalid access space 0x%X\n", 48604349Sxy150489 ppd->pp_acc_space); 48613526Sxy150489 return (IOC_INVAL); 48623526Sxy150489 48633526Sxy150489 case E1000G_PP_SPACE_REG: 48643526Sxy150489 /* 48653526Sxy150489 * Memory-mapped I/O space 48663526Sxy150489 */ 48673526Sxy150489 ASSERT(ppd->pp_acc_size == 4); 48683526Sxy150489 if (ppd->pp_acc_size != 4) 48693526Sxy150489 return (IOC_INVAL); 48703526Sxy150489 48713526Sxy150489 if ((ppd->pp_acc_offset % ppd->pp_acc_size) != 0) 48723526Sxy150489 return (IOC_INVAL); 48733526Sxy150489 48743526Sxy150489 mem_va = 0; 48753526Sxy150489 maxoff = 0x10000; 48763526Sxy150489 ppfn = peek ? e1000g_ioc_peek_reg : e1000g_ioc_poke_reg; 48773526Sxy150489 break; 48783526Sxy150489 48793526Sxy150489 case E1000G_PP_SPACE_E1000G: 48803526Sxy150489 /* 48813526Sxy150489 * E1000g data structure! 48823526Sxy150489 */ 48833526Sxy150489 mem_va = (uintptr_t)e1000gp; 48843526Sxy150489 maxoff = sizeof (struct e1000g); 48853526Sxy150489 ppfn = peek ? e1000g_ioc_peek_mem : e1000g_ioc_poke_mem; 48863526Sxy150489 break; 48873526Sxy150489 48883526Sxy150489 } 48893526Sxy150489 48903526Sxy150489 if (ppd->pp_acc_offset >= maxoff) 48913526Sxy150489 return (IOC_INVAL); 48923526Sxy150489 48933526Sxy150489 if (ppd->pp_acc_offset + ppd->pp_acc_size > maxoff) 48943526Sxy150489 return (IOC_INVAL); 48953526Sxy150489 48963526Sxy150489 /* 48973526Sxy150489 * All OK - go! 48983526Sxy150489 */ 48993526Sxy150489 ppd->pp_acc_offset += mem_va; 49003526Sxy150489 (*ppfn)(e1000gp, ppd); 49013526Sxy150489 return (peek ? IOC_REPLY : IOC_ACK); 49023526Sxy150489 } 49033526Sxy150489 49043526Sxy150489 static void 49053526Sxy150489 e1000g_ioc_peek_reg(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd) 49063526Sxy150489 { 49073526Sxy150489 ddi_acc_handle_t handle; 49083526Sxy150489 uint32_t *regaddr; 49093526Sxy150489 49104919Sxy150489 handle = e1000gp->osdep.reg_handle; 49117426SChenliang.Xu@Sun.COM regaddr = (uint32_t *)((uintptr_t)e1000gp->shared.hw_addr + 49127426SChenliang.Xu@Sun.COM (uintptr_t)ppd->pp_acc_offset); 49133526Sxy150489 49143526Sxy150489 ppd->pp_acc_data = ddi_get32(handle, regaddr); 49153526Sxy150489 } 49163526Sxy150489 49173526Sxy150489 static void 49183526Sxy150489 e1000g_ioc_poke_reg(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd) 49193526Sxy150489 { 49203526Sxy150489 ddi_acc_handle_t handle; 49213526Sxy150489 uint32_t *regaddr; 49223526Sxy150489 uint32_t value; 49233526Sxy150489 49244919Sxy150489 handle = e1000gp->osdep.reg_handle; 49257426SChenliang.Xu@Sun.COM regaddr = (uint32_t *)((uintptr_t)e1000gp->shared.hw_addr + 49267426SChenliang.Xu@Sun.COM (uintptr_t)ppd->pp_acc_offset); 49273526Sxy150489 value = (uint32_t)ppd->pp_acc_data; 49283526Sxy150489 49293526Sxy150489 ddi_put32(handle, regaddr, value); 49303526Sxy150489 } 49313526Sxy150489 49323526Sxy150489 static void 49333526Sxy150489 e1000g_ioc_peek_mem(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd) 49343526Sxy150489 { 49353526Sxy150489 uint64_t value; 49363526Sxy150489 void *vaddr; 49373526Sxy150489 49383526Sxy150489 vaddr = (void *)(uintptr_t)ppd->pp_acc_offset; 49393526Sxy150489 49403526Sxy150489 switch (ppd->pp_acc_size) { 49413526Sxy150489 case 1: 49423526Sxy150489 value = *(uint8_t *)vaddr; 49433526Sxy150489 break; 49443526Sxy150489 49453526Sxy150489 case 2: 49463526Sxy150489 value = *(uint16_t *)vaddr; 49473526Sxy150489 break; 49483526Sxy150489 49493526Sxy150489 case 4: 49503526Sxy150489 value = *(uint32_t *)vaddr; 49513526Sxy150489 break; 49523526Sxy150489 49533526Sxy150489 case 8: 49543526Sxy150489 value = *(uint64_t *)vaddr; 49553526Sxy150489 break; 49563526Sxy150489 } 49573526Sxy150489 49584919Sxy150489 E1000G_DEBUGLOG_4(e1000gp, E1000G_INFO_LEVEL, 49594349Sxy150489 "e1000g_ioc_peek_mem($%p, $%p) peeked 0x%llx from $%p\n", 49604349Sxy150489 (void *)e1000gp, (void *)ppd, value, vaddr); 49613526Sxy150489 49623526Sxy150489 ppd->pp_acc_data = value; 49633526Sxy150489 } 49643526Sxy150489 49653526Sxy150489 static void 49663526Sxy150489 e1000g_ioc_poke_mem(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd) 49673526Sxy150489 { 49683526Sxy150489 uint64_t value; 49693526Sxy150489 void *vaddr; 49703526Sxy150489 49713526Sxy150489 vaddr = (void *)(uintptr_t)ppd->pp_acc_offset; 49723526Sxy150489 value = ppd->pp_acc_data; 49733526Sxy150489 49744919Sxy150489 E1000G_DEBUGLOG_4(e1000gp, E1000G_INFO_LEVEL, 49754349Sxy150489 "e1000g_ioc_poke_mem($%p, $%p) poking 0x%llx at $%p\n", 49764349Sxy150489 (void *)e1000gp, (void *)ppd, value, vaddr); 49773526Sxy150489 49783526Sxy150489 switch (ppd->pp_acc_size) { 49793526Sxy150489 case 1: 49803526Sxy150489 *(uint8_t *)vaddr = (uint8_t)value; 49813526Sxy150489 break; 49823526Sxy150489 49833526Sxy150489 case 2: 49843526Sxy150489 *(uint16_t *)vaddr = (uint16_t)value; 49853526Sxy150489 break; 49863526Sxy150489 49873526Sxy150489 case 4: 49883526Sxy150489 *(uint32_t *)vaddr = (uint32_t)value; 49893526Sxy150489 break; 49903526Sxy150489 49913526Sxy150489 case 8: 49923526Sxy150489 *(uint64_t *)vaddr = (uint64_t)value; 49933526Sxy150489 break; 49943526Sxy150489 } 49953526Sxy150489 } 49964919Sxy150489 #endif 49973526Sxy150489 49983526Sxy150489 /* 49993526Sxy150489 * Loopback Support 50003526Sxy150489 */ 50013526Sxy150489 static lb_property_t lb_normal = 50023526Sxy150489 { normal, "normal", E1000G_LB_NONE }; 50033526Sxy150489 static lb_property_t lb_external1000 = 50043526Sxy150489 { external, "1000Mbps", E1000G_LB_EXTERNAL_1000 }; 50053526Sxy150489 static lb_property_t lb_external100 = 50063526Sxy150489 { external, "100Mbps", E1000G_LB_EXTERNAL_100 }; 50073526Sxy150489 static lb_property_t lb_external10 = 50083526Sxy150489 { external, "10Mbps", E1000G_LB_EXTERNAL_10 }; 50093526Sxy150489 static lb_property_t lb_phy = 50103526Sxy150489 { internal, "PHY", E1000G_LB_INTERNAL_PHY }; 50113526Sxy150489 50123526Sxy150489 static enum ioc_reply 50133526Sxy150489 e1000g_loopback_ioctl(struct e1000g *Adapter, struct iocblk *iocp, mblk_t *mp) 50143526Sxy150489 { 50153526Sxy150489 lb_info_sz_t *lbsp; 50163526Sxy150489 lb_property_t *lbpp; 50173526Sxy150489 struct e1000_hw *hw; 50183526Sxy150489 uint32_t *lbmp; 50193526Sxy150489 uint32_t size; 50203526Sxy150489 uint32_t value; 50213526Sxy150489 50224919Sxy150489 hw = &Adapter->shared; 50233526Sxy150489 50243526Sxy150489 if (mp->b_cont == NULL) 50253526Sxy150489 return (IOC_INVAL); 50263526Sxy150489 50277133Scc210113 if (!e1000g_check_loopback_support(hw)) { 50287133Scc210113 e1000g_log(NULL, CE_WARN, 50297133Scc210113 "Loopback is not supported on e1000g%d", Adapter->instance); 50307133Scc210113 return (IOC_INVAL); 50317133Scc210113 } 50327133Scc210113 50333526Sxy150489 switch (iocp->ioc_cmd) { 50343526Sxy150489 default: 50353526Sxy150489 return (IOC_INVAL); 50363526Sxy150489 50373526Sxy150489 case LB_GET_INFO_SIZE: 50383526Sxy150489 size = sizeof (lb_info_sz_t); 50393526Sxy150489 if (iocp->ioc_count != size) 50403526Sxy150489 return (IOC_INVAL); 50413526Sxy150489 50425082Syy150190 rw_enter(&Adapter->chip_lock, RW_WRITER); 50435082Syy150190 e1000g_get_phy_state(Adapter); 50445082Syy150190 50455082Syy150190 /* 50465082Syy150190 * Workaround for hardware faults. In order to get a stable 50475082Syy150190 * state of phy, we will wait for a specific interval and 50485082Syy150190 * try again. The time delay is an experiential value based 50495082Syy150190 * on our testing. 50505082Syy150190 */ 50515082Syy150190 msec_delay(100); 50525082Syy150190 e1000g_get_phy_state(Adapter); 50535082Syy150190 rw_exit(&Adapter->chip_lock); 50543526Sxy150489 50553526Sxy150489 value = sizeof (lb_normal); 50565082Syy150190 if ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) || 50575082Syy150190 (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS) || 50586735Scc210113 (hw->phy.media_type == e1000_media_type_fiber) || 50596735Scc210113 (hw->phy.media_type == e1000_media_type_internal_serdes)) { 50603526Sxy150489 value += sizeof (lb_phy); 50614919Sxy150489 switch (hw->mac.type) { 50623526Sxy150489 case e1000_82571: 50633526Sxy150489 case e1000_82572: 50647133Scc210113 case e1000_80003es2lan: 50653526Sxy150489 value += sizeof (lb_external1000); 50663526Sxy150489 break; 50673526Sxy150489 } 50683526Sxy150489 } 50695082Syy150190 if ((Adapter->phy_status & MII_SR_100X_FD_CAPS) || 50705082Syy150190 (Adapter->phy_status & MII_SR_100T2_FD_CAPS)) 50713526Sxy150489 value += sizeof (lb_external100); 50725082Syy150190 if (Adapter->phy_status & MII_SR_10T_FD_CAPS) 50733526Sxy150489 value += sizeof (lb_external10); 50743526Sxy150489 50757426SChenliang.Xu@Sun.COM lbsp = (lb_info_sz_t *)(uintptr_t)mp->b_cont->b_rptr; 50763526Sxy150489 *lbsp = value; 50773526Sxy150489 break; 50783526Sxy150489 50793526Sxy150489 case LB_GET_INFO: 50803526Sxy150489 value = sizeof (lb_normal); 50815082Syy150190 if ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) || 50825082Syy150190 (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS) || 50836735Scc210113 (hw->phy.media_type == e1000_media_type_fiber) || 50846735Scc210113 (hw->phy.media_type == e1000_media_type_internal_serdes)) { 50853526Sxy150489 value += sizeof (lb_phy); 50864919Sxy150489 switch (hw->mac.type) { 50873526Sxy150489 case e1000_82571: 50883526Sxy150489 case e1000_82572: 50897133Scc210113 case e1000_80003es2lan: 50903526Sxy150489 value += sizeof (lb_external1000); 50913526Sxy150489 break; 50923526Sxy150489 } 50933526Sxy150489 } 50945082Syy150190 if ((Adapter->phy_status & MII_SR_100X_FD_CAPS) || 50955082Syy150190 (Adapter->phy_status & MII_SR_100T2_FD_CAPS)) 50963526Sxy150489 value += sizeof (lb_external100); 50975082Syy150190 if (Adapter->phy_status & MII_SR_10T_FD_CAPS) 50983526Sxy150489 value += sizeof (lb_external10); 50993526Sxy150489 51003526Sxy150489 size = value; 51013526Sxy150489 if (iocp->ioc_count != size) 51023526Sxy150489 return (IOC_INVAL); 51033526Sxy150489 51043526Sxy150489 value = 0; 51057426SChenliang.Xu@Sun.COM lbpp = (lb_property_t *)(uintptr_t)mp->b_cont->b_rptr; 51063526Sxy150489 lbpp[value++] = lb_normal; 51075082Syy150190 if ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) || 51085082Syy150190 (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS) || 51096735Scc210113 (hw->phy.media_type == e1000_media_type_fiber) || 51106735Scc210113 (hw->phy.media_type == e1000_media_type_internal_serdes)) { 51113526Sxy150489 lbpp[value++] = lb_phy; 51124919Sxy150489 switch (hw->mac.type) { 51133526Sxy150489 case e1000_82571: 51143526Sxy150489 case e1000_82572: 51157133Scc210113 case e1000_80003es2lan: 51163526Sxy150489 lbpp[value++] = lb_external1000; 51173526Sxy150489 break; 51183526Sxy150489 } 51193526Sxy150489 } 51205082Syy150190 if ((Adapter->phy_status & MII_SR_100X_FD_CAPS) || 51215082Syy150190 (Adapter->phy_status & MII_SR_100T2_FD_CAPS)) 51223526Sxy150489 lbpp[value++] = lb_external100; 51235082Syy150190 if (Adapter->phy_status & MII_SR_10T_FD_CAPS) 51243526Sxy150489 lbpp[value++] = lb_external10; 51253526Sxy150489 break; 51263526Sxy150489 51273526Sxy150489 case LB_GET_MODE: 51283526Sxy150489 size = sizeof (uint32_t); 51293526Sxy150489 if (iocp->ioc_count != size) 51303526Sxy150489 return (IOC_INVAL); 51313526Sxy150489 51327426SChenliang.Xu@Sun.COM lbmp = (uint32_t *)(uintptr_t)mp->b_cont->b_rptr; 51333526Sxy150489 *lbmp = Adapter->loopback_mode; 51343526Sxy150489 break; 51353526Sxy150489 51363526Sxy150489 case LB_SET_MODE: 51373526Sxy150489 size = 0; 51383526Sxy150489 if (iocp->ioc_count != sizeof (uint32_t)) 51393526Sxy150489 return (IOC_INVAL); 51403526Sxy150489 51417426SChenliang.Xu@Sun.COM lbmp = (uint32_t *)(uintptr_t)mp->b_cont->b_rptr; 51423526Sxy150489 if (!e1000g_set_loopback_mode(Adapter, *lbmp)) 51433526Sxy150489 return (IOC_INVAL); 51443526Sxy150489 break; 51453526Sxy150489 } 51463526Sxy150489 51473526Sxy150489 iocp->ioc_count = size; 51483526Sxy150489 iocp->ioc_error = 0; 51493526Sxy150489 51505273Sgl147354 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 51515273Sgl147354 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 51525273Sgl147354 return (IOC_INVAL); 51535273Sgl147354 } 51545273Sgl147354 51553526Sxy150489 return (IOC_REPLY); 51563526Sxy150489 } 51573526Sxy150489 51583526Sxy150489 static boolean_t 51597133Scc210113 e1000g_check_loopback_support(struct e1000_hw *hw) 51607133Scc210113 { 51617133Scc210113 switch (hw->mac.type) { 51627133Scc210113 case e1000_82540: 51637133Scc210113 case e1000_82545: 51647133Scc210113 case e1000_82545_rev_3: 51657133Scc210113 case e1000_82546: 51667133Scc210113 case e1000_82546_rev_3: 51677133Scc210113 case e1000_82541: 51687133Scc210113 case e1000_82541_rev_2: 51697133Scc210113 case e1000_82547: 51707133Scc210113 case e1000_82547_rev_2: 51717133Scc210113 case e1000_82571: 51727133Scc210113 case e1000_82572: 51737133Scc210113 case e1000_82573: 51748479SChenlu.Chen@Sun.COM case e1000_82574: 51757133Scc210113 case e1000_80003es2lan: 51768479SChenlu.Chen@Sun.COM case e1000_ich9lan: 51778479SChenlu.Chen@Sun.COM case e1000_ich10lan: 51787133Scc210113 return (B_TRUE); 51797133Scc210113 } 51807133Scc210113 return (B_FALSE); 51817133Scc210113 } 51827133Scc210113 51837133Scc210113 static boolean_t 51843526Sxy150489 e1000g_set_loopback_mode(struct e1000g *Adapter, uint32_t mode) 51853526Sxy150489 { 51863526Sxy150489 struct e1000_hw *hw; 51873526Sxy150489 int i, times; 51885082Syy150190 boolean_t link_up; 51893526Sxy150489 51903526Sxy150489 if (mode == Adapter->loopback_mode) 51913526Sxy150489 return (B_TRUE); 51923526Sxy150489 51934919Sxy150489 hw = &Adapter->shared; 51943526Sxy150489 times = 0; 51953526Sxy150489 51965082Syy150190 Adapter->loopback_mode = mode; 51975082Syy150190 51985082Syy150190 if (mode == E1000G_LB_NONE) { 51993526Sxy150489 /* Reset the chip */ 52006735Scc210113 hw->phy.autoneg_wait_to_complete = B_TRUE; 52017656SSherry.Moore@Sun.COM (void) e1000g_reset_adapter(Adapter); 52026735Scc210113 hw->phy.autoneg_wait_to_complete = B_FALSE; 52035082Syy150190 return (B_TRUE); 52045082Syy150190 } 52055082Syy150190 52065082Syy150190 again: 52075082Syy150190 52085082Syy150190 rw_enter(&Adapter->chip_lock, RW_WRITER); 52095082Syy150190 52105082Syy150190 switch (mode) { 52115082Syy150190 default: 52125082Syy150190 rw_exit(&Adapter->chip_lock); 52135082Syy150190 return (B_FALSE); 52143526Sxy150489 52153526Sxy150489 case E1000G_LB_EXTERNAL_1000: 52163526Sxy150489 e1000g_set_external_loopback_1000(Adapter); 52173526Sxy150489 break; 52183526Sxy150489 52193526Sxy150489 case E1000G_LB_EXTERNAL_100: 52203526Sxy150489 e1000g_set_external_loopback_100(Adapter); 52213526Sxy150489 break; 52223526Sxy150489 52233526Sxy150489 case E1000G_LB_EXTERNAL_10: 52243526Sxy150489 e1000g_set_external_loopback_10(Adapter); 52253526Sxy150489 break; 52263526Sxy150489 52273526Sxy150489 case E1000G_LB_INTERNAL_PHY: 52283526Sxy150489 e1000g_set_internal_loopback(Adapter); 52293526Sxy150489 break; 52303526Sxy150489 } 52313526Sxy150489 52323526Sxy150489 times++; 52333526Sxy150489 52345858Scc210113 rw_exit(&Adapter->chip_lock); 52355858Scc210113 52365082Syy150190 /* Wait for link up */ 52375082Syy150190 for (i = (PHY_FORCE_LIMIT * 2); i > 0; i--) 52385082Syy150190 msec_delay(100); 52395082Syy150190 52405858Scc210113 rw_enter(&Adapter->chip_lock, RW_WRITER); 52415858Scc210113 52425082Syy150190 link_up = e1000g_link_up(Adapter); 52435082Syy150190 52445082Syy150190 rw_exit(&Adapter->chip_lock); 52455082Syy150190 52465082Syy150190 if (!link_up) { 52475082Syy150190 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 52485082Syy150190 "Failed to get the link up"); 52495082Syy150190 if (times < 2) { 52505082Syy150190 /* Reset the link */ 52514919Sxy150489 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 52525082Syy150190 "Reset the link ..."); 52537656SSherry.Moore@Sun.COM (void) e1000g_reset_adapter(Adapter); 52545082Syy150190 goto again; 52553526Sxy150489 } 525611402SChangqing.Li@Sun.COM 525711402SChangqing.Li@Sun.COM /* 525811402SChangqing.Li@Sun.COM * Reset driver to loopback none when set loopback failed 525911402SChangqing.Li@Sun.COM * for the second time. 526011402SChangqing.Li@Sun.COM */ 526111402SChangqing.Li@Sun.COM Adapter->loopback_mode = E1000G_LB_NONE; 526211402SChangqing.Li@Sun.COM 526311402SChangqing.Li@Sun.COM /* Reset the chip */ 526411402SChangqing.Li@Sun.COM hw->phy.autoneg_wait_to_complete = B_TRUE; 526511402SChangqing.Li@Sun.COM (void) e1000g_reset_adapter(Adapter); 526611402SChangqing.Li@Sun.COM hw->phy.autoneg_wait_to_complete = B_FALSE; 526711402SChangqing.Li@Sun.COM 526811402SChangqing.Li@Sun.COM E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 526911402SChangqing.Li@Sun.COM "Set loopback mode failed, reset to loopback none"); 527011402SChangqing.Li@Sun.COM 527111402SChangqing.Li@Sun.COM return (B_FALSE); 52723526Sxy150489 } 52733526Sxy150489 52743526Sxy150489 return (B_TRUE); 52753526Sxy150489 } 52763526Sxy150489 52773526Sxy150489 /* 52783526Sxy150489 * The following loopback settings are from Intel's technical 52793526Sxy150489 * document - "How To Loopback". All the register settings and 52803526Sxy150489 * time delay values are directly inherited from the document 52813526Sxy150489 * without more explanations available. 52823526Sxy150489 */ 52833526Sxy150489 static void 52843526Sxy150489 e1000g_set_internal_loopback(struct e1000g *Adapter) 52853526Sxy150489 { 52863526Sxy150489 struct e1000_hw *hw; 52873526Sxy150489 uint32_t ctrl; 52883526Sxy150489 uint32_t status; 52893526Sxy150489 uint16_t phy_ctrl; 52908479SChenlu.Chen@Sun.COM uint16_t phy_reg; 52915082Syy150190 uint32_t txcw; 52923526Sxy150489 52934919Sxy150489 hw = &Adapter->shared; 52943526Sxy150489 52953526Sxy150489 /* Disable Smart Power Down */ 52963526Sxy150489 phy_spd_state(hw, B_FALSE); 52973526Sxy150489 52987426SChenliang.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl); 52993526Sxy150489 phy_ctrl &= ~(MII_CR_AUTO_NEG_EN | MII_CR_SPEED_100 | MII_CR_SPEED_10); 53003526Sxy150489 phy_ctrl |= MII_CR_FULL_DUPLEX | MII_CR_SPEED_1000; 53013526Sxy150489 53024919Sxy150489 switch (hw->mac.type) { 53033526Sxy150489 case e1000_82540: 53043526Sxy150489 case e1000_82545: 53053526Sxy150489 case e1000_82545_rev_3: 53063526Sxy150489 case e1000_82546: 53073526Sxy150489 case e1000_82546_rev_3: 53083526Sxy150489 case e1000_82573: 53093526Sxy150489 /* Auto-MDI/MDIX off */ 53107426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808); 53113526Sxy150489 /* Reset PHY to update Auto-MDI/MDIX */ 53127426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, 53134349Sxy150489 phy_ctrl | MII_CR_RESET | MII_CR_AUTO_NEG_EN); 53143526Sxy150489 /* Reset PHY to auto-neg off and force 1000 */ 53157426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, 53164349Sxy150489 phy_ctrl | MII_CR_RESET); 53175082Syy150190 /* 53185082Syy150190 * Disable PHY receiver for 82540/545/546 and 82573 Family. 53195082Syy150190 * See comments above e1000g_set_internal_loopback() for the 53205082Syy150190 * background. 53215082Syy150190 */ 53227426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 29, 0x001F); 53237426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 30, 0x8FFC); 53247426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 29, 0x001A); 53257426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 30, 0x8FF0); 53263526Sxy150489 break; 53277133Scc210113 case e1000_80003es2lan: 53287133Scc210113 /* Force Link Up */ 53297426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, 53307426SChenliang.Xu@Sun.COM 0x1CC); 53317133Scc210113 /* Sets PCS loopback at 1Gbs */ 53327426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, 53337426SChenliang.Xu@Sun.COM 0x1046); 53347133Scc210113 break; 53353526Sxy150489 } 53363526Sxy150489 53378479SChenlu.Chen@Sun.COM /* 53388479SChenlu.Chen@Sun.COM * The following registers should be set for e1000_phy_bm phy type. 53398479SChenlu.Chen@Sun.COM * e1000_82574, e1000_ich10lan and some e1000_ich9lan use this phy. 53408479SChenlu.Chen@Sun.COM * For others, we do not need to set these registers. 53418479SChenlu.Chen@Sun.COM */ 53428479SChenlu.Chen@Sun.COM if (hw->phy.type == e1000_phy_bm) { 53438479SChenlu.Chen@Sun.COM /* Set Default MAC Interface speed to 1GB */ 53448850SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_REG(2, 21), &phy_reg); 53458479SChenlu.Chen@Sun.COM phy_reg &= ~0x0007; 53468479SChenlu.Chen@Sun.COM phy_reg |= 0x006; 53478850SMin.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_REG(2, 21), phy_reg); 53488479SChenlu.Chen@Sun.COM /* Assert SW reset for above settings to take effect */ 53498850SMin.Xu@Sun.COM (void) e1000_phy_commit(hw); 53508479SChenlu.Chen@Sun.COM msec_delay(1); 53518479SChenlu.Chen@Sun.COM /* Force Full Duplex */ 53528850SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_REG(769, 16), &phy_reg); 53538850SMin.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_REG(769, 16), 53548850SMin.Xu@Sun.COM phy_reg | 0x000C); 53558479SChenlu.Chen@Sun.COM /* Set Link Up (in force link) */ 53568850SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_REG(776, 16), &phy_reg); 53578850SMin.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_REG(776, 16), 53588850SMin.Xu@Sun.COM phy_reg | 0x0040); 53598479SChenlu.Chen@Sun.COM /* Force Link */ 53608850SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_REG(769, 16), &phy_reg); 53618850SMin.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_REG(769, 16), 53628850SMin.Xu@Sun.COM phy_reg | 0x0040); 53638479SChenlu.Chen@Sun.COM /* Set Early Link Enable */ 53648850SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_REG(769, 20), &phy_reg); 53658850SMin.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_REG(769, 20), 53668850SMin.Xu@Sun.COM phy_reg | 0x0400); 53678479SChenlu.Chen@Sun.COM } 53688479SChenlu.Chen@Sun.COM 53693526Sxy150489 /* Set loopback */ 53707426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl | MII_CR_LOOPBACK); 53713526Sxy150489 53723526Sxy150489 msec_delay(250); 53733526Sxy150489 53743526Sxy150489 /* Now set up the MAC to the same speed/duplex as the PHY. */ 53754919Sxy150489 ctrl = E1000_READ_REG(hw, E1000_CTRL); 53763526Sxy150489 ctrl &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ 53773526Sxy150489 ctrl |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ 53784349Sxy150489 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ 53794349Sxy150489 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */ 53804349Sxy150489 E1000_CTRL_FD); /* Force Duplex to FULL */ 53813526Sxy150489 53824919Sxy150489 switch (hw->mac.type) { 53833526Sxy150489 case e1000_82540: 53843526Sxy150489 case e1000_82545: 53853526Sxy150489 case e1000_82545_rev_3: 53863526Sxy150489 case e1000_82546: 53873526Sxy150489 case e1000_82546_rev_3: 53883526Sxy150489 /* 53893526Sxy150489 * For some serdes we'll need to commit the writes now 53903526Sxy150489 * so that the status is updated on link 53913526Sxy150489 */ 53926735Scc210113 if (hw->phy.media_type == e1000_media_type_internal_serdes) { 53934919Sxy150489 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 53943526Sxy150489 msec_delay(100); 53954919Sxy150489 ctrl = E1000_READ_REG(hw, E1000_CTRL); 53963526Sxy150489 } 53973526Sxy150489 53986735Scc210113 if (hw->phy.media_type == e1000_media_type_copper) { 53993526Sxy150489 /* Invert Loss of Signal */ 54003526Sxy150489 ctrl |= E1000_CTRL_ILOS; 54013526Sxy150489 } else { 54023526Sxy150489 /* Set ILOS on fiber nic if half duplex is detected */ 54034919Sxy150489 status = E1000_READ_REG(hw, E1000_STATUS); 54043526Sxy150489 if ((status & E1000_STATUS_FD) == 0) 54053526Sxy150489 ctrl |= E1000_CTRL_ILOS | E1000_CTRL_SLU; 54063526Sxy150489 } 54073526Sxy150489 break; 54083526Sxy150489 54093526Sxy150489 case e1000_82571: 54103526Sxy150489 case e1000_82572: 54115082Syy150190 /* 54125082Syy150190 * The fiber/SerDes versions of this adapter do not contain an 54135082Syy150190 * accessible PHY. Therefore, loopback beyond MAC must be done 54145082Syy150190 * using SerDes analog loopback. 54155082Syy150190 */ 54166735Scc210113 if (hw->phy.media_type != e1000_media_type_copper) { 54175082Syy150190 /* Disable autoneg by setting bit 31 of TXCW to zero */ 54185082Syy150190 txcw = E1000_READ_REG(hw, E1000_TXCW); 54195082Syy150190 txcw &= ~((uint32_t)1 << 31); 54205082Syy150190 E1000_WRITE_REG(hw, E1000_TXCW, txcw); 54215082Syy150190 54225082Syy150190 /* 54235082Syy150190 * Write 0x410 to Serdes Control register 54245082Syy150190 * to enable Serdes analog loopback 54255082Syy150190 */ 54265082Syy150190 E1000_WRITE_REG(hw, E1000_SCTL, 0x0410); 54275082Syy150190 msec_delay(10); 54283526Sxy150489 } 54298479SChenlu.Chen@Sun.COM 54308479SChenlu.Chen@Sun.COM status = E1000_READ_REG(hw, E1000_STATUS); 54318479SChenlu.Chen@Sun.COM /* Set ILOS on fiber nic if half duplex is detected */ 54328479SChenlu.Chen@Sun.COM if ((hw->phy.media_type == e1000_media_type_fiber) && 54338479SChenlu.Chen@Sun.COM ((status & E1000_STATUS_FD) == 0 || 54348479SChenlu.Chen@Sun.COM (status & E1000_STATUS_LU) == 0)) 54358479SChenlu.Chen@Sun.COM ctrl |= E1000_CTRL_ILOS | E1000_CTRL_SLU; 54368479SChenlu.Chen@Sun.COM else if (hw->phy.media_type == e1000_media_type_internal_serdes) 54378479SChenlu.Chen@Sun.COM ctrl |= E1000_CTRL_SLU; 54383526Sxy150489 break; 54393526Sxy150489 54403526Sxy150489 case e1000_82573: 54413526Sxy150489 ctrl |= E1000_CTRL_ILOS; 54428479SChenlu.Chen@Sun.COM break; 54438479SChenlu.Chen@Sun.COM case e1000_ich9lan: 54448479SChenlu.Chen@Sun.COM case e1000_ich10lan: 54458479SChenlu.Chen@Sun.COM ctrl |= E1000_CTRL_SLU; 54463526Sxy150489 break; 54473526Sxy150489 } 54488479SChenlu.Chen@Sun.COM if (hw->phy.type == e1000_phy_bm) 54498479SChenlu.Chen@Sun.COM ctrl |= E1000_CTRL_SLU | E1000_CTRL_ILOS; 54508479SChenlu.Chen@Sun.COM 54518479SChenlu.Chen@Sun.COM E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 54523526Sxy150489 } 54533526Sxy150489 54543526Sxy150489 static void 54553526Sxy150489 e1000g_set_external_loopback_1000(struct e1000g *Adapter) 54563526Sxy150489 { 54573526Sxy150489 struct e1000_hw *hw; 54583526Sxy150489 uint32_t rctl; 54593526Sxy150489 uint32_t ctrl_ext; 54603526Sxy150489 uint32_t ctrl; 54613526Sxy150489 uint32_t status; 54623526Sxy150489 uint32_t txcw; 54637133Scc210113 uint16_t phydata; 54643526Sxy150489 54654919Sxy150489 hw = &Adapter->shared; 54663526Sxy150489 54673526Sxy150489 /* Disable Smart Power Down */ 54683526Sxy150489 phy_spd_state(hw, B_FALSE); 54693526Sxy150489 54707133Scc210113 switch (hw->mac.type) { 54717133Scc210113 case e1000_82571: 54727133Scc210113 case e1000_82572: 54737133Scc210113 switch (hw->phy.media_type) { 54747133Scc210113 case e1000_media_type_copper: 54757133Scc210113 /* Force link up (Must be done before the PHY writes) */ 54767133Scc210113 ctrl = E1000_READ_REG(hw, E1000_CTRL); 54777133Scc210113 ctrl |= E1000_CTRL_SLU; /* Force Link Up */ 54787133Scc210113 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 54797133Scc210113 54807133Scc210113 rctl = E1000_READ_REG(hw, E1000_RCTL); 54817133Scc210113 rctl |= (E1000_RCTL_EN | 54827133Scc210113 E1000_RCTL_SBP | 54837133Scc210113 E1000_RCTL_UPE | 54847133Scc210113 E1000_RCTL_MPE | 54857133Scc210113 E1000_RCTL_LPE | 54867133Scc210113 E1000_RCTL_BAM); /* 0x803E */ 54877133Scc210113 E1000_WRITE_REG(hw, E1000_RCTL, rctl); 54887133Scc210113 54897133Scc210113 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); 54907133Scc210113 ctrl_ext |= (E1000_CTRL_EXT_SDP4_DATA | 54917133Scc210113 E1000_CTRL_EXT_SDP6_DATA | 549210680SMin.Xu@Sun.COM E1000_CTRL_EXT_SDP3_DATA | 54937133Scc210113 E1000_CTRL_EXT_SDP4_DIR | 54947133Scc210113 E1000_CTRL_EXT_SDP6_DIR | 549510680SMin.Xu@Sun.COM E1000_CTRL_EXT_SDP3_DIR); /* 0x0DD0 */ 54967133Scc210113 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); 54977133Scc210113 54987133Scc210113 /* 54997133Scc210113 * This sequence tunes the PHY's SDP and no customer 55007133Scc210113 * settable values. For background, see comments above 55017133Scc210113 * e1000g_set_internal_loopback(). 55027133Scc210113 */ 55037426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x0, 0x140); 55047133Scc210113 msec_delay(10); 55057426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x9, 0x1A00); 55067426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x12, 0xC10); 55077426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x12, 0x1C10); 55087426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1F37, 0x76); 55097426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1F33, 0x1); 55107426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1F33, 0x0); 55117426SChenliang.Xu@Sun.COM 55127426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1F35, 0x65); 55137426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1837, 0x3F7C); 55147426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1437, 0x3FDC); 55157426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1237, 0x3F7C); 55167426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, 0x1137, 0x3FDC); 55177133Scc210113 55187133Scc210113 msec_delay(50); 55197133Scc210113 break; 55207133Scc210113 case e1000_media_type_fiber: 55217133Scc210113 case e1000_media_type_internal_serdes: 55227133Scc210113 status = E1000_READ_REG(hw, E1000_STATUS); 55237133Scc210113 if (((status & E1000_STATUS_LU) == 0) || 55247133Scc210113 (hw->phy.media_type == 55257133Scc210113 e1000_media_type_internal_serdes)) { 55267133Scc210113 ctrl = E1000_READ_REG(hw, E1000_CTRL); 55277133Scc210113 ctrl |= E1000_CTRL_ILOS | E1000_CTRL_SLU; 55287133Scc210113 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 55297133Scc210113 } 55307133Scc210113 55317133Scc210113 /* Disable autoneg by setting bit 31 of TXCW to zero */ 55327133Scc210113 txcw = E1000_READ_REG(hw, E1000_TXCW); 55337133Scc210113 txcw &= ~((uint32_t)1 << 31); 55347133Scc210113 E1000_WRITE_REG(hw, E1000_TXCW, txcw); 55357133Scc210113 55367133Scc210113 /* 55377133Scc210113 * Write 0x410 to Serdes Control register 55387133Scc210113 * to enable Serdes analog loopback 55397133Scc210113 */ 55407133Scc210113 E1000_WRITE_REG(hw, E1000_SCTL, 0x0410); 55417133Scc210113 msec_delay(10); 55427133Scc210113 break; 55437133Scc210113 default: 55447133Scc210113 break; 55457133Scc210113 } 55463526Sxy150489 break; 55478479SChenlu.Chen@Sun.COM case e1000_82574: 55487133Scc210113 case e1000_80003es2lan: 55498479SChenlu.Chen@Sun.COM case e1000_ich9lan: 55508479SChenlu.Chen@Sun.COM case e1000_ich10lan: 55517426SChenliang.Xu@Sun.COM (void) e1000_read_phy_reg(hw, GG82563_REG(6, 16), &phydata); 55527426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, GG82563_REG(6, 16), 55537426SChenliang.Xu@Sun.COM phydata | (1 << 5)); 55547133Scc210113 Adapter->param_adv_autoneg = 1; 55557133Scc210113 Adapter->param_adv_1000fdx = 1; 55567426SChenliang.Xu@Sun.COM (void) e1000g_reset_link(Adapter); 55573526Sxy150489 break; 55583526Sxy150489 } 55593526Sxy150489 } 55603526Sxy150489 55613526Sxy150489 static void 55623526Sxy150489 e1000g_set_external_loopback_100(struct e1000g *Adapter) 55633526Sxy150489 { 55643526Sxy150489 struct e1000_hw *hw; 55653526Sxy150489 uint32_t ctrl; 55663526Sxy150489 uint16_t phy_ctrl; 55673526Sxy150489 55684919Sxy150489 hw = &Adapter->shared; 55693526Sxy150489 55703526Sxy150489 /* Disable Smart Power Down */ 55713526Sxy150489 phy_spd_state(hw, B_FALSE); 55723526Sxy150489 55733526Sxy150489 phy_ctrl = (MII_CR_FULL_DUPLEX | 55744349Sxy150489 MII_CR_SPEED_100); 55753526Sxy150489 55763526Sxy150489 /* Force 100/FD, reset PHY */ 55777426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, 55784349Sxy150489 phy_ctrl | MII_CR_RESET); /* 0xA100 */ 55793526Sxy150489 msec_delay(10); 55803526Sxy150489 55813526Sxy150489 /* Force 100/FD */ 55827426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, 55834349Sxy150489 phy_ctrl); /* 0x2100 */ 55843526Sxy150489 msec_delay(10); 55853526Sxy150489 55863526Sxy150489 /* Now setup the MAC to the same speed/duplex as the PHY. */ 55874919Sxy150489 ctrl = E1000_READ_REG(hw, E1000_CTRL); 55883526Sxy150489 ctrl &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ 55893526Sxy150489 ctrl |= (E1000_CTRL_SLU | /* Force Link Up */ 55904349Sxy150489 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ 55914349Sxy150489 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ 55924349Sxy150489 E1000_CTRL_SPD_100 | /* Force Speed to 100 */ 55934349Sxy150489 E1000_CTRL_FD); /* Force Duplex to FULL */ 55943526Sxy150489 55954919Sxy150489 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 55963526Sxy150489 } 55973526Sxy150489 55983526Sxy150489 static void 55993526Sxy150489 e1000g_set_external_loopback_10(struct e1000g *Adapter) 56003526Sxy150489 { 56013526Sxy150489 struct e1000_hw *hw; 56023526Sxy150489 uint32_t ctrl; 56033526Sxy150489 uint16_t phy_ctrl; 56043526Sxy150489 56054919Sxy150489 hw = &Adapter->shared; 56063526Sxy150489 56073526Sxy150489 /* Disable Smart Power Down */ 56083526Sxy150489 phy_spd_state(hw, B_FALSE); 56093526Sxy150489 56103526Sxy150489 phy_ctrl = (MII_CR_FULL_DUPLEX | 56114349Sxy150489 MII_CR_SPEED_10); 56123526Sxy150489 56133526Sxy150489 /* Force 10/FD, reset PHY */ 56147426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, 56154349Sxy150489 phy_ctrl | MII_CR_RESET); /* 0x8100 */ 56163526Sxy150489 msec_delay(10); 56173526Sxy150489 56183526Sxy150489 /* Force 10/FD */ 56197426SChenliang.Xu@Sun.COM (void) e1000_write_phy_reg(hw, PHY_CONTROL, 56204349Sxy150489 phy_ctrl); /* 0x0100 */ 56213526Sxy150489 msec_delay(10); 56223526Sxy150489 56233526Sxy150489 /* Now setup the MAC to the same speed/duplex as the PHY. */ 56244919Sxy150489 ctrl = E1000_READ_REG(hw, E1000_CTRL); 56253526Sxy150489 ctrl &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ 56263526Sxy150489 ctrl |= (E1000_CTRL_SLU | /* Force Link Up */ 56274349Sxy150489 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ 56284349Sxy150489 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ 56294349Sxy150489 E1000_CTRL_SPD_10 | /* Force Speed to 10 */ 56304349Sxy150489 E1000_CTRL_FD); /* Force Duplex to FULL */ 56313526Sxy150489 56324919Sxy150489 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 56333526Sxy150489 } 56343526Sxy150489 56353526Sxy150489 #ifdef __sparc 56363526Sxy150489 static boolean_t 56373526Sxy150489 e1000g_find_mac_address(struct e1000g *Adapter) 56383526Sxy150489 { 56394919Sxy150489 struct e1000_hw *hw = &Adapter->shared; 56403526Sxy150489 uchar_t *bytes; 56413526Sxy150489 struct ether_addr sysaddr; 56423526Sxy150489 uint_t nelts; 56433526Sxy150489 int err; 56443526Sxy150489 boolean_t found = B_FALSE; 56453526Sxy150489 56463526Sxy150489 /* 56473526Sxy150489 * The "vendor's factory-set address" may already have 56483526Sxy150489 * been extracted from the chip, but if the property 56493526Sxy150489 * "local-mac-address" is set we use that instead. 56503526Sxy150489 * 56513526Sxy150489 * We check whether it looks like an array of 6 56523526Sxy150489 * bytes (which it should, if OBP set it). If we can't 56533526Sxy150489 * make sense of it this way, we'll ignore it. 56543526Sxy150489 */ 56553526Sxy150489 err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, Adapter->dip, 56563526Sxy150489 DDI_PROP_DONTPASS, "local-mac-address", &bytes, &nelts); 56573526Sxy150489 if (err == DDI_PROP_SUCCESS) { 56583526Sxy150489 if (nelts == ETHERADDRL) { 56593526Sxy150489 while (nelts--) 56604919Sxy150489 hw->mac.addr[nelts] = bytes[nelts]; 56613526Sxy150489 found = B_TRUE; 56623526Sxy150489 } 56633526Sxy150489 ddi_prop_free(bytes); 56643526Sxy150489 } 56653526Sxy150489 56663526Sxy150489 /* 56673526Sxy150489 * Look up the OBP property "local-mac-address?". If the user has set 56683526Sxy150489 * 'local-mac-address? = false', use "the system address" instead. 56693526Sxy150489 */ 56703526Sxy150489 if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, Adapter->dip, 0, 56713526Sxy150489 "local-mac-address?", &bytes, &nelts) == DDI_PROP_SUCCESS) { 56723526Sxy150489 if (strncmp("false", (caddr_t)bytes, (size_t)nelts) == 0) { 56733526Sxy150489 if (localetheraddr(NULL, &sysaddr) != 0) { 56744919Sxy150489 bcopy(&sysaddr, hw->mac.addr, ETHERADDRL); 56753526Sxy150489 found = B_TRUE; 56763526Sxy150489 } 56773526Sxy150489 } 56783526Sxy150489 ddi_prop_free(bytes); 56793526Sxy150489 } 56803526Sxy150489 56813526Sxy150489 /* 56823526Sxy150489 * Finally(!), if there's a valid "mac-address" property (created 56833526Sxy150489 * if we netbooted from this interface), we must use this instead 56843526Sxy150489 * of any of the above to ensure that the NFS/install server doesn't 56853526Sxy150489 * get confused by the address changing as Solaris takes over! 56863526Sxy150489 */ 56873526Sxy150489 err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, Adapter->dip, 56883526Sxy150489 DDI_PROP_DONTPASS, "mac-address", &bytes, &nelts); 56893526Sxy150489 if (err == DDI_PROP_SUCCESS) { 56903526Sxy150489 if (nelts == ETHERADDRL) { 56913526Sxy150489 while (nelts--) 56924919Sxy150489 hw->mac.addr[nelts] = bytes[nelts]; 56933526Sxy150489 found = B_TRUE; 56943526Sxy150489 } 56953526Sxy150489 ddi_prop_free(bytes); 56963526Sxy150489 } 56973526Sxy150489 56983526Sxy150489 if (found) { 56994919Sxy150489 bcopy(hw->mac.addr, hw->mac.perm_addr, 57003526Sxy150489 ETHERADDRL); 57013526Sxy150489 } 57023526Sxy150489 57033526Sxy150489 return (found); 57043526Sxy150489 } 57053526Sxy150489 #endif 57063526Sxy150489 57073526Sxy150489 static int 57083526Sxy150489 e1000g_add_intrs(struct e1000g *Adapter) 57093526Sxy150489 { 57103526Sxy150489 dev_info_t *devinfo; 57113526Sxy150489 int intr_types; 57123526Sxy150489 int rc; 57133526Sxy150489 57143526Sxy150489 devinfo = Adapter->dip; 57153526Sxy150489 57163526Sxy150489 /* Get supported interrupt types */ 57173526Sxy150489 rc = ddi_intr_get_supported_types(devinfo, &intr_types); 57183526Sxy150489 57193526Sxy150489 if (rc != DDI_SUCCESS) { 57204919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 57213526Sxy150489 "Get supported interrupt types failed: %d\n", rc); 57223526Sxy150489 return (DDI_FAILURE); 57233526Sxy150489 } 57243526Sxy150489 57253526Sxy150489 /* 57263526Sxy150489 * Based on Intel Technical Advisory document (TA-160), there are some 57273526Sxy150489 * cases where some older Intel PCI-X NICs may "advertise" to the OS 57283526Sxy150489 * that it supports MSI, but in fact has problems. 57293526Sxy150489 * So we should only enable MSI for PCI-E NICs and disable MSI for old 57303526Sxy150489 * PCI/PCI-X NICs. 57313526Sxy150489 */ 57324919Sxy150489 if (Adapter->shared.mac.type < e1000_82571) 57336986Smx205022 Adapter->msi_enable = B_FALSE; 57346986Smx205022 57356986Smx205022 if ((intr_types & DDI_INTR_TYPE_MSI) && Adapter->msi_enable) { 57363526Sxy150489 rc = e1000g_intr_add(Adapter, DDI_INTR_TYPE_MSI); 57373526Sxy150489 57383526Sxy150489 if (rc != DDI_SUCCESS) { 573911143SGuoqing.Zhu@Sun.COM /* EMPTY */ 57404919Sxy150489 E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL, 57413526Sxy150489 "Add MSI failed, trying Legacy interrupts\n"); 57423526Sxy150489 } else { 57433526Sxy150489 Adapter->intr_type = DDI_INTR_TYPE_MSI; 57443526Sxy150489 } 57453526Sxy150489 } 57463526Sxy150489 57473526Sxy150489 if ((Adapter->intr_type == 0) && 57483526Sxy150489 (intr_types & DDI_INTR_TYPE_FIXED)) { 57493526Sxy150489 rc = e1000g_intr_add(Adapter, DDI_INTR_TYPE_FIXED); 57503526Sxy150489 57513526Sxy150489 if (rc != DDI_SUCCESS) { 57524919Sxy150489 E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL, 57533526Sxy150489 "Add Legacy interrupts failed\n"); 57543526Sxy150489 return (DDI_FAILURE); 57553526Sxy150489 } 57563526Sxy150489 57573526Sxy150489 Adapter->intr_type = DDI_INTR_TYPE_FIXED; 57583526Sxy150489 } 57593526Sxy150489 57603526Sxy150489 if (Adapter->intr_type == 0) { 57614919Sxy150489 E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL, 57623526Sxy150489 "No interrupts registered\n"); 57633526Sxy150489 return (DDI_FAILURE); 57643526Sxy150489 } 57653526Sxy150489 57663526Sxy150489 return (DDI_SUCCESS); 57673526Sxy150489 } 57683526Sxy150489 57693526Sxy150489 /* 57703526Sxy150489 * e1000g_intr_add() handles MSI/Legacy interrupts 57713526Sxy150489 */ 57723526Sxy150489 static int 57733526Sxy150489 e1000g_intr_add(struct e1000g *Adapter, int intr_type) 57743526Sxy150489 { 57753526Sxy150489 dev_info_t *devinfo; 57763526Sxy150489 int count, avail, actual; 57773526Sxy150489 int x, y, rc, inum = 0; 57783526Sxy150489 int flag; 57793526Sxy150489 ddi_intr_handler_t *intr_handler; 57803526Sxy150489 57813526Sxy150489 devinfo = Adapter->dip; 57823526Sxy150489 57833526Sxy150489 /* get number of interrupts */ 57843526Sxy150489 rc = ddi_intr_get_nintrs(devinfo, intr_type, &count); 57853526Sxy150489 if ((rc != DDI_SUCCESS) || (count == 0)) { 57864919Sxy150489 E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL, 57873526Sxy150489 "Get interrupt number failed. Return: %d, count: %d\n", 57883526Sxy150489 rc, count); 57893526Sxy150489 return (DDI_FAILURE); 57903526Sxy150489 } 57913526Sxy150489 57923526Sxy150489 /* get number of available interrupts */ 57933526Sxy150489 rc = ddi_intr_get_navail(devinfo, intr_type, &avail); 57943526Sxy150489 if ((rc != DDI_SUCCESS) || (avail == 0)) { 57954919Sxy150489 E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL, 57963526Sxy150489 "Get interrupt available number failed. " 57973526Sxy150489 "Return: %d, available: %d\n", rc, avail); 57983526Sxy150489 return (DDI_FAILURE); 57993526Sxy150489 } 58003526Sxy150489 58013526Sxy150489 if (avail < count) { 580211143SGuoqing.Zhu@Sun.COM /* EMPTY */ 58034919Sxy150489 E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL, 58043526Sxy150489 "Interrupts count: %d, available: %d\n", 58053526Sxy150489 count, avail); 58063526Sxy150489 } 58073526Sxy150489 58083526Sxy150489 /* Allocate an array of interrupt handles */ 58093526Sxy150489 Adapter->intr_size = count * sizeof (ddi_intr_handle_t); 58103526Sxy150489 Adapter->htable = kmem_alloc(Adapter->intr_size, KM_SLEEP); 58113526Sxy150489 58123526Sxy150489 /* Set NORMAL behavior for both MSI and FIXED interrupt */ 58133526Sxy150489 flag = DDI_INTR_ALLOC_NORMAL; 58143526Sxy150489 58153526Sxy150489 /* call ddi_intr_alloc() */ 58163526Sxy150489 rc = ddi_intr_alloc(devinfo, Adapter->htable, intr_type, inum, 58173526Sxy150489 count, &actual, flag); 58183526Sxy150489 58193526Sxy150489 if ((rc != DDI_SUCCESS) || (actual == 0)) { 58204919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 58213526Sxy150489 "Allocate interrupts failed: %d\n", rc); 58223526Sxy150489 58233526Sxy150489 kmem_free(Adapter->htable, Adapter->intr_size); 58243526Sxy150489 return (DDI_FAILURE); 58253526Sxy150489 } 58263526Sxy150489 58273526Sxy150489 if (actual < count) { 582811143SGuoqing.Zhu@Sun.COM /* EMPTY */ 58294919Sxy150489 E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL, 58303526Sxy150489 "Interrupts requested: %d, received: %d\n", 58313526Sxy150489 count, actual); 58323526Sxy150489 } 58333526Sxy150489 58343526Sxy150489 Adapter->intr_cnt = actual; 58353526Sxy150489 58363526Sxy150489 /* Get priority for first msi, assume remaining are all the same */ 58373526Sxy150489 rc = ddi_intr_get_pri(Adapter->htable[0], &Adapter->intr_pri); 58383526Sxy150489 58393526Sxy150489 if (rc != DDI_SUCCESS) { 58404919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 58413526Sxy150489 "Get interrupt priority failed: %d\n", rc); 58423526Sxy150489 58433526Sxy150489 /* Free already allocated intr */ 58443526Sxy150489 for (y = 0; y < actual; y++) 58453526Sxy150489 (void) ddi_intr_free(Adapter->htable[y]); 58463526Sxy150489 58473526Sxy150489 kmem_free(Adapter->htable, Adapter->intr_size); 58483526Sxy150489 return (DDI_FAILURE); 58493526Sxy150489 } 58503526Sxy150489 58513526Sxy150489 /* 58523526Sxy150489 * In Legacy Interrupt mode, for PCI-Express adapters, we should 58533526Sxy150489 * use the interrupt service routine e1000g_intr_pciexpress() 58543526Sxy150489 * to avoid interrupt stealing when sharing interrupt with other 58553526Sxy150489 * devices. 58563526Sxy150489 */ 58574919Sxy150489 if (Adapter->shared.mac.type < e1000_82571) 58583526Sxy150489 intr_handler = (ddi_intr_handler_t *)e1000g_intr; 58593526Sxy150489 else 58603526Sxy150489 intr_handler = (ddi_intr_handler_t *)e1000g_intr_pciexpress; 58613526Sxy150489 58623526Sxy150489 /* Call ddi_intr_add_handler() */ 58633526Sxy150489 for (x = 0; x < actual; x++) { 58643526Sxy150489 rc = ddi_intr_add_handler(Adapter->htable[x], 58653526Sxy150489 intr_handler, (caddr_t)Adapter, NULL); 58663526Sxy150489 58673526Sxy150489 if (rc != DDI_SUCCESS) { 58684919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 58693526Sxy150489 "Add interrupt handler failed: %d\n", rc); 58703526Sxy150489 58713526Sxy150489 /* Remove already added handler */ 58723526Sxy150489 for (y = 0; y < x; y++) 58733526Sxy150489 (void) ddi_intr_remove_handler( 58743526Sxy150489 Adapter->htable[y]); 58753526Sxy150489 58763526Sxy150489 /* Free already allocated intr */ 58773526Sxy150489 for (y = 0; y < actual; y++) 58783526Sxy150489 (void) ddi_intr_free(Adapter->htable[y]); 58793526Sxy150489 58803526Sxy150489 kmem_free(Adapter->htable, Adapter->intr_size); 58813526Sxy150489 return (DDI_FAILURE); 58823526Sxy150489 } 58833526Sxy150489 } 58843526Sxy150489 58853526Sxy150489 rc = ddi_intr_get_cap(Adapter->htable[0], &Adapter->intr_cap); 58863526Sxy150489 58873526Sxy150489 if (rc != DDI_SUCCESS) { 58884919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 58893526Sxy150489 "Get interrupt cap failed: %d\n", rc); 58903526Sxy150489 58913526Sxy150489 /* Free already allocated intr */ 58923526Sxy150489 for (y = 0; y < actual; y++) { 58933526Sxy150489 (void) ddi_intr_remove_handler(Adapter->htable[y]); 58943526Sxy150489 (void) ddi_intr_free(Adapter->htable[y]); 58953526Sxy150489 } 58963526Sxy150489 58973526Sxy150489 kmem_free(Adapter->htable, Adapter->intr_size); 58983526Sxy150489 return (DDI_FAILURE); 58993526Sxy150489 } 59003526Sxy150489 59013526Sxy150489 return (DDI_SUCCESS); 59023526Sxy150489 } 59033526Sxy150489 59043526Sxy150489 static int 59053526Sxy150489 e1000g_rem_intrs(struct e1000g *Adapter) 59063526Sxy150489 { 59073526Sxy150489 int x; 59083526Sxy150489 int rc; 59093526Sxy150489 59103526Sxy150489 for (x = 0; x < Adapter->intr_cnt; x++) { 59113526Sxy150489 rc = ddi_intr_remove_handler(Adapter->htable[x]); 59123526Sxy150489 if (rc != DDI_SUCCESS) { 59134919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 59143526Sxy150489 "Remove intr handler failed: %d\n", rc); 59153526Sxy150489 return (DDI_FAILURE); 59163526Sxy150489 } 59173526Sxy150489 59183526Sxy150489 rc = ddi_intr_free(Adapter->htable[x]); 59193526Sxy150489 if (rc != DDI_SUCCESS) { 59204919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 59213526Sxy150489 "Free intr failed: %d\n", rc); 59223526Sxy150489 return (DDI_FAILURE); 59233526Sxy150489 } 59243526Sxy150489 } 59253526Sxy150489 59263526Sxy150489 kmem_free(Adapter->htable, Adapter->intr_size); 59273526Sxy150489 59283526Sxy150489 return (DDI_SUCCESS); 59293526Sxy150489 } 59303526Sxy150489 59313526Sxy150489 static int 59323526Sxy150489 e1000g_enable_intrs(struct e1000g *Adapter) 59333526Sxy150489 { 59343526Sxy150489 int x; 59353526Sxy150489 int rc; 59363526Sxy150489 59373526Sxy150489 /* Enable interrupts */ 59383526Sxy150489 if (Adapter->intr_cap & DDI_INTR_FLAG_BLOCK) { 59393526Sxy150489 /* Call ddi_intr_block_enable() for MSI */ 59403526Sxy150489 rc = ddi_intr_block_enable(Adapter->htable, 59413526Sxy150489 Adapter->intr_cnt); 59423526Sxy150489 if (rc != DDI_SUCCESS) { 59434919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 59443526Sxy150489 "Enable block intr failed: %d\n", rc); 59453526Sxy150489 return (DDI_FAILURE); 59463526Sxy150489 } 59473526Sxy150489 } else { 59483526Sxy150489 /* Call ddi_intr_enable() for Legacy/MSI non block enable */ 59493526Sxy150489 for (x = 0; x < Adapter->intr_cnt; x++) { 59503526Sxy150489 rc = ddi_intr_enable(Adapter->htable[x]); 59513526Sxy150489 if (rc != DDI_SUCCESS) { 59524919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 59533526Sxy150489 "Enable intr failed: %d\n", rc); 59543526Sxy150489 return (DDI_FAILURE); 59553526Sxy150489 } 59563526Sxy150489 } 59573526Sxy150489 } 59583526Sxy150489 59593526Sxy150489 return (DDI_SUCCESS); 59603526Sxy150489 } 59613526Sxy150489 59623526Sxy150489 static int 59633526Sxy150489 e1000g_disable_intrs(struct e1000g *Adapter) 59643526Sxy150489 { 59653526Sxy150489 int x; 59663526Sxy150489 int rc; 59673526Sxy150489 59683526Sxy150489 /* Disable all interrupts */ 59693526Sxy150489 if (Adapter->intr_cap & DDI_INTR_FLAG_BLOCK) { 59703526Sxy150489 rc = ddi_intr_block_disable(Adapter->htable, 59713526Sxy150489 Adapter->intr_cnt); 59723526Sxy150489 if (rc != DDI_SUCCESS) { 59734919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 59743526Sxy150489 "Disable block intr failed: %d\n", rc); 59753526Sxy150489 return (DDI_FAILURE); 59763526Sxy150489 } 59773526Sxy150489 } else { 59783526Sxy150489 for (x = 0; x < Adapter->intr_cnt; x++) { 59793526Sxy150489 rc = ddi_intr_disable(Adapter->htable[x]); 59803526Sxy150489 if (rc != DDI_SUCCESS) { 59814919Sxy150489 E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL, 59823526Sxy150489 "Disable intr failed: %d\n", rc); 59833526Sxy150489 return (DDI_FAILURE); 59843526Sxy150489 } 59853526Sxy150489 } 59863526Sxy150489 } 59873526Sxy150489 59883526Sxy150489 return (DDI_SUCCESS); 59893526Sxy150489 } 59905082Syy150190 59915082Syy150190 /* 59925082Syy150190 * e1000g_get_phy_state - get the state of PHY registers, save in the adapter 59935082Syy150190 */ 59945082Syy150190 static void 59955082Syy150190 e1000g_get_phy_state(struct e1000g *Adapter) 59965082Syy150190 { 59975082Syy150190 struct e1000_hw *hw = &Adapter->shared; 59985082Syy150190 599910605SMin.Xu@Sun.COM if (hw->phy.media_type == e1000_media_type_copper) { 600010605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_CONTROL, &Adapter->phy_ctrl); 600110605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_STATUS, &Adapter->phy_status); 600210605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_AUTONEG_ADV, 600310605SMin.Xu@Sun.COM &Adapter->phy_an_adv); 600410605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_AUTONEG_EXP, 600510605SMin.Xu@Sun.COM &Adapter->phy_an_exp); 600610605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_EXT_STATUS, 600710605SMin.Xu@Sun.COM &Adapter->phy_ext_status); 600810605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_1000T_CTRL, 600910605SMin.Xu@Sun.COM &Adapter->phy_1000t_ctrl); 601010605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_1000T_STATUS, 601110605SMin.Xu@Sun.COM &Adapter->phy_1000t_status); 601210605SMin.Xu@Sun.COM (void) e1000_read_phy_reg(hw, PHY_LP_ABILITY, 601310605SMin.Xu@Sun.COM &Adapter->phy_lp_able); 601410605SMin.Xu@Sun.COM 601510605SMin.Xu@Sun.COM Adapter->param_autoneg_cap = 601610605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_AUTONEG_CAPS) ? 1 : 0; 601710605SMin.Xu@Sun.COM Adapter->param_pause_cap = 601810605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_PAUSE) ? 1 : 0; 601910605SMin.Xu@Sun.COM Adapter->param_asym_pause_cap = 602010605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_ASM_DIR) ? 1 : 0; 602110605SMin.Xu@Sun.COM Adapter->param_1000fdx_cap = 602210605SMin.Xu@Sun.COM ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) || 602310605SMin.Xu@Sun.COM (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS)) ? 1 : 0; 602410605SMin.Xu@Sun.COM Adapter->param_1000hdx_cap = 602510605SMin.Xu@Sun.COM ((Adapter->phy_ext_status & IEEE_ESR_1000T_HD_CAPS) || 602610605SMin.Xu@Sun.COM (Adapter->phy_ext_status & IEEE_ESR_1000X_HD_CAPS)) ? 1 : 0; 602710605SMin.Xu@Sun.COM Adapter->param_100t4_cap = 602810605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_100T4_CAPS) ? 1 : 0; 602910605SMin.Xu@Sun.COM Adapter->param_100fdx_cap = 603010605SMin.Xu@Sun.COM ((Adapter->phy_status & MII_SR_100X_FD_CAPS) || 603110605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_100T2_FD_CAPS)) ? 1 : 0; 603210605SMin.Xu@Sun.COM Adapter->param_100hdx_cap = 603310605SMin.Xu@Sun.COM ((Adapter->phy_status & MII_SR_100X_HD_CAPS) || 603410605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_100T2_HD_CAPS)) ? 1 : 0; 603510605SMin.Xu@Sun.COM Adapter->param_10fdx_cap = 603610605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_10T_FD_CAPS) ? 1 : 0; 603710605SMin.Xu@Sun.COM Adapter->param_10hdx_cap = 603810605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_10T_HD_CAPS) ? 1 : 0; 603910605SMin.Xu@Sun.COM 604010605SMin.Xu@Sun.COM Adapter->param_adv_autoneg = hw->mac.autoneg; 604110605SMin.Xu@Sun.COM Adapter->param_adv_pause = 604210605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_PAUSE) ? 1 : 0; 604310605SMin.Xu@Sun.COM Adapter->param_adv_asym_pause = 604410605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_ASM_DIR) ? 1 : 0; 604510605SMin.Xu@Sun.COM Adapter->param_adv_1000hdx = 604610605SMin.Xu@Sun.COM (Adapter->phy_1000t_ctrl & CR_1000T_HD_CAPS) ? 1 : 0; 604710605SMin.Xu@Sun.COM Adapter->param_adv_100t4 = 604810605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_100T4_CAPS) ? 1 : 0; 604910605SMin.Xu@Sun.COM if (Adapter->param_adv_autoneg == 1) { 605010605SMin.Xu@Sun.COM Adapter->param_adv_1000fdx = 605110605SMin.Xu@Sun.COM (Adapter->phy_1000t_ctrl & CR_1000T_FD_CAPS) 605210605SMin.Xu@Sun.COM ? 1 : 0; 605310605SMin.Xu@Sun.COM Adapter->param_adv_100fdx = 605410605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_100TX_FD_CAPS) 605510605SMin.Xu@Sun.COM ? 1 : 0; 605610605SMin.Xu@Sun.COM Adapter->param_adv_100hdx = 605710605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_100TX_HD_CAPS) 605810605SMin.Xu@Sun.COM ? 1 : 0; 605910605SMin.Xu@Sun.COM Adapter->param_adv_10fdx = 606010605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_10T_FD_CAPS) ? 1 : 0; 606110605SMin.Xu@Sun.COM Adapter->param_adv_10hdx = 606210605SMin.Xu@Sun.COM (Adapter->phy_an_adv & NWAY_AR_10T_HD_CAPS) ? 1 : 0; 606310605SMin.Xu@Sun.COM } 606410605SMin.Xu@Sun.COM 606510605SMin.Xu@Sun.COM Adapter->param_lp_autoneg = 606610605SMin.Xu@Sun.COM (Adapter->phy_an_exp & NWAY_ER_LP_NWAY_CAPS) ? 1 : 0; 606710605SMin.Xu@Sun.COM Adapter->param_lp_pause = 606810605SMin.Xu@Sun.COM (Adapter->phy_lp_able & NWAY_LPAR_PAUSE) ? 1 : 0; 606910605SMin.Xu@Sun.COM Adapter->param_lp_asym_pause = 607010605SMin.Xu@Sun.COM (Adapter->phy_lp_able & NWAY_LPAR_ASM_DIR) ? 1 : 0; 607110605SMin.Xu@Sun.COM Adapter->param_lp_1000fdx = 607210605SMin.Xu@Sun.COM (Adapter->phy_1000t_status & SR_1000T_LP_FD_CAPS) ? 1 : 0; 607310605SMin.Xu@Sun.COM Adapter->param_lp_1000hdx = 607410605SMin.Xu@Sun.COM (Adapter->phy_1000t_status & SR_1000T_LP_HD_CAPS) ? 1 : 0; 607510605SMin.Xu@Sun.COM Adapter->param_lp_100t4 = 607610605SMin.Xu@Sun.COM (Adapter->phy_lp_able & NWAY_LPAR_100T4_CAPS) ? 1 : 0; 607710605SMin.Xu@Sun.COM Adapter->param_lp_100fdx = 607810605SMin.Xu@Sun.COM (Adapter->phy_lp_able & NWAY_LPAR_100TX_FD_CAPS) ? 1 : 0; 607910605SMin.Xu@Sun.COM Adapter->param_lp_100hdx = 608010605SMin.Xu@Sun.COM (Adapter->phy_lp_able & NWAY_LPAR_100TX_HD_CAPS) ? 1 : 0; 608110605SMin.Xu@Sun.COM Adapter->param_lp_10fdx = 608210605SMin.Xu@Sun.COM (Adapter->phy_lp_able & NWAY_LPAR_10T_FD_CAPS) ? 1 : 0; 608310605SMin.Xu@Sun.COM Adapter->param_lp_10hdx = 608410605SMin.Xu@Sun.COM (Adapter->phy_lp_able & NWAY_LPAR_10T_HD_CAPS) ? 1 : 0; 608510605SMin.Xu@Sun.COM } else { 608610605SMin.Xu@Sun.COM /* 608710605SMin.Xu@Sun.COM * 1Gig Fiber adapter only offers 1Gig Full Duplex. Meaning, 608810605SMin.Xu@Sun.COM * it can only work with 1Gig Full Duplex Link Partner. 608910605SMin.Xu@Sun.COM */ 609010605SMin.Xu@Sun.COM Adapter->param_autoneg_cap = 0; 609110605SMin.Xu@Sun.COM Adapter->param_pause_cap = 1; 609210605SMin.Xu@Sun.COM Adapter->param_asym_pause_cap = 1; 609310605SMin.Xu@Sun.COM Adapter->param_1000fdx_cap = 1; 609410605SMin.Xu@Sun.COM Adapter->param_1000hdx_cap = 0; 609510605SMin.Xu@Sun.COM Adapter->param_100t4_cap = 0; 609610605SMin.Xu@Sun.COM Adapter->param_100fdx_cap = 0; 609710605SMin.Xu@Sun.COM Adapter->param_100hdx_cap = 0; 609810605SMin.Xu@Sun.COM Adapter->param_10fdx_cap = 0; 609910605SMin.Xu@Sun.COM Adapter->param_10hdx_cap = 0; 610010605SMin.Xu@Sun.COM 610110605SMin.Xu@Sun.COM Adapter->param_adv_autoneg = 0; 610210605SMin.Xu@Sun.COM Adapter->param_adv_pause = 1; 610310605SMin.Xu@Sun.COM Adapter->param_adv_asym_pause = 1; 610410605SMin.Xu@Sun.COM Adapter->param_adv_1000fdx = 1; 610510605SMin.Xu@Sun.COM Adapter->param_adv_1000hdx = 0; 610610605SMin.Xu@Sun.COM Adapter->param_adv_100t4 = 0; 610710605SMin.Xu@Sun.COM Adapter->param_adv_100fdx = 0; 610810605SMin.Xu@Sun.COM Adapter->param_adv_100hdx = 0; 610910605SMin.Xu@Sun.COM Adapter->param_adv_10fdx = 0; 611010605SMin.Xu@Sun.COM Adapter->param_adv_10hdx = 0; 611110605SMin.Xu@Sun.COM 611210605SMin.Xu@Sun.COM Adapter->param_lp_autoneg = 0; 611310605SMin.Xu@Sun.COM Adapter->param_lp_pause = 0; 611410605SMin.Xu@Sun.COM Adapter->param_lp_asym_pause = 0; 611510605SMin.Xu@Sun.COM Adapter->param_lp_1000fdx = 0; 611610605SMin.Xu@Sun.COM Adapter->param_lp_1000hdx = 0; 611710605SMin.Xu@Sun.COM Adapter->param_lp_100t4 = 0; 611810605SMin.Xu@Sun.COM Adapter->param_lp_100fdx = 0; 611910605SMin.Xu@Sun.COM Adapter->param_lp_100hdx = 0; 612010605SMin.Xu@Sun.COM Adapter->param_lp_10fdx = 0; 612110605SMin.Xu@Sun.COM Adapter->param_lp_10hdx = 0; 612210605SMin.Xu@Sun.COM } 61235082Syy150190 } 61245273Sgl147354 61255273Sgl147354 /* 61265273Sgl147354 * FMA support 61275273Sgl147354 */ 61285273Sgl147354 61295273Sgl147354 int 61305273Sgl147354 e1000g_check_acc_handle(ddi_acc_handle_t handle) 61315273Sgl147354 { 61325273Sgl147354 ddi_fm_error_t de; 61335273Sgl147354 61345273Sgl147354 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 61355273Sgl147354 ddi_fm_acc_err_clear(handle, DDI_FME_VERSION); 61365273Sgl147354 return (de.fme_status); 61375273Sgl147354 } 61385273Sgl147354 61395273Sgl147354 int 61405273Sgl147354 e1000g_check_dma_handle(ddi_dma_handle_t handle) 61415273Sgl147354 { 61425273Sgl147354 ddi_fm_error_t de; 61435273Sgl147354 61445273Sgl147354 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 61455273Sgl147354 return (de.fme_status); 61465273Sgl147354 } 61475273Sgl147354 61485273Sgl147354 /* 61495273Sgl147354 * The IO fault service error handling callback function 61505273Sgl147354 */ 61517426SChenliang.Xu@Sun.COM /* ARGSUSED2 */ 61525273Sgl147354 static int 61535273Sgl147354 e1000g_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 61545273Sgl147354 { 61555273Sgl147354 /* 61565273Sgl147354 * as the driver can always deal with an error in any dma or 61575273Sgl147354 * access handle, we can just return the fme_status value. 61585273Sgl147354 */ 61595273Sgl147354 pci_ereport_post(dip, err, NULL); 61605273Sgl147354 return (err->fme_status); 61615273Sgl147354 } 61625273Sgl147354 61635273Sgl147354 static void 61645273Sgl147354 e1000g_fm_init(struct e1000g *Adapter) 61655273Sgl147354 { 61665273Sgl147354 ddi_iblock_cookie_t iblk; 616711236SStephen.Hanson@Sun.COM int fma_dma_flag; 61685273Sgl147354 61695273Sgl147354 /* Only register with IO Fault Services if we have some capability */ 61705273Sgl147354 if (Adapter->fm_capabilities & DDI_FM_ACCCHK_CAPABLE) { 61715273Sgl147354 e1000g_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; 61725273Sgl147354 } else { 61735273Sgl147354 e1000g_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; 61745273Sgl147354 } 61755273Sgl147354 61765273Sgl147354 if (Adapter->fm_capabilities & DDI_FM_DMACHK_CAPABLE) { 61775273Sgl147354 fma_dma_flag = 1; 61785273Sgl147354 } else { 61795273Sgl147354 fma_dma_flag = 0; 61805273Sgl147354 } 61815273Sgl147354 618211236SStephen.Hanson@Sun.COM (void) e1000g_set_fma_flags(fma_dma_flag); 61835273Sgl147354 61845273Sgl147354 if (Adapter->fm_capabilities) { 61855273Sgl147354 61865273Sgl147354 /* Register capabilities with IO Fault Services */ 61875273Sgl147354 ddi_fm_init(Adapter->dip, &Adapter->fm_capabilities, &iblk); 61885273Sgl147354 61895273Sgl147354 /* 61905273Sgl147354 * Initialize pci ereport capabilities if ereport capable 61915273Sgl147354 */ 61925273Sgl147354 if (DDI_FM_EREPORT_CAP(Adapter->fm_capabilities) || 61935273Sgl147354 DDI_FM_ERRCB_CAP(Adapter->fm_capabilities)) 61945273Sgl147354 pci_ereport_setup(Adapter->dip); 61955273Sgl147354 61965273Sgl147354 /* 61975273Sgl147354 * Register error callback if error callback capable 61985273Sgl147354 */ 61995273Sgl147354 if (DDI_FM_ERRCB_CAP(Adapter->fm_capabilities)) 62005273Sgl147354 ddi_fm_handler_register(Adapter->dip, 62015273Sgl147354 e1000g_fm_error_cb, (void*) Adapter); 62025273Sgl147354 } 62035273Sgl147354 } 62045273Sgl147354 62055273Sgl147354 static void 62065273Sgl147354 e1000g_fm_fini(struct e1000g *Adapter) 62075273Sgl147354 { 62085273Sgl147354 /* Only unregister FMA capabilities if we registered some */ 62095273Sgl147354 if (Adapter->fm_capabilities) { 62105273Sgl147354 62115273Sgl147354 /* 62125273Sgl147354 * Release any resources allocated by pci_ereport_setup() 62135273Sgl147354 */ 62145273Sgl147354 if (DDI_FM_EREPORT_CAP(Adapter->fm_capabilities) || 62155273Sgl147354 DDI_FM_ERRCB_CAP(Adapter->fm_capabilities)) 62165273Sgl147354 pci_ereport_teardown(Adapter->dip); 62175273Sgl147354 62185273Sgl147354 /* 62195273Sgl147354 * Un-register error callback if error callback capable 62205273Sgl147354 */ 62215273Sgl147354 if (DDI_FM_ERRCB_CAP(Adapter->fm_capabilities)) 62225273Sgl147354 ddi_fm_handler_unregister(Adapter->dip); 62235273Sgl147354 62245273Sgl147354 /* Unregister from IO Fault Services */ 62258949SChangqing.Li@Sun.COM mutex_enter(&e1000g_rx_detach_lock); 62265273Sgl147354 ddi_fm_fini(Adapter->dip); 62278949SChangqing.Li@Sun.COM if (Adapter->priv_dip != NULL) { 62288949SChangqing.Li@Sun.COM DEVI(Adapter->priv_dip)->devi_fmhdl = NULL; 62298949SChangqing.Li@Sun.COM } 62308949SChangqing.Li@Sun.COM mutex_exit(&e1000g_rx_detach_lock); 62315273Sgl147354 } 62325273Sgl147354 } 62335273Sgl147354 62345273Sgl147354 void 62355273Sgl147354 e1000g_fm_ereport(struct e1000g *Adapter, char *detail) 62365273Sgl147354 { 62375273Sgl147354 uint64_t ena; 62385273Sgl147354 char buf[FM_MAX_CLASS]; 62395273Sgl147354 62405273Sgl147354 (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail); 62415273Sgl147354 ena = fm_ena_generate(0, FM_ENA_FMT1); 62425273Sgl147354 if (DDI_FM_EREPORT_CAP(Adapter->fm_capabilities)) { 62435273Sgl147354 ddi_fm_ereport_post(Adapter->dip, buf, ena, DDI_NOSLEEP, 62445273Sgl147354 FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERS0, NULL); 62455273Sgl147354 } 62465273Sgl147354 } 62476512Ssowmini 62487656SSherry.Moore@Sun.COM /* 62497656SSherry.Moore@Sun.COM * quiesce(9E) entry point. 62507656SSherry.Moore@Sun.COM * 62517656SSherry.Moore@Sun.COM * This function is called when the system is single-threaded at high 62527656SSherry.Moore@Sun.COM * PIL with preemption disabled. Therefore, this function must not be 62537656SSherry.Moore@Sun.COM * blocked. 62547656SSherry.Moore@Sun.COM * 62557656SSherry.Moore@Sun.COM * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure. 62567656SSherry.Moore@Sun.COM * DDI_FAILURE indicates an error condition and should almost never happen. 62577656SSherry.Moore@Sun.COM */ 62587656SSherry.Moore@Sun.COM static int 62597656SSherry.Moore@Sun.COM e1000g_quiesce(dev_info_t *devinfo) 62607656SSherry.Moore@Sun.COM { 62617656SSherry.Moore@Sun.COM struct e1000g *Adapter; 62627656SSherry.Moore@Sun.COM 62637656SSherry.Moore@Sun.COM Adapter = (struct e1000g *)ddi_get_driver_private(devinfo); 62647656SSherry.Moore@Sun.COM 62657656SSherry.Moore@Sun.COM if (Adapter == NULL) 62667656SSherry.Moore@Sun.COM return (DDI_FAILURE); 62677656SSherry.Moore@Sun.COM 62687656SSherry.Moore@Sun.COM e1000g_clear_all_interrupts(Adapter); 62697656SSherry.Moore@Sun.COM 62707656SSherry.Moore@Sun.COM (void) e1000_reset_hw(&Adapter->shared); 62717656SSherry.Moore@Sun.COM 62727656SSherry.Moore@Sun.COM /* Setup our HW Tx Head & Tail descriptor pointers */ 62737656SSherry.Moore@Sun.COM E1000_WRITE_REG(&Adapter->shared, E1000_TDH(0), 0); 62747656SSherry.Moore@Sun.COM E1000_WRITE_REG(&Adapter->shared, E1000_TDT(0), 0); 62757656SSherry.Moore@Sun.COM 62767656SSherry.Moore@Sun.COM /* Setup our HW Rx Head & Tail descriptor pointers */ 62777656SSherry.Moore@Sun.COM E1000_WRITE_REG(&Adapter->shared, E1000_RDH(0), 0); 62787656SSherry.Moore@Sun.COM E1000_WRITE_REG(&Adapter->shared, E1000_RDT(0), 0); 62797656SSherry.Moore@Sun.COM 62807656SSherry.Moore@Sun.COM return (DDI_SUCCESS); 62817656SSherry.Moore@Sun.COM } 62827656SSherry.Moore@Sun.COM 62836512Ssowmini static int 62846512Ssowmini e1000g_get_def_val(struct e1000g *Adapter, mac_prop_id_t pr_num, 62856512Ssowmini uint_t pr_valsize, void *pr_val) 62866512Ssowmini { 62876512Ssowmini link_flowctrl_t fl; 628810605SMin.Xu@Sun.COM struct e1000_hw *hw = &Adapter->shared; 62896512Ssowmini int err = 0; 62906512Ssowmini 62916512Ssowmini ASSERT(pr_valsize > 0); 62926512Ssowmini switch (pr_num) { 62936789Sam223141 case MAC_PROP_AUTONEG: 629410605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 629510605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 0; 629610605SMin.Xu@Sun.COM else 629710605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 629810605SMin.Xu@Sun.COM ((Adapter->phy_status & MII_SR_AUTONEG_CAPS) 629910605SMin.Xu@Sun.COM ? 1 : 0); 63006512Ssowmini break; 63016789Sam223141 case MAC_PROP_FLOWCTRL: 63026512Ssowmini if (pr_valsize < sizeof (link_flowctrl_t)) 63036512Ssowmini return (EINVAL); 63046512Ssowmini fl = LINK_FLOWCTRL_BI; 63056512Ssowmini bcopy(&fl, pr_val, sizeof (fl)); 63066512Ssowmini break; 63076789Sam223141 case MAC_PROP_ADV_1000FDX_CAP: 63086789Sam223141 case MAC_PROP_EN_1000FDX_CAP: 630910605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 631010605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 1; 631110605SMin.Xu@Sun.COM else 631210605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 631310605SMin.Xu@Sun.COM ((Adapter->phy_ext_status & 631410605SMin.Xu@Sun.COM IEEE_ESR_1000T_FD_CAPS) || 631510605SMin.Xu@Sun.COM (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS)) 631610605SMin.Xu@Sun.COM ? 1 : 0; 63176512Ssowmini break; 63186789Sam223141 case MAC_PROP_ADV_1000HDX_CAP: 63196789Sam223141 case MAC_PROP_EN_1000HDX_CAP: 632010605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 0; 63216512Ssowmini break; 63226789Sam223141 case MAC_PROP_ADV_100FDX_CAP: 63236789Sam223141 case MAC_PROP_EN_100FDX_CAP: 632410605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 632510605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 0; 632610605SMin.Xu@Sun.COM else 632710605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 632810605SMin.Xu@Sun.COM ((Adapter->phy_status & MII_SR_100X_FD_CAPS) || 632910605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_100T2_FD_CAPS)) 633010605SMin.Xu@Sun.COM ? 1 : 0; 63317426SChenliang.Xu@Sun.COM break; 63326789Sam223141 case MAC_PROP_ADV_100HDX_CAP: 63336789Sam223141 case MAC_PROP_EN_100HDX_CAP: 633410605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 633510605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 0; 633610605SMin.Xu@Sun.COM else 633710605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 633810605SMin.Xu@Sun.COM ((Adapter->phy_status & MII_SR_100X_HD_CAPS) || 633910605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_100T2_HD_CAPS)) 634010605SMin.Xu@Sun.COM ? 1 : 0; 63416512Ssowmini break; 63426789Sam223141 case MAC_PROP_ADV_10FDX_CAP: 63436789Sam223141 case MAC_PROP_EN_10FDX_CAP: 634410605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 634510605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 0; 634610605SMin.Xu@Sun.COM else 634710605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 634810605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_10T_FD_CAPS) ? 1 : 0; 63496512Ssowmini break; 63506789Sam223141 case MAC_PROP_ADV_10HDX_CAP: 63516789Sam223141 case MAC_PROP_EN_10HDX_CAP: 635210605SMin.Xu@Sun.COM if (hw->phy.media_type != e1000_media_type_copper) 635310605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 0; 635410605SMin.Xu@Sun.COM else 635510605SMin.Xu@Sun.COM *(uint8_t *)pr_val = 635610605SMin.Xu@Sun.COM (Adapter->phy_status & MII_SR_10T_HD_CAPS) ? 1 : 0; 63576512Ssowmini break; 63586512Ssowmini default: 63596512Ssowmini err = ENOTSUP; 63606512Ssowmini break; 63616512Ssowmini } 63626512Ssowmini return (err); 63636512Ssowmini } 63646512Ssowmini 63656512Ssowmini /* 63666512Ssowmini * synchronize the adv* and en* parameters. 63676512Ssowmini * 63686512Ssowmini * See comments in <sys/dld.h> for details of the *_en_* 63696512Ssowmini * parameters. The usage of ndd for setting adv parameters will 63706512Ssowmini * synchronize all the en parameters with the e1000g parameters, 63717607STed.You@Sun.COM * implicitly disabling any settings made via dladm. 63726512Ssowmini */ 63736512Ssowmini static void 63746512Ssowmini e1000g_param_sync(struct e1000g *Adapter) 63756512Ssowmini { 63766512Ssowmini Adapter->param_en_1000fdx = Adapter->param_adv_1000fdx; 63776512Ssowmini Adapter->param_en_1000hdx = Adapter->param_adv_1000hdx; 63786512Ssowmini Adapter->param_en_100fdx = Adapter->param_adv_100fdx; 63796512Ssowmini Adapter->param_en_100hdx = Adapter->param_adv_100hdx; 63806512Ssowmini Adapter->param_en_10fdx = Adapter->param_adv_10fdx; 63816512Ssowmini Adapter->param_en_10hdx = Adapter->param_adv_10hdx; 63826512Ssowmini } 63837607STed.You@Sun.COM 63847607STed.You@Sun.COM /* 63857607STed.You@Sun.COM * e1000g_get_driver_control - tell manageability firmware that the driver 63867607STed.You@Sun.COM * has control. 63877607STed.You@Sun.COM */ 63887607STed.You@Sun.COM static void 63897607STed.You@Sun.COM e1000g_get_driver_control(struct e1000_hw *hw) 63907607STed.You@Sun.COM { 63917607STed.You@Sun.COM uint32_t ctrl_ext; 63927607STed.You@Sun.COM uint32_t swsm; 63937607STed.You@Sun.COM 63947607STed.You@Sun.COM /* tell manageability firmware the driver has taken over */ 63957607STed.You@Sun.COM switch (hw->mac.type) { 63967607STed.You@Sun.COM case e1000_82573: 63977607STed.You@Sun.COM swsm = E1000_READ_REG(hw, E1000_SWSM); 63987607STed.You@Sun.COM E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_DRV_LOAD); 63997607STed.You@Sun.COM break; 64007607STed.You@Sun.COM case e1000_82571: 64017607STed.You@Sun.COM case e1000_82572: 64027607STed.You@Sun.COM case e1000_82574: 64037607STed.You@Sun.COM case e1000_80003es2lan: 64047607STed.You@Sun.COM case e1000_ich8lan: 64057607STed.You@Sun.COM case e1000_ich9lan: 64067607STed.You@Sun.COM case e1000_ich10lan: 640710680SMin.Xu@Sun.COM case e1000_pchlan: 64087607STed.You@Sun.COM ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); 64097607STed.You@Sun.COM E1000_WRITE_REG(hw, E1000_CTRL_EXT, 64107607STed.You@Sun.COM ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 64117607STed.You@Sun.COM break; 64127607STed.You@Sun.COM default: 64137607STed.You@Sun.COM /* no manageability firmware: do nothing */ 64147607STed.You@Sun.COM break; 64157607STed.You@Sun.COM } 64167607STed.You@Sun.COM } 64177607STed.You@Sun.COM 64187607STed.You@Sun.COM /* 64197607STed.You@Sun.COM * e1000g_release_driver_control - tell manageability firmware that the driver 64207607STed.You@Sun.COM * has released control. 64217607STed.You@Sun.COM */ 64227607STed.You@Sun.COM static void 64237607STed.You@Sun.COM e1000g_release_driver_control(struct e1000_hw *hw) 64247607STed.You@Sun.COM { 64257607STed.You@Sun.COM uint32_t ctrl_ext; 64267607STed.You@Sun.COM uint32_t swsm; 64277607STed.You@Sun.COM 64287607STed.You@Sun.COM /* tell manageability firmware the driver has released control */ 64297607STed.You@Sun.COM switch (hw->mac.type) { 64307607STed.You@Sun.COM case e1000_82573: 64317607STed.You@Sun.COM swsm = E1000_READ_REG(hw, E1000_SWSM); 64327607STed.You@Sun.COM E1000_WRITE_REG(hw, E1000_SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 64337607STed.You@Sun.COM break; 64347607STed.You@Sun.COM case e1000_82571: 64357607STed.You@Sun.COM case e1000_82572: 64367607STed.You@Sun.COM case e1000_82574: 64377607STed.You@Sun.COM case e1000_80003es2lan: 64387607STed.You@Sun.COM case e1000_ich8lan: 64397607STed.You@Sun.COM case e1000_ich9lan: 64407607STed.You@Sun.COM case e1000_ich10lan: 644110680SMin.Xu@Sun.COM case e1000_pchlan: 64427607STed.You@Sun.COM ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); 64437607STed.You@Sun.COM E1000_WRITE_REG(hw, E1000_CTRL_EXT, 64447607STed.You@Sun.COM ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 64457607STed.You@Sun.COM break; 64467607STed.You@Sun.COM default: 64477607STed.You@Sun.COM /* no manageability firmware: do nothing */ 64487607STed.You@Sun.COM break; 64497607STed.You@Sun.COM } 64507607STed.You@Sun.COM } 64517722SShuguo.Yang@Sun.COM 64527722SShuguo.Yang@Sun.COM /* 64537722SShuguo.Yang@Sun.COM * Restore e1000g promiscuous mode. 64547722SShuguo.Yang@Sun.COM */ 64557722SShuguo.Yang@Sun.COM static void 64567722SShuguo.Yang@Sun.COM e1000g_restore_promisc(struct e1000g *Adapter) 64577722SShuguo.Yang@Sun.COM { 64587722SShuguo.Yang@Sun.COM if (Adapter->e1000g_promisc) { 64597722SShuguo.Yang@Sun.COM uint32_t rctl; 64607722SShuguo.Yang@Sun.COM 64617722SShuguo.Yang@Sun.COM rctl = E1000_READ_REG(&Adapter->shared, E1000_RCTL); 64627722SShuguo.Yang@Sun.COM rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_BAM); 64637722SShuguo.Yang@Sun.COM E1000_WRITE_REG(&Adapter->shared, E1000_RCTL, rctl); 64647722SShuguo.Yang@Sun.COM } 64657722SShuguo.Yang@Sun.COM } 6466