xref: /onnv-gate/usr/src/uts/common/io/e1000g/e1000g_main.c (revision 11236:1127b4f9e96b)
13526Sxy150489 /*
23526Sxy150489  * This file is provided under a CDDLv1 license.  When using or
33526Sxy150489  * redistributing this file, you may do so under this license.
43526Sxy150489  * In redistributing this file this license must be included
53526Sxy150489  * and no other modification of this header file is permitted.
63526Sxy150489  *
73526Sxy150489  * CDDL LICENSE SUMMARY
83526Sxy150489  *
98479SChenlu.Chen@Sun.COM  * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
103526Sxy150489  *
113526Sxy150489  * The contents of this file are subject to the terms of Version
123526Sxy150489  * 1.0 of the Common Development and Distribution License (the "License").
133526Sxy150489  *
143526Sxy150489  * You should have received a copy of the License with this software.
153526Sxy150489  * You can obtain a copy of the License at
163526Sxy150489  *	http://www.opensolaris.org/os/licensing.
173526Sxy150489  * See the License for the specific language governing permissions
183526Sxy150489  * and limitations under the License.
193526Sxy150489  */
203526Sxy150489 
213526Sxy150489 /*
228479SChenlu.Chen@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
238118SVasumathi.Sundaram@Sun.COM  * Use is subject to license terms.
243526Sxy150489  */
253526Sxy150489 
263526Sxy150489 /*
273526Sxy150489  * **********************************************************************
283526Sxy150489  *									*
293526Sxy150489  * Module Name:								*
303526Sxy150489  *   e1000g_main.c							*
313526Sxy150489  *									*
323526Sxy150489  * Abstract:								*
334919Sxy150489  *   This file contains the interface routines for the solaris OS.	*
344919Sxy150489  *   It has all DDI entry point routines and GLD entry point routines.	*
353526Sxy150489  *									*
364919Sxy150489  *   This file also contains routines that take care of initialization	*
374919Sxy150489  *   uninit routine and interrupt routine.				*
383526Sxy150489  *									*
393526Sxy150489  * **********************************************************************
403526Sxy150489  */
413526Sxy150489 
423526Sxy150489 #include <sys/dlpi.h>
433526Sxy150489 #include <sys/mac.h>
443526Sxy150489 #include "e1000g_sw.h"
453526Sxy150489 #include "e1000g_debug.h"
463526Sxy150489 
477656SSherry.Moore@Sun.COM static char ident[] = "Intel PRO/1000 Ethernet";
483526Sxy150489 static char e1000g_string[] = "Intel(R) PRO/1000 Network Connection";
4911143SGuoqing.Zhu@Sun.COM static char e1000g_version[] = "Driver Ver. 5.3.18";
503526Sxy150489 
513526Sxy150489 /*
523526Sxy150489  * Proto types for DDI entry points
533526Sxy150489  */
544919Sxy150489 static int e1000g_attach(dev_info_t *, ddi_attach_cmd_t);
554919Sxy150489 static int e1000g_detach(dev_info_t *, ddi_detach_cmd_t);
567656SSherry.Moore@Sun.COM static int e1000g_quiesce(dev_info_t *);
573526Sxy150489 
583526Sxy150489 /*
593526Sxy150489  * init and intr routines prototype
603526Sxy150489  */
614919Sxy150489 static int e1000g_resume(dev_info_t *);
624919Sxy150489 static int e1000g_suspend(dev_info_t *);
633526Sxy150489 static uint_t e1000g_intr_pciexpress(caddr_t);
643526Sxy150489 static uint_t e1000g_intr(caddr_t);
653526Sxy150489 static void e1000g_intr_work(struct e1000g *, uint32_t);
663526Sxy150489 #pragma inline(e1000g_intr_work)
673526Sxy150489 static int e1000g_init(struct e1000g *);
684919Sxy150489 static int e1000g_start(struct e1000g *, boolean_t);
694919Sxy150489 static void e1000g_stop(struct e1000g *, boolean_t);
703526Sxy150489 static int e1000g_m_start(void *);
713526Sxy150489 static void e1000g_m_stop(void *);
723526Sxy150489 static int e1000g_m_promisc(void *, boolean_t);
733526Sxy150489 static boolean_t e1000g_m_getcapab(void *, mac_capab_t, void *);
743526Sxy150489 static int e1000g_m_multicst(void *, boolean_t, const uint8_t *);
753526Sxy150489 static void e1000g_m_ioctl(void *, queue_t *, mblk_t *);
766394Scc210113 static int e1000g_m_setprop(void *, const char *, mac_prop_id_t,
776394Scc210113     uint_t, const void *);
786394Scc210113 static int e1000g_m_getprop(void *, const char *, mac_prop_id_t,
798118SVasumathi.Sundaram@Sun.COM     uint_t, uint_t, void *, uint_t *);
806394Scc210113 static int e1000g_set_priv_prop(struct e1000g *, const char *, uint_t,
816394Scc210113     const void *);
826394Scc210113 static int e1000g_get_priv_prop(struct e1000g *, const char *, uint_t,
838118SVasumathi.Sundaram@Sun.COM     uint_t, void *, uint_t *);
844919Sxy150489 static void e1000g_init_locks(struct e1000g *);
854919Sxy150489 static void e1000g_destroy_locks(struct e1000g *);
864919Sxy150489 static int e1000g_identify_hardware(struct e1000g *);
874919Sxy150489 static int e1000g_regs_map(struct e1000g *);
884919Sxy150489 static int e1000g_set_driver_params(struct e1000g *);
896394Scc210113 static void e1000g_set_bufsize(struct e1000g *);
904919Sxy150489 static int e1000g_register_mac(struct e1000g *);
914919Sxy150489 static boolean_t e1000g_rx_drain(struct e1000g *);
924919Sxy150489 static boolean_t e1000g_tx_drain(struct e1000g *);
934919Sxy150489 static void e1000g_init_unicst(struct e1000g *);
948275SEric Cheng static int e1000g_unicst_set(struct e1000g *, const uint8_t *, int);
958850SMin.Xu@Sun.COM static int e1000g_alloc_rx_data(struct e1000g *);
969770SChangqing.Li@Sun.COM static void e1000g_release_multicast(struct e1000g *);
9710680SMin.Xu@Sun.COM static void e1000g_pch_limits(struct e1000g *);
9810680SMin.Xu@Sun.COM static uint32_t e1000g_mtu2maxframe(uint32_t);
993526Sxy150489 
1003526Sxy150489 /*
1013526Sxy150489  * Local routines
1023526Sxy150489  */
1037656SSherry.Moore@Sun.COM static boolean_t e1000g_reset_adapter(struct e1000g *);
1044919Sxy150489 static void e1000g_tx_clean(struct e1000g *);
1054919Sxy150489 static void e1000g_rx_clean(struct e1000g *);
1064061Sxy150489 static void e1000g_link_timer(void *);
1074919Sxy150489 static void e1000g_local_timer(void *);
1084061Sxy150489 static boolean_t e1000g_link_check(struct e1000g *);
1093526Sxy150489 static boolean_t e1000g_stall_check(struct e1000g *);
1103526Sxy150489 static void e1000g_smartspeed(struct e1000g *);
1114919Sxy150489 static void e1000g_get_conf(struct e1000g *);
1124919Sxy150489 static int e1000g_get_prop(struct e1000g *, char *, int, int, int);
1134919Sxy150489 static void enable_watchdog_timer(struct e1000g *);
1144919Sxy150489 static void disable_watchdog_timer(struct e1000g *);
1154919Sxy150489 static void start_watchdog_timer(struct e1000g *);
1164919Sxy150489 static void restart_watchdog_timer(struct e1000g *);
1174919Sxy150489 static void stop_watchdog_timer(struct e1000g *);
1184919Sxy150489 static void stop_link_timer(struct e1000g *);
1194919Sxy150489 static void stop_82547_timer(e1000g_tx_ring_t *);
1204919Sxy150489 static void e1000g_force_speed_duplex(struct e1000g *);
12110680SMin.Xu@Sun.COM static void e1000g_setup_max_mtu(struct e1000g *);
1224919Sxy150489 static void e1000g_get_max_frame_size(struct e1000g *);
1234919Sxy150489 static boolean_t is_valid_mac_addr(uint8_t *);
1243526Sxy150489 static void e1000g_unattach(dev_info_t *, struct e1000g *);
1254919Sxy150489 #ifdef E1000G_DEBUG
1264919Sxy150489 static void e1000g_ioc_peek_reg(struct e1000g *, e1000g_peekpoke_t *);
1274919Sxy150489 static void e1000g_ioc_poke_reg(struct e1000g *, e1000g_peekpoke_t *);
1284919Sxy150489 static void e1000g_ioc_peek_mem(struct e1000g *, e1000g_peekpoke_t *);
1294919Sxy150489 static void e1000g_ioc_poke_mem(struct e1000g *, e1000g_peekpoke_t *);
1304919Sxy150489 static enum ioc_reply e1000g_pp_ioctl(struct e1000g *,
1314919Sxy150489     struct iocblk *, mblk_t *);
1324919Sxy150489 #endif
1334919Sxy150489 static enum ioc_reply e1000g_loopback_ioctl(struct e1000g *,
1344919Sxy150489     struct iocblk *, mblk_t *);
1357133Scc210113 static boolean_t e1000g_check_loopback_support(struct e1000_hw *);
1364919Sxy150489 static boolean_t e1000g_set_loopback_mode(struct e1000g *, uint32_t);
1374919Sxy150489 static void e1000g_set_internal_loopback(struct e1000g *);
1384919Sxy150489 static void e1000g_set_external_loopback_1000(struct e1000g *);
1394919Sxy150489 static void e1000g_set_external_loopback_100(struct e1000g *);
1404919Sxy150489 static void e1000g_set_external_loopback_10(struct e1000g *);
1414919Sxy150489 static int e1000g_add_intrs(struct e1000g *);
1424919Sxy150489 static int e1000g_intr_add(struct e1000g *, int);
1434919Sxy150489 static int e1000g_rem_intrs(struct e1000g *);
1444919Sxy150489 static int e1000g_enable_intrs(struct e1000g *);
1454919Sxy150489 static int e1000g_disable_intrs(struct e1000g *);
1464919Sxy150489 static boolean_t e1000g_link_up(struct e1000g *);
1473526Sxy150489 #ifdef __sparc
1484919Sxy150489 static boolean_t e1000g_find_mac_address(struct e1000g *);
1493526Sxy150489 #endif
1505082Syy150190 static void e1000g_get_phy_state(struct e1000g *);
1515273Sgl147354 static int e1000g_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err,
1525273Sgl147354     const void *impl_data);
1535273Sgl147354 static void e1000g_fm_init(struct e1000g *Adapter);
1545273Sgl147354 static void e1000g_fm_fini(struct e1000g *Adapter);
1556512Ssowmini static int e1000g_get_def_val(struct e1000g *, mac_prop_id_t, uint_t, void *);
1566512Ssowmini static void e1000g_param_sync(struct e1000g *);
1577607STed.You@Sun.COM static void e1000g_get_driver_control(struct e1000_hw *);
1587607STed.You@Sun.COM static void e1000g_release_driver_control(struct e1000_hw *);
1597722SShuguo.Yang@Sun.COM static void e1000g_restore_promisc(struct e1000g *Adapter);
1606512Ssowmini 
1616512Ssowmini mac_priv_prop_t e1000g_priv_props[] = {
1626512Ssowmini 	{"_tx_bcopy_threshold", MAC_PROP_PERM_RW},
1636512Ssowmini 	{"_tx_interrupt_enable", MAC_PROP_PERM_RW},
1646512Ssowmini 	{"_tx_intr_delay", MAC_PROP_PERM_RW},
1656512Ssowmini 	{"_tx_intr_abs_delay", MAC_PROP_PERM_RW},
1666512Ssowmini 	{"_rx_bcopy_threshold", MAC_PROP_PERM_RW},
1676512Ssowmini 	{"_max_num_rcv_packets", MAC_PROP_PERM_RW},
1686512Ssowmini 	{"_rx_intr_delay", MAC_PROP_PERM_RW},
1696512Ssowmini 	{"_rx_intr_abs_delay", MAC_PROP_PERM_RW},
1706512Ssowmini 	{"_intr_throttling_rate", MAC_PROP_PERM_RW},
1716512Ssowmini 	{"_intr_adaptive", MAC_PROP_PERM_RW},
1726512Ssowmini 	{"_adv_pause_cap", MAC_PROP_PERM_READ},
1736512Ssowmini 	{"_adv_asym_pause_cap", MAC_PROP_PERM_READ},
1746512Ssowmini };
1756512Ssowmini #define	E1000G_MAX_PRIV_PROPS	\
1766512Ssowmini 	(sizeof (e1000g_priv_props)/sizeof (mac_priv_prop_t))
1776512Ssowmini 
1783526Sxy150489 
1793526Sxy150489 static struct cb_ops cb_ws_ops = {
1803526Sxy150489 	nulldev,		/* cb_open */
1813526Sxy150489 	nulldev,		/* cb_close */
1823526Sxy150489 	nodev,			/* cb_strategy */
1833526Sxy150489 	nodev,			/* cb_print */
1843526Sxy150489 	nodev,			/* cb_dump */
1853526Sxy150489 	nodev,			/* cb_read */
1863526Sxy150489 	nodev,			/* cb_write */
1873526Sxy150489 	nodev,			/* cb_ioctl */
1883526Sxy150489 	nodev,			/* cb_devmap */
1893526Sxy150489 	nodev,			/* cb_mmap */
1903526Sxy150489 	nodev,			/* cb_segmap */
1913526Sxy150489 	nochpoll,		/* cb_chpoll */
1923526Sxy150489 	ddi_prop_op,		/* cb_prop_op */
1933526Sxy150489 	NULL,			/* cb_stream */
1943526Sxy150489 	D_MP | D_HOTPLUG,	/* cb_flag */
1953526Sxy150489 	CB_REV,			/* cb_rev */
1963526Sxy150489 	nodev,			/* cb_aread */
1973526Sxy150489 	nodev			/* cb_awrite */
1983526Sxy150489 };
1993526Sxy150489 
2003526Sxy150489 static struct dev_ops ws_ops = {
2013526Sxy150489 	DEVO_REV,		/* devo_rev */
2023526Sxy150489 	0,			/* devo_refcnt */
2033526Sxy150489 	NULL,			/* devo_getinfo */
2043526Sxy150489 	nulldev,		/* devo_identify */
2053526Sxy150489 	nulldev,		/* devo_probe */
2064919Sxy150489 	e1000g_attach,		/* devo_attach */
2074919Sxy150489 	e1000g_detach,		/* devo_detach */
2083526Sxy150489 	nodev,			/* devo_reset */
2093526Sxy150489 	&cb_ws_ops,		/* devo_cb_ops */
2103526Sxy150489 	NULL,			/* devo_bus_ops */
2117656SSherry.Moore@Sun.COM 	ddi_power,		/* devo_power */
2127656SSherry.Moore@Sun.COM 	e1000g_quiesce		/* devo_quiesce */
2133526Sxy150489 };
2143526Sxy150489 
2153526Sxy150489 static struct modldrv modldrv = {
2163526Sxy150489 	&mod_driverops,		/* Type of module.  This one is a driver */
2173526Sxy150489 	ident,			/* Discription string */
2183526Sxy150489 	&ws_ops,		/* driver ops */
2193526Sxy150489 };
2203526Sxy150489 
2213526Sxy150489 static struct modlinkage modlinkage = {
2223526Sxy150489 	MODREV_1, &modldrv, NULL
2233526Sxy150489 };
2243526Sxy150489 
2254919Sxy150489 /* Access attributes for register mapping */
2264919Sxy150489 static ddi_device_acc_attr_t e1000g_regs_acc_attr = {
227*11236SStephen.Hanson@Sun.COM 	DDI_DEVICE_ATTR_V1,
2283526Sxy150489 	DDI_STRUCTURE_LE_ACC,
2293526Sxy150489 	DDI_STRICTORDER_ACC,
2305273Sgl147354 	DDI_FLAGERR_ACC
2313526Sxy150489 };
2323526Sxy150489 
2336394Scc210113 #define	E1000G_M_CALLBACK_FLAGS \
2346394Scc210113 	(MC_IOCTL | MC_GETCAPAB | MC_SETPROP | MC_GETPROP)
2353526Sxy150489 
2363526Sxy150489 static mac_callbacks_t e1000g_m_callbacks = {
2373526Sxy150489 	E1000G_M_CALLBACK_FLAGS,
2383526Sxy150489 	e1000g_m_stat,
2393526Sxy150489 	e1000g_m_start,
2403526Sxy150489 	e1000g_m_stop,
2413526Sxy150489 	e1000g_m_promisc,
2423526Sxy150489 	e1000g_m_multicst,
2438275SEric Cheng 	NULL,
2443526Sxy150489 	e1000g_m_tx,
2453526Sxy150489 	e1000g_m_ioctl,
2466394Scc210113 	e1000g_m_getcapab,
2476394Scc210113 	NULL,
2486394Scc210113 	NULL,
2496394Scc210113 	e1000g_m_setprop,
2506394Scc210113 	e1000g_m_getprop
2513526Sxy150489 };
2523526Sxy150489 
2533526Sxy150489 /*
2543526Sxy150489  * Global variables
2553526Sxy150489  */
2563526Sxy150489 uint32_t e1000g_mblks_pending = 0;
2573526Sxy150489 /*
2584894Syy150190  * Workaround for Dynamic Reconfiguration support, for x86 platform only.
2594349Sxy150489  * Here we maintain a private dev_info list if e1000g_force_detach is
2604349Sxy150489  * enabled. If we force the driver to detach while there are still some
2614349Sxy150489  * rx buffers retained in the upper layer, we have to keep a copy of the
2624349Sxy150489  * dev_info. In some cases (Dynamic Reconfiguration), the dev_info data
2634349Sxy150489  * structure will be freed after the driver is detached. However when we
2644349Sxy150489  * finally free those rx buffers released by the upper layer, we need to
2654349Sxy150489  * refer to the dev_info to free the dma buffers. So we save a copy of
2664894Syy150190  * the dev_info for this purpose. On x86 platform, we assume this copy
2674894Syy150190  * of dev_info is always valid, but on SPARC platform, it could be invalid
2684894Syy150190  * after the system board level DR operation. For this reason, the global
2694894Syy150190  * variable e1000g_force_detach must be B_FALSE on SPARC platform.
2704349Sxy150489  */
2714894Syy150190 #ifdef __sparc
2724894Syy150190 boolean_t e1000g_force_detach = B_FALSE;
2734894Syy150190 #else
2744894Syy150190 boolean_t e1000g_force_detach = B_TRUE;
2754894Syy150190 #endif
2764349Sxy150489 private_devi_list_t *e1000g_private_devi_list = NULL;
2774894Syy150190 
2784349Sxy150489 /*
2798850SMin.Xu@Sun.COM  * The mutex e1000g_rx_detach_lock is defined to protect the processing of
2808850SMin.Xu@Sun.COM  * the private dev_info list, and to serialize the processing of rx buffer
2818850SMin.Xu@Sun.COM  * freeing and rx buffer recycling.
2823526Sxy150489  */
2838850SMin.Xu@Sun.COM kmutex_t e1000g_rx_detach_lock;
2843526Sxy150489 /*
2853526Sxy150489  * The rwlock e1000g_dma_type_lock is defined to protect the global flag
2863526Sxy150489  * e1000g_dma_type. For SPARC, the initial value of the flag is "USE_DVMA".
2873526Sxy150489  * If there are many e1000g instances, the system may run out of DVMA
2883526Sxy150489  * resources during the initialization of the instances, then the flag will
2893526Sxy150489  * be changed to "USE_DMA". Because different e1000g instances are initialized
2903526Sxy150489  * in parallel, we need to use this lock to protect the flag.
2913526Sxy150489  */
2923526Sxy150489 krwlock_t e1000g_dma_type_lock;
2933526Sxy150489 
2947133Scc210113 /*
2957133Scc210113  * The 82546 chipset is a dual-port device, both the ports share one eeprom.
2967133Scc210113  * Based on the information from Intel, the 82546 chipset has some hardware
2977133Scc210113  * problem. When one port is being reset and the other port is trying to
2987133Scc210113  * access the eeprom, it could cause system hang or panic. To workaround this
2997133Scc210113  * hardware problem, we use a global mutex to prevent such operations from
3007133Scc210113  * happening simultaneously on different instances. This workaround is applied
3017133Scc210113  * to all the devices supported by this driver.
3027133Scc210113  */
3037133Scc210113 kmutex_t e1000g_nvm_lock;
3043526Sxy150489 
3053526Sxy150489 /*
3063526Sxy150489  * Loadable module configuration entry points for the driver
3073526Sxy150489  */
3083526Sxy150489 
3093526Sxy150489 /*
3104919Sxy150489  * _init - module initialization
3113526Sxy150489  */
3123526Sxy150489 int
3133526Sxy150489 _init(void)
3143526Sxy150489 {
3153526Sxy150489 	int status;
3163526Sxy150489 
3173526Sxy150489 	mac_init_ops(&ws_ops, WSNAME);
3183526Sxy150489 	status = mod_install(&modlinkage);
3193526Sxy150489 	if (status != DDI_SUCCESS)
3203526Sxy150489 		mac_fini_ops(&ws_ops);
3213526Sxy150489 	else {
3228850SMin.Xu@Sun.COM 		mutex_init(&e1000g_rx_detach_lock, NULL, MUTEX_DRIVER, NULL);
3233526Sxy150489 		rw_init(&e1000g_dma_type_lock, NULL, RW_DRIVER, NULL);
3247133Scc210113 		mutex_init(&e1000g_nvm_lock, NULL, MUTEX_DRIVER, NULL);
3253526Sxy150489 	}
3263526Sxy150489 
3273526Sxy150489 	return (status);
3283526Sxy150489 }
3293526Sxy150489 
3303526Sxy150489 /*
3314919Sxy150489  * _fini - module finalization
3323526Sxy150489  */
3333526Sxy150489 int
3343526Sxy150489 _fini(void)
3353526Sxy150489 {
3363526Sxy150489 	int status;
3373526Sxy150489 
3388850SMin.Xu@Sun.COM 	if (e1000g_mblks_pending != 0)
3393526Sxy150489 		return (EBUSY);
3403526Sxy150489 
3413526Sxy150489 	status = mod_remove(&modlinkage);
3423526Sxy150489 	if (status == DDI_SUCCESS) {
3433526Sxy150489 		mac_fini_ops(&ws_ops);
3444349Sxy150489 
3454349Sxy150489 		if (e1000g_force_detach) {
3464349Sxy150489 			private_devi_list_t *devi_node;
3474349Sxy150489 
3488850SMin.Xu@Sun.COM 			mutex_enter(&e1000g_rx_detach_lock);
3494349Sxy150489 			while (e1000g_private_devi_list != NULL) {
3504349Sxy150489 				devi_node = e1000g_private_devi_list;
3514349Sxy150489 				e1000g_private_devi_list =
3524349Sxy150489 				    e1000g_private_devi_list->next;
3534349Sxy150489 
3544349Sxy150489 				kmem_free(devi_node->priv_dip,
3554349Sxy150489 				    sizeof (struct dev_info));
3564349Sxy150489 				kmem_free(devi_node,
3574349Sxy150489 				    sizeof (private_devi_list_t));
3584349Sxy150489 			}
3598850SMin.Xu@Sun.COM 			mutex_exit(&e1000g_rx_detach_lock);
3604349Sxy150489 		}
3614349Sxy150489 
3628850SMin.Xu@Sun.COM 		mutex_destroy(&e1000g_rx_detach_lock);
3633526Sxy150489 		rw_destroy(&e1000g_dma_type_lock);
3647133Scc210113 		mutex_destroy(&e1000g_nvm_lock);
3653526Sxy150489 	}
3663526Sxy150489 
3673526Sxy150489 	return (status);
3683526Sxy150489 }
3693526Sxy150489 
3703526Sxy150489 /*
3714919Sxy150489  * _info - module information
3723526Sxy150489  */
3733526Sxy150489 int
3743526Sxy150489 _info(struct modinfo *modinfop)
3753526Sxy150489 {
3763526Sxy150489 	return (mod_info(&modlinkage, modinfop));
3773526Sxy150489 }
3783526Sxy150489 
3793526Sxy150489 /*
3804919Sxy150489  * e1000g_attach - driver attach
3814919Sxy150489  *
3824919Sxy150489  * This function is the device-specific initialization entry
3834919Sxy150489  * point. This entry point is required and must be written.
3844919Sxy150489  * The DDI_ATTACH command must be provided in the attach entry
3854919Sxy150489  * point. When attach() is called with cmd set to DDI_ATTACH,
3864919Sxy150489  * all normal kernel services (such as kmem_alloc(9F)) are
3874919Sxy150489  * available for use by the driver.
3884919Sxy150489  *
3894919Sxy150489  * The attach() function will be called once for each instance
3904919Sxy150489  * of  the  device  on  the  system with cmd set to DDI_ATTACH.
3914919Sxy150489  * Until attach() succeeds, the only driver entry points which
3924919Sxy150489  * may be called are open(9E) and getinfo(9E).
3933526Sxy150489  */
3943526Sxy150489 static int
3954919Sxy150489 e1000g_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd)
3963526Sxy150489 {
3973526Sxy150489 	struct e1000g *Adapter;
3983526Sxy150489 	struct e1000_hw *hw;
3994919Sxy150489 	struct e1000g_osdep *osdep;
4003526Sxy150489 	int instance;
4013526Sxy150489 
4023526Sxy150489 	switch (cmd) {
4033526Sxy150489 	default:
4043526Sxy150489 		e1000g_log(NULL, CE_WARN,
4054919Sxy150489 		    "Unsupported command send to e1000g_attach... ");
4063526Sxy150489 		return (DDI_FAILURE);
4073526Sxy150489 
4083526Sxy150489 	case DDI_RESUME:
4093526Sxy150489 		return (e1000g_resume(devinfo));
4103526Sxy150489 
4113526Sxy150489 	case DDI_ATTACH:
4123526Sxy150489 		break;
4133526Sxy150489 	}
4143526Sxy150489 
4153526Sxy150489 	/*
4163526Sxy150489 	 * get device instance number
4173526Sxy150489 	 */
4183526Sxy150489 	instance = ddi_get_instance(devinfo);
4193526Sxy150489 
4203526Sxy150489 	/*
4213526Sxy150489 	 * Allocate soft data structure
4223526Sxy150489 	 */
4233526Sxy150489 	Adapter =
4243526Sxy150489 	    (struct e1000g *)kmem_zalloc(sizeof (*Adapter), KM_SLEEP);
4253526Sxy150489 
4263526Sxy150489 	Adapter->dip = devinfo;
4274919Sxy150489 	Adapter->instance = instance;
4283526Sxy150489 	Adapter->tx_ring->adapter = Adapter;
4293526Sxy150489 	Adapter->rx_ring->adapter = Adapter;
4303526Sxy150489 
4314919Sxy150489 	hw = &Adapter->shared;
4324919Sxy150489 	osdep = &Adapter->osdep;
4334919Sxy150489 	hw->back = osdep;
4344919Sxy150489 	osdep->adapter = Adapter;
4354919Sxy150489 
4363526Sxy150489 	ddi_set_driver_private(devinfo, (caddr_t)Adapter);
4373526Sxy150489 
4384919Sxy150489 	/*
4395273Sgl147354 	 * Initialize for fma support
4405273Sgl147354 	 */
4415273Sgl147354 	Adapter->fm_capabilities = e1000g_get_prop(Adapter, "fm-capable",
4425273Sgl147354 	    0, 0x0f,
4435273Sgl147354 	    DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE |
4445273Sgl147354 	    DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE);
4455273Sgl147354 	e1000g_fm_init(Adapter);
4465273Sgl147354 	Adapter->attach_progress |= ATTACH_PROGRESS_FMINIT;
4475273Sgl147354 
4485273Sgl147354 	/*
4494919Sxy150489 	 * PCI Configure
4504919Sxy150489 	 */
4514919Sxy150489 	if (pci_config_setup(devinfo, &osdep->cfg_handle) != DDI_SUCCESS) {
4524919Sxy150489 		e1000g_log(Adapter, CE_WARN, "PCI configuration failed");
4534919Sxy150489 		goto attach_fail;
4544919Sxy150489 	}
4554919Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_PCI_CONFIG;
4564919Sxy150489 
4574919Sxy150489 	/*
4584919Sxy150489 	 * Setup hardware
4594919Sxy150489 	 */
4604919Sxy150489 	if (e1000g_identify_hardware(Adapter) != DDI_SUCCESS) {
4614919Sxy150489 		e1000g_log(Adapter, CE_WARN, "Identify hardware failed");
4624919Sxy150489 		goto attach_fail;
4634919Sxy150489 	}
4643526Sxy150489 
4653526Sxy150489 	/*
4663526Sxy150489 	 * Map in the device registers.
4673526Sxy150489 	 */
4684919Sxy150489 	if (e1000g_regs_map(Adapter) != DDI_SUCCESS) {
4694919Sxy150489 		e1000g_log(Adapter, CE_WARN, "Mapping registers failed");
4703526Sxy150489 		goto attach_fail;
4713526Sxy150489 	}
4724919Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_REGS_MAP;
4733526Sxy150489 
4743526Sxy150489 	/*
4753526Sxy150489 	 * Initialize driver parameters
4763526Sxy150489 	 */
4773526Sxy150489 	if (e1000g_set_driver_params(Adapter) != DDI_SUCCESS) {
4783526Sxy150489 		goto attach_fail;
4793526Sxy150489 	}
4804919Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_SETUP;
4813526Sxy150489 
4825273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.cfg_handle) != DDI_FM_OK) {
4835273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST);
4845273Sgl147354 		goto attach_fail;
4855273Sgl147354 	}
4865273Sgl147354 
4873526Sxy150489 	/*
4883526Sxy150489 	 * Initialize interrupts
4893526Sxy150489 	 */
4903526Sxy150489 	if (e1000g_add_intrs(Adapter) != DDI_SUCCESS) {
4913526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Add interrupts failed");
4923526Sxy150489 		goto attach_fail;
4933526Sxy150489 	}
4944919Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_ADD_INTR;
4953526Sxy150489 
4963526Sxy150489 	/*
4973526Sxy150489 	 * Initialize mutex's for this device.
4983526Sxy150489 	 * Do this before enabling the interrupt handler and
4993526Sxy150489 	 * register the softint to avoid the condition where
5003526Sxy150489 	 * interrupt handler can try using uninitialized mutex
5013526Sxy150489 	 */
5023526Sxy150489 	e1000g_init_locks(Adapter);
5033526Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_LOCKS;
5043526Sxy150489 
5053526Sxy150489 	/*
5063526Sxy150489 	 * Initialize Driver Counters
5073526Sxy150489 	 */
5084919Sxy150489 	if (e1000g_init_stats(Adapter) != DDI_SUCCESS) {
5093526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Init stats failed");
5103526Sxy150489 		goto attach_fail;
5113526Sxy150489 	}
5123526Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_KSTATS;
5133526Sxy150489 
5143526Sxy150489 	/*
5153526Sxy150489 	 * Initialize chip hardware and software structures
5163526Sxy150489 	 */
5178479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
5183526Sxy150489 	if (e1000g_init(Adapter) != DDI_SUCCESS) {
5198479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
5203526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Adapter initialization failed");
5213526Sxy150489 		goto attach_fail;
5223526Sxy150489 	}
5238479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
5243526Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_INIT;
5253526Sxy150489 
5263526Sxy150489 	/*
5273526Sxy150489 	 * Register the driver to the MAC
5283526Sxy150489 	 */
5293526Sxy150489 	if (e1000g_register_mac(Adapter) != DDI_SUCCESS) {
5303526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Register MAC failed");
5313526Sxy150489 		goto attach_fail;
5323526Sxy150489 	}
5334919Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_MAC;
5343526Sxy150489 
5353526Sxy150489 	/*
5363526Sxy150489 	 * Now that mutex locks are initialized, and the chip is also
5373526Sxy150489 	 * initialized, enable interrupts.
5383526Sxy150489 	 */
5393526Sxy150489 	if (e1000g_enable_intrs(Adapter) != DDI_SUCCESS) {
5403526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Enable DDI interrupts failed");
5413526Sxy150489 		goto attach_fail;
5423526Sxy150489 	}
5434919Sxy150489 	Adapter->attach_progress |= ATTACH_PROGRESS_ENABLE_INTR;
5443526Sxy150489 
5454982Syy150190 	/*
5464982Syy150190 	 * If e1000g_force_detach is enabled, in global private dip list,
5474982Syy150190 	 * we will create a new entry, which maintains the priv_dip for DR
5484982Syy150190 	 * supports after driver detached.
5494982Syy150190 	 */
5504982Syy150190 	if (e1000g_force_detach) {
5514982Syy150190 		private_devi_list_t *devi_node;
5524982Syy150190 
5534982Syy150190 		Adapter->priv_dip =
5544982Syy150190 		    kmem_zalloc(sizeof (struct dev_info), KM_SLEEP);
5554982Syy150190 		bcopy(DEVI(devinfo), DEVI(Adapter->priv_dip),
5564982Syy150190 		    sizeof (struct dev_info));
5574982Syy150190 
5584982Syy150190 		devi_node =
5594982Syy150190 		    kmem_zalloc(sizeof (private_devi_list_t), KM_SLEEP);
5604982Syy150190 
5618850SMin.Xu@Sun.COM 		mutex_enter(&e1000g_rx_detach_lock);
5624982Syy150190 		devi_node->priv_dip = Adapter->priv_dip;
5634982Syy150190 		devi_node->flag = E1000G_PRIV_DEVI_ATTACH;
5648850SMin.Xu@Sun.COM 		devi_node->pending_rx_count = 0;
5658850SMin.Xu@Sun.COM 
5668850SMin.Xu@Sun.COM 		Adapter->priv_devi_node = devi_node;
5678850SMin.Xu@Sun.COM 
5688850SMin.Xu@Sun.COM 		if (e1000g_private_devi_list == NULL) {
5698850SMin.Xu@Sun.COM 			devi_node->prev = NULL;
5708850SMin.Xu@Sun.COM 			devi_node->next = NULL;
5718850SMin.Xu@Sun.COM 			e1000g_private_devi_list = devi_node;
5728850SMin.Xu@Sun.COM 		} else {
5738850SMin.Xu@Sun.COM 			devi_node->prev = NULL;
5748850SMin.Xu@Sun.COM 			devi_node->next = e1000g_private_devi_list;
5758850SMin.Xu@Sun.COM 			e1000g_private_devi_list->prev = devi_node;
5768850SMin.Xu@Sun.COM 			e1000g_private_devi_list = devi_node;
5778850SMin.Xu@Sun.COM 		}
5788850SMin.Xu@Sun.COM 		mutex_exit(&e1000g_rx_detach_lock);
5794982Syy150190 	}
5804982Syy150190 
5813526Sxy150489 	cmn_err(CE_CONT, "!%s, %s\n", e1000g_string, e1000g_version);
5828479SChenlu.Chen@Sun.COM 	Adapter->e1000g_state = E1000G_INITIALIZED;
5833526Sxy150489 
5843526Sxy150489 	return (DDI_SUCCESS);
5853526Sxy150489 
5863526Sxy150489 attach_fail:
5873526Sxy150489 	e1000g_unattach(devinfo, Adapter);
5883526Sxy150489 	return (DDI_FAILURE);
5893526Sxy150489 }
5903526Sxy150489 
5913526Sxy150489 static int
5923526Sxy150489 e1000g_register_mac(struct e1000g *Adapter)
5933526Sxy150489 {
5944919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
5953526Sxy150489 	mac_register_t *mac;
5963526Sxy150489 	int err;
5973526Sxy150489 
5983526Sxy150489 	if ((mac = mac_alloc(MAC_VERSION)) == NULL)
5993526Sxy150489 		return (DDI_FAILURE);
6004919Sxy150489 
6013526Sxy150489 	mac->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
6023526Sxy150489 	mac->m_driver = Adapter;
6033526Sxy150489 	mac->m_dip = Adapter->dip;
6044919Sxy150489 	mac->m_src_addr = hw->mac.addr;
6053526Sxy150489 	mac->m_callbacks = &e1000g_m_callbacks;
6063526Sxy150489 	mac->m_min_sdu = 0;
6076394Scc210113 	mac->m_max_sdu = Adapter->default_mtu;
6085895Syz147064 	mac->m_margin = VLAN_TAGSZ;
6096512Ssowmini 	mac->m_priv_props = e1000g_priv_props;
6106512Ssowmini 	mac->m_priv_prop_count = E1000G_MAX_PRIV_PROPS;
6118275SEric Cheng 	mac->m_v12n = MAC_VIRT_LEVEL1;
6124919Sxy150489 
6133526Sxy150489 	err = mac_register(mac, &Adapter->mh);
6143526Sxy150489 	mac_free(mac);
6154919Sxy150489 
6163526Sxy150489 	return (err == 0 ? DDI_SUCCESS : DDI_FAILURE);
6173526Sxy150489 }
6183526Sxy150489 
6193526Sxy150489 static int
6204919Sxy150489 e1000g_identify_hardware(struct e1000g *Adapter)
6214919Sxy150489 {
6224919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
6234919Sxy150489 	struct e1000g_osdep *osdep = &Adapter->osdep;
6244919Sxy150489 
6254919Sxy150489 	/* Get the device id */
6264919Sxy150489 	hw->vendor_id =
6274919Sxy150489 	    pci_config_get16(osdep->cfg_handle, PCI_CONF_VENID);
6284919Sxy150489 	hw->device_id =
6294919Sxy150489 	    pci_config_get16(osdep->cfg_handle, PCI_CONF_DEVID);
6304919Sxy150489 	hw->revision_id =
6314919Sxy150489 	    pci_config_get8(osdep->cfg_handle, PCI_CONF_REVID);
6324919Sxy150489 	hw->subsystem_device_id =
6334919Sxy150489 	    pci_config_get16(osdep->cfg_handle, PCI_CONF_SUBSYSID);
6344919Sxy150489 	hw->subsystem_vendor_id =
6354919Sxy150489 	    pci_config_get16(osdep->cfg_handle, PCI_CONF_SUBVENID);
6364919Sxy150489 
6374919Sxy150489 	if (e1000_set_mac_type(hw) != E1000_SUCCESS) {
6384919Sxy150489 		E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL,
6394919Sxy150489 		    "MAC type could not be set properly.");
6404919Sxy150489 		return (DDI_FAILURE);
6414919Sxy150489 	}
6424919Sxy150489 
6434919Sxy150489 	return (DDI_SUCCESS);
6444919Sxy150489 }
6454919Sxy150489 
6464919Sxy150489 static int
6474919Sxy150489 e1000g_regs_map(struct e1000g *Adapter)
6484919Sxy150489 {
6494919Sxy150489 	dev_info_t *devinfo = Adapter->dip;
6504919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
6514919Sxy150489 	struct e1000g_osdep *osdep = &Adapter->osdep;
6524919Sxy150489 	off_t mem_size;
6534919Sxy150489 
6547607STed.You@Sun.COM 	/* Get size of adapter register memory */
6557607STed.You@Sun.COM 	if (ddi_dev_regsize(devinfo, ADAPTER_REG_SET, &mem_size) !=
6567607STed.You@Sun.COM 	    DDI_SUCCESS) {
6574919Sxy150489 		E1000G_DEBUGLOG_0(Adapter, CE_WARN,
6584919Sxy150489 		    "ddi_dev_regsize for registers failed");
6594919Sxy150489 		return (DDI_FAILURE);
6604919Sxy150489 	}
6614919Sxy150489 
6627607STed.You@Sun.COM 	/* Map adapter register memory */
6637607STed.You@Sun.COM 	if ((ddi_regs_map_setup(devinfo, ADAPTER_REG_SET,
6644919Sxy150489 	    (caddr_t *)&hw->hw_addr, 0, mem_size, &e1000g_regs_acc_attr,
6654919Sxy150489 	    &osdep->reg_handle)) != DDI_SUCCESS) {
6664919Sxy150489 		E1000G_DEBUGLOG_0(Adapter, CE_WARN,
6674919Sxy150489 		    "ddi_regs_map_setup for registers failed");
6684919Sxy150489 		goto regs_map_fail;
6694919Sxy150489 	}
6704919Sxy150489 
6714919Sxy150489 	/* ICH needs to map flash memory */
6727607STed.You@Sun.COM 	if (hw->mac.type == e1000_ich8lan ||
6737607STed.You@Sun.COM 	    hw->mac.type == e1000_ich9lan ||
67410680SMin.Xu@Sun.COM 	    hw->mac.type == e1000_ich10lan ||
67510680SMin.Xu@Sun.COM 	    hw->mac.type == e1000_pchlan) {
6764919Sxy150489 		/* get flash size */
6774919Sxy150489 		if (ddi_dev_regsize(devinfo, ICH_FLASH_REG_SET,
6784919Sxy150489 		    &mem_size) != DDI_SUCCESS) {
6794919Sxy150489 			E1000G_DEBUGLOG_0(Adapter, CE_WARN,
6804919Sxy150489 			    "ddi_dev_regsize for ICH flash failed");
6814919Sxy150489 			goto regs_map_fail;
6824919Sxy150489 		}
6834919Sxy150489 
6844919Sxy150489 		/* map flash in */
6854919Sxy150489 		if (ddi_regs_map_setup(devinfo, ICH_FLASH_REG_SET,
6864919Sxy150489 		    (caddr_t *)&hw->flash_address, 0,
6874919Sxy150489 		    mem_size, &e1000g_regs_acc_attr,
6884919Sxy150489 		    &osdep->ich_flash_handle) != DDI_SUCCESS) {
6894919Sxy150489 			E1000G_DEBUGLOG_0(Adapter, CE_WARN,
6904919Sxy150489 			    "ddi_regs_map_setup for ICH flash failed");
6914919Sxy150489 			goto regs_map_fail;
6924919Sxy150489 		}
6934919Sxy150489 	}
6944919Sxy150489 
6954919Sxy150489 	return (DDI_SUCCESS);
6964919Sxy150489 
6974919Sxy150489 regs_map_fail:
6984919Sxy150489 	if (osdep->reg_handle != NULL)
6994919Sxy150489 		ddi_regs_map_free(&osdep->reg_handle);
7004919Sxy150489 
7014919Sxy150489 	return (DDI_FAILURE);
7024919Sxy150489 }
7034919Sxy150489 
7044919Sxy150489 static int
7053526Sxy150489 e1000g_set_driver_params(struct e1000g *Adapter)
7063526Sxy150489 {
7073526Sxy150489 	struct e1000_hw *hw;
7084919Sxy150489 	uint32_t mem_bar, io_bar, bar64;
7093526Sxy150489 
7104919Sxy150489 	hw = &Adapter->shared;
7114919Sxy150489 
7124919Sxy150489 	/* Set MAC type and initialize hardware functions */
7134919Sxy150489 	if (e1000_setup_init_funcs(hw, B_TRUE) != E1000_SUCCESS) {
7144919Sxy150489 		E1000G_DEBUGLOG_0(Adapter, CE_WARN,
7154919Sxy150489 		    "Could not setup hardware functions");
7163526Sxy150489 		return (DDI_FAILURE);
7173526Sxy150489 	}
7183526Sxy150489 
7194919Sxy150489 	/* Get bus information */
7204919Sxy150489 	if (e1000_get_bus_info(hw) != E1000_SUCCESS) {
7214919Sxy150489 		E1000G_DEBUGLOG_0(Adapter, CE_WARN,
7224919Sxy150489 		    "Could not get bus information");
7234919Sxy150489 		return (DDI_FAILURE);
7243526Sxy150489 	}
7253526Sxy150489 
7263526Sxy150489 	/* get mem_base addr */
7274919Sxy150489 	mem_bar = pci_config_get32(Adapter->osdep.cfg_handle, PCI_CONF_BASE0);
7284919Sxy150489 	bar64 = mem_bar & PCI_BASE_TYPE_ALL;
7293526Sxy150489 
7303526Sxy150489 	/* get io_base addr */
7314919Sxy150489 	if (hw->mac.type >= e1000_82544) {
7324919Sxy150489 		if (bar64) {
7333526Sxy150489 			/* IO BAR is different for 64 bit BAR mode */
7344919Sxy150489 			io_bar = pci_config_get32(Adapter->osdep.cfg_handle,
7354919Sxy150489 			    PCI_CONF_BASE4);
7363526Sxy150489 		} else {
7373526Sxy150489 			/* normal 32-bit BAR mode */
7384919Sxy150489 			io_bar = pci_config_get32(Adapter->osdep.cfg_handle,
7394919Sxy150489 			    PCI_CONF_BASE2);
7403526Sxy150489 		}
7413526Sxy150489 		hw->io_base = io_bar & PCI_BASE_IO_ADDR_M;
7423526Sxy150489 	} else {
7433526Sxy150489 		/* no I/O access for adapters prior to 82544 */
7443526Sxy150489 		hw->io_base = 0x0;
7453526Sxy150489 	}
7463526Sxy150489 
7474919Sxy150489 	e1000_read_pci_cfg(hw, PCI_COMMAND_REGISTER, &hw->bus.pci_cmd_word);
7484919Sxy150489 
7494919Sxy150489 	hw->mac.autoneg_failed = B_TRUE;
7504919Sxy150489 
7516735Scc210113 	/* Set the autoneg_wait_to_complete flag to B_FALSE */
7526735Scc210113 	hw->phy.autoneg_wait_to_complete = B_FALSE;
7533526Sxy150489 
7543526Sxy150489 	/* Adaptive IFS related changes */
7554919Sxy150489 	hw->mac.adaptive_ifs = B_TRUE;
7564919Sxy150489 
7574919Sxy150489 	/* Enable phy init script for IGP phy of 82541/82547 */
7584919Sxy150489 	if ((hw->mac.type == e1000_82547) ||
7594919Sxy150489 	    (hw->mac.type == e1000_82541) ||
7604919Sxy150489 	    (hw->mac.type == e1000_82547_rev_2) ||
7614919Sxy150489 	    (hw->mac.type == e1000_82541_rev_2))
7624919Sxy150489 		e1000_init_script_state_82541(hw, B_TRUE);
7634919Sxy150489 
7644919Sxy150489 	/* Enable the TTL workaround for 82541/82547 */
7654919Sxy150489 	e1000_set_ttl_workaround_state_82541(hw, B_TRUE);
7663526Sxy150489 
7674608Syy150190 #ifdef __sparc
7684608Syy150190 	Adapter->strip_crc = B_TRUE;
7694608Syy150190 #else
7704608Syy150190 	Adapter->strip_crc = B_FALSE;
7714608Syy150190 #endif
7724608Syy150190 
77310680SMin.Xu@Sun.COM 	/* setup the maximum MTU size of the chip */
77410680SMin.Xu@Sun.COM 	e1000g_setup_max_mtu(Adapter);
77510680SMin.Xu@Sun.COM 
7763526Sxy150489 	/* Get conf file properties */
7774919Sxy150489 	e1000g_get_conf(Adapter);
7784919Sxy150489 
7794919Sxy150489 	/* Get speed/duplex settings in conf file */
7804919Sxy150489 	hw->mac.forced_speed_duplex = ADVERTISE_100_FULL;
7814919Sxy150489 	hw->phy.autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT;
7823526Sxy150489 	e1000g_force_speed_duplex(Adapter);
7833526Sxy150489 
7844919Sxy150489 	/* Get Jumbo Frames settings in conf file */
7853526Sxy150489 	e1000g_get_max_frame_size(Adapter);
7863526Sxy150489 
78710680SMin.Xu@Sun.COM 	/* enforce PCH limits */
78810680SMin.Xu@Sun.COM 	e1000g_pch_limits(Adapter);
78910680SMin.Xu@Sun.COM 
7903526Sxy150489 	/* Set Rx/Tx buffer size */
7916394Scc210113 	e1000g_set_bufsize(Adapter);
7924919Sxy150489 
7934919Sxy150489 	/* Master Latency Timer */
7944919Sxy150489 	Adapter->master_latency_timer = DEFAULT_MASTER_LATENCY_TIMER;
7954919Sxy150489 
7963526Sxy150489 	/* copper options */
7976735Scc210113 	if (hw->phy.media_type == e1000_media_type_copper) {
7984919Sxy150489 		hw->phy.mdix = 0;	/* AUTO_ALL_MODES */
7994919Sxy150489 		hw->phy.disable_polarity_correction = B_FALSE;
8004919Sxy150489 		hw->phy.ms_type = e1000_ms_hw_default;	/* E1000_MASTER_SLAVE */
8013526Sxy150489 	}
8023526Sxy150489 
8034919Sxy150489 	/* The initial link state should be "unknown" */
8044061Sxy150489 	Adapter->link_state = LINK_STATE_UNKNOWN;
8054061Sxy150489 
8065882Syy150190 	/* Initialize rx parameters */
8075882Syy150190 	Adapter->rx_intr_delay = DEFAULT_RX_INTR_DELAY;
8085882Syy150190 	Adapter->rx_intr_abs_delay = DEFAULT_RX_INTR_ABS_DELAY;
8095882Syy150190 
8104919Sxy150489 	/* Initialize tx parameters */
8114919Sxy150489 	Adapter->tx_intr_enable = DEFAULT_TX_INTR_ENABLE;
8124919Sxy150489 	Adapter->tx_bcopy_thresh = DEFAULT_TX_BCOPY_THRESHOLD;
8135882Syy150190 	Adapter->tx_intr_delay = DEFAULT_TX_INTR_DELAY;
8145882Syy150190 	Adapter->tx_intr_abs_delay = DEFAULT_TX_INTR_ABS_DELAY;
8154919Sxy150489 
8164919Sxy150489 	/* Initialize rx parameters */
8174919Sxy150489 	Adapter->rx_bcopy_thresh = DEFAULT_RX_BCOPY_THRESHOLD;
8184919Sxy150489 
8193526Sxy150489 	return (DDI_SUCCESS);
8203526Sxy150489 }
8213526Sxy150489 
8226394Scc210113 static void
82310680SMin.Xu@Sun.COM e1000g_setup_max_mtu(struct e1000g *Adapter)
82410680SMin.Xu@Sun.COM {
82510680SMin.Xu@Sun.COM 	struct e1000_mac_info *mac = &Adapter->shared.mac;
82610680SMin.Xu@Sun.COM 	struct e1000_phy_info *phy = &Adapter->shared.phy;
82710680SMin.Xu@Sun.COM 
82810680SMin.Xu@Sun.COM 	switch (mac->type) {
82910680SMin.Xu@Sun.COM 	/* types that do not support jumbo frames */
83010680SMin.Xu@Sun.COM 	case e1000_ich8lan:
83110680SMin.Xu@Sun.COM 	case e1000_82573:
83210680SMin.Xu@Sun.COM 	case e1000_82583:
83310680SMin.Xu@Sun.COM 		Adapter->max_mtu = ETHERMTU;
83410680SMin.Xu@Sun.COM 		break;
83510680SMin.Xu@Sun.COM 	/* ich9 supports jumbo frames except on one phy type */
83610680SMin.Xu@Sun.COM 	case e1000_ich9lan:
83710680SMin.Xu@Sun.COM 		if (phy->type == e1000_phy_ife)
83810680SMin.Xu@Sun.COM 			Adapter->max_mtu = ETHERMTU;
83910680SMin.Xu@Sun.COM 		else
84010680SMin.Xu@Sun.COM 			Adapter->max_mtu = MAXIMUM_MTU_9K;
84110680SMin.Xu@Sun.COM 		break;
84210680SMin.Xu@Sun.COM 	/* pch can do jumbo frames up to 4K */
84310680SMin.Xu@Sun.COM 	case e1000_pchlan:
84410680SMin.Xu@Sun.COM 		Adapter->max_mtu = MAXIMUM_MTU_4K;
84510680SMin.Xu@Sun.COM 		break;
84610680SMin.Xu@Sun.COM 	/* types with a special limit */
84710680SMin.Xu@Sun.COM 	case e1000_82571:
84810680SMin.Xu@Sun.COM 	case e1000_82572:
84910680SMin.Xu@Sun.COM 	case e1000_82574:
85010680SMin.Xu@Sun.COM 	case e1000_80003es2lan:
85110680SMin.Xu@Sun.COM 	case e1000_ich10lan:
85210680SMin.Xu@Sun.COM 		Adapter->max_mtu = MAXIMUM_MTU_9K;
85310680SMin.Xu@Sun.COM 		break;
85410680SMin.Xu@Sun.COM 	/* default limit is 16K */
85510680SMin.Xu@Sun.COM 	default:
85610680SMin.Xu@Sun.COM 		Adapter->max_mtu = FRAME_SIZE_UPTO_16K -
85710680SMin.Xu@Sun.COM 		    sizeof (struct ether_vlan_header) - ETHERFCSL -
85810680SMin.Xu@Sun.COM 		    E1000G_IPALIGNPRESERVEROOM;
85910680SMin.Xu@Sun.COM 		break;
86010680SMin.Xu@Sun.COM 	}
86110680SMin.Xu@Sun.COM }
86210680SMin.Xu@Sun.COM 
86310680SMin.Xu@Sun.COM static void
8646394Scc210113 e1000g_set_bufsize(struct e1000g *Adapter)
8656394Scc210113 {
8666394Scc210113 	struct e1000_mac_info *mac = &Adapter->shared.mac;
8676394Scc210113 	uint64_t rx_size;
8686394Scc210113 	uint64_t tx_size;
8696394Scc210113 
8708073SMin.Xu@Sun.COM 	dev_info_t *devinfo = Adapter->dip;
8716394Scc210113 #ifdef __sparc
8726394Scc210113 	ulong_t iommu_pagesize;
8738073SMin.Xu@Sun.COM #endif
8746394Scc210113 	/* Get the system page size */
8756394Scc210113 	Adapter->sys_page_sz = ddi_ptob(devinfo, (ulong_t)1);
8768073SMin.Xu@Sun.COM 
8778073SMin.Xu@Sun.COM #ifdef __sparc
8786394Scc210113 	iommu_pagesize = dvma_pagesize(devinfo);
8796394Scc210113 	if (iommu_pagesize != 0) {
8806394Scc210113 		if (Adapter->sys_page_sz == iommu_pagesize) {
8816394Scc210113 			if (iommu_pagesize > 0x4000)
8826394Scc210113 				Adapter->sys_page_sz = 0x4000;
8836394Scc210113 		} else {
8846394Scc210113 			if (Adapter->sys_page_sz > iommu_pagesize)
8856394Scc210113 				Adapter->sys_page_sz = iommu_pagesize;
8866394Scc210113 		}
8876394Scc210113 	}
8886986Smx205022 	if (Adapter->lso_enable) {
8896986Smx205022 		Adapter->dvma_page_num = E1000_LSO_MAXLEN /
8906986Smx205022 		    Adapter->sys_page_sz + E1000G_DEFAULT_DVMA_PAGE_NUM;
8916986Smx205022 	} else {
8926986Smx205022 		Adapter->dvma_page_num = Adapter->max_frame_size /
8936986Smx205022 		    Adapter->sys_page_sz + E1000G_DEFAULT_DVMA_PAGE_NUM;
8946986Smx205022 	}
8956394Scc210113 	ASSERT(Adapter->dvma_page_num >= E1000G_DEFAULT_DVMA_PAGE_NUM);
8966394Scc210113 #endif
8976394Scc210113 
8986735Scc210113 	Adapter->min_frame_size = ETHERMIN + ETHERFCSL;
8996735Scc210113 
9008417SChenlu.Chen@Sun.COM 	if (Adapter->mem_workaround_82546 &&
9018417SChenlu.Chen@Sun.COM 	    ((mac->type == e1000_82545) ||
9028178SChenlu.Chen@Sun.COM 	    (mac->type == e1000_82546) ||
9038417SChenlu.Chen@Sun.COM 	    (mac->type == e1000_82546_rev_3))) {
9046394Scc210113 		Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_2K;
9058178SChenlu.Chen@Sun.COM 	} else {
9068178SChenlu.Chen@Sun.COM 		rx_size = Adapter->max_frame_size + E1000G_IPALIGNPRESERVEROOM;
9078178SChenlu.Chen@Sun.COM 		if ((rx_size > FRAME_SIZE_UPTO_2K) &&
9088178SChenlu.Chen@Sun.COM 		    (rx_size <= FRAME_SIZE_UPTO_4K))
9098178SChenlu.Chen@Sun.COM 			Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_4K;
9108178SChenlu.Chen@Sun.COM 		else if ((rx_size > FRAME_SIZE_UPTO_4K) &&
9118178SChenlu.Chen@Sun.COM 		    (rx_size <= FRAME_SIZE_UPTO_8K))
9128178SChenlu.Chen@Sun.COM 			Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_8K;
9138178SChenlu.Chen@Sun.COM 		else if ((rx_size > FRAME_SIZE_UPTO_8K) &&
9148178SChenlu.Chen@Sun.COM 		    (rx_size <= FRAME_SIZE_UPTO_16K))
9158178SChenlu.Chen@Sun.COM 			Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_16K;
9168178SChenlu.Chen@Sun.COM 		else
9178178SChenlu.Chen@Sun.COM 			Adapter->rx_buffer_size = E1000_RX_BUFFER_SIZE_2K;
9188178SChenlu.Chen@Sun.COM 	}
9196394Scc210113 
9206735Scc210113 	tx_size = Adapter->max_frame_size;
9216394Scc210113 	if ((tx_size > FRAME_SIZE_UPTO_2K) && (tx_size <= FRAME_SIZE_UPTO_4K))
9226394Scc210113 		Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_4K;
9236394Scc210113 	else if ((tx_size > FRAME_SIZE_UPTO_4K) &&
9246394Scc210113 	    (tx_size <= FRAME_SIZE_UPTO_8K))
9256394Scc210113 		Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_8K;
9266394Scc210113 	else if ((tx_size > FRAME_SIZE_UPTO_8K) &&
9276394Scc210113 	    (tx_size <= FRAME_SIZE_UPTO_16K))
9286394Scc210113 		Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_16K;
9296394Scc210113 	else
9306394Scc210113 		Adapter->tx_buffer_size = E1000_TX_BUFFER_SIZE_2K;
9316394Scc210113 
9326394Scc210113 	/*
9336394Scc210113 	 * For Wiseman adapters we have an requirement of having receive
9346394Scc210113 	 * buffers aligned at 256 byte boundary. Since Livengood does not
9356394Scc210113 	 * require this and forcing it for all hardwares will have
9366394Scc210113 	 * performance implications, I am making it applicable only for
9376394Scc210113 	 * Wiseman and for Jumbo frames enabled mode as rest of the time,
9386394Scc210113 	 * it is okay to have normal frames...but it does involve a
9396394Scc210113 	 * potential risk where we may loose data if buffer is not
9406394Scc210113 	 * aligned...so all wiseman boards to have 256 byte aligned
9416394Scc210113 	 * buffers
9426394Scc210113 	 */
9436394Scc210113 	if (mac->type < e1000_82543)
9446394Scc210113 		Adapter->rx_buf_align = RECEIVE_BUFFER_ALIGN_SIZE;
9456394Scc210113 	else
9466394Scc210113 		Adapter->rx_buf_align = 1;
9476394Scc210113 }
9486394Scc210113 
9493526Sxy150489 /*
9504919Sxy150489  * e1000g_detach - driver detach
9514919Sxy150489  *
9524919Sxy150489  * The detach() function is the complement of the attach routine.
9534919Sxy150489  * If cmd is set to DDI_DETACH, detach() is used to remove  the
9544919Sxy150489  * state  associated  with  a  given  instance of a device node
9554919Sxy150489  * prior to the removal of that instance from the system.
9564919Sxy150489  *
9574919Sxy150489  * The detach() function will be called once for each  instance
9584919Sxy150489  * of the device for which there has been a successful attach()
9594919Sxy150489  * once there are no longer  any  opens  on  the  device.
9604919Sxy150489  *
9614919Sxy150489  * Interrupts routine are disabled, All memory allocated by this
9624919Sxy150489  * driver are freed.
9633526Sxy150489  */
9643526Sxy150489 static int
9654919Sxy150489 e1000g_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd)
9663526Sxy150489 {
9673526Sxy150489 	struct e1000g *Adapter;
9684982Syy150190 	boolean_t rx_drain;
9693526Sxy150489 
9703526Sxy150489 	switch (cmd) {
9713526Sxy150489 	default:
9723526Sxy150489 		return (DDI_FAILURE);
9733526Sxy150489 
9743526Sxy150489 	case DDI_SUSPEND:
9753526Sxy150489 		return (e1000g_suspend(devinfo));
9763526Sxy150489 
9773526Sxy150489 	case DDI_DETACH:
9783526Sxy150489 		break;
9793526Sxy150489 	}
9803526Sxy150489 
9813526Sxy150489 	Adapter = (struct e1000g *)ddi_get_driver_private(devinfo);
9823526Sxy150489 	if (Adapter == NULL)
9833526Sxy150489 		return (DDI_FAILURE);
9843526Sxy150489 
9858275SEric Cheng 	rx_drain = e1000g_rx_drain(Adapter);
9868275SEric Cheng 	if (!rx_drain && !e1000g_force_detach)
9878275SEric Cheng 		return (DDI_FAILURE);
9888275SEric Cheng 
9894919Sxy150489 	if (mac_unregister(Adapter->mh) != 0) {
9904919Sxy150489 		e1000g_log(Adapter, CE_WARN, "Unregister MAC failed");
9914919Sxy150489 		return (DDI_FAILURE);
9924919Sxy150489 	}
9934919Sxy150489 	Adapter->attach_progress &= ~ATTACH_PROGRESS_MAC;
9944919Sxy150489 
9958479SChenlu.Chen@Sun.COM 	ASSERT(!(Adapter->e1000g_state & E1000G_STARTED));
9964982Syy150190 
9978850SMin.Xu@Sun.COM 	if (!e1000g_force_detach && !rx_drain)
9988850SMin.Xu@Sun.COM 		return (DDI_FAILURE);
9993526Sxy150489 
10003526Sxy150489 	e1000g_unattach(devinfo, Adapter);
10013526Sxy150489 
10023526Sxy150489 	return (DDI_SUCCESS);
10033526Sxy150489 }
10043526Sxy150489 
10054982Syy150190 /*
10064982Syy150190  * e1000g_free_priv_devi_node - free a priv_dip entry for driver instance
10074982Syy150190  */
10088850SMin.Xu@Sun.COM void
10098850SMin.Xu@Sun.COM e1000g_free_priv_devi_node(private_devi_list_t *devi_node)
10104982Syy150190 {
10114982Syy150190 	ASSERT(e1000g_private_devi_list != NULL);
10128850SMin.Xu@Sun.COM 	ASSERT(devi_node != NULL);
10138850SMin.Xu@Sun.COM 
10148850SMin.Xu@Sun.COM 	if (devi_node->prev != NULL)
10158850SMin.Xu@Sun.COM 		devi_node->prev->next = devi_node->next;
10168850SMin.Xu@Sun.COM 	if (devi_node->next != NULL)
10178850SMin.Xu@Sun.COM 		devi_node->next->prev = devi_node->prev;
10188850SMin.Xu@Sun.COM 	if (devi_node == e1000g_private_devi_list)
10198850SMin.Xu@Sun.COM 		e1000g_private_devi_list = devi_node->next;
10208850SMin.Xu@Sun.COM 
10218850SMin.Xu@Sun.COM 	kmem_free(devi_node->priv_dip,
10228850SMin.Xu@Sun.COM 	    sizeof (struct dev_info));
10238850SMin.Xu@Sun.COM 	kmem_free(devi_node,
10248850SMin.Xu@Sun.COM 	    sizeof (private_devi_list_t));
10254982Syy150190 }
10264982Syy150190 
10273526Sxy150489 static void
10283526Sxy150489 e1000g_unattach(dev_info_t *devinfo, struct e1000g *Adapter)
10293526Sxy150489 {
10308850SMin.Xu@Sun.COM 	private_devi_list_t *devi_node;
10317133Scc210113 	int result;
10327133Scc210113 
10334919Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_ENABLE_INTR) {
10343526Sxy150489 		(void) e1000g_disable_intrs(Adapter);
10353526Sxy150489 	}
10363526Sxy150489 
10374919Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_MAC) {
10383526Sxy150489 		(void) mac_unregister(Adapter->mh);
10393526Sxy150489 	}
10403526Sxy150489 
10414919Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_ADD_INTR) {
10423526Sxy150489 		(void) e1000g_rem_intrs(Adapter);
10433526Sxy150489 	}
10443526Sxy150489 
10454919Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_SETUP) {
10463526Sxy150489 		(void) ddi_prop_remove_all(devinfo);
10473526Sxy150489 	}
10483526Sxy150489 
10493526Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_KSTATS) {
10503526Sxy150489 		kstat_delete((kstat_t *)Adapter->e1000g_ksp);
10513526Sxy150489 	}
10523526Sxy150489 
10533526Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_INIT) {
10544919Sxy150489 		stop_link_timer(Adapter);
10557133Scc210113 
10567133Scc210113 		mutex_enter(&e1000g_nvm_lock);
10577133Scc210113 		result = e1000_reset_hw(&Adapter->shared);
10587133Scc210113 		mutex_exit(&e1000g_nvm_lock);
10597133Scc210113 
10607133Scc210113 		if (result != E1000_SUCCESS) {
10615273Sgl147354 			e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
10625273Sgl147354 			ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST);
10635273Sgl147354 		}
10643526Sxy150489 	}
10653526Sxy150489 
10669770SChangqing.Li@Sun.COM 	e1000g_release_multicast(Adapter);
10679770SChangqing.Li@Sun.COM 
10684919Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_REGS_MAP) {
10694919Sxy150489 		if (Adapter->osdep.reg_handle != NULL)
10704919Sxy150489 			ddi_regs_map_free(&Adapter->osdep.reg_handle);
10714919Sxy150489 		if (Adapter->osdep.ich_flash_handle != NULL)
10724919Sxy150489 			ddi_regs_map_free(&Adapter->osdep.ich_flash_handle);
10733526Sxy150489 	}
10743526Sxy150489 
10754919Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_PCI_CONFIG) {
10764919Sxy150489 		if (Adapter->osdep.cfg_handle != NULL)
10774919Sxy150489 			pci_config_teardown(&Adapter->osdep.cfg_handle);
10783526Sxy150489 	}
10793526Sxy150489 
10803526Sxy150489 	if (Adapter->attach_progress & ATTACH_PROGRESS_LOCKS) {
10813526Sxy150489 		e1000g_destroy_locks(Adapter);
10823526Sxy150489 	}
10833526Sxy150489 
10845273Sgl147354 	if (Adapter->attach_progress & ATTACH_PROGRESS_FMINIT) {
10855273Sgl147354 		e1000g_fm_fini(Adapter);
10865273Sgl147354 	}
10875273Sgl147354 
10888850SMin.Xu@Sun.COM 	mutex_enter(&e1000g_rx_detach_lock);
10899190SMin.Xu@Sun.COM 	if (e1000g_force_detach && (Adapter->priv_devi_node != NULL)) {
10908850SMin.Xu@Sun.COM 		devi_node = Adapter->priv_devi_node;
10918850SMin.Xu@Sun.COM 		devi_node->flag |= E1000G_PRIV_DEVI_DETACH;
10928850SMin.Xu@Sun.COM 
10938850SMin.Xu@Sun.COM 		if (devi_node->pending_rx_count == 0) {
10948850SMin.Xu@Sun.COM 			e1000g_free_priv_devi_node(devi_node);
10958850SMin.Xu@Sun.COM 		}
10968850SMin.Xu@Sun.COM 	}
10978850SMin.Xu@Sun.COM 	mutex_exit(&e1000g_rx_detach_lock);
10988850SMin.Xu@Sun.COM 
10993526Sxy150489 	kmem_free((caddr_t)Adapter, sizeof (struct e1000g));
11003526Sxy150489 
11013526Sxy150489 	/*
11023526Sxy150489 	 * Another hotplug spec requirement,
11033526Sxy150489 	 * run ddi_set_driver_private(devinfo, null);
11043526Sxy150489 	 */
11053526Sxy150489 	ddi_set_driver_private(devinfo, NULL);
11063526Sxy150489 }
11073526Sxy150489 
11083526Sxy150489 static void
11093526Sxy150489 e1000g_init_locks(struct e1000g *Adapter)
11103526Sxy150489 {
11113526Sxy150489 	e1000g_tx_ring_t *tx_ring;
11123526Sxy150489 	e1000g_rx_ring_t *rx_ring;
11133526Sxy150489 
11143526Sxy150489 	rw_init(&Adapter->chip_lock, NULL,
11153526Sxy150489 	    RW_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
11164919Sxy150489 	mutex_init(&Adapter->link_lock, NULL,
11173526Sxy150489 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
11184919Sxy150489 	mutex_init(&Adapter->watchdog_lock, NULL,
11193526Sxy150489 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
11203526Sxy150489 
11213526Sxy150489 	tx_ring = Adapter->tx_ring;
11223526Sxy150489 
11233526Sxy150489 	mutex_init(&tx_ring->tx_lock, NULL,
11243526Sxy150489 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
11253526Sxy150489 	mutex_init(&tx_ring->usedlist_lock, NULL,
11263526Sxy150489 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
11273526Sxy150489 	mutex_init(&tx_ring->freelist_lock, NULL,
11283526Sxy150489 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
11293526Sxy150489 
11303526Sxy150489 	rx_ring = Adapter->rx_ring;
11313526Sxy150489 
11327436STed.You@Sun.COM 	mutex_init(&rx_ring->rx_lock, NULL,
11337436STed.You@Sun.COM 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
11343526Sxy150489 }
11353526Sxy150489 
11363526Sxy150489 static void
11373526Sxy150489 e1000g_destroy_locks(struct e1000g *Adapter)
11383526Sxy150489 {
11393526Sxy150489 	e1000g_tx_ring_t *tx_ring;
11403526Sxy150489 	e1000g_rx_ring_t *rx_ring;
11413526Sxy150489 
11423526Sxy150489 	tx_ring = Adapter->tx_ring;
11433526Sxy150489 	mutex_destroy(&tx_ring->tx_lock);
11443526Sxy150489 	mutex_destroy(&tx_ring->usedlist_lock);
11453526Sxy150489 	mutex_destroy(&tx_ring->freelist_lock);
11463526Sxy150489 
11473526Sxy150489 	rx_ring = Adapter->rx_ring;
11487436STed.You@Sun.COM 	mutex_destroy(&rx_ring->rx_lock);
11493526Sxy150489 
11504919Sxy150489 	mutex_destroy(&Adapter->link_lock);
11514919Sxy150489 	mutex_destroy(&Adapter->watchdog_lock);
11523526Sxy150489 	rw_destroy(&Adapter->chip_lock);
115310680SMin.Xu@Sun.COM 
115410680SMin.Xu@Sun.COM 	/* destory mutex initialized in shared code */
115510680SMin.Xu@Sun.COM 	e1000_destroy_hw_mutex(&Adapter->shared);
11563526Sxy150489 }
11573526Sxy150489 
11583526Sxy150489 static int
11593526Sxy150489 e1000g_resume(dev_info_t *devinfo)
11603526Sxy150489 {
11613526Sxy150489 	struct e1000g *Adapter;
11623526Sxy150489 
11633526Sxy150489 	Adapter = (struct e1000g *)ddi_get_driver_private(devinfo);
11643526Sxy150489 	if (Adapter == NULL)
11658479SChenlu.Chen@Sun.COM 		e1000g_log(Adapter, CE_PANIC,
11668479SChenlu.Chen@Sun.COM 		    "Instance pointer is null\n");
11678479SChenlu.Chen@Sun.COM 
11688479SChenlu.Chen@Sun.COM 	if (Adapter->dip != devinfo)
11698479SChenlu.Chen@Sun.COM 		e1000g_log(Adapter, CE_PANIC,
11708479SChenlu.Chen@Sun.COM 		    "Devinfo is not the same as saved devinfo\n");
11718479SChenlu.Chen@Sun.COM 
11728479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
11738479SChenlu.Chen@Sun.COM 
11748479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_STARTED) {
11758479SChenlu.Chen@Sun.COM 		if (e1000g_start(Adapter, B_FALSE) != DDI_SUCCESS) {
11768479SChenlu.Chen@Sun.COM 			rw_exit(&Adapter->chip_lock);
11778479SChenlu.Chen@Sun.COM 			/*
11788479SChenlu.Chen@Sun.COM 			 * We note the failure, but return success, as the
11798479SChenlu.Chen@Sun.COM 			 * system is still usable without this controller.
11808479SChenlu.Chen@Sun.COM 			 */
11818479SChenlu.Chen@Sun.COM 			e1000g_log(Adapter, CE_WARN,
11828479SChenlu.Chen@Sun.COM 			    "e1000g_resume: failed to restart controller\n");
11838479SChenlu.Chen@Sun.COM 			return (DDI_SUCCESS);
11848479SChenlu.Chen@Sun.COM 		}
11858479SChenlu.Chen@Sun.COM 		/* Enable and start the watchdog timer */
11868479SChenlu.Chen@Sun.COM 		enable_watchdog_timer(Adapter);
11878479SChenlu.Chen@Sun.COM 	}
11888479SChenlu.Chen@Sun.COM 
11898479SChenlu.Chen@Sun.COM 	Adapter->e1000g_state &= ~E1000G_SUSPENDED;
11908479SChenlu.Chen@Sun.COM 
11918479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
11923526Sxy150489 
11933526Sxy150489 	return (DDI_SUCCESS);
11943526Sxy150489 }
11953526Sxy150489 
11963526Sxy150489 static int
11973526Sxy150489 e1000g_suspend(dev_info_t *devinfo)
11983526Sxy150489 {
11993526Sxy150489 	struct e1000g *Adapter;
12003526Sxy150489 
12013526Sxy150489 	Adapter = (struct e1000g *)ddi_get_driver_private(devinfo);
12023526Sxy150489 	if (Adapter == NULL)
12033526Sxy150489 		return (DDI_FAILURE);
12043526Sxy150489 
12058479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
12068479SChenlu.Chen@Sun.COM 
12078479SChenlu.Chen@Sun.COM 	Adapter->e1000g_state |= E1000G_SUSPENDED;
12088479SChenlu.Chen@Sun.COM 
12098479SChenlu.Chen@Sun.COM 	/* if the port isn't plumbed, we can simply return */
12108479SChenlu.Chen@Sun.COM 	if (!(Adapter->e1000g_state & E1000G_STARTED)) {
12118479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
12128479SChenlu.Chen@Sun.COM 		return (DDI_SUCCESS);
12138479SChenlu.Chen@Sun.COM 	}
12148479SChenlu.Chen@Sun.COM 
12158479SChenlu.Chen@Sun.COM 	e1000g_stop(Adapter, B_FALSE);
12168479SChenlu.Chen@Sun.COM 
12178479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
12188479SChenlu.Chen@Sun.COM 
12198479SChenlu.Chen@Sun.COM 	/* Disable and stop all the timers */
12208479SChenlu.Chen@Sun.COM 	disable_watchdog_timer(Adapter);
12218479SChenlu.Chen@Sun.COM 	stop_link_timer(Adapter);
12228479SChenlu.Chen@Sun.COM 	stop_82547_timer(Adapter->tx_ring);
12233526Sxy150489 
12243526Sxy150489 	return (DDI_SUCCESS);
12253526Sxy150489 }
12263526Sxy150489 
12273526Sxy150489 static int
12283526Sxy150489 e1000g_init(struct e1000g *Adapter)
12293526Sxy150489 {
12303526Sxy150489 	uint32_t pba;
12314919Sxy150489 	uint32_t high_water;
12323526Sxy150489 	struct e1000_hw *hw;
12334061Sxy150489 	clock_t link_timeout;
12347133Scc210113 	int result;
12353526Sxy150489 
12364919Sxy150489 	hw = &Adapter->shared;
12373526Sxy150489 
12383526Sxy150489 	/*
12393526Sxy150489 	 * reset to put the hardware in a known state
12403526Sxy150489 	 * before we try to do anything with the eeprom
12413526Sxy150489 	 */
12427133Scc210113 	mutex_enter(&e1000g_nvm_lock);
12437133Scc210113 	result = e1000_reset_hw(hw);
12447133Scc210113 	mutex_exit(&e1000g_nvm_lock);
12457133Scc210113 
12467133Scc210113 	if (result != E1000_SUCCESS) {
12475273Sgl147354 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
12485273Sgl147354 		goto init_fail;
12495273Sgl147354 	}
12503526Sxy150489 
12517133Scc210113 	mutex_enter(&e1000g_nvm_lock);
12527133Scc210113 	result = e1000_validate_nvm_checksum(hw);
12537133Scc210113 	if (result < E1000_SUCCESS) {
12544061Sxy150489 		/*
12554061Sxy150489 		 * Some PCI-E parts fail the first check due to
12564061Sxy150489 		 * the link being in sleep state.  Call it again,
12574061Sxy150489 		 * if it fails a second time its a real issue.
12584061Sxy150489 		 */
12597133Scc210113 		result = e1000_validate_nvm_checksum(hw);
12607133Scc210113 	}
12617133Scc210113 	mutex_exit(&e1000g_nvm_lock);
12627133Scc210113 
12637133Scc210113 	if (result < E1000_SUCCESS) {
12647133Scc210113 		e1000g_log(Adapter, CE_WARN,
12657133Scc210113 		    "Invalid NVM checksum. Please contact "
12667133Scc210113 		    "the vendor to update the NVM.");
12677133Scc210113 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
12687133Scc210113 		goto init_fail;
12697133Scc210113 	}
12707133Scc210113 
12717133Scc210113 	result = 0;
12723526Sxy150489 #ifdef __sparc
12733526Sxy150489 	/*
12747607STed.You@Sun.COM 	 * First, we try to get the local ethernet address from OBP. If
12757133Scc210113 	 * failed, then we get it from the EEPROM of NIC card.
12763526Sxy150489 	 */
12777133Scc210113 	result = e1000g_find_mac_address(Adapter);
12787133Scc210113 #endif
12793526Sxy150489 	/* Get the local ethernet address. */
12807133Scc210113 	if (!result) {
12817133Scc210113 		mutex_enter(&e1000g_nvm_lock);
12827140Scc210113 		result = e1000_read_mac_addr(hw);
12837133Scc210113 		mutex_exit(&e1000g_nvm_lock);
12847133Scc210113 	}
12857133Scc210113 
12867133Scc210113 	if (result < E1000_SUCCESS) {
12873526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Read mac addr failed");
12885273Sgl147354 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
12893526Sxy150489 		goto init_fail;
12903526Sxy150489 	}
12913526Sxy150489 
12923526Sxy150489 	/* check for valid mac address */
12934919Sxy150489 	if (!is_valid_mac_addr(hw->mac.addr)) {
12943526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Invalid mac addr");
12955273Sgl147354 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
12963526Sxy150489 		goto init_fail;
12973526Sxy150489 	}
12983526Sxy150489 
12994919Sxy150489 	/* Set LAA state for 82571 chipset */
13004919Sxy150489 	e1000_set_laa_state_82571(hw, B_TRUE);
13013526Sxy150489 
13023526Sxy150489 	/* Master Latency Timer implementation */
13034919Sxy150489 	if (Adapter->master_latency_timer) {
13044919Sxy150489 		pci_config_put8(Adapter->osdep.cfg_handle,
13054919Sxy150489 		    PCI_CONF_LATENCY_TIMER, Adapter->master_latency_timer);
13063526Sxy150489 	}
13073526Sxy150489 
13084919Sxy150489 	if (hw->mac.type < e1000_82547) {
13093526Sxy150489 		/*
13103526Sxy150489 		 * Total FIFO is 64K
13113526Sxy150489 		 */
13126735Scc210113 		if (Adapter->max_frame_size > FRAME_SIZE_UPTO_8K)
13133526Sxy150489 			pba = E1000_PBA_40K;	/* 40K for Rx, 24K for Tx */
13143526Sxy150489 		else
13153526Sxy150489 			pba = E1000_PBA_48K;	/* 48K for Rx, 16K for Tx */
13167140Scc210113 	} else if ((hw->mac.type == e1000_82571) ||
13177140Scc210113 	    (hw->mac.type == e1000_82572) ||
13187140Scc210113 	    (hw->mac.type == e1000_80003es2lan)) {
13193526Sxy150489 		/*
13203526Sxy150489 		 * Total FIFO is 48K
13213526Sxy150489 		 */
13226735Scc210113 		if (Adapter->max_frame_size > FRAME_SIZE_UPTO_8K)
13233526Sxy150489 			pba = E1000_PBA_30K;	/* 30K for Rx, 18K for Tx */
13243526Sxy150489 		else
13253526Sxy150489 			pba = E1000_PBA_38K;	/* 38K for Rx, 10K for Tx */
13267607STed.You@Sun.COM 	} else if (hw->mac.type == e1000_82573) {
13277607STed.You@Sun.COM 		pba = E1000_PBA_20K;		/* 20K for Rx, 12K for Tx */
13287607STed.You@Sun.COM 	} else if (hw->mac.type == e1000_82574) {
13297607STed.You@Sun.COM 		/* Keep adapter default: 20K for Rx, 20K for Tx */
13307607STed.You@Sun.COM 		pba = E1000_READ_REG(hw, E1000_PBA);
13314919Sxy150489 	} else if (hw->mac.type == e1000_ich8lan) {
13323526Sxy150489 		pba = E1000_PBA_8K;		/* 8K for Rx, 12K for Tx */
13334919Sxy150489 	} else if (hw->mac.type == e1000_ich9lan) {
13347607STed.You@Sun.COM 		pba = E1000_PBA_10K;
13357607STed.You@Sun.COM 	} else if (hw->mac.type == e1000_ich10lan) {
13367607STed.You@Sun.COM 		pba = E1000_PBA_10K;
133710680SMin.Xu@Sun.COM 	} else if (hw->mac.type == e1000_pchlan) {
133810680SMin.Xu@Sun.COM 		pba = E1000_PBA_26K;
13393526Sxy150489 	} else {
13403526Sxy150489 		/*
13413526Sxy150489 		 * Total FIFO is 40K
13423526Sxy150489 		 */
13436735Scc210113 		if (Adapter->max_frame_size > FRAME_SIZE_UPTO_8K)
13443526Sxy150489 			pba = E1000_PBA_22K;	/* 22K for Rx, 18K for Tx */
13453526Sxy150489 		else
13463526Sxy150489 			pba = E1000_PBA_30K;	/* 30K for Rx, 10K for Tx */
13473526Sxy150489 	}
13484919Sxy150489 	E1000_WRITE_REG(hw, E1000_PBA, pba);
13493526Sxy150489 
13503526Sxy150489 	/*
13513526Sxy150489 	 * These parameters set thresholds for the adapter's generation(Tx)
13523526Sxy150489 	 * and response(Rx) to Ethernet PAUSE frames.  These are just threshold
13533526Sxy150489 	 * settings.  Flow control is enabled or disabled in the configuration
13543526Sxy150489 	 * file.
13553526Sxy150489 	 * High-water mark is set down from the top of the rx fifo (not
13563526Sxy150489 	 * sensitive to max_frame_size) and low-water is set just below
13573526Sxy150489 	 * high-water mark.
13584919Sxy150489 	 * The high water mark must be low enough to fit one full frame above
13594919Sxy150489 	 * it in the rx FIFO.  Should be the lower of:
13604919Sxy150489 	 * 90% of the Rx FIFO size and the full Rx FIFO size minus the early
13614919Sxy150489 	 * receive size (assuming ERT set to E1000_ERT_2048), or the full
13624919Sxy150489 	 * Rx FIFO size minus one full frame.
13633526Sxy150489 	 */
13644919Sxy150489 	high_water = min(((pba << 10) * 9 / 10),
13658479SChenlu.Chen@Sun.COM 	    ((hw->mac.type == e1000_82573 || hw->mac.type == e1000_82574 ||
13668479SChenlu.Chen@Sun.COM 	    hw->mac.type == e1000_ich9lan || hw->mac.type == e1000_ich10lan) ?
13674919Sxy150489 	    ((pba << 10) - (E1000_ERT_2048 << 3)) :
13686735Scc210113 	    ((pba << 10) - Adapter->max_frame_size)));
13696735Scc210113 
13706735Scc210113 	hw->fc.high_water = high_water & 0xFFF8;
13716735Scc210113 	hw->fc.low_water = hw->fc.high_water - 8;
13724919Sxy150489 
13734919Sxy150489 	if (hw->mac.type == e1000_80003es2lan)
13746735Scc210113 		hw->fc.pause_time = 0xFFFF;
13754919Sxy150489 	else
13766735Scc210113 		hw->fc.pause_time = E1000_FC_PAUSE_TIME;
13776735Scc210113 	hw->fc.send_xon = B_TRUE;
13783526Sxy150489 
13793526Sxy150489 	/*
13803526Sxy150489 	 * Reset the adapter hardware the second time.
13813526Sxy150489 	 */
13827133Scc210113 	mutex_enter(&e1000g_nvm_lock);
13837133Scc210113 	result = e1000_reset_hw(hw);
13847133Scc210113 	mutex_exit(&e1000g_nvm_lock);
13857133Scc210113 
13867133Scc210113 	if (result != E1000_SUCCESS) {
13875273Sgl147354 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
13885273Sgl147354 		goto init_fail;
13895273Sgl147354 	}
13903526Sxy150489 
13913526Sxy150489 	/* disable wakeup control by default */
13924919Sxy150489 	if (hw->mac.type >= e1000_82544)
13934919Sxy150489 		E1000_WRITE_REG(hw, E1000_WUC, 0);
13943526Sxy150489 
13958178SChenlu.Chen@Sun.COM 	/*
13968178SChenlu.Chen@Sun.COM 	 * MWI should be disabled on 82546.
13978178SChenlu.Chen@Sun.COM 	 */
13988178SChenlu.Chen@Sun.COM 	if (hw->mac.type == e1000_82546)
13998178SChenlu.Chen@Sun.COM 		e1000_pci_clear_mwi(hw);
14008178SChenlu.Chen@Sun.COM 	else
14018178SChenlu.Chen@Sun.COM 		e1000_pci_set_mwi(hw);
14023526Sxy150489 
14033526Sxy150489 	/*
14043526Sxy150489 	 * Configure/Initialize hardware
14053526Sxy150489 	 */
14067133Scc210113 	mutex_enter(&e1000g_nvm_lock);
14077133Scc210113 	result = e1000_init_hw(hw);
14087133Scc210113 	mutex_exit(&e1000g_nvm_lock);
14097133Scc210113 
14107133Scc210113 	if (result < E1000_SUCCESS) {
14113526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Initialize hw failed");
14125273Sgl147354 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
14133526Sxy150489 		goto init_fail;
14143526Sxy150489 	}
14153526Sxy150489 
14167436STed.You@Sun.COM 	/*
14177436STed.You@Sun.COM 	 * Restore LED settings to the default from EEPROM
14187436STed.You@Sun.COM 	 * to meet the standard for Sun platforms.
14197436STed.You@Sun.COM 	 */
142010605SMin.Xu@Sun.COM 	(void) e1000_cleanup_led(hw);
14217436STed.You@Sun.COM 
14223526Sxy150489 	/* Disable Smart Power Down */
14233526Sxy150489 	phy_spd_state(hw, B_FALSE);
14243526Sxy150489 
14255082Syy150190 	/* Make sure driver has control */
14265082Syy150190 	e1000g_get_driver_control(hw);
14275082Syy150190 
14283526Sxy150489 	/*
14293526Sxy150489 	 * Initialize unicast addresses.
14303526Sxy150489 	 */
14313526Sxy150489 	e1000g_init_unicst(Adapter);
14323526Sxy150489 
14333526Sxy150489 	/*
14343526Sxy150489 	 * Setup and initialize the mctable structures.  After this routine
14353526Sxy150489 	 * completes  Multicast table will be set
14363526Sxy150489 	 */
143710680SMin.Xu@Sun.COM 	e1000_update_mc_addr_list(hw,
143810680SMin.Xu@Sun.COM 	    (uint8_t *)Adapter->mcast_table, Adapter->mcast_count);
14394919Sxy150489 	msec_delay(5);
14403526Sxy150489 
14413526Sxy150489 	/*
14423526Sxy150489 	 * Implement Adaptive IFS
14433526Sxy150489 	 */
14443526Sxy150489 	e1000_reset_adaptive(hw);
14453526Sxy150489 
14463526Sxy150489 	/* Setup Interrupt Throttling Register */
14475882Syy150190 	if (hw->mac.type >= e1000_82540) {
14485882Syy150190 		E1000_WRITE_REG(hw, E1000_ITR, Adapter->intr_throttling_rate);
14495882Syy150190 	} else
14505882Syy150190 		Adapter->intr_adaptive = B_FALSE;
14513526Sxy150489 
14524061Sxy150489 	/* Start the timer for link setup */
14534919Sxy150489 	if (hw->mac.autoneg)
14544919Sxy150489 		link_timeout = PHY_AUTO_NEG_LIMIT * drv_usectohz(100000);
14554061Sxy150489 	else
14564919Sxy150489 		link_timeout = PHY_FORCE_LIMIT * drv_usectohz(100000);
14574919Sxy150489 
14584919Sxy150489 	mutex_enter(&Adapter->link_lock);
14596735Scc210113 	if (hw->phy.autoneg_wait_to_complete) {
14604061Sxy150489 		Adapter->link_complete = B_TRUE;
14613526Sxy150489 	} else {
14624061Sxy150489 		Adapter->link_complete = B_FALSE;
14634061Sxy150489 		Adapter->link_tid = timeout(e1000g_link_timer,
14644061Sxy150489 		    (void *)Adapter, link_timeout);
14653526Sxy150489 	}
14664919Sxy150489 	mutex_exit(&Adapter->link_lock);
14673526Sxy150489 
14685082Syy150190 	/* Save the state of the phy */
14695082Syy150190 	e1000g_get_phy_state(Adapter);
14705082Syy150190 
14716512Ssowmini 	e1000g_param_sync(Adapter);
14726512Ssowmini 
14733526Sxy150489 	Adapter->init_count++;
14743526Sxy150489 
14755273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.cfg_handle) != DDI_FM_OK) {
14765273Sgl147354 		goto init_fail;
14775273Sgl147354 	}
14785273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
14795273Sgl147354 		goto init_fail;
14805273Sgl147354 	}
14815273Sgl147354 
14828275SEric Cheng 	Adapter->poll_mode = e1000g_poll_mode;
14838275SEric Cheng 
14843526Sxy150489 	return (DDI_SUCCESS);
14853526Sxy150489 
14863526Sxy150489 init_fail:
14875273Sgl147354 	ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST);
14883526Sxy150489 	return (DDI_FAILURE);
14893526Sxy150489 }
14903526Sxy150489 
14918850SMin.Xu@Sun.COM static int
14928850SMin.Xu@Sun.COM e1000g_alloc_rx_data(struct e1000g *Adapter)
14938850SMin.Xu@Sun.COM {
14948850SMin.Xu@Sun.COM 	e1000g_rx_ring_t *rx_ring;
14958850SMin.Xu@Sun.COM 	e1000g_rx_data_t *rx_data;
14968850SMin.Xu@Sun.COM 
14978850SMin.Xu@Sun.COM 	rx_ring = Adapter->rx_ring;
14988850SMin.Xu@Sun.COM 
14998850SMin.Xu@Sun.COM 	rx_data = kmem_zalloc(sizeof (e1000g_rx_data_t), KM_NOSLEEP);
15008850SMin.Xu@Sun.COM 
15018850SMin.Xu@Sun.COM 	if (rx_data == NULL)
15028850SMin.Xu@Sun.COM 		return (DDI_FAILURE);
15038850SMin.Xu@Sun.COM 
15048850SMin.Xu@Sun.COM 	rx_data->priv_devi_node = Adapter->priv_devi_node;
15058850SMin.Xu@Sun.COM 	rx_data->rx_ring = rx_ring;
15068850SMin.Xu@Sun.COM 
15078850SMin.Xu@Sun.COM 	mutex_init(&rx_data->freelist_lock, NULL,
15088850SMin.Xu@Sun.COM 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
15098850SMin.Xu@Sun.COM 	mutex_init(&rx_data->recycle_lock, NULL,
15108850SMin.Xu@Sun.COM 	    MUTEX_DRIVER, DDI_INTR_PRI(Adapter->intr_pri));
15118850SMin.Xu@Sun.COM 
15128850SMin.Xu@Sun.COM 	rx_ring->rx_data = rx_data;
15138850SMin.Xu@Sun.COM 
15148850SMin.Xu@Sun.COM 	return (DDI_SUCCESS);
15158850SMin.Xu@Sun.COM }
15168850SMin.Xu@Sun.COM 
15178850SMin.Xu@Sun.COM void
15188850SMin.Xu@Sun.COM e1000g_free_rx_pending_buffers(e1000g_rx_data_t *rx_data)
15198850SMin.Xu@Sun.COM {
15208850SMin.Xu@Sun.COM 	rx_sw_packet_t *packet, *next_packet;
15218850SMin.Xu@Sun.COM 
15228850SMin.Xu@Sun.COM 	if (rx_data == NULL)
15238850SMin.Xu@Sun.COM 		return;
15248850SMin.Xu@Sun.COM 
15258850SMin.Xu@Sun.COM 	packet = rx_data->packet_area;
15268850SMin.Xu@Sun.COM 	while (packet != NULL) {
15278850SMin.Xu@Sun.COM 		next_packet = packet->next;
15288850SMin.Xu@Sun.COM 		e1000g_free_rx_sw_packet(packet, B_TRUE);
15298850SMin.Xu@Sun.COM 		packet = next_packet;
15308850SMin.Xu@Sun.COM 	}
15318850SMin.Xu@Sun.COM 	rx_data->packet_area = NULL;
15328850SMin.Xu@Sun.COM }
15338850SMin.Xu@Sun.COM 
15348850SMin.Xu@Sun.COM void
15358850SMin.Xu@Sun.COM e1000g_free_rx_data(e1000g_rx_data_t *rx_data)
15368850SMin.Xu@Sun.COM {
15378850SMin.Xu@Sun.COM 	if (rx_data == NULL)
15388850SMin.Xu@Sun.COM 		return;
15398850SMin.Xu@Sun.COM 
15408850SMin.Xu@Sun.COM 	mutex_destroy(&rx_data->freelist_lock);
15418850SMin.Xu@Sun.COM 	mutex_destroy(&rx_data->recycle_lock);
15428850SMin.Xu@Sun.COM 
15438850SMin.Xu@Sun.COM 	kmem_free(rx_data, sizeof (e1000g_rx_data_t));
15448850SMin.Xu@Sun.COM }
15458850SMin.Xu@Sun.COM 
15463526Sxy150489 /*
15473526Sxy150489  * Check if the link is up
15483526Sxy150489  */
15493526Sxy150489 static boolean_t
15503526Sxy150489 e1000g_link_up(struct e1000g *Adapter)
15513526Sxy150489 {
155210680SMin.Xu@Sun.COM 	struct e1000_hw *hw = &Adapter->shared;
155310680SMin.Xu@Sun.COM 	boolean_t link_up = B_FALSE;
155410680SMin.Xu@Sun.COM 
155510680SMin.Xu@Sun.COM 	/*
155610680SMin.Xu@Sun.COM 	 * get_link_status is set in the interrupt handler on link-status-change
155710680SMin.Xu@Sun.COM 	 * or rx sequence error interrupt.  get_link_status will stay
155810680SMin.Xu@Sun.COM 	 * false until the e1000_check_for_link establishes link only
155910680SMin.Xu@Sun.COM 	 * for copper adapters.
156010680SMin.Xu@Sun.COM 	 */
156110680SMin.Xu@Sun.COM 	switch (hw->phy.media_type) {
156210680SMin.Xu@Sun.COM 	case e1000_media_type_copper:
156310680SMin.Xu@Sun.COM 		if (hw->mac.get_link_status) {
156410680SMin.Xu@Sun.COM 			(void) e1000_check_for_link(hw);
156510680SMin.Xu@Sun.COM 			link_up = !hw->mac.get_link_status;
156610680SMin.Xu@Sun.COM 		} else {
156710680SMin.Xu@Sun.COM 			link_up = B_TRUE;
156810680SMin.Xu@Sun.COM 		}
156910680SMin.Xu@Sun.COM 		break;
157010680SMin.Xu@Sun.COM 	case e1000_media_type_fiber:
157110680SMin.Xu@Sun.COM 		(void) e1000_check_for_link(hw);
157210680SMin.Xu@Sun.COM 		link_up = (E1000_READ_REG(hw, E1000_STATUS) &
157310680SMin.Xu@Sun.COM 		    E1000_STATUS_LU);
157410680SMin.Xu@Sun.COM 		break;
157510680SMin.Xu@Sun.COM 	case e1000_media_type_internal_serdes:
157610680SMin.Xu@Sun.COM 		(void) e1000_check_for_link(hw);
157710680SMin.Xu@Sun.COM 		link_up = hw->mac.serdes_has_link;
157810680SMin.Xu@Sun.COM 		break;
15793526Sxy150489 	}
15803526Sxy150489 
15813526Sxy150489 	return (link_up);
15823526Sxy150489 }
15833526Sxy150489 
15843526Sxy150489 static void
15853526Sxy150489 e1000g_m_ioctl(void *arg, queue_t *q, mblk_t *mp)
15863526Sxy150489 {
15873526Sxy150489 	struct iocblk *iocp;
15883526Sxy150489 	struct e1000g *e1000gp;
15893526Sxy150489 	enum ioc_reply status;
15907426SChenliang.Xu@Sun.COM 
15917426SChenliang.Xu@Sun.COM 	iocp = (struct iocblk *)(uintptr_t)mp->b_rptr;
15923526Sxy150489 	iocp->ioc_error = 0;
15933526Sxy150489 	e1000gp = (struct e1000g *)arg;
15943526Sxy150489 
15953526Sxy150489 	ASSERT(e1000gp);
15963526Sxy150489 	if (e1000gp == NULL) {
15973526Sxy150489 		miocnak(q, mp, 0, EINVAL);
15983526Sxy150489 		return;
15993526Sxy150489 	}
16003526Sxy150489 
16018479SChenlu.Chen@Sun.COM 	rw_enter(&e1000gp->chip_lock, RW_READER);
16028479SChenlu.Chen@Sun.COM 	if (e1000gp->e1000g_state & E1000G_SUSPENDED) {
16038479SChenlu.Chen@Sun.COM 		rw_exit(&e1000gp->chip_lock);
16048479SChenlu.Chen@Sun.COM 		miocnak(q, mp, 0, EINVAL);
16058479SChenlu.Chen@Sun.COM 		return;
16068479SChenlu.Chen@Sun.COM 	}
16078479SChenlu.Chen@Sun.COM 	rw_exit(&e1000gp->chip_lock);
16088479SChenlu.Chen@Sun.COM 
16093526Sxy150489 	switch (iocp->ioc_cmd) {
16103526Sxy150489 
16113526Sxy150489 	case LB_GET_INFO_SIZE:
16123526Sxy150489 	case LB_GET_INFO:
16133526Sxy150489 	case LB_GET_MODE:
16143526Sxy150489 	case LB_SET_MODE:
16153526Sxy150489 		status = e1000g_loopback_ioctl(e1000gp, iocp, mp);
16163526Sxy150489 		break;
16173526Sxy150489 
16183526Sxy150489 
16194919Sxy150489 #ifdef E1000G_DEBUG
16203526Sxy150489 	case E1000G_IOC_REG_PEEK:
16213526Sxy150489 	case E1000G_IOC_REG_POKE:
16223526Sxy150489 		status = e1000g_pp_ioctl(e1000gp, iocp, mp);
16233526Sxy150489 		break;
16243526Sxy150489 	case E1000G_IOC_CHIP_RESET:
16253526Sxy150489 		e1000gp->reset_count++;
16267656SSherry.Moore@Sun.COM 		if (e1000g_reset_adapter(e1000gp))
16273526Sxy150489 			status = IOC_ACK;
16283526Sxy150489 		else
16293526Sxy150489 			status = IOC_INVAL;
16303526Sxy150489 		break;
16314919Sxy150489 #endif
16323526Sxy150489 	default:
16333526Sxy150489 		status = IOC_INVAL;
16343526Sxy150489 		break;
16353526Sxy150489 	}
16363526Sxy150489 
16373526Sxy150489 	/*
16383526Sxy150489 	 * Decide how to reply
16393526Sxy150489 	 */
16403526Sxy150489 	switch (status) {
16413526Sxy150489 	default:
16423526Sxy150489 	case IOC_INVAL:
16433526Sxy150489 		/*
16443526Sxy150489 		 * Error, reply with a NAK and EINVAL or the specified error
16453526Sxy150489 		 */
16463526Sxy150489 		miocnak(q, mp, 0, iocp->ioc_error == 0 ?
16474349Sxy150489 		    EINVAL : iocp->ioc_error);
16483526Sxy150489 		break;
16493526Sxy150489 
16503526Sxy150489 	case IOC_DONE:
16513526Sxy150489 		/*
16523526Sxy150489 		 * OK, reply already sent
16533526Sxy150489 		 */
16543526Sxy150489 		break;
16553526Sxy150489 
16563526Sxy150489 	case IOC_ACK:
16573526Sxy150489 		/*
16583526Sxy150489 		 * OK, reply with an ACK
16593526Sxy150489 		 */
16603526Sxy150489 		miocack(q, mp, 0, 0);
16613526Sxy150489 		break;
16623526Sxy150489 
16633526Sxy150489 	case IOC_REPLY:
16643526Sxy150489 		/*
16653526Sxy150489 		 * OK, send prepared reply as ACK or NAK
16663526Sxy150489 		 */
16673526Sxy150489 		mp->b_datap->db_type = iocp->ioc_error == 0 ?
16684349Sxy150489 		    M_IOCACK : M_IOCNAK;
16693526Sxy150489 		qreply(q, mp);
16703526Sxy150489 		break;
16713526Sxy150489 	}
16723526Sxy150489 }
16733526Sxy150489 
16748275SEric Cheng /*
16758275SEric Cheng  * The default value of e1000g_poll_mode == 0 assumes that the NIC is
16768275SEric Cheng  * capable of supporting only one interrupt and we shouldn't disable
16778275SEric Cheng  * the physical interrupt. In this case we let the interrupt come and
16788275SEric Cheng  * we queue the packets in the rx ring itself in case we are in polling
16798275SEric Cheng  * mode (better latency but slightly lower performance and a very
16808275SEric Cheng  * high intrrupt count in mpstat which is harmless).
16818275SEric Cheng  *
16828275SEric Cheng  * e1000g_poll_mode == 1 assumes that we have per Rx ring interrupt
16838275SEric Cheng  * which can be disabled in poll mode. This gives better overall
16848275SEric Cheng  * throughput (compared to the mode above), shows very low interrupt
16858275SEric Cheng  * count but has slightly higher latency since we pick the packets when
16868275SEric Cheng  * the poll thread does polling.
16878275SEric Cheng  *
16888275SEric Cheng  * Currently, this flag should be enabled only while doing performance
16898275SEric Cheng  * measurement or when it can be guaranteed that entire NIC going
16908275SEric Cheng  * in poll mode will not harm any traffic like cluster heartbeat etc.
16918275SEric Cheng  */
16928275SEric Cheng int e1000g_poll_mode = 0;
16938275SEric Cheng 
16948275SEric Cheng /*
16958275SEric Cheng  * Called from the upper layers when driver is in polling mode to
16968275SEric Cheng  * pick up any queued packets. Care should be taken to not block
16978275SEric Cheng  * this thread.
16988275SEric Cheng  */
16998275SEric Cheng static mblk_t *e1000g_poll_ring(void *arg, int bytes_to_pickup)
17008275SEric Cheng {
17018275SEric Cheng 	e1000g_rx_ring_t	*rx_ring = (e1000g_rx_ring_t *)arg;
17028275SEric Cheng 	mblk_t			*mp = NULL;
17038275SEric Cheng 	mblk_t			*tail;
17048275SEric Cheng 	struct e1000g 		*adapter;
17058275SEric Cheng 
17068275SEric Cheng 	adapter = rx_ring->adapter;
17078275SEric Cheng 
17088479SChenlu.Chen@Sun.COM 	rw_enter(&adapter->chip_lock, RW_READER);
17098479SChenlu.Chen@Sun.COM 
17108479SChenlu.Chen@Sun.COM 	if (adapter->e1000g_state & E1000G_SUSPENDED) {
17118479SChenlu.Chen@Sun.COM 		rw_exit(&adapter->chip_lock);
17128479SChenlu.Chen@Sun.COM 		return (NULL);
17138479SChenlu.Chen@Sun.COM 	}
17148479SChenlu.Chen@Sun.COM 
17158275SEric Cheng 	mutex_enter(&rx_ring->rx_lock);
17168833SVenu.Iyer@Sun.COM 	mp = e1000g_receive(rx_ring, &tail, bytes_to_pickup);
17178275SEric Cheng 	mutex_exit(&rx_ring->rx_lock);
17188479SChenlu.Chen@Sun.COM 	rw_exit(&adapter->chip_lock);
17198275SEric Cheng 	return (mp);
17208275SEric Cheng }
17218275SEric Cheng 
17223526Sxy150489 static int
17233526Sxy150489 e1000g_m_start(void *arg)
17243526Sxy150489 {
17253526Sxy150489 	struct e1000g *Adapter = (struct e1000g *)arg;
17263526Sxy150489 
17278479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
17288479SChenlu.Chen@Sun.COM 
17298479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
17308479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
17318479SChenlu.Chen@Sun.COM 		return (ECANCELED);
17328479SChenlu.Chen@Sun.COM 	}
17338479SChenlu.Chen@Sun.COM 
17348479SChenlu.Chen@Sun.COM 	if (e1000g_start(Adapter, B_TRUE) != DDI_SUCCESS) {
17358479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
17368479SChenlu.Chen@Sun.COM 		return (ENOTACTIVE);
17378479SChenlu.Chen@Sun.COM 	}
17388479SChenlu.Chen@Sun.COM 
17398479SChenlu.Chen@Sun.COM 	Adapter->e1000g_state |= E1000G_STARTED;
17408479SChenlu.Chen@Sun.COM 
17418479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
17428479SChenlu.Chen@Sun.COM 
17438479SChenlu.Chen@Sun.COM 	/* Enable and start the watchdog timer */
17448479SChenlu.Chen@Sun.COM 	enable_watchdog_timer(Adapter);
17458479SChenlu.Chen@Sun.COM 
17468479SChenlu.Chen@Sun.COM 	return (0);
17473526Sxy150489 }
17483526Sxy150489 
17493526Sxy150489 static int
17504919Sxy150489 e1000g_start(struct e1000g *Adapter, boolean_t global)
17513526Sxy150489 {
17528850SMin.Xu@Sun.COM 	e1000g_rx_data_t *rx_data;
17538850SMin.Xu@Sun.COM 
17544919Sxy150489 	if (global) {
17558850SMin.Xu@Sun.COM 		if (e1000g_alloc_rx_data(Adapter) != DDI_SUCCESS) {
17568850SMin.Xu@Sun.COM 			e1000g_log(Adapter, CE_WARN, "Allocate rx data failed");
17578850SMin.Xu@Sun.COM 			goto start_fail;
17588850SMin.Xu@Sun.COM 		}
17598850SMin.Xu@Sun.COM 
17604919Sxy150489 		/* Allocate dma resources for descriptors and buffers */
17614919Sxy150489 		if (e1000g_alloc_dma_resources(Adapter) != DDI_SUCCESS) {
17624919Sxy150489 			e1000g_log(Adapter, CE_WARN,
17634919Sxy150489 			    "Alloc DMA resources failed");
17648850SMin.Xu@Sun.COM 			goto start_fail;
17654919Sxy150489 		}
17664919Sxy150489 		Adapter->rx_buffer_setup = B_FALSE;
17674919Sxy150489 	}
17684919Sxy150489 
17693526Sxy150489 	if (!(Adapter->attach_progress & ATTACH_PROGRESS_INIT)) {
17703526Sxy150489 		if (e1000g_init(Adapter) != DDI_SUCCESS) {
17713526Sxy150489 			e1000g_log(Adapter, CE_WARN,
17723526Sxy150489 			    "Adapter initialization failed");
17738850SMin.Xu@Sun.COM 			goto start_fail;
17743526Sxy150489 		}
17753526Sxy150489 	}
17763526Sxy150489 
17774919Sxy150489 	/* Setup and initialize the transmit structures */
17784919Sxy150489 	e1000g_tx_setup(Adapter);
17794919Sxy150489 	msec_delay(5);
17804919Sxy150489 
17814919Sxy150489 	/* Setup and initialize the receive structures */
17824919Sxy150489 	e1000g_rx_setup(Adapter);
17834919Sxy150489 	msec_delay(5);
17844919Sxy150489 
17857722SShuguo.Yang@Sun.COM 	/* Restore the e1000g promiscuous mode */
17867722SShuguo.Yang@Sun.COM 	e1000g_restore_promisc(Adapter);
17877722SShuguo.Yang@Sun.COM 
17884919Sxy150489 	e1000g_mask_interrupt(Adapter);
17893526Sxy150489 
17908479SChenlu.Chen@Sun.COM 	Adapter->attach_progress |= ATTACH_PROGRESS_INIT;
17918479SChenlu.Chen@Sun.COM 
17925273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
17935273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST);
17948850SMin.Xu@Sun.COM 		goto start_fail;
17958479SChenlu.Chen@Sun.COM 	}
17968479SChenlu.Chen@Sun.COM 
17978479SChenlu.Chen@Sun.COM 	return (DDI_SUCCESS);
17988850SMin.Xu@Sun.COM 
17998850SMin.Xu@Sun.COM start_fail:
18008850SMin.Xu@Sun.COM 	rx_data = Adapter->rx_ring->rx_data;
18018850SMin.Xu@Sun.COM 
18028850SMin.Xu@Sun.COM 	if (global) {
18038850SMin.Xu@Sun.COM 		e1000g_release_dma_resources(Adapter);
18048850SMin.Xu@Sun.COM 		e1000g_free_rx_pending_buffers(rx_data);
18058850SMin.Xu@Sun.COM 		e1000g_free_rx_data(rx_data);
18068850SMin.Xu@Sun.COM 	}
18078850SMin.Xu@Sun.COM 
18088850SMin.Xu@Sun.COM 	mutex_enter(&e1000g_nvm_lock);
18098850SMin.Xu@Sun.COM 	(void) e1000_reset_hw(&Adapter->shared);
18108850SMin.Xu@Sun.COM 	mutex_exit(&e1000g_nvm_lock);
18118850SMin.Xu@Sun.COM 
18128850SMin.Xu@Sun.COM 	return (DDI_FAILURE);
18133526Sxy150489 }
18143526Sxy150489 
18153526Sxy150489 static void
18163526Sxy150489 e1000g_m_stop(void *arg)
18173526Sxy150489 {
18183526Sxy150489 	struct e1000g *Adapter = (struct e1000g *)arg;
18193526Sxy150489 
18208479SChenlu.Chen@Sun.COM 	/* Drain tx sessions */
18218479SChenlu.Chen@Sun.COM 	(void) e1000g_tx_drain(Adapter);
18228479SChenlu.Chen@Sun.COM 
18238479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
18248479SChenlu.Chen@Sun.COM 
18258479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
18268479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
18278479SChenlu.Chen@Sun.COM 		return;
18288479SChenlu.Chen@Sun.COM 	}
18298479SChenlu.Chen@Sun.COM 	Adapter->e1000g_state &= ~E1000G_STARTED;
18304919Sxy150489 	e1000g_stop(Adapter, B_TRUE);
18318479SChenlu.Chen@Sun.COM 
18328479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
18338479SChenlu.Chen@Sun.COM 
18348479SChenlu.Chen@Sun.COM 	/* Disable and stop all the timers */
18358479SChenlu.Chen@Sun.COM 	disable_watchdog_timer(Adapter);
18368479SChenlu.Chen@Sun.COM 	stop_link_timer(Adapter);
18378479SChenlu.Chen@Sun.COM 	stop_82547_timer(Adapter->tx_ring);
18383526Sxy150489 }
18393526Sxy150489 
18403526Sxy150489 static void
18414919Sxy150489 e1000g_stop(struct e1000g *Adapter, boolean_t global)
18423526Sxy150489 {
18438850SMin.Xu@Sun.COM 	private_devi_list_t *devi_node;
18448850SMin.Xu@Sun.COM 	e1000g_rx_data_t *rx_data;
18457133Scc210113 	int result;
18467133Scc210113 
18473526Sxy150489 	Adapter->attach_progress &= ~ATTACH_PROGRESS_INIT;
18483526Sxy150489 
18493526Sxy150489 	/* Stop the chip and release pending resources */
18503526Sxy150489 
18517607STed.You@Sun.COM 	/* Tell firmware driver is no longer in control */
18527607STed.You@Sun.COM 	e1000g_release_driver_control(&Adapter->shared);
18537607STed.You@Sun.COM 
18544919Sxy150489 	e1000g_clear_all_interrupts(Adapter);
18557133Scc210113 
18567133Scc210113 	mutex_enter(&e1000g_nvm_lock);
18577133Scc210113 	result = e1000_reset_hw(&Adapter->shared);
18587133Scc210113 	mutex_exit(&e1000g_nvm_lock);
18597133Scc210113 
18607133Scc210113 	if (result != E1000_SUCCESS) {
18615273Sgl147354 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_INVAL_STATE);
18625273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST);
18635273Sgl147354 	}
18643526Sxy150489 
18653526Sxy150489 	/* Release resources still held by the TX descriptors */
18664919Sxy150489 	e1000g_tx_clean(Adapter);
18674061Sxy150489 
18685273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK)
18695273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST);
18705273Sgl147354 
18714061Sxy150489 	/* Clean the pending rx jumbo packet fragment */
18724919Sxy150489 	e1000g_rx_clean(Adapter);
18734061Sxy150489 
18748850SMin.Xu@Sun.COM 	if (global) {
18754919Sxy150489 		e1000g_release_dma_resources(Adapter);
18768850SMin.Xu@Sun.COM 
18778850SMin.Xu@Sun.COM 		mutex_enter(&e1000g_rx_detach_lock);
18788850SMin.Xu@Sun.COM 		rx_data = Adapter->rx_ring->rx_data;
18798850SMin.Xu@Sun.COM 		rx_data->flag |= E1000G_RX_STOPPED;
18808850SMin.Xu@Sun.COM 
18818850SMin.Xu@Sun.COM 		if (rx_data->pending_count == 0) {
18828850SMin.Xu@Sun.COM 			e1000g_free_rx_pending_buffers(rx_data);
18838850SMin.Xu@Sun.COM 			e1000g_free_rx_data(rx_data);
18848850SMin.Xu@Sun.COM 		} else {
18858850SMin.Xu@Sun.COM 			devi_node = rx_data->priv_devi_node;
18868850SMin.Xu@Sun.COM 			if (devi_node != NULL)
18878850SMin.Xu@Sun.COM 				atomic_inc_32(&devi_node->pending_rx_count);
18888850SMin.Xu@Sun.COM 			else
18898850SMin.Xu@Sun.COM 				atomic_inc_32(&Adapter->pending_rx_count);
18908850SMin.Xu@Sun.COM 		}
18918850SMin.Xu@Sun.COM 		mutex_exit(&e1000g_rx_detach_lock);
18928850SMin.Xu@Sun.COM 	}
18939190SMin.Xu@Sun.COM 
18949190SMin.Xu@Sun.COM 	if (Adapter->link_state == LINK_STATE_UP) {
18959190SMin.Xu@Sun.COM 		Adapter->link_state = LINK_STATE_UNKNOWN;
18969190SMin.Xu@Sun.COM 		mac_link_update(Adapter->mh, Adapter->link_state);
18979190SMin.Xu@Sun.COM 	}
18984061Sxy150489 }
18994061Sxy150489 
19004061Sxy150489 static void
19014919Sxy150489 e1000g_rx_clean(struct e1000g *Adapter)
19024919Sxy150489 {
19038850SMin.Xu@Sun.COM 	e1000g_rx_data_t *rx_data = Adapter->rx_ring->rx_data;
19048850SMin.Xu@Sun.COM 
19058850SMin.Xu@Sun.COM 	if (rx_data == NULL)
19068850SMin.Xu@Sun.COM 		return;
19078850SMin.Xu@Sun.COM 
19088850SMin.Xu@Sun.COM 	if (rx_data->rx_mblk != NULL) {
19098850SMin.Xu@Sun.COM 		freemsg(rx_data->rx_mblk);
19108850SMin.Xu@Sun.COM 		rx_data->rx_mblk = NULL;
19118850SMin.Xu@Sun.COM 		rx_data->rx_mblk_tail = NULL;
19128850SMin.Xu@Sun.COM 		rx_data->rx_mblk_len = 0;
19134919Sxy150489 	}
19144919Sxy150489 }
19154919Sxy150489 
19164919Sxy150489 static void
19174919Sxy150489 e1000g_tx_clean(struct e1000g *Adapter)
19184061Sxy150489 {
19194061Sxy150489 	e1000g_tx_ring_t *tx_ring;
19204919Sxy150489 	p_tx_sw_packet_t packet;
19214061Sxy150489 	mblk_t *mp;
19224061Sxy150489 	mblk_t *nmp;
19234061Sxy150489 	uint32_t packet_count;
19244061Sxy150489 
19254061Sxy150489 	tx_ring = Adapter->tx_ring;
19264061Sxy150489 
19273526Sxy150489 	/*
19283526Sxy150489 	 * Here we don't need to protect the lists using
19293526Sxy150489 	 * the usedlist_lock and freelist_lock, for they
19303526Sxy150489 	 * have been protected by the chip_lock.
19313526Sxy150489 	 */
19323526Sxy150489 	mp = NULL;
19333526Sxy150489 	nmp = NULL;
19344061Sxy150489 	packet_count = 0;
19354919Sxy150489 	packet = (p_tx_sw_packet_t)QUEUE_GET_HEAD(&tx_ring->used_list);
19363526Sxy150489 	while (packet != NULL) {
19373526Sxy150489 		if (packet->mp != NULL) {
19383526Sxy150489 			/* Assemble the message chain */
19393526Sxy150489 			if (mp == NULL) {
19403526Sxy150489 				mp = packet->mp;
19413526Sxy150489 				nmp = packet->mp;
19423526Sxy150489 			} else {
19433526Sxy150489 				nmp->b_next = packet->mp;
19443526Sxy150489 				nmp = packet->mp;
19453526Sxy150489 			}
19463526Sxy150489 			/* Disconnect the message from the sw packet */
19473526Sxy150489 			packet->mp = NULL;
19483526Sxy150489 		}
19493526Sxy150489 
19504919Sxy150489 		e1000g_free_tx_swpkt(packet);
19514061Sxy150489 		packet_count++;
19523526Sxy150489 
19534919Sxy150489 		packet = (p_tx_sw_packet_t)
19543526Sxy150489 		    QUEUE_GET_NEXT(&tx_ring->used_list, &packet->Link);
19553526Sxy150489 	}
19563526Sxy150489 
19575882Syy150190 	if (mp != NULL)
19585882Syy150190 		freemsgchain(mp);
19594061Sxy150489 
19604061Sxy150489 	if (packet_count > 0) {
19614061Sxy150489 		QUEUE_APPEND(&tx_ring->free_list, &tx_ring->used_list);
19624061Sxy150489 		QUEUE_INIT_LIST(&tx_ring->used_list);
19634061Sxy150489 
19644061Sxy150489 		/* Setup TX descriptor pointers */
19654061Sxy150489 		tx_ring->tbd_next = tx_ring->tbd_first;
19664061Sxy150489 		tx_ring->tbd_oldest = tx_ring->tbd_first;
19674061Sxy150489 
19684061Sxy150489 		/* Setup our HW Tx Head & Tail descriptor pointers */
19696735Scc210113 		E1000_WRITE_REG(&Adapter->shared, E1000_TDH(0), 0);
19706735Scc210113 		E1000_WRITE_REG(&Adapter->shared, E1000_TDT(0), 0);
19713526Sxy150489 	}
19723526Sxy150489 }
19733526Sxy150489 
19743526Sxy150489 static boolean_t
19753526Sxy150489 e1000g_tx_drain(struct e1000g *Adapter)
19763526Sxy150489 {
19773526Sxy150489 	int i;
19783526Sxy150489 	boolean_t done;
19793526Sxy150489 	e1000g_tx_ring_t *tx_ring;
19803526Sxy150489 
19813526Sxy150489 	tx_ring = Adapter->tx_ring;
19823526Sxy150489 
19833526Sxy150489 	/* Allow up to 'wsdraintime' for pending xmit's to complete. */
19844919Sxy150489 	for (i = 0; i < TX_DRAIN_TIME; i++) {
19853526Sxy150489 		mutex_enter(&tx_ring->usedlist_lock);
19863526Sxy150489 		done = IS_QUEUE_EMPTY(&tx_ring->used_list);
19873526Sxy150489 		mutex_exit(&tx_ring->usedlist_lock);
19883526Sxy150489 
19893526Sxy150489 		if (done)
19903526Sxy150489 			break;
19913526Sxy150489 
19923526Sxy150489 		msec_delay(1);
19933526Sxy150489 	}
19943526Sxy150489 
19953526Sxy150489 	return (done);
19963526Sxy150489 }
19973526Sxy150489 
19983526Sxy150489 static boolean_t
19993526Sxy150489 e1000g_rx_drain(struct e1000g *Adapter)
20003526Sxy150489 {
20018850SMin.Xu@Sun.COM 	int i;
20023526Sxy150489 	boolean_t done;
20033526Sxy150489 
20048850SMin.Xu@Sun.COM 	/*
20058850SMin.Xu@Sun.COM 	 * Allow up to RX_DRAIN_TIME for pending received packets to complete.
20068850SMin.Xu@Sun.COM 	 */
20078850SMin.Xu@Sun.COM 	for (i = 0; i < RX_DRAIN_TIME; i++) {
20088850SMin.Xu@Sun.COM 		done = (Adapter->pending_rx_count == 0);
20098850SMin.Xu@Sun.COM 
20108850SMin.Xu@Sun.COM 		if (done)
20118850SMin.Xu@Sun.COM 			break;
20128850SMin.Xu@Sun.COM 
20138850SMin.Xu@Sun.COM 		msec_delay(1);
20148850SMin.Xu@Sun.COM 	}
20153526Sxy150489 
20163526Sxy150489 	return (done);
20173526Sxy150489 }
20183526Sxy150489 
20197656SSherry.Moore@Sun.COM static boolean_t
20207656SSherry.Moore@Sun.COM e1000g_reset_adapter(struct e1000g *Adapter)
20213526Sxy150489 {
20228479SChenlu.Chen@Sun.COM 	/* Disable and stop all the timers */
20238479SChenlu.Chen@Sun.COM 	disable_watchdog_timer(Adapter);
20248479SChenlu.Chen@Sun.COM 	stop_link_timer(Adapter);
20258479SChenlu.Chen@Sun.COM 	stop_82547_timer(Adapter->tx_ring);
20268479SChenlu.Chen@Sun.COM 
20278479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
20288479SChenlu.Chen@Sun.COM 
202910434SGuoqing.Zhu@Sun.COM 	if (!(Adapter->e1000g_state & E1000G_STARTED)) {
203010434SGuoqing.Zhu@Sun.COM 		rw_exit(&Adapter->chip_lock);
203110434SGuoqing.Zhu@Sun.COM 		return (B_TRUE);
203210434SGuoqing.Zhu@Sun.COM 	}
203310434SGuoqing.Zhu@Sun.COM 
20344919Sxy150489 	e1000g_stop(Adapter, B_FALSE);
20354919Sxy150489 
20368479SChenlu.Chen@Sun.COM 	if (e1000g_start(Adapter, B_FALSE) != DDI_SUCCESS) {
20378479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
20383526Sxy150489 		e1000g_log(Adapter, CE_WARN, "Reset failed");
20398479SChenlu.Chen@Sun.COM 			return (B_FALSE);
20408479SChenlu.Chen@Sun.COM 	}
20418479SChenlu.Chen@Sun.COM 
20428479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
20438479SChenlu.Chen@Sun.COM 
20448479SChenlu.Chen@Sun.COM 	/* Enable and start the watchdog timer */
20458479SChenlu.Chen@Sun.COM 	enable_watchdog_timer(Adapter);
20463526Sxy150489 
20473526Sxy150489 	return (B_TRUE);
20483526Sxy150489 }
20493526Sxy150489 
20505273Sgl147354 boolean_t
20515273Sgl147354 e1000g_global_reset(struct e1000g *Adapter)
20525273Sgl147354 {
20538479SChenlu.Chen@Sun.COM 	/* Disable and stop all the timers */
20548479SChenlu.Chen@Sun.COM 	disable_watchdog_timer(Adapter);
20558479SChenlu.Chen@Sun.COM 	stop_link_timer(Adapter);
20568479SChenlu.Chen@Sun.COM 	stop_82547_timer(Adapter->tx_ring);
20578479SChenlu.Chen@Sun.COM 
20588479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
20598479SChenlu.Chen@Sun.COM 
20605273Sgl147354 	e1000g_stop(Adapter, B_TRUE);
20615273Sgl147354 
20625273Sgl147354 	Adapter->init_count = 0;
20635273Sgl147354 
20648479SChenlu.Chen@Sun.COM 	if (e1000g_start(Adapter, B_TRUE) != DDI_SUCCESS) {
20658479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
20665273Sgl147354 		e1000g_log(Adapter, CE_WARN, "Reset failed");
20675273Sgl147354 		return (B_FALSE);
20685273Sgl147354 	}
20695273Sgl147354 
20708479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
20718479SChenlu.Chen@Sun.COM 
20728479SChenlu.Chen@Sun.COM 	/* Enable and start the watchdog timer */
20738479SChenlu.Chen@Sun.COM 	enable_watchdog_timer(Adapter);
20748479SChenlu.Chen@Sun.COM 
20755273Sgl147354 	return (B_TRUE);
20765273Sgl147354 }
20775273Sgl147354 
20783526Sxy150489 /*
20794919Sxy150489  * e1000g_intr_pciexpress - ISR for PCI Express chipsets
20804919Sxy150489  *
20814919Sxy150489  * This interrupt service routine is for PCI-Express adapters.
20824919Sxy150489  * The ICR contents is valid only when the E1000_ICR_INT_ASSERTED
20834919Sxy150489  * bit is set.
20843526Sxy150489  */
20853526Sxy150489 static uint_t
20863526Sxy150489 e1000g_intr_pciexpress(caddr_t arg)
20873526Sxy150489 {
20883526Sxy150489 	struct e1000g *Adapter;
20894919Sxy150489 	uint32_t icr;
20903526Sxy150489 
20917426SChenliang.Xu@Sun.COM 	Adapter = (struct e1000g *)(uintptr_t)arg;
20924919Sxy150489 	icr = E1000_READ_REG(&Adapter->shared, E1000_ICR);
20934919Sxy150489 
209410805SChangqing.Li@Sun.COM 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
20955273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
209610805SChangqing.Li@Sun.COM 		return (DDI_INTR_CLAIMED);
209710805SChangqing.Li@Sun.COM 	}
20985273Sgl147354 
20994919Sxy150489 	if (icr & E1000_ICR_INT_ASSERTED) {
21003526Sxy150489 		/*
21013526Sxy150489 		 * E1000_ICR_INT_ASSERTED bit was set:
21023526Sxy150489 		 * Read(Clear) the ICR, claim this interrupt,
21033526Sxy150489 		 * look for work to do.
21043526Sxy150489 		 */
21054919Sxy150489 		e1000g_intr_work(Adapter, icr);
21063526Sxy150489 		return (DDI_INTR_CLAIMED);
21073526Sxy150489 	} else {
21083526Sxy150489 		/*
21093526Sxy150489 		 * E1000_ICR_INT_ASSERTED bit was not set:
21103526Sxy150489 		 * Don't claim this interrupt, return immediately.
21113526Sxy150489 		 */
21123526Sxy150489 		return (DDI_INTR_UNCLAIMED);
21133526Sxy150489 	}
21143526Sxy150489 }
21153526Sxy150489 
21163526Sxy150489 /*
21174919Sxy150489  * e1000g_intr - ISR for PCI/PCI-X chipsets
21184919Sxy150489  *
21194919Sxy150489  * This interrupt service routine is for PCI/PCI-X adapters.
21204919Sxy150489  * We check the ICR contents no matter the E1000_ICR_INT_ASSERTED
21214919Sxy150489  * bit is set or not.
21223526Sxy150489  */
21233526Sxy150489 static uint_t
21243526Sxy150489 e1000g_intr(caddr_t arg)
21253526Sxy150489 {
21263526Sxy150489 	struct e1000g *Adapter;
21274919Sxy150489 	uint32_t icr;
21283526Sxy150489 
21297426SChenliang.Xu@Sun.COM 	Adapter = (struct e1000g *)(uintptr_t)arg;
21304919Sxy150489 	icr = E1000_READ_REG(&Adapter->shared, E1000_ICR);
21314919Sxy150489 
213210805SChangqing.Li@Sun.COM 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
21335273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
213410805SChangqing.Li@Sun.COM 		return (DDI_INTR_CLAIMED);
213510805SChangqing.Li@Sun.COM 	}
21365273Sgl147354 
21374919Sxy150489 	if (icr) {
21383526Sxy150489 		/*
21393526Sxy150489 		 * Any bit was set in ICR:
21403526Sxy150489 		 * Read(Clear) the ICR, claim this interrupt,
21413526Sxy150489 		 * look for work to do.
21423526Sxy150489 		 */
21434919Sxy150489 		e1000g_intr_work(Adapter, icr);
21443526Sxy150489 		return (DDI_INTR_CLAIMED);
21453526Sxy150489 	} else {
21463526Sxy150489 		/*
21473526Sxy150489 		 * No bit was set in ICR:
21483526Sxy150489 		 * Don't claim this interrupt, return immediately.
21493526Sxy150489 		 */
21503526Sxy150489 		return (DDI_INTR_UNCLAIMED);
21513526Sxy150489 	}
21523526Sxy150489 }
21533526Sxy150489 
21543526Sxy150489 /*
21554919Sxy150489  * e1000g_intr_work - actual processing of ISR
21564919Sxy150489  *
21574919Sxy150489  * Read(clear) the ICR contents and call appropriate interrupt
21584919Sxy150489  * processing routines.
21593526Sxy150489  */
21603526Sxy150489 static void
21614919Sxy150489 e1000g_intr_work(struct e1000g *Adapter, uint32_t icr)
21623526Sxy150489 {
21635882Syy150190 	struct e1000_hw *hw;
21645882Syy150190 	hw = &Adapter->shared;
21655882Syy150190 	e1000g_tx_ring_t *tx_ring = Adapter->tx_ring;
21665882Syy150190 
21675882Syy150190 	Adapter->rx_pkt_cnt = 0;
21685882Syy150190 	Adapter->tx_pkt_cnt = 0;
21695882Syy150190 
21704919Sxy150489 	rw_enter(&Adapter->chip_lock, RW_READER);
21718479SChenlu.Chen@Sun.COM 
21728479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
21738479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
21748479SChenlu.Chen@Sun.COM 		return;
21758479SChenlu.Chen@Sun.COM 	}
21764919Sxy150489 	/*
21778479SChenlu.Chen@Sun.COM 	 * Here we need to check the "e1000g_state" flag within the chip_lock to
21784919Sxy150489 	 * ensure the receive routine will not execute when the adapter is
21794919Sxy150489 	 * being reset.
21804919Sxy150489 	 */
21818479SChenlu.Chen@Sun.COM 	if (!(Adapter->e1000g_state & E1000G_STARTED)) {
21824919Sxy150489 		rw_exit(&Adapter->chip_lock);
21834919Sxy150489 		return;
21844919Sxy150489 	}
21854919Sxy150489 
21864919Sxy150489 	if (icr & E1000_ICR_RXT0) {
21878833SVenu.Iyer@Sun.COM 		mblk_t			*mp = NULL;
21888833SVenu.Iyer@Sun.COM 		mblk_t			*tail = NULL;
21898275SEric Cheng 		e1000g_rx_ring_t	*rx_ring;
21908275SEric Cheng 
21918275SEric Cheng 		rx_ring = Adapter->rx_ring;
21928275SEric Cheng 		mutex_enter(&rx_ring->rx_lock);
21938275SEric Cheng 		/*
21948833SVenu.Iyer@Sun.COM 		 * Sometimes with legacy interrupts, it possible that
21958833SVenu.Iyer@Sun.COM 		 * there is a single interrupt for Rx/Tx. In which
21968833SVenu.Iyer@Sun.COM 		 * case, if poll flag is set, we shouldn't really
21978833SVenu.Iyer@Sun.COM 		 * be doing Rx processing.
21988275SEric Cheng 		 */
21998833SVenu.Iyer@Sun.COM 		if (!rx_ring->poll_flag)
22008833SVenu.Iyer@Sun.COM 			mp = e1000g_receive(rx_ring, &tail,
22018833SVenu.Iyer@Sun.COM 			    E1000G_CHAIN_NO_LIMIT);
22028833SVenu.Iyer@Sun.COM 		mutex_exit(&rx_ring->rx_lock);
22034919Sxy150489 		rw_exit(&Adapter->chip_lock);
22048833SVenu.Iyer@Sun.COM 		if (mp != NULL)
22058275SEric Cheng 			mac_rx_ring(Adapter->mh, rx_ring->mrh,
22068833SVenu.Iyer@Sun.COM 			    mp, rx_ring->ring_gen_num);
22074919Sxy150489 	} else
22084919Sxy150489 		rw_exit(&Adapter->chip_lock);
22093526Sxy150489 
22105882Syy150190 	if (icr & E1000_ICR_TXDW) {
22115882Syy150190 		if (!Adapter->tx_intr_enable)
22125882Syy150190 			e1000g_clear_tx_interrupt(Adapter);
22135882Syy150190 
22145882Syy150190 		/* Recycle the tx descriptors */
22155882Syy150190 		rw_enter(&Adapter->chip_lock, RW_READER);
22167426SChenliang.Xu@Sun.COM 		(void) e1000g_recycle(tx_ring);
22175882Syy150190 		E1000G_DEBUG_STAT(tx_ring->stat_recycle_intr);
22185882Syy150190 		rw_exit(&Adapter->chip_lock);
22195882Syy150190 
22205882Syy150190 		if (tx_ring->resched_needed &&
22215882Syy150190 		    (tx_ring->tbd_avail > DEFAULT_TX_UPDATE_THRESHOLD)) {
22225882Syy150190 			tx_ring->resched_needed = B_FALSE;
22235882Syy150190 			mac_tx_update(Adapter->mh);
22245882Syy150190 			E1000G_STAT(tx_ring->stat_reschedule);
22255882Syy150190 		}
22265882Syy150190 	}
22275882Syy150190 
22283526Sxy150489 	/*
22293526Sxy150489 	 * The Receive Sequence errors RXSEQ and the link status change LSC
22303526Sxy150489 	 * are checked to detect that the cable has been pulled out. For
22313526Sxy150489 	 * the Wiseman 2.0 silicon, the receive sequence errors interrupt
22323526Sxy150489 	 * are an indication that cable is not connected.
22333526Sxy150489 	 */
22344919Sxy150489 	if ((icr & E1000_ICR_RXSEQ) ||
22354919Sxy150489 	    (icr & E1000_ICR_LSC) ||
22364919Sxy150489 	    (icr & E1000_ICR_GPI_EN1)) {
22374061Sxy150489 		boolean_t link_changed;
22384061Sxy150489 		timeout_id_t tid = 0;
22393526Sxy150489 
22404919Sxy150489 		stop_watchdog_timer(Adapter);
22414919Sxy150489 
22425082Syy150190 		rw_enter(&Adapter->chip_lock, RW_WRITER);
22435082Syy150190 
22445082Syy150190 		/*
22455082Syy150190 		 * Because we got a link-status-change interrupt, force
22465082Syy150190 		 * e1000_check_for_link() to look at phy
22475082Syy150190 		 */
22485082Syy150190 		Adapter->shared.mac.get_link_status = B_TRUE;
22495082Syy150190 
22504061Sxy150489 		/* e1000g_link_check takes care of link status change */
22514061Sxy150489 		link_changed = e1000g_link_check(Adapter);
22525082Syy150190 
22535082Syy150190 		/* Get new phy state */
22545082Syy150190 		e1000g_get_phy_state(Adapter);
22555082Syy150190 
22564061Sxy150489 		/*
22574061Sxy150489 		 * If the link timer has not timed out, we'll not notify
22584919Sxy150489 		 * the upper layer with any link state until the link is up.
22594061Sxy150489 		 */
22604061Sxy150489 		if (link_changed && !Adapter->link_complete) {
22614061Sxy150489 			if (Adapter->link_state == LINK_STATE_UP) {
22625082Syy150190 				mutex_enter(&Adapter->link_lock);
22634061Sxy150489 				Adapter->link_complete = B_TRUE;
22644061Sxy150489 				tid = Adapter->link_tid;
22654061Sxy150489 				Adapter->link_tid = 0;
22665082Syy150190 				mutex_exit(&Adapter->link_lock);
22674061Sxy150489 			} else {
22684061Sxy150489 				link_changed = B_FALSE;
22694061Sxy150489 			}
22704061Sxy150489 		}
22715082Syy150190 		rw_exit(&Adapter->chip_lock);
22723526Sxy150489 
22734061Sxy150489 		if (link_changed) {
22744061Sxy150489 			if (tid != 0)
22754061Sxy150489 				(void) untimeout(tid);
22764061Sxy150489 
22774139Sxy150489 			/*
22784139Sxy150489 			 * Workaround for esb2. Data stuck in fifo on a link
22797133Scc210113 			 * down event. Stop receiver here and reset in watchdog.
22804139Sxy150489 			 */
22814139Sxy150489 			if ((Adapter->link_state == LINK_STATE_DOWN) &&
22827133Scc210113 			    (Adapter->shared.mac.type == e1000_80003es2lan)) {
22837133Scc210113 				uint32_t rctl = E1000_READ_REG(hw, E1000_RCTL);
22847133Scc210113 				E1000_WRITE_REG(hw, E1000_RCTL,
22857133Scc210113 				    rctl & ~E1000_RCTL_EN);
22867133Scc210113 				e1000g_log(Adapter, CE_WARN,
22877133Scc210113 				    "ESB2 receiver disabled");
22887133Scc210113 				Adapter->esb2_workaround = B_TRUE;
22897133Scc210113 			}
22908850SMin.Xu@Sun.COM 			if (!Adapter->reset_flag)
22918850SMin.Xu@Sun.COM 				mac_link_update(Adapter->mh,
22928850SMin.Xu@Sun.COM 				    Adapter->link_state);
22938850SMin.Xu@Sun.COM 			if (Adapter->link_state == LINK_STATE_UP)
22948850SMin.Xu@Sun.COM 				Adapter->reset_flag = B_FALSE;
22953526Sxy150489 		}
22963526Sxy150489 
22974919Sxy150489 		start_watchdog_timer(Adapter);
22983526Sxy150489 	}
22995882Syy150190 }
23005882Syy150190 
23013526Sxy150489 static void
23023526Sxy150489 e1000g_init_unicst(struct e1000g *Adapter)
23033526Sxy150489 {
23043526Sxy150489 	struct e1000_hw *hw;
23053526Sxy150489 	int slot;
23063526Sxy150489 
23074919Sxy150489 	hw = &Adapter->shared;
23083526Sxy150489 
23098275SEric Cheng 	if (Adapter->init_count == 0) {
23103526Sxy150489 		/* Initialize the multiple unicast addresses */
23113526Sxy150489 		Adapter->unicst_total = MAX_NUM_UNICAST_ADDRESSES;
23123526Sxy150489 
23138275SEric Cheng 		/* Workaround for an erratum of 82571 chipst */
23144919Sxy150489 		if ((hw->mac.type == e1000_82571) &&
23154919Sxy150489 		    (e1000_get_laa_state_82571(hw) == B_TRUE))
23163526Sxy150489 			Adapter->unicst_total--;
23173526Sxy150489 
23188275SEric Cheng 		Adapter->unicst_avail = Adapter->unicst_total;
23198275SEric Cheng 
23208275SEric Cheng 		for (slot = 0; slot < Adapter->unicst_total; slot++) {
23218275SEric Cheng 			/* Clear both the flag and MAC address */
23228275SEric Cheng 			Adapter->unicst_addr[slot].reg.high = 0;
23238275SEric Cheng 			Adapter->unicst_addr[slot].reg.low = 0;
23248275SEric Cheng 		}
23253526Sxy150489 	} else {
23268275SEric Cheng 		/* Workaround for an erratum of 82571 chipst */
23274919Sxy150489 		if ((hw->mac.type == e1000_82571) &&
23284919Sxy150489 		    (e1000_get_laa_state_82571(hw) == B_TRUE))
23294919Sxy150489 			e1000_rar_set(hw, hw->mac.addr, LAST_RAR_ENTRY);
23303526Sxy150489 
23313526Sxy150489 		/* Re-configure the RAR registers */
23328275SEric Cheng 		for (slot = 0; slot < Adapter->unicst_total; slot++)
23338275SEric Cheng 			if (Adapter->unicst_addr[slot].mac.set == 1)
23348275SEric Cheng 				e1000_rar_set(hw,
23358275SEric Cheng 				    Adapter->unicst_addr[slot].mac.addr, slot);
23363526Sxy150489 	}
23375273Sgl147354 
23385273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK)
23395273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
23403526Sxy150489 }
23413526Sxy150489 
23423526Sxy150489 static int
23433526Sxy150489 e1000g_unicst_set(struct e1000g *Adapter, const uint8_t *mac_addr,
23448275SEric Cheng     int slot)
23453526Sxy150489 {
23463526Sxy150489 	struct e1000_hw *hw;
23473526Sxy150489 
23484919Sxy150489 	hw = &Adapter->shared;
23493526Sxy150489 
23503526Sxy150489 	/*
23513526Sxy150489 	 * The first revision of Wiseman silicon (rev 2.0) has an errata
23523526Sxy150489 	 * that requires the receiver to be in reset when any of the
23533526Sxy150489 	 * receive address registers (RAR regs) are accessed.  The first
23543526Sxy150489 	 * rev of Wiseman silicon also requires MWI to be disabled when
23553526Sxy150489 	 * a global reset or a receive reset is issued.  So before we
23563526Sxy150489 	 * initialize the RARs, we check the rev of the Wiseman controller
23573526Sxy150489 	 * and work around any necessary HW errata.
23583526Sxy150489 	 */
23594919Sxy150489 	if ((hw->mac.type == e1000_82542) &&
23604919Sxy150489 	    (hw->revision_id == E1000_REVISION_2)) {
23613526Sxy150489 		e1000_pci_clear_mwi(hw);
23624919Sxy150489 		E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST);
23634919Sxy150489 		msec_delay(5);
23643526Sxy150489 	}
23658275SEric Cheng 	if (mac_addr == NULL) {
23668275SEric Cheng 		E1000_WRITE_REG_ARRAY(hw, E1000_RA, slot << 1, 0);
23678275SEric Cheng 		E1000_WRITE_FLUSH(hw);
23688275SEric Cheng 		E1000_WRITE_REG_ARRAY(hw, E1000_RA, (slot << 1) + 1, 0);
23698275SEric Cheng 		E1000_WRITE_FLUSH(hw);
23708275SEric Cheng 		/* Clear both the flag and MAC address */
23718275SEric Cheng 		Adapter->unicst_addr[slot].reg.high = 0;
23728275SEric Cheng 		Adapter->unicst_addr[slot].reg.low = 0;
23738275SEric Cheng 	} else {
23748275SEric Cheng 		bcopy(mac_addr, Adapter->unicst_addr[slot].mac.addr,
23758275SEric Cheng 		    ETHERADDRL);
23768275SEric Cheng 		e1000_rar_set(hw, (uint8_t *)mac_addr, slot);
23778275SEric Cheng 		Adapter->unicst_addr[slot].mac.set = 1;
23788275SEric Cheng 	}
23798275SEric Cheng 
23808275SEric Cheng 	/* Workaround for an erratum of 82571 chipst */
23813526Sxy150489 	if (slot == 0) {
23824919Sxy150489 		if ((hw->mac.type == e1000_82571) &&
23834919Sxy150489 		    (e1000_get_laa_state_82571(hw) == B_TRUE))
23848275SEric Cheng 			if (mac_addr == NULL) {
23858275SEric Cheng 				E1000_WRITE_REG_ARRAY(hw, E1000_RA,
23868275SEric Cheng 				    slot << 1, 0);
23878275SEric Cheng 				E1000_WRITE_FLUSH(hw);
23888275SEric Cheng 				E1000_WRITE_REG_ARRAY(hw, E1000_RA,
23898275SEric Cheng 				    (slot << 1) + 1, 0);
23908275SEric Cheng 				E1000_WRITE_FLUSH(hw);
23918275SEric Cheng 			} else {
23928275SEric Cheng 				e1000_rar_set(hw, (uint8_t *)mac_addr,
23938275SEric Cheng 				    LAST_RAR_ENTRY);
23948275SEric Cheng 			}
23953526Sxy150489 	}
23963526Sxy150489 
23973526Sxy150489 	/*
23983526Sxy150489 	 * If we are using Wiseman rev 2.0 silicon, we will have previously
23993526Sxy150489 	 * put the receive in reset, and disabled MWI, to work around some
24003526Sxy150489 	 * HW errata.  Now we should take the receiver out of reset, and
24013526Sxy150489 	 * re-enabled if MWI if it was previously enabled by the PCI BIOS.
24023526Sxy150489 	 */
24034919Sxy150489 	if ((hw->mac.type == e1000_82542) &&
24044919Sxy150489 	    (hw->revision_id == E1000_REVISION_2)) {
24054919Sxy150489 		E1000_WRITE_REG(hw, E1000_RCTL, 0);
24064919Sxy150489 		msec_delay(1);
24074919Sxy150489 		if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
24083526Sxy150489 			e1000_pci_set_mwi(hw);
24094919Sxy150489 		e1000g_rx_setup(Adapter);
24103526Sxy150489 	}
24113526Sxy150489 
24125273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
24135273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
24145273Sgl147354 		return (EIO);
24155273Sgl147354 	}
24165273Sgl147354 
24173526Sxy150489 	return (0);
24183526Sxy150489 }
24193526Sxy150489 
24203526Sxy150489 static int
24213526Sxy150489 multicst_add(struct e1000g *Adapter, const uint8_t *multiaddr)
24223526Sxy150489 {
24234919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
24249770SChangqing.Li@Sun.COM 	struct ether_addr *newtable;
24259770SChangqing.Li@Sun.COM 	size_t new_len;
24269770SChangqing.Li@Sun.COM 	size_t old_len;
24273526Sxy150489 	int res = 0;
24283526Sxy150489 
24293526Sxy150489 	if ((multiaddr[0] & 01) == 0) {
24303526Sxy150489 		res = EINVAL;
24319770SChangqing.Li@Sun.COM 		e1000g_log(Adapter, CE_WARN, "Illegal multicast address");
24323526Sxy150489 		goto done;
24333526Sxy150489 	}
24343526Sxy150489 
24359770SChangqing.Li@Sun.COM 	if (Adapter->mcast_count >= Adapter->mcast_max_num) {
24363526Sxy150489 		res = ENOENT;
24379770SChangqing.Li@Sun.COM 		e1000g_log(Adapter, CE_WARN,
24389770SChangqing.Li@Sun.COM 		    "Adapter requested more than %d mcast addresses",
24399770SChangqing.Li@Sun.COM 		    Adapter->mcast_max_num);
24403526Sxy150489 		goto done;
24413526Sxy150489 	}
24423526Sxy150489 
24439770SChangqing.Li@Sun.COM 
24449770SChangqing.Li@Sun.COM 	if (Adapter->mcast_count == Adapter->mcast_alloc_count) {
24459770SChangqing.Li@Sun.COM 		old_len = Adapter->mcast_alloc_count *
24469770SChangqing.Li@Sun.COM 		    sizeof (struct ether_addr);
24479770SChangqing.Li@Sun.COM 		new_len = (Adapter->mcast_alloc_count + MCAST_ALLOC_SIZE) *
24489770SChangqing.Li@Sun.COM 		    sizeof (struct ether_addr);
24499770SChangqing.Li@Sun.COM 
24509770SChangqing.Li@Sun.COM 		newtable = kmem_alloc(new_len, KM_NOSLEEP);
24519770SChangqing.Li@Sun.COM 		if (newtable == NULL) {
24529770SChangqing.Li@Sun.COM 			res = ENOMEM;
24539770SChangqing.Li@Sun.COM 			e1000g_log(Adapter, CE_WARN,
24549770SChangqing.Li@Sun.COM 			    "Not enough memory to alloc mcast table");
24559770SChangqing.Li@Sun.COM 			goto done;
24569770SChangqing.Li@Sun.COM 		}
24579770SChangqing.Li@Sun.COM 
24589770SChangqing.Li@Sun.COM 		if (Adapter->mcast_table != NULL) {
24599770SChangqing.Li@Sun.COM 			bcopy(Adapter->mcast_table, newtable, old_len);
24609770SChangqing.Li@Sun.COM 			kmem_free(Adapter->mcast_table, old_len);
24619770SChangqing.Li@Sun.COM 		}
24629770SChangqing.Li@Sun.COM 		Adapter->mcast_alloc_count += MCAST_ALLOC_SIZE;
24639770SChangqing.Li@Sun.COM 		Adapter->mcast_table = newtable;
24649770SChangqing.Li@Sun.COM 	}
24659770SChangqing.Li@Sun.COM 
24663526Sxy150489 	bcopy(multiaddr,
24673526Sxy150489 	    &Adapter->mcast_table[Adapter->mcast_count], ETHERADDRL);
24683526Sxy150489 	Adapter->mcast_count++;
24693526Sxy150489 
24703526Sxy150489 	/*
24713526Sxy150489 	 * Update the MC table in the hardware
24723526Sxy150489 	 */
24734919Sxy150489 	e1000g_clear_interrupt(Adapter);
24744919Sxy150489 
247510680SMin.Xu@Sun.COM 	e1000_update_mc_addr_list(hw,
247610680SMin.Xu@Sun.COM 	    (uint8_t *)Adapter->mcast_table, Adapter->mcast_count);
24774919Sxy150489 
24784919Sxy150489 	e1000g_mask_interrupt(Adapter);
24793526Sxy150489 
24805273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
24815273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
24825273Sgl147354 		res = EIO;
24835273Sgl147354 	}
24845273Sgl147354 
24858479SChenlu.Chen@Sun.COM done:
24863526Sxy150489 	return (res);
24873526Sxy150489 }
24883526Sxy150489 
24893526Sxy150489 static int
24903526Sxy150489 multicst_remove(struct e1000g *Adapter, const uint8_t *multiaddr)
24913526Sxy150489 {
24924919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
24939770SChangqing.Li@Sun.COM 	struct ether_addr *newtable;
24949770SChangqing.Li@Sun.COM 	size_t new_len;
24959770SChangqing.Li@Sun.COM 	size_t old_len;
24963526Sxy150489 	unsigned i;
24973526Sxy150489 
24983526Sxy150489 	for (i = 0; i < Adapter->mcast_count; i++) {
24993526Sxy150489 		if (bcmp(multiaddr, &Adapter->mcast_table[i],
25003526Sxy150489 		    ETHERADDRL) == 0) {
25013526Sxy150489 			for (i++; i < Adapter->mcast_count; i++) {
25023526Sxy150489 				Adapter->mcast_table[i - 1] =
25033526Sxy150489 				    Adapter->mcast_table[i];
25043526Sxy150489 			}
25053526Sxy150489 			Adapter->mcast_count--;
25063526Sxy150489 			break;
25073526Sxy150489 		}
25083526Sxy150489 	}
25093526Sxy150489 
25109770SChangqing.Li@Sun.COM 	if ((Adapter->mcast_alloc_count - Adapter->mcast_count) >
25119770SChangqing.Li@Sun.COM 	    MCAST_ALLOC_SIZE) {
25129770SChangqing.Li@Sun.COM 		old_len = Adapter->mcast_alloc_count *
25139770SChangqing.Li@Sun.COM 		    sizeof (struct ether_addr);
25149770SChangqing.Li@Sun.COM 		new_len = (Adapter->mcast_alloc_count - MCAST_ALLOC_SIZE) *
25159770SChangqing.Li@Sun.COM 		    sizeof (struct ether_addr);
25169770SChangqing.Li@Sun.COM 
25179770SChangqing.Li@Sun.COM 		newtable = kmem_alloc(new_len, KM_NOSLEEP);
25189770SChangqing.Li@Sun.COM 		if (newtable != NULL) {
25199770SChangqing.Li@Sun.COM 			bcopy(Adapter->mcast_table, newtable, new_len);
25209770SChangqing.Li@Sun.COM 			kmem_free(Adapter->mcast_table, old_len);
25219770SChangqing.Li@Sun.COM 
25229770SChangqing.Li@Sun.COM 			Adapter->mcast_alloc_count -= MCAST_ALLOC_SIZE;
25239770SChangqing.Li@Sun.COM 			Adapter->mcast_table = newtable;
25249770SChangqing.Li@Sun.COM 		}
25259770SChangqing.Li@Sun.COM 	}
25269770SChangqing.Li@Sun.COM 
25273526Sxy150489 	/*
25283526Sxy150489 	 * Update the MC table in the hardware
25293526Sxy150489 	 */
25304919Sxy150489 	e1000g_clear_interrupt(Adapter);
25314919Sxy150489 
253210680SMin.Xu@Sun.COM 	e1000_update_mc_addr_list(hw,
253310680SMin.Xu@Sun.COM 	    (uint8_t *)Adapter->mcast_table, Adapter->mcast_count);
25344919Sxy150489 
25354919Sxy150489 	e1000g_mask_interrupt(Adapter);
25363526Sxy150489 
25375273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
25385273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
25395273Sgl147354 		return (EIO);
25405273Sgl147354 	}
25415273Sgl147354 
25423526Sxy150489 	return (0);
25433526Sxy150489 }
25443526Sxy150489 
25459770SChangqing.Li@Sun.COM static void
25469770SChangqing.Li@Sun.COM e1000g_release_multicast(struct e1000g *Adapter)
25479770SChangqing.Li@Sun.COM {
25489770SChangqing.Li@Sun.COM 	if (Adapter->mcast_table != NULL) {
25499770SChangqing.Li@Sun.COM 		kmem_free(Adapter->mcast_table,
25509770SChangqing.Li@Sun.COM 		    Adapter->mcast_alloc_count * sizeof (struct ether_addr));
25519770SChangqing.Li@Sun.COM 		Adapter->mcast_table = NULL;
25529770SChangqing.Li@Sun.COM 	}
25539770SChangqing.Li@Sun.COM }
25549770SChangqing.Li@Sun.COM 
25553526Sxy150489 int
25563526Sxy150489 e1000g_m_multicst(void *arg, boolean_t add, const uint8_t *addr)
25573526Sxy150489 {
25583526Sxy150489 	struct e1000g *Adapter = (struct e1000g *)arg;
25598479SChenlu.Chen@Sun.COM 	int result;
25608479SChenlu.Chen@Sun.COM 
25618479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
25628479SChenlu.Chen@Sun.COM 
25638479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
25648479SChenlu.Chen@Sun.COM 		result = ECANCELED;
25658479SChenlu.Chen@Sun.COM 		goto done;
25668479SChenlu.Chen@Sun.COM 	}
25678479SChenlu.Chen@Sun.COM 
25688479SChenlu.Chen@Sun.COM 	result = (add) ? multicst_add(Adapter, addr)
25698479SChenlu.Chen@Sun.COM 	    : multicst_remove(Adapter, addr);
25708479SChenlu.Chen@Sun.COM 
25718479SChenlu.Chen@Sun.COM done:
25728479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
25738479SChenlu.Chen@Sun.COM 	return (result);
25748479SChenlu.Chen@Sun.COM 
25753526Sxy150489 }
25763526Sxy150489 
25773526Sxy150489 int
25783526Sxy150489 e1000g_m_promisc(void *arg, boolean_t on)
25793526Sxy150489 {
25803526Sxy150489 	struct e1000g *Adapter = (struct e1000g *)arg;
25814919Sxy150489 	uint32_t rctl;
25823526Sxy150489 
25833526Sxy150489 	rw_enter(&Adapter->chip_lock, RW_WRITER);
25843526Sxy150489 
25858479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
25868479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
25878479SChenlu.Chen@Sun.COM 		return (ECANCELED);
25888479SChenlu.Chen@Sun.COM 	}
25898479SChenlu.Chen@Sun.COM 
25904919Sxy150489 	rctl = E1000_READ_REG(&Adapter->shared, E1000_RCTL);
25913526Sxy150489 
25923526Sxy150489 	if (on)
25934919Sxy150489 		rctl |=
25943526Sxy150489 		    (E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_BAM);
25953526Sxy150489 	else
25964919Sxy150489 		rctl &= (~(E1000_RCTL_UPE | E1000_RCTL_MPE));
25974919Sxy150489 
25984919Sxy150489 	E1000_WRITE_REG(&Adapter->shared, E1000_RCTL, rctl);
25993526Sxy150489 
26003526Sxy150489 	Adapter->e1000g_promisc = on;
26013526Sxy150489 
26023526Sxy150489 	rw_exit(&Adapter->chip_lock);
26033526Sxy150489 
26045273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
26055273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
26065273Sgl147354 		return (EIO);
26075273Sgl147354 	}
26085273Sgl147354 
26093526Sxy150489 	return (0);
26103526Sxy150489 }
26113526Sxy150489 
26128275SEric Cheng /*
26138275SEric Cheng  * Entry points to enable and disable interrupts at the granularity of
26148275SEric Cheng  * a group.
26158275SEric Cheng  * Turns the poll_mode for the whole adapter on and off to enable or
26168275SEric Cheng  * override the ring level polling control over the hardware interrupts.
26178275SEric Cheng  */
26188275SEric Cheng static int
26198275SEric Cheng e1000g_rx_group_intr_enable(mac_intr_handle_t arg)
26208275SEric Cheng {
26218275SEric Cheng 	struct e1000g		*adapter = (struct e1000g *)arg;
26228275SEric Cheng 	e1000g_rx_ring_t *rx_ring = adapter->rx_ring;
26238275SEric Cheng 
26248275SEric Cheng 	/*
26258275SEric Cheng 	 * Later interrupts at the granularity of the this ring will
26268275SEric Cheng 	 * invoke mac_rx() with NULL, indicating the need for another
26278275SEric Cheng 	 * software classification.
26288275SEric Cheng 	 * We have a single ring usable per adapter now, so we only need to
26298275SEric Cheng 	 * reset the rx handle for that one.
26308275SEric Cheng 	 * When more RX rings can be used, we should update each one of them.
26318275SEric Cheng 	 */
26328275SEric Cheng 	mutex_enter(&rx_ring->rx_lock);
26338275SEric Cheng 	rx_ring->mrh = NULL;
26348275SEric Cheng 	adapter->poll_mode = B_FALSE;
26358275SEric Cheng 	mutex_exit(&rx_ring->rx_lock);
26368275SEric Cheng 	return (0);
26378275SEric Cheng }
26388275SEric Cheng 
26398275SEric Cheng static int
26408275SEric Cheng e1000g_rx_group_intr_disable(mac_intr_handle_t arg)
26418275SEric Cheng {
26428275SEric Cheng 	struct e1000g *adapter = (struct e1000g *)arg;
26438275SEric Cheng 	e1000g_rx_ring_t *rx_ring = adapter->rx_ring;
26448275SEric Cheng 
26458275SEric Cheng 	mutex_enter(&rx_ring->rx_lock);
26468275SEric Cheng 
26478275SEric Cheng 	/*
26488275SEric Cheng 	 * Later interrupts at the granularity of the this ring will
26498275SEric Cheng 	 * invoke mac_rx() with the handle for this ring;
26508275SEric Cheng 	 */
26518275SEric Cheng 	adapter->poll_mode = B_TRUE;
26528275SEric Cheng 	rx_ring->mrh = rx_ring->mrh_init;
26538275SEric Cheng 	mutex_exit(&rx_ring->rx_lock);
26548275SEric Cheng 	return (0);
26558275SEric Cheng }
26568275SEric Cheng 
26578275SEric Cheng /*
26588275SEric Cheng  * Entry points to enable and disable interrupts at the granularity of
26598275SEric Cheng  * a ring.
26608275SEric Cheng  * adapter poll_mode controls whether we actually proceed with hardware
26618275SEric Cheng  * interrupt toggling.
26628275SEric Cheng  */
26638275SEric Cheng static int
26648275SEric Cheng e1000g_rx_ring_intr_enable(mac_intr_handle_t intrh)
26658275SEric Cheng {
26668275SEric Cheng 	e1000g_rx_ring_t	*rx_ring = (e1000g_rx_ring_t *)intrh;
26678275SEric Cheng 	struct e1000g 		*adapter = rx_ring->adapter;
26688275SEric Cheng 	struct e1000_hw 	*hw = &adapter->shared;
26698275SEric Cheng 	uint32_t		intr_mask;
26708275SEric Cheng 
26718479SChenlu.Chen@Sun.COM 	rw_enter(&adapter->chip_lock, RW_READER);
26728479SChenlu.Chen@Sun.COM 
26738479SChenlu.Chen@Sun.COM 	if (adapter->e1000g_state & E1000G_SUSPENDED) {
26748479SChenlu.Chen@Sun.COM 		rw_exit(&adapter->chip_lock);
26758479SChenlu.Chen@Sun.COM 		return (0);
26768479SChenlu.Chen@Sun.COM 	}
26778479SChenlu.Chen@Sun.COM 
26788275SEric Cheng 	mutex_enter(&rx_ring->rx_lock);
26798275SEric Cheng 	rx_ring->poll_flag = 0;
26808275SEric Cheng 	mutex_exit(&rx_ring->rx_lock);
26818275SEric Cheng 
26828833SVenu.Iyer@Sun.COM 	/* Rx interrupt enabling for MSI and legacy */
26838833SVenu.Iyer@Sun.COM 	intr_mask = E1000_READ_REG(hw, E1000_IMS);
26848833SVenu.Iyer@Sun.COM 	intr_mask |= E1000_IMS_RXT0;
26858833SVenu.Iyer@Sun.COM 	E1000_WRITE_REG(hw, E1000_IMS, intr_mask);
26868833SVenu.Iyer@Sun.COM 	E1000_WRITE_FLUSH(hw);
26878833SVenu.Iyer@Sun.COM 
26888833SVenu.Iyer@Sun.COM 	/* Trigger a Rx interrupt to check Rx ring */
26898833SVenu.Iyer@Sun.COM 	E1000_WRITE_REG(hw, E1000_ICS, E1000_IMS_RXT0);
26908833SVenu.Iyer@Sun.COM 	E1000_WRITE_FLUSH(hw);
26918479SChenlu.Chen@Sun.COM 
26928479SChenlu.Chen@Sun.COM 	rw_exit(&adapter->chip_lock);
26938275SEric Cheng 	return (0);
26948275SEric Cheng }
26958275SEric Cheng 
26968275SEric Cheng static int
26978275SEric Cheng e1000g_rx_ring_intr_disable(mac_intr_handle_t intrh)
26988275SEric Cheng {
26998275SEric Cheng 	e1000g_rx_ring_t	*rx_ring = (e1000g_rx_ring_t *)intrh;
27008275SEric Cheng 	struct e1000g 		*adapter = rx_ring->adapter;
27018275SEric Cheng 	struct e1000_hw 	*hw = &adapter->shared;
27028275SEric Cheng 
27038479SChenlu.Chen@Sun.COM 	rw_enter(&adapter->chip_lock, RW_READER);
27048479SChenlu.Chen@Sun.COM 
27058479SChenlu.Chen@Sun.COM 	if (adapter->e1000g_state & E1000G_SUSPENDED) {
27068479SChenlu.Chen@Sun.COM 		rw_exit(&adapter->chip_lock);
27078479SChenlu.Chen@Sun.COM 		return (0);
27088479SChenlu.Chen@Sun.COM 	}
27098275SEric Cheng 	mutex_enter(&rx_ring->rx_lock);
27108275SEric Cheng 	rx_ring->poll_flag = 1;
27118275SEric Cheng 	mutex_exit(&rx_ring->rx_lock);
27128275SEric Cheng 
27138833SVenu.Iyer@Sun.COM 	/* Rx interrupt disabling for MSI and legacy */
27148833SVenu.Iyer@Sun.COM 	E1000_WRITE_REG(hw, E1000_IMC, E1000_IMS_RXT0);
27158833SVenu.Iyer@Sun.COM 	E1000_WRITE_FLUSH(hw);
27168479SChenlu.Chen@Sun.COM 
27178479SChenlu.Chen@Sun.COM 	rw_exit(&adapter->chip_lock);
27188275SEric Cheng 	return (0);
27198275SEric Cheng }
27208275SEric Cheng 
27218275SEric Cheng /*
27228275SEric Cheng  * e1000g_unicst_find - Find the slot for the specified unicast address
27238275SEric Cheng  */
27248275SEric Cheng static int
27258275SEric Cheng e1000g_unicst_find(struct e1000g *Adapter, const uint8_t *mac_addr)
27268275SEric Cheng {
27278275SEric Cheng 	int slot;
27288275SEric Cheng 
27298275SEric Cheng 	for (slot = 0; slot < Adapter->unicst_total; slot++) {
27308479SChenlu.Chen@Sun.COM 		if ((Adapter->unicst_addr[slot].mac.set == 1) &&
27318479SChenlu.Chen@Sun.COM 		    (bcmp(Adapter->unicst_addr[slot].mac.addr,
27328479SChenlu.Chen@Sun.COM 		    mac_addr, ETHERADDRL) == 0))
27338275SEric Cheng 				return (slot);
27348275SEric Cheng 	}
27358275SEric Cheng 
27368275SEric Cheng 	return (-1);
27378275SEric Cheng }
27388275SEric Cheng 
27398275SEric Cheng /*
27408275SEric Cheng  * Entry points to add and remove a MAC address to a ring group.
27418275SEric Cheng  * The caller takes care of adding and removing the MAC addresses
27428275SEric Cheng  * to the filter via these two routines.
27438275SEric Cheng  */
27448275SEric Cheng 
27458275SEric Cheng static int
27468275SEric Cheng e1000g_addmac(void *arg, const uint8_t *mac_addr)
27478275SEric Cheng {
27488275SEric Cheng 	struct e1000g *Adapter = (struct e1000g *)arg;
27498400SNicolas.Droux@Sun.COM 	int slot, err;
27508275SEric Cheng 
27518479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
27528479SChenlu.Chen@Sun.COM 
27538479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
27548479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
27558479SChenlu.Chen@Sun.COM 		return (ECANCELED);
27568479SChenlu.Chen@Sun.COM 	}
27578275SEric Cheng 
27588275SEric Cheng 	if (e1000g_unicst_find(Adapter, mac_addr) != -1) {
27598275SEric Cheng 		/* The same address is already in slot */
27608479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
27618275SEric Cheng 		return (0);
27628275SEric Cheng 	}
27638275SEric Cheng 
27648275SEric Cheng 	if (Adapter->unicst_avail == 0) {
27658275SEric Cheng 		/* no slots available */
27668479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
27678275SEric Cheng 		return (ENOSPC);
27688275SEric Cheng 	}
27698275SEric Cheng 
27708275SEric Cheng 	/* Search for a free slot */
27718275SEric Cheng 	for (slot = 0; slot < Adapter->unicst_total; slot++) {
27728275SEric Cheng 		if (Adapter->unicst_addr[slot].mac.set == 0)
27738275SEric Cheng 			break;
27748275SEric Cheng 	}
27758275SEric Cheng 	ASSERT(slot < Adapter->unicst_total);
27768275SEric Cheng 
27778400SNicolas.Droux@Sun.COM 	err = e1000g_unicst_set(Adapter, mac_addr, slot);
27788400SNicolas.Droux@Sun.COM 	if (err == 0)
27798400SNicolas.Droux@Sun.COM 		Adapter->unicst_avail--;
27808275SEric Cheng 
27818479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
27828275SEric Cheng 
27838400SNicolas.Droux@Sun.COM 	return (err);
27848275SEric Cheng }
27858275SEric Cheng 
27868275SEric Cheng static int
27878275SEric Cheng e1000g_remmac(void *arg, const uint8_t *mac_addr)
27888275SEric Cheng {
27898275SEric Cheng 	struct e1000g *Adapter = (struct e1000g *)arg;
27908400SNicolas.Droux@Sun.COM 	int slot, err;
27918275SEric Cheng 
27928479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_WRITER);
27938479SChenlu.Chen@Sun.COM 
27948479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
27958479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
27968479SChenlu.Chen@Sun.COM 		return (ECANCELED);
27978479SChenlu.Chen@Sun.COM 	}
27988275SEric Cheng 
27998275SEric Cheng 	slot = e1000g_unicst_find(Adapter, mac_addr);
28008275SEric Cheng 	if (slot == -1) {
28018479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
28028275SEric Cheng 		return (EINVAL);
28038275SEric Cheng 	}
28048275SEric Cheng 
28058275SEric Cheng 	ASSERT(Adapter->unicst_addr[slot].mac.set);
28068275SEric Cheng 
28078275SEric Cheng 	/* Clear this slot */
28088400SNicolas.Droux@Sun.COM 	err = e1000g_unicst_set(Adapter, NULL, slot);
28098400SNicolas.Droux@Sun.COM 	if (err == 0)
28108400SNicolas.Droux@Sun.COM 		Adapter->unicst_avail++;
28118275SEric Cheng 
28128479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
28138275SEric Cheng 
28148400SNicolas.Droux@Sun.COM 	return (err);
28158275SEric Cheng }
28168275SEric Cheng 
28178275SEric Cheng static int
28188275SEric Cheng e1000g_ring_start(mac_ring_driver_t rh, uint64_t mr_gen_num)
28198275SEric Cheng {
28208275SEric Cheng 	e1000g_rx_ring_t *rx_ring = (e1000g_rx_ring_t *)rh;
28218275SEric Cheng 
28228275SEric Cheng 	mutex_enter(&rx_ring->rx_lock);
28238275SEric Cheng 	rx_ring->ring_gen_num = mr_gen_num;
28248275SEric Cheng 	mutex_exit(&rx_ring->rx_lock);
28258275SEric Cheng 	return (0);
28268275SEric Cheng }
28278275SEric Cheng 
28288275SEric Cheng /*
28298275SEric Cheng  * Callback funtion for MAC layer to register all rings.
28308275SEric Cheng  *
28318275SEric Cheng  * The hardware supports a single group with currently only one ring
28328275SEric Cheng  * available.
28338275SEric Cheng  * Though not offering virtualization ability per se, exposing the
28348275SEric Cheng  * group/ring still enables the polling and interrupt toggling.
28358275SEric Cheng  */
283611143SGuoqing.Zhu@Sun.COM /* ARGSUSED */
28378275SEric Cheng void
28388275SEric Cheng e1000g_fill_ring(void *arg, mac_ring_type_t rtype, const int grp_index,
28398275SEric Cheng     const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
28408275SEric Cheng {
28418275SEric Cheng 	struct e1000g *Adapter = (struct e1000g *)arg;
28428275SEric Cheng 	e1000g_rx_ring_t *rx_ring = Adapter->rx_ring;
28438275SEric Cheng 	mac_intr_t *mintr;
28448275SEric Cheng 
28458275SEric Cheng 	/*
28468275SEric Cheng 	 * We advertised only RX group/rings, so the MAC framework shouldn't
28478275SEric Cheng 	 * ask for any thing else.
28488275SEric Cheng 	 */
28498275SEric Cheng 	ASSERT(rtype == MAC_RING_TYPE_RX && grp_index == 0 && ring_index == 0);
28508275SEric Cheng 
28518275SEric Cheng 	rx_ring->mrh = rx_ring->mrh_init = rh;
28528275SEric Cheng 	infop->mri_driver = (mac_ring_driver_t)rx_ring;
28538275SEric Cheng 	infop->mri_start = e1000g_ring_start;
28548275SEric Cheng 	infop->mri_stop = NULL;
28558275SEric Cheng 	infop->mri_poll = e1000g_poll_ring;
28568275SEric Cheng 
28578275SEric Cheng 	/* Ring level interrupts */
28588275SEric Cheng 	mintr = &infop->mri_intr;
28598275SEric Cheng 	mintr->mi_handle = (mac_intr_handle_t)rx_ring;
28608275SEric Cheng 	mintr->mi_enable = e1000g_rx_ring_intr_enable;
28618275SEric Cheng 	mintr->mi_disable = e1000g_rx_ring_intr_disable;
28628275SEric Cheng }
28638275SEric Cheng 
286411143SGuoqing.Zhu@Sun.COM /* ARGSUSED */
28658275SEric Cheng static void
28668275SEric Cheng e1000g_fill_group(void *arg, mac_ring_type_t rtype, const int grp_index,
28678275SEric Cheng     mac_group_info_t *infop, mac_group_handle_t gh)
28688275SEric Cheng {
28698275SEric Cheng 	struct e1000g *Adapter = (struct e1000g *)arg;
28708275SEric Cheng 	mac_intr_t *mintr;
28718275SEric Cheng 
28728275SEric Cheng 	/*
28738275SEric Cheng 	 * We advertised a single RX ring. Getting a request for anything else
28748275SEric Cheng 	 * signifies a bug in the MAC framework.
28758275SEric Cheng 	 */
28768275SEric Cheng 	ASSERT(rtype == MAC_RING_TYPE_RX && grp_index == 0);
28778275SEric Cheng 
28788275SEric Cheng 	Adapter->rx_group = gh;
28798275SEric Cheng 
28808275SEric Cheng 	infop->mgi_driver = (mac_group_driver_t)Adapter;
28818275SEric Cheng 	infop->mgi_start = NULL;
28828275SEric Cheng 	infop->mgi_stop = NULL;
28838275SEric Cheng 	infop->mgi_addmac = e1000g_addmac;
28848275SEric Cheng 	infop->mgi_remmac = e1000g_remmac;
28858275SEric Cheng 	infop->mgi_count = 1;
28868275SEric Cheng 
28878275SEric Cheng 	/* Group level interrupts */
28888275SEric Cheng 	mintr = &infop->mgi_intr;
28898275SEric Cheng 	mintr->mi_handle = (mac_intr_handle_t)Adapter;
28908275SEric Cheng 	mintr->mi_enable = e1000g_rx_group_intr_enable;
28918275SEric Cheng 	mintr->mi_disable = e1000g_rx_group_intr_disable;
28928275SEric Cheng }
28938275SEric Cheng 
28943526Sxy150489 static boolean_t
28953526Sxy150489 e1000g_m_getcapab(void *arg, mac_capab_t cap, void *cap_data)
28963526Sxy150489 {
28973526Sxy150489 	struct e1000g *Adapter = (struct e1000g *)arg;
28983526Sxy150489 
28993526Sxy150489 	switch (cap) {
29003526Sxy150489 	case MAC_CAPAB_HCKSUM: {
29013526Sxy150489 		uint32_t *txflags = cap_data;
29026986Smx205022 
29036986Smx205022 		if (Adapter->tx_hcksum_enable)
29046986Smx205022 			*txflags = HCKSUM_IPHDRCKSUM |
29056986Smx205022 			    HCKSUM_INET_PARTIAL;
29066986Smx205022 		else
29073526Sxy150489 			return (B_FALSE);
29083526Sxy150489 		break;
29093526Sxy150489 	}
29106986Smx205022 
29116986Smx205022 	case MAC_CAPAB_LSO: {
29126986Smx205022 		mac_capab_lso_t *cap_lso = cap_data;
29136986Smx205022 
29146986Smx205022 		if (Adapter->lso_enable) {
29156986Smx205022 			cap_lso->lso_flags = LSO_TX_BASIC_TCP_IPV4;
29166986Smx205022 			cap_lso->lso_basic_tcp_ipv4.lso_max =
29176986Smx205022 			    E1000_LSO_MAXLEN;
29186986Smx205022 		} else
29196986Smx205022 			return (B_FALSE);
29206986Smx205022 		break;
29216986Smx205022 	}
29228275SEric Cheng 	case MAC_CAPAB_RINGS: {
29238275SEric Cheng 		mac_capab_rings_t *cap_rings = cap_data;
29248275SEric Cheng 
29258275SEric Cheng 		/* No TX rings exposed yet */
29268275SEric Cheng 		if (cap_rings->mr_type != MAC_RING_TYPE_RX)
29278275SEric Cheng 			return (B_FALSE);
29288275SEric Cheng 
29298275SEric Cheng 		cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC;
29308275SEric Cheng 		cap_rings->mr_rnum = 1;
29318275SEric Cheng 		cap_rings->mr_gnum = 1;
29328275SEric Cheng 		cap_rings->mr_rget = e1000g_fill_ring;
29338275SEric Cheng 		cap_rings->mr_gget = e1000g_fill_group;
29348275SEric Cheng 		break;
29358275SEric Cheng 	}
29363526Sxy150489 	default:
29373526Sxy150489 		return (B_FALSE);
29383526Sxy150489 	}
29393526Sxy150489 	return (B_TRUE);
29403526Sxy150489 }
29413526Sxy150489 
29426394Scc210113 static boolean_t
29436394Scc210113 e1000g_param_locked(mac_prop_id_t pr_num)
29446394Scc210113 {
29456394Scc210113 	/*
29466394Scc210113 	 * All en_* parameters are locked (read-only) while
29476394Scc210113 	 * the device is in any sort of loopback mode ...
29486394Scc210113 	 */
29496394Scc210113 	switch (pr_num) {
29506789Sam223141 		case MAC_PROP_EN_1000FDX_CAP:
29516789Sam223141 		case MAC_PROP_EN_1000HDX_CAP:
29526789Sam223141 		case MAC_PROP_EN_100FDX_CAP:
29536789Sam223141 		case MAC_PROP_EN_100HDX_CAP:
29546789Sam223141 		case MAC_PROP_EN_10FDX_CAP:
29556789Sam223141 		case MAC_PROP_EN_10HDX_CAP:
29566789Sam223141 		case MAC_PROP_AUTONEG:
29576789Sam223141 		case MAC_PROP_FLOWCTRL:
29586394Scc210113 			return (B_TRUE);
29596394Scc210113 	}
29606394Scc210113 	return (B_FALSE);
29616394Scc210113 }
29626394Scc210113 
29636394Scc210113 /*
29646394Scc210113  * callback function for set/get of properties
29656394Scc210113  */
29666394Scc210113 static int
29676394Scc210113 e1000g_m_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
29686394Scc210113     uint_t pr_valsize, const void *pr_val)
29696394Scc210113 {
29706394Scc210113 	struct e1000g *Adapter = arg;
297110605SMin.Xu@Sun.COM 	struct e1000_hw *hw = &Adapter->shared;
29726735Scc210113 	struct e1000_fc_info *fc = &Adapter->shared.fc;
29736394Scc210113 	int err = 0;
29746735Scc210113 	link_flowctrl_t flowctrl;
29756512Ssowmini 	uint32_t cur_mtu, new_mtu;
29766394Scc210113 
29776394Scc210113 	rw_enter(&Adapter->chip_lock, RW_WRITER);
29788479SChenlu.Chen@Sun.COM 
29798479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_SUSPENDED) {
29808479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
29818479SChenlu.Chen@Sun.COM 		return (ECANCELED);
29828479SChenlu.Chen@Sun.COM 	}
29838479SChenlu.Chen@Sun.COM 
29846394Scc210113 	if (Adapter->loopback_mode != E1000G_LB_NONE &&
29856394Scc210113 	    e1000g_param_locked(pr_num)) {
29866394Scc210113 		/*
29876394Scc210113 		 * All en_* parameters are locked (read-only)
29886394Scc210113 		 * while the device is in any sort of loopback mode.
29896394Scc210113 		 */
29906394Scc210113 		rw_exit(&Adapter->chip_lock);
29916394Scc210113 		return (EBUSY);
29926394Scc210113 	}
29936394Scc210113 
29946394Scc210113 	switch (pr_num) {
29956789Sam223141 		case MAC_PROP_EN_1000FDX_CAP:
299610605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper) {
299710605SMin.Xu@Sun.COM 				err = ENOTSUP;
299810605SMin.Xu@Sun.COM 				break;
299910605SMin.Xu@Sun.COM 			}
30006394Scc210113 			Adapter->param_en_1000fdx = *(uint8_t *)pr_val;
30016394Scc210113 			Adapter->param_adv_1000fdx = *(uint8_t *)pr_val;
30026394Scc210113 			goto reset;
30036789Sam223141 		case MAC_PROP_EN_100FDX_CAP:
300410605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper) {
300510605SMin.Xu@Sun.COM 				err = ENOTSUP;
300610605SMin.Xu@Sun.COM 				break;
300710605SMin.Xu@Sun.COM 			}
30086394Scc210113 			Adapter->param_en_100fdx = *(uint8_t *)pr_val;
30096394Scc210113 			Adapter->param_adv_100fdx = *(uint8_t *)pr_val;
30106394Scc210113 			goto reset;
30116789Sam223141 		case MAC_PROP_EN_100HDX_CAP:
301210605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper) {
301310605SMin.Xu@Sun.COM 				err = ENOTSUP;
301410605SMin.Xu@Sun.COM 				break;
301510605SMin.Xu@Sun.COM 			}
30166394Scc210113 			Adapter->param_en_100hdx = *(uint8_t *)pr_val;
30176394Scc210113 			Adapter->param_adv_100hdx = *(uint8_t *)pr_val;
30186394Scc210113 			goto reset;
30196789Sam223141 		case MAC_PROP_EN_10FDX_CAP:
302010605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper) {
302110605SMin.Xu@Sun.COM 				err = ENOTSUP;
302210605SMin.Xu@Sun.COM 				break;
302310605SMin.Xu@Sun.COM 			}
30246394Scc210113 			Adapter->param_en_10fdx = *(uint8_t *)pr_val;
30256394Scc210113 			Adapter->param_adv_10fdx = *(uint8_t *)pr_val;
30266394Scc210113 			goto reset;
30276789Sam223141 		case MAC_PROP_EN_10HDX_CAP:
302810605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper) {
302910605SMin.Xu@Sun.COM 				err = ENOTSUP;
303010605SMin.Xu@Sun.COM 				break;
303110605SMin.Xu@Sun.COM 			}
30326394Scc210113 			Adapter->param_en_10hdx = *(uint8_t *)pr_val;
30336394Scc210113 			Adapter->param_adv_10hdx = *(uint8_t *)pr_val;
30346394Scc210113 			goto reset;
30356789Sam223141 		case MAC_PROP_AUTONEG:
303610605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper) {
303710605SMin.Xu@Sun.COM 				err = ENOTSUP;
303810605SMin.Xu@Sun.COM 				break;
303910605SMin.Xu@Sun.COM 			}
30406394Scc210113 			Adapter->param_adv_autoneg = *(uint8_t *)pr_val;
30416394Scc210113 			goto reset;
30426789Sam223141 		case MAC_PROP_FLOWCTRL:
30436735Scc210113 			fc->send_xon = B_TRUE;
30446735Scc210113 			bcopy(pr_val, &flowctrl, sizeof (flowctrl));
30456735Scc210113 
30466735Scc210113 			switch (flowctrl) {
30476394Scc210113 			default:
30486394Scc210113 				err = EINVAL;
30496394Scc210113 				break;
30506394Scc210113 			case LINK_FLOWCTRL_NONE:
30518539SChenlu.Chen@Sun.COM 				fc->requested_mode = e1000_fc_none;
30526394Scc210113 				break;
30536394Scc210113 			case LINK_FLOWCTRL_RX:
30548539SChenlu.Chen@Sun.COM 				fc->requested_mode = e1000_fc_rx_pause;
30556394Scc210113 				break;
30566394Scc210113 			case LINK_FLOWCTRL_TX:
30578539SChenlu.Chen@Sun.COM 				fc->requested_mode = e1000_fc_tx_pause;
30586394Scc210113 				break;
30596394Scc210113 			case LINK_FLOWCTRL_BI:
30608539SChenlu.Chen@Sun.COM 				fc->requested_mode = e1000_fc_full;
30616394Scc210113 				break;
30626394Scc210113 			}
30636394Scc210113 reset:
30646394Scc210113 			if (err == 0) {
306510680SMin.Xu@Sun.COM 				/* check PCH limits & reset the link */
306610680SMin.Xu@Sun.COM 				e1000g_pch_limits(Adapter);
30676394Scc210113 				if (e1000g_reset_link(Adapter) != DDI_SUCCESS)
30686394Scc210113 					err = EINVAL;
30696394Scc210113 			}
30706394Scc210113 			break;
30716789Sam223141 		case MAC_PROP_ADV_1000FDX_CAP:
30726789Sam223141 		case MAC_PROP_ADV_1000HDX_CAP:
30736789Sam223141 		case MAC_PROP_ADV_100FDX_CAP:
30746789Sam223141 		case MAC_PROP_ADV_100HDX_CAP:
30756789Sam223141 		case MAC_PROP_ADV_10FDX_CAP:
30766789Sam223141 		case MAC_PROP_ADV_10HDX_CAP:
30778118SVasumathi.Sundaram@Sun.COM 		case MAC_PROP_EN_1000HDX_CAP:
30786789Sam223141 		case MAC_PROP_STATUS:
30796789Sam223141 		case MAC_PROP_SPEED:
30806789Sam223141 		case MAC_PROP_DUPLEX:
30816394Scc210113 			err = ENOTSUP; /* read-only prop. Can't set this. */
30826394Scc210113 			break;
30836789Sam223141 		case MAC_PROP_MTU:
308410680SMin.Xu@Sun.COM 			/* adapter must be stopped for an MTU change */
308510680SMin.Xu@Sun.COM 			if (Adapter->e1000g_state & E1000G_STARTED) {
308610680SMin.Xu@Sun.COM 				err = EBUSY;
308710680SMin.Xu@Sun.COM 				break;
308810680SMin.Xu@Sun.COM 			}
308910680SMin.Xu@Sun.COM 
30906394Scc210113 			cur_mtu = Adapter->default_mtu;
309110680SMin.Xu@Sun.COM 
309210680SMin.Xu@Sun.COM 			/* get new requested MTU */
30936394Scc210113 			bcopy(pr_val, &new_mtu, sizeof (new_mtu));
30946394Scc210113 			if (new_mtu == cur_mtu) {
30956394Scc210113 				err = 0;
30966394Scc210113 				break;
30976394Scc210113 			}
30986394Scc210113 
309910680SMin.Xu@Sun.COM 			if ((new_mtu < DEFAULT_MTU) ||
310010680SMin.Xu@Sun.COM 			    (new_mtu > Adapter->max_mtu)) {
31016394Scc210113 				err = EINVAL;
31026394Scc210113 				break;
31036394Scc210113 			}
310410680SMin.Xu@Sun.COM 
310510680SMin.Xu@Sun.COM 			/* inform MAC framework of new MTU */
31066394Scc210113 			err = mac_maxsdu_update(Adapter->mh, new_mtu);
310710680SMin.Xu@Sun.COM 
31086394Scc210113 			if (err == 0) {
31096394Scc210113 				Adapter->default_mtu = new_mtu;
311010680SMin.Xu@Sun.COM 				Adapter->max_frame_size =
311110680SMin.Xu@Sun.COM 				    e1000g_mtu2maxframe(new_mtu);
311210680SMin.Xu@Sun.COM 
311310680SMin.Xu@Sun.COM 				/*
311410680SMin.Xu@Sun.COM 				 * check PCH limits & set buffer sizes to
311510680SMin.Xu@Sun.COM 				 * match new MTU
311610680SMin.Xu@Sun.COM 				 */
311710680SMin.Xu@Sun.COM 				e1000g_pch_limits(Adapter);
31186394Scc210113 				e1000g_set_bufsize(Adapter);
31196394Scc210113 			}
31206394Scc210113 			break;
31216789Sam223141 		case MAC_PROP_PRIVATE:
31226394Scc210113 			err = e1000g_set_priv_prop(Adapter, pr_name,
31236394Scc210113 			    pr_valsize, pr_val);
31246394Scc210113 			break;
31256394Scc210113 		default:
31266394Scc210113 			err = ENOTSUP;
31276394Scc210113 			break;
31286394Scc210113 	}
31296394Scc210113 	rw_exit(&Adapter->chip_lock);
31306394Scc210113 	return (err);
31316394Scc210113 }
31326394Scc210113 
31336394Scc210113 static int
31346394Scc210113 e1000g_m_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
31358118SVasumathi.Sundaram@Sun.COM     uint_t pr_flags, uint_t pr_valsize, void *pr_val, uint_t *perm)
31366394Scc210113 {
31376394Scc210113 	struct e1000g *Adapter = arg;
31386735Scc210113 	struct e1000_fc_info *fc = &Adapter->shared.fc;
313910605SMin.Xu@Sun.COM 	struct e1000_hw *hw = &Adapter->shared;
31406512Ssowmini 	int err = 0;
31416735Scc210113 	link_flowctrl_t flowctrl;
31426394Scc210113 	uint64_t tmp = 0;
31436394Scc210113 
31446512Ssowmini 	if (pr_valsize == 0)
31456512Ssowmini 		return (EINVAL);
31466512Ssowmini 
31478118SVasumathi.Sundaram@Sun.COM 	*perm = MAC_PROP_PERM_RW;
31488118SVasumathi.Sundaram@Sun.COM 
31496394Scc210113 	bzero(pr_val, pr_valsize);
31506789Sam223141 	if ((pr_flags & MAC_PROP_DEFAULT) && (pr_num != MAC_PROP_PRIVATE)) {
31516512Ssowmini 		return (e1000g_get_def_val(Adapter, pr_num,
31526512Ssowmini 		    pr_valsize, pr_val));
31536512Ssowmini 	}
31546512Ssowmini 
31556394Scc210113 	switch (pr_num) {
31566789Sam223141 		case MAC_PROP_DUPLEX:
31578118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
31586512Ssowmini 			if (pr_valsize >= sizeof (link_duplex_t)) {
31596512Ssowmini 				bcopy(&Adapter->link_duplex, pr_val,
31606512Ssowmini 				    sizeof (link_duplex_t));
31616512Ssowmini 			} else
31626512Ssowmini 				err = EINVAL;
31636394Scc210113 			break;
31646789Sam223141 		case MAC_PROP_SPEED:
31658118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
31666394Scc210113 			if (pr_valsize >= sizeof (uint64_t)) {
31676394Scc210113 				tmp = Adapter->link_speed * 1000000ull;
31686394Scc210113 				bcopy(&tmp, pr_val, sizeof (tmp));
31696512Ssowmini 			} else
31706512Ssowmini 				err = EINVAL;
31716394Scc210113 			break;
31726789Sam223141 		case MAC_PROP_AUTONEG:
317310605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper)
317410605SMin.Xu@Sun.COM 				*perm = MAC_PROP_PERM_READ;
31756512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_autoneg;
31766394Scc210113 			break;
31776789Sam223141 		case MAC_PROP_FLOWCTRL:
31786394Scc210113 			if (pr_valsize >= sizeof (link_flowctrl_t)) {
31798479SChenlu.Chen@Sun.COM 				switch (fc->current_mode) {
31806394Scc210113 					case e1000_fc_none:
31816735Scc210113 						flowctrl = LINK_FLOWCTRL_NONE;
31826394Scc210113 						break;
31836394Scc210113 					case e1000_fc_rx_pause:
31846735Scc210113 						flowctrl = LINK_FLOWCTRL_RX;
31856394Scc210113 						break;
31866394Scc210113 					case e1000_fc_tx_pause:
31876735Scc210113 						flowctrl = LINK_FLOWCTRL_TX;
31886394Scc210113 						break;
31896394Scc210113 					case e1000_fc_full:
31906735Scc210113 						flowctrl = LINK_FLOWCTRL_BI;
31916394Scc210113 						break;
31926394Scc210113 				}
31936735Scc210113 				bcopy(&flowctrl, pr_val, sizeof (flowctrl));
31946512Ssowmini 			} else
31956512Ssowmini 				err = EINVAL;
31966394Scc210113 			break;
31976789Sam223141 		case MAC_PROP_ADV_1000FDX_CAP:
31988118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
31996512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_1000fdx;
32006394Scc210113 			break;
32016789Sam223141 		case MAC_PROP_EN_1000FDX_CAP:
320210605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper)
320310605SMin.Xu@Sun.COM 				*perm = MAC_PROP_PERM_READ;
32046512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_en_1000fdx;
32056394Scc210113 			break;
32066789Sam223141 		case MAC_PROP_ADV_1000HDX_CAP:
32078118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
32086512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_1000hdx;
32096394Scc210113 			break;
32106789Sam223141 		case MAC_PROP_EN_1000HDX_CAP:
32118118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
32126512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_en_1000hdx;
32136394Scc210113 			break;
32146789Sam223141 		case MAC_PROP_ADV_100FDX_CAP:
32158118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
32166512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_100fdx;
32176394Scc210113 			break;
32186789Sam223141 		case MAC_PROP_EN_100FDX_CAP:
321910605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper)
322010605SMin.Xu@Sun.COM 				*perm = MAC_PROP_PERM_READ;
32216512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_en_100fdx;
32226394Scc210113 			break;
32236789Sam223141 		case MAC_PROP_ADV_100HDX_CAP:
32248118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
32256512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_100hdx;
32266394Scc210113 			break;
32276789Sam223141 		case MAC_PROP_EN_100HDX_CAP:
322810605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper)
322910605SMin.Xu@Sun.COM 				*perm = MAC_PROP_PERM_READ;
32306512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_en_100hdx;
32316394Scc210113 			break;
32326789Sam223141 		case MAC_PROP_ADV_10FDX_CAP:
32338118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
32346512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_10fdx;
32356394Scc210113 			break;
32366789Sam223141 		case MAC_PROP_EN_10FDX_CAP:
323710605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper)
323810605SMin.Xu@Sun.COM 				*perm = MAC_PROP_PERM_READ;
32396512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_en_10fdx;
32406394Scc210113 			break;
32416789Sam223141 		case MAC_PROP_ADV_10HDX_CAP:
32428118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
32436512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_10hdx;
32446394Scc210113 			break;
32456789Sam223141 		case MAC_PROP_EN_10HDX_CAP:
324610605SMin.Xu@Sun.COM 			if (hw->phy.media_type != e1000_media_type_copper)
324710605SMin.Xu@Sun.COM 				*perm = MAC_PROP_PERM_READ;
32486512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_en_10hdx;
32496512Ssowmini 			break;
32506789Sam223141 		case MAC_PROP_ADV_100T4_CAP:
32516789Sam223141 		case MAC_PROP_EN_100T4_CAP:
32528118SVasumathi.Sundaram@Sun.COM 			*perm = MAC_PROP_PERM_READ;
32536512Ssowmini 			*(uint8_t *)pr_val = Adapter->param_adv_100t4;
32546394Scc210113 			break;
32556789Sam223141 		case MAC_PROP_PRIVATE:
32566394Scc210113 			err = e1000g_get_priv_prop(Adapter, pr_name,
32578118SVasumathi.Sundaram@Sun.COM 			    pr_flags, pr_valsize, pr_val, perm);
32586394Scc210113 			break;
32599514SGirish.Moodalbail@Sun.COM 		case MAC_PROP_MTU: {
32609514SGirish.Moodalbail@Sun.COM 			struct e1000_mac_info *mac = &Adapter->shared.mac;
32619514SGirish.Moodalbail@Sun.COM 			struct e1000_phy_info *phy = &Adapter->shared.phy;
32629514SGirish.Moodalbail@Sun.COM 			mac_propval_range_t range;
32639514SGirish.Moodalbail@Sun.COM 
32649514SGirish.Moodalbail@Sun.COM 			if (!(pr_flags & MAC_PROP_POSSIBLE))
32659514SGirish.Moodalbail@Sun.COM 				return (ENOTSUP);
32669514SGirish.Moodalbail@Sun.COM 			if (pr_valsize < sizeof (mac_propval_range_t))
32679514SGirish.Moodalbail@Sun.COM 				return (EINVAL);
32689514SGirish.Moodalbail@Sun.COM 			range.mpr_count = 1;
32699514SGirish.Moodalbail@Sun.COM 			range.mpr_type = MAC_PROPVAL_UINT32;
32709514SGirish.Moodalbail@Sun.COM 			range.range_uint32[0].mpur_min = DEFAULT_MTU;
327110680SMin.Xu@Sun.COM 			range.range_uint32[0].mpur_max = Adapter->max_mtu;
32729514SGirish.Moodalbail@Sun.COM 			/* following MAC type do not support jumbo frames */
32739514SGirish.Moodalbail@Sun.COM 			if ((mac->type == e1000_ich8lan) ||
32749514SGirish.Moodalbail@Sun.COM 			    ((mac->type == e1000_ich9lan) && (phy->type ==
32759514SGirish.Moodalbail@Sun.COM 			    e1000_phy_ife))) {
32769514SGirish.Moodalbail@Sun.COM 				range.range_uint32[0].mpur_max = DEFAULT_MTU;
32779514SGirish.Moodalbail@Sun.COM 			}
32789514SGirish.Moodalbail@Sun.COM 			bcopy(&range, pr_val, sizeof (range));
32799514SGirish.Moodalbail@Sun.COM 			break;
32809514SGirish.Moodalbail@Sun.COM 		}
32816394Scc210113 		default:
32826394Scc210113 			err = ENOTSUP;
32836394Scc210113 			break;
32846394Scc210113 	}
32856394Scc210113 	return (err);
32866394Scc210113 }
32876394Scc210113 
32887426SChenliang.Xu@Sun.COM /* ARGSUSED2 */
32896394Scc210113 static int
32906394Scc210113 e1000g_set_priv_prop(struct e1000g *Adapter, const char *pr_name,
32916394Scc210113     uint_t pr_valsize, const void *pr_val)
32926394Scc210113 {
32936394Scc210113 	int err = 0;
32946394Scc210113 	long result;
32956394Scc210113 	struct e1000_hw *hw = &Adapter->shared;
32966394Scc210113 
32976394Scc210113 	if (strcmp(pr_name, "_tx_bcopy_threshold") == 0) {
32986394Scc210113 		if (pr_val == NULL) {
32996394Scc210113 			err = EINVAL;
33006394Scc210113 			return (err);
33016394Scc210113 		}
33026394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
33036394Scc210113 		if (result < MIN_TX_BCOPY_THRESHOLD ||
33046394Scc210113 		    result > MAX_TX_BCOPY_THRESHOLD)
33056394Scc210113 			err = EINVAL;
33066394Scc210113 		else {
33076394Scc210113 			Adapter->tx_bcopy_thresh = (uint32_t)result;
33086394Scc210113 		}
33096394Scc210113 		return (err);
33106394Scc210113 	}
33116394Scc210113 	if (strcmp(pr_name, "_tx_interrupt_enable") == 0) {
33126394Scc210113 		if (pr_val == NULL) {
33136394Scc210113 			err = EINVAL;
33146394Scc210113 			return (err);
33156394Scc210113 		}
33166394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
33176394Scc210113 		if (result < 0 || result > 1)
33186394Scc210113 			err = EINVAL;
33196394Scc210113 		else {
33206394Scc210113 			Adapter->tx_intr_enable = (result == 1) ?
33216394Scc210113 			    B_TRUE: B_FALSE;
33226394Scc210113 			if (Adapter->tx_intr_enable)
33236394Scc210113 				e1000g_mask_tx_interrupt(Adapter);
33246394Scc210113 			else
33256394Scc210113 				e1000g_clear_tx_interrupt(Adapter);
33266394Scc210113 			if (e1000g_check_acc_handle(
332710805SChangqing.Li@Sun.COM 			    Adapter->osdep.reg_handle) != DDI_FM_OK) {
33286394Scc210113 				ddi_fm_service_impact(Adapter->dip,
33296394Scc210113 				    DDI_SERVICE_DEGRADED);
333010805SChangqing.Li@Sun.COM 				err = EIO;
333110805SChangqing.Li@Sun.COM 			}
33326394Scc210113 		}
33336394Scc210113 		return (err);
33346394Scc210113 	}
33356394Scc210113 	if (strcmp(pr_name, "_tx_intr_delay") == 0) {
33366394Scc210113 		if (pr_val == NULL) {
33376394Scc210113 			err = EINVAL;
33386394Scc210113 			return (err);
33396394Scc210113 		}
33406394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
33416394Scc210113 		if (result < MIN_TX_INTR_DELAY ||
33426394Scc210113 		    result > MAX_TX_INTR_DELAY)
33436394Scc210113 			err = EINVAL;
33446394Scc210113 		else {
33456394Scc210113 			Adapter->tx_intr_delay = (uint32_t)result;
33466394Scc210113 			E1000_WRITE_REG(hw, E1000_TIDV, Adapter->tx_intr_delay);
33476394Scc210113 			if (e1000g_check_acc_handle(
334810805SChangqing.Li@Sun.COM 			    Adapter->osdep.reg_handle) != DDI_FM_OK) {
33496394Scc210113 				ddi_fm_service_impact(Adapter->dip,
33506394Scc210113 				    DDI_SERVICE_DEGRADED);
335110805SChangqing.Li@Sun.COM 				err = EIO;
335210805SChangqing.Li@Sun.COM 			}
33536394Scc210113 		}
33546394Scc210113 		return (err);
33556394Scc210113 	}
33566394Scc210113 	if (strcmp(pr_name, "_tx_intr_abs_delay") == 0) {
33576394Scc210113 		if (pr_val == NULL) {
33586394Scc210113 			err = EINVAL;
33596394Scc210113 			return (err);
33606394Scc210113 		}
33616394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
33626394Scc210113 		if (result < MIN_TX_INTR_ABS_DELAY ||
33636394Scc210113 		    result > MAX_TX_INTR_ABS_DELAY)
33646394Scc210113 			err = EINVAL;
33656394Scc210113 		else {
33666394Scc210113 			Adapter->tx_intr_abs_delay = (uint32_t)result;
33676394Scc210113 			E1000_WRITE_REG(hw, E1000_TADV,
33686394Scc210113 			    Adapter->tx_intr_abs_delay);
33696394Scc210113 			if (e1000g_check_acc_handle(
337010805SChangqing.Li@Sun.COM 			    Adapter->osdep.reg_handle) != DDI_FM_OK) {
33716394Scc210113 				ddi_fm_service_impact(Adapter->dip,
33726394Scc210113 				    DDI_SERVICE_DEGRADED);
337310805SChangqing.Li@Sun.COM 				err = EIO;
337410805SChangqing.Li@Sun.COM 			}
33756394Scc210113 		}
33766394Scc210113 		return (err);
33776394Scc210113 	}
33786394Scc210113 	if (strcmp(pr_name, "_rx_bcopy_threshold") == 0) {
33796394Scc210113 		if (pr_val == NULL) {
33806394Scc210113 			err = EINVAL;
33816394Scc210113 			return (err);
33826394Scc210113 		}
33836394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
33846394Scc210113 		if (result < MIN_RX_BCOPY_THRESHOLD ||
33856394Scc210113 		    result > MAX_RX_BCOPY_THRESHOLD)
33866394Scc210113 			err = EINVAL;
33876394Scc210113 		else
33886394Scc210113 			Adapter->rx_bcopy_thresh = (uint32_t)result;
33896394Scc210113 		return (err);
33906394Scc210113 	}
33916394Scc210113 	if (strcmp(pr_name, "_max_num_rcv_packets") == 0) {
33926394Scc210113 		if (pr_val == NULL) {
33936394Scc210113 			err = EINVAL;
33946394Scc210113 			return (err);
33956394Scc210113 		}
33966394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
33976394Scc210113 		if (result < MIN_RX_LIMIT_ON_INTR ||
33986394Scc210113 		    result > MAX_RX_LIMIT_ON_INTR)
33996394Scc210113 			err = EINVAL;
34006394Scc210113 		else
34016394Scc210113 			Adapter->rx_limit_onintr = (uint32_t)result;
34026394Scc210113 		return (err);
34036394Scc210113 	}
34046394Scc210113 	if (strcmp(pr_name, "_rx_intr_delay") == 0) {
34056394Scc210113 		if (pr_val == NULL) {
34066394Scc210113 			err = EINVAL;
34076394Scc210113 			return (err);
34086394Scc210113 		}
34096394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
34106394Scc210113 		if (result < MIN_RX_INTR_DELAY ||
34116394Scc210113 		    result > MAX_RX_INTR_DELAY)
34126394Scc210113 			err = EINVAL;
34136394Scc210113 		else {
34146394Scc210113 			Adapter->rx_intr_delay = (uint32_t)result;
34156394Scc210113 			E1000_WRITE_REG(hw, E1000_RDTR, Adapter->rx_intr_delay);
34166394Scc210113 			if (e1000g_check_acc_handle(
341710805SChangqing.Li@Sun.COM 			    Adapter->osdep.reg_handle) != DDI_FM_OK) {
34186394Scc210113 				ddi_fm_service_impact(Adapter->dip,
34196394Scc210113 				    DDI_SERVICE_DEGRADED);
342010805SChangqing.Li@Sun.COM 				err = EIO;
342110805SChangqing.Li@Sun.COM 			}
34226394Scc210113 		}
34236394Scc210113 		return (err);
34246394Scc210113 	}
34256394Scc210113 	if (strcmp(pr_name, "_rx_intr_abs_delay") == 0) {
34266394Scc210113 		if (pr_val == NULL) {
34276394Scc210113 			err = EINVAL;
34286394Scc210113 			return (err);
34296394Scc210113 		}
34306394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
34316394Scc210113 		if (result < MIN_RX_INTR_ABS_DELAY ||
34326394Scc210113 		    result > MAX_RX_INTR_ABS_DELAY)
34336394Scc210113 			err = EINVAL;
34346394Scc210113 		else {
34356394Scc210113 			Adapter->rx_intr_abs_delay = (uint32_t)result;
34366394Scc210113 			E1000_WRITE_REG(hw, E1000_RADV,
34376394Scc210113 			    Adapter->rx_intr_abs_delay);
34386394Scc210113 			if (e1000g_check_acc_handle(
343910805SChangqing.Li@Sun.COM 			    Adapter->osdep.reg_handle) != DDI_FM_OK) {
34406394Scc210113 				ddi_fm_service_impact(Adapter->dip,
34416394Scc210113 				    DDI_SERVICE_DEGRADED);
344210805SChangqing.Li@Sun.COM 				err = EIO;
344310805SChangqing.Li@Sun.COM 			}
34446394Scc210113 		}
34456394Scc210113 		return (err);
34466394Scc210113 	}
34476394Scc210113 	if (strcmp(pr_name, "_intr_throttling_rate") == 0) {
34486394Scc210113 		if (pr_val == NULL) {
34496394Scc210113 			err = EINVAL;
34506394Scc210113 			return (err);
34516394Scc210113 		}
34526394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
34536394Scc210113 		if (result < MIN_INTR_THROTTLING ||
34546394Scc210113 		    result > MAX_INTR_THROTTLING)
34556394Scc210113 			err = EINVAL;
34566394Scc210113 		else {
34576394Scc210113 			if (hw->mac.type >= e1000_82540) {
34586394Scc210113 				Adapter->intr_throttling_rate =
34596394Scc210113 				    (uint32_t)result;
34606394Scc210113 				E1000_WRITE_REG(hw, E1000_ITR,
34616394Scc210113 				    Adapter->intr_throttling_rate);
34626394Scc210113 				if (e1000g_check_acc_handle(
346310805SChangqing.Li@Sun.COM 				    Adapter->osdep.reg_handle) != DDI_FM_OK) {
34646394Scc210113 					ddi_fm_service_impact(Adapter->dip,
34656394Scc210113 					    DDI_SERVICE_DEGRADED);
346610805SChangqing.Li@Sun.COM 					err = EIO;
346710805SChangqing.Li@Sun.COM 				}
34686394Scc210113 			} else
34696394Scc210113 				err = EINVAL;
34706394Scc210113 		}
34716394Scc210113 		return (err);
34726394Scc210113 	}
34736394Scc210113 	if (strcmp(pr_name, "_intr_adaptive") == 0) {
34746394Scc210113 		if (pr_val == NULL) {
34756394Scc210113 			err = EINVAL;
34766394Scc210113 			return (err);
34776394Scc210113 		}
34786394Scc210113 		(void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
34796394Scc210113 		if (result < 0 || result > 1)
34806394Scc210113 			err = EINVAL;
34816394Scc210113 		else {
34826394Scc210113 			if (hw->mac.type >= e1000_82540) {
34836394Scc210113 				Adapter->intr_adaptive = (result == 1) ?
34846394Scc210113 				    B_TRUE : B_FALSE;
34856394Scc210113 			} else {
34866394Scc210113 				err = EINVAL;
34876394Scc210113 			}
34886394Scc210113 		}
34896394Scc210113 		return (err);
34906394Scc210113 	}
34916394Scc210113 	return (ENOTSUP);
34926394Scc210113 }
34936394Scc210113 
34946394Scc210113 static int
34956394Scc210113 e1000g_get_priv_prop(struct e1000g *Adapter, const char *pr_name,
34968118SVasumathi.Sundaram@Sun.COM     uint_t pr_flags, uint_t pr_valsize, void *pr_val, uint_t *perm)
34976394Scc210113 {
34986394Scc210113 	int err = ENOTSUP;
34996789Sam223141 	boolean_t is_default = (pr_flags & MAC_PROP_DEFAULT);
35006512Ssowmini 	int value;
35016512Ssowmini 
35026512Ssowmini 	if (strcmp(pr_name, "_adv_pause_cap") == 0) {
35038118SVasumathi.Sundaram@Sun.COM 		*perm = MAC_PROP_PERM_READ;
35046512Ssowmini 		if (is_default)
35056512Ssowmini 			goto done;
35066512Ssowmini 		value = Adapter->param_adv_pause;
35076512Ssowmini 		err = 0;
35086512Ssowmini 		goto done;
35096512Ssowmini 	}
35106512Ssowmini 	if (strcmp(pr_name, "_adv_asym_pause_cap") == 0) {
35118118SVasumathi.Sundaram@Sun.COM 		*perm = MAC_PROP_PERM_READ;
35126512Ssowmini 		if (is_default)
35136512Ssowmini 			goto done;
35146512Ssowmini 		value = Adapter->param_adv_asym_pause;
35156512Ssowmini 		err = 0;
35166512Ssowmini 		goto done;
35176512Ssowmini 	}
35186394Scc210113 	if (strcmp(pr_name, "_tx_bcopy_threshold") == 0) {
35196512Ssowmini 		value = (is_default ? DEFAULT_TX_BCOPY_THRESHOLD :
35206512Ssowmini 		    Adapter->tx_bcopy_thresh);
35216394Scc210113 		err = 0;
35226394Scc210113 		goto done;
35236394Scc210113 	}
35246394Scc210113 	if (strcmp(pr_name, "_tx_interrupt_enable") == 0) {
35256512Ssowmini 		value = (is_default ? DEFAULT_TX_INTR_ENABLE :
35266512Ssowmini 		    Adapter->tx_intr_enable);
35276394Scc210113 		err = 0;
35286394Scc210113 		goto done;
35296394Scc210113 	}
35306394Scc210113 	if (strcmp(pr_name, "_tx_intr_delay") == 0) {
35316512Ssowmini 		value = (is_default ? DEFAULT_TX_INTR_DELAY :
35326512Ssowmini 		    Adapter->tx_intr_delay);
35336394Scc210113 		err = 0;
35346394Scc210113 		goto done;
35356394Scc210113 	}
35366394Scc210113 	if (strcmp(pr_name, "_tx_intr_abs_delay") == 0) {
35376512Ssowmini 		value = (is_default ? DEFAULT_TX_INTR_ABS_DELAY :
35386512Ssowmini 		    Adapter->tx_intr_abs_delay);
35396394Scc210113 		err = 0;
35406394Scc210113 		goto done;
35416394Scc210113 	}
35426394Scc210113 	if (strcmp(pr_name, "_rx_bcopy_threshold") == 0) {
35436512Ssowmini 		value = (is_default ? DEFAULT_RX_BCOPY_THRESHOLD :
35446512Ssowmini 		    Adapter->rx_bcopy_thresh);
35456394Scc210113 		err = 0;
35466394Scc210113 		goto done;
35476394Scc210113 	}
35486394Scc210113 	if (strcmp(pr_name, "_max_num_rcv_packets") == 0) {
35496512Ssowmini 		value = (is_default ? DEFAULT_RX_LIMIT_ON_INTR :
35506512Ssowmini 		    Adapter->rx_limit_onintr);
35516394Scc210113 		err = 0;
35526394Scc210113 		goto done;
35536394Scc210113 	}
35546394Scc210113 	if (strcmp(pr_name, "_rx_intr_delay") == 0) {
35556512Ssowmini 		value = (is_default ? DEFAULT_RX_INTR_DELAY :
35566512Ssowmini 		    Adapter->rx_intr_delay);
35576394Scc210113 		err = 0;
35586394Scc210113 		goto done;
35596394Scc210113 	}
35606394Scc210113 	if (strcmp(pr_name, "_rx_intr_abs_delay") == 0) {
35616512Ssowmini 		value = (is_default ? DEFAULT_RX_INTR_ABS_DELAY :
35626512Ssowmini 		    Adapter->rx_intr_abs_delay);
35636394Scc210113 		err = 0;
35646394Scc210113 		goto done;
35656394Scc210113 	}
35666394Scc210113 	if (strcmp(pr_name, "_intr_throttling_rate") == 0) {
35676512Ssowmini 		value = (is_default ? DEFAULT_INTR_THROTTLING :
35686512Ssowmini 		    Adapter->intr_throttling_rate);
35696394Scc210113 		err = 0;
35706394Scc210113 		goto done;
35716394Scc210113 	}
35726394Scc210113 	if (strcmp(pr_name, "_intr_adaptive") == 0) {
35736512Ssowmini 		value = (is_default ? 1 : Adapter->intr_adaptive);
35746394Scc210113 		err = 0;
35756394Scc210113 		goto done;
35766394Scc210113 	}
35776394Scc210113 done:
35786394Scc210113 	if (err == 0) {
35796512Ssowmini 		(void) snprintf(pr_val, pr_valsize, "%d", value);
35806394Scc210113 	}
35816394Scc210113 	return (err);
35826394Scc210113 }
35836394Scc210113 
35843526Sxy150489 /*
35854919Sxy150489  * e1000g_get_conf - get configurations set in e1000g.conf
35864919Sxy150489  * This routine gets user-configured values out of the configuration
35874919Sxy150489  * file e1000g.conf.
35884919Sxy150489  *
35894919Sxy150489  * For each configurable value, there is a minimum, a maximum, and a
35904919Sxy150489  * default.
35914919Sxy150489  * If user does not configure a value, use the default.
35924919Sxy150489  * If user configures below the minimum, use the minumum.
35934919Sxy150489  * If user configures above the maximum, use the maxumum.
35943526Sxy150489  */
35953526Sxy150489 static void
35964919Sxy150489 e1000g_get_conf(struct e1000g *Adapter)
35973526Sxy150489 {
35984919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
35994919Sxy150489 	boolean_t tbi_compatibility = B_FALSE;
36004919Sxy150489 
36013526Sxy150489 	/*
36023526Sxy150489 	 * get each configurable property from e1000g.conf
36033526Sxy150489 	 */
36043526Sxy150489 
36053526Sxy150489 	/*
36063526Sxy150489 	 * NumTxDescriptors
36073526Sxy150489 	 */
36084919Sxy150489 	Adapter->tx_desc_num =
36094919Sxy150489 	    e1000g_get_prop(Adapter, "NumTxDescriptors",
36104919Sxy150489 	    MIN_NUM_TX_DESCRIPTOR, MAX_NUM_TX_DESCRIPTOR,
36114919Sxy150489 	    DEFAULT_NUM_TX_DESCRIPTOR);
36123526Sxy150489 
36133526Sxy150489 	/*
36143526Sxy150489 	 * NumRxDescriptors
36153526Sxy150489 	 */
36164919Sxy150489 	Adapter->rx_desc_num =
36174919Sxy150489 	    e1000g_get_prop(Adapter, "NumRxDescriptors",
36184919Sxy150489 	    MIN_NUM_RX_DESCRIPTOR, MAX_NUM_RX_DESCRIPTOR,
36194919Sxy150489 	    DEFAULT_NUM_RX_DESCRIPTOR);
36203526Sxy150489 
36213526Sxy150489 	/*
36223526Sxy150489 	 * NumRxFreeList
36233526Sxy150489 	 */
36244919Sxy150489 	Adapter->rx_freelist_num =
36254919Sxy150489 	    e1000g_get_prop(Adapter, "NumRxFreeList",
36264919Sxy150489 	    MIN_NUM_RX_FREELIST, MAX_NUM_RX_FREELIST,
36274919Sxy150489 	    DEFAULT_NUM_RX_FREELIST);
36283526Sxy150489 
36293526Sxy150489 	/*
36303526Sxy150489 	 * NumTxPacketList
36313526Sxy150489 	 */
36324919Sxy150489 	Adapter->tx_freelist_num =
36334919Sxy150489 	    e1000g_get_prop(Adapter, "NumTxPacketList",
36344919Sxy150489 	    MIN_NUM_TX_FREELIST, MAX_NUM_TX_FREELIST,
36354919Sxy150489 	    DEFAULT_NUM_TX_FREELIST);
36363526Sxy150489 
36373526Sxy150489 	/*
36383526Sxy150489 	 * FlowControl
36393526Sxy150489 	 */
36406735Scc210113 	hw->fc.send_xon = B_TRUE;
36418539SChenlu.Chen@Sun.COM 	hw->fc.requested_mode =
36424919Sxy150489 	    e1000g_get_prop(Adapter, "FlowControl",
36434919Sxy150489 	    e1000_fc_none, 4, DEFAULT_FLOW_CONTROL);
36443526Sxy150489 	/* 4 is the setting that says "let the eeprom decide" */
36458539SChenlu.Chen@Sun.COM 	if (hw->fc.requested_mode == 4)
36468539SChenlu.Chen@Sun.COM 		hw->fc.requested_mode = e1000_fc_default;
36473526Sxy150489 
36483526Sxy150489 	/*
36494919Sxy150489 	 * Max Num Receive Packets on Interrupt
36503526Sxy150489 	 */
36514919Sxy150489 	Adapter->rx_limit_onintr =
36524919Sxy150489 	    e1000g_get_prop(Adapter, "MaxNumReceivePackets",
36534919Sxy150489 	    MIN_RX_LIMIT_ON_INTR, MAX_RX_LIMIT_ON_INTR,
36544919Sxy150489 	    DEFAULT_RX_LIMIT_ON_INTR);
36553526Sxy150489 
36563526Sxy150489 	/*
36573526Sxy150489 	 * PHY master slave setting
36583526Sxy150489 	 */
36594919Sxy150489 	hw->phy.ms_type =
36604919Sxy150489 	    e1000g_get_prop(Adapter, "SetMasterSlave",
36613526Sxy150489 	    e1000_ms_hw_default, e1000_ms_auto,
36623526Sxy150489 	    e1000_ms_hw_default);
36633526Sxy150489 
36643526Sxy150489 	/*
36653526Sxy150489 	 * Parameter which controls TBI mode workaround, which is only
36663526Sxy150489 	 * needed on certain switches such as Cisco 6500/Foundry
36673526Sxy150489 	 */
36684919Sxy150489 	tbi_compatibility =
36694919Sxy150489 	    e1000g_get_prop(Adapter, "TbiCompatibilityEnable",
36704919Sxy150489 	    0, 1, DEFAULT_TBI_COMPAT_ENABLE);
36714919Sxy150489 	e1000_set_tbi_compatibility_82543(hw, tbi_compatibility);
36723526Sxy150489 
36733526Sxy150489 	/*
36743526Sxy150489 	 * MSI Enable
36753526Sxy150489 	 */
36766986Smx205022 	Adapter->msi_enable =
36774919Sxy150489 	    e1000g_get_prop(Adapter, "MSIEnable",
36784919Sxy150489 	    0, 1, DEFAULT_MSI_ENABLE);
36793526Sxy150489 
36803526Sxy150489 	/*
36813526Sxy150489 	 * Interrupt Throttling Rate
36823526Sxy150489 	 */
36833526Sxy150489 	Adapter->intr_throttling_rate =
36844919Sxy150489 	    e1000g_get_prop(Adapter, "intr_throttling_rate",
36854919Sxy150489 	    MIN_INTR_THROTTLING, MAX_INTR_THROTTLING,
36864919Sxy150489 	    DEFAULT_INTR_THROTTLING);
36873526Sxy150489 
36883526Sxy150489 	/*
36893526Sxy150489 	 * Adaptive Interrupt Blanking Enable/Disable
36903526Sxy150489 	 * It is enabled by default
36913526Sxy150489 	 */
36923526Sxy150489 	Adapter->intr_adaptive =
36934919Sxy150489 	    (e1000g_get_prop(Adapter, "intr_adaptive", 0, 1, 1) == 1) ?
36943526Sxy150489 	    B_TRUE : B_FALSE;
36955882Syy150190 
36965882Syy150190 	/*
36976011Ssv141092 	 * Hardware checksum enable/disable parameter
36986011Ssv141092 	 */
36996986Smx205022 	Adapter->tx_hcksum_enable =
37006986Smx205022 	    e1000g_get_prop(Adapter, "tx_hcksum_enable",
37016011Ssv141092 	    0, 1, DEFAULT_TX_HCKSUM_ENABLE);
37026986Smx205022 	/*
37036986Smx205022 	 * Checksum on/off selection via global parameters.
37046986Smx205022 	 *
37056986Smx205022 	 * If the chip is flagged as not capable of (correctly)
37066986Smx205022 	 * handling checksumming, we don't enable it on either
37076986Smx205022 	 * Rx or Tx side.  Otherwise, we take this chip's settings
37086986Smx205022 	 * from the patchable global defaults.
37096986Smx205022 	 *
37106986Smx205022 	 * We advertise our capabilities only if TX offload is
37116986Smx205022 	 * enabled.  On receive, the stack will accept checksummed
37126986Smx205022 	 * packets anyway, even if we haven't said we can deliver
37136986Smx205022 	 * them.
37146986Smx205022 	 */
37156986Smx205022 	switch (hw->mac.type) {
37166986Smx205022 		case e1000_82540:
37176986Smx205022 		case e1000_82544:
37186986Smx205022 		case e1000_82545:
37196986Smx205022 		case e1000_82545_rev_3:
37206986Smx205022 		case e1000_82546:
37216986Smx205022 		case e1000_82546_rev_3:
37226986Smx205022 		case e1000_82571:
37236986Smx205022 		case e1000_82572:
37246986Smx205022 		case e1000_82573:
37256986Smx205022 		case e1000_80003es2lan:
37266986Smx205022 			break;
37276986Smx205022 		/*
37286986Smx205022 		 * For the following Intel PRO/1000 chipsets, we have not
37296986Smx205022 		 * tested the hardware checksum offload capability, so we
37306986Smx205022 		 * disable the capability for them.
37316986Smx205022 		 *	e1000_82542,
37326986Smx205022 		 *	e1000_82543,
37336986Smx205022 		 *	e1000_82541,
37346986Smx205022 		 *	e1000_82541_rev_2,
37356986Smx205022 		 *	e1000_82547,
37366986Smx205022 		 *	e1000_82547_rev_2,
37376986Smx205022 		 */
37386986Smx205022 		default:
37396986Smx205022 			Adapter->tx_hcksum_enable = B_FALSE;
37406986Smx205022 	}
37416986Smx205022 
37426986Smx205022 	/*
37436986Smx205022 	 * Large Send Offloading(LSO) Enable/Disable
37446986Smx205022 	 * If the tx hardware checksum is not enabled, LSO should be
37456986Smx205022 	 * disabled.
37466986Smx205022 	 */
37476986Smx205022 	Adapter->lso_enable =
37486986Smx205022 	    e1000g_get_prop(Adapter, "lso_enable",
37496986Smx205022 	    0, 1, DEFAULT_LSO_ENABLE);
37506986Smx205022 
37516986Smx205022 	switch (hw->mac.type) {
37526986Smx205022 		case e1000_82546:
37536986Smx205022 		case e1000_82546_rev_3:
37546986Smx205022 			if (Adapter->lso_enable)
37556986Smx205022 				Adapter->lso_premature_issue = B_TRUE;
37567426SChenliang.Xu@Sun.COM 			/* FALLTHRU */
37576986Smx205022 		case e1000_82571:
37586986Smx205022 		case e1000_82572:
37596986Smx205022 		case e1000_82573:
37608073SMin.Xu@Sun.COM 		case e1000_80003es2lan:
37616986Smx205022 			break;
37626986Smx205022 		default:
37636986Smx205022 			Adapter->lso_enable = B_FALSE;
37646986Smx205022 	}
37656986Smx205022 
37666986Smx205022 	if (!Adapter->tx_hcksum_enable) {
37676986Smx205022 		Adapter->lso_premature_issue = B_FALSE;
37686986Smx205022 		Adapter->lso_enable = B_FALSE;
37696986Smx205022 	}
37708417SChenlu.Chen@Sun.COM 
37718417SChenlu.Chen@Sun.COM 	/*
37728417SChenlu.Chen@Sun.COM 	 * If mem_workaround_82546 is enabled, the rx buffer allocated by
37738417SChenlu.Chen@Sun.COM 	 * e1000_82545, e1000_82546 and e1000_82546_rev_3
37748417SChenlu.Chen@Sun.COM 	 * will not cross 64k boundary.
37758417SChenlu.Chen@Sun.COM 	 */
37768417SChenlu.Chen@Sun.COM 	Adapter->mem_workaround_82546 =
37778417SChenlu.Chen@Sun.COM 	    e1000g_get_prop(Adapter, "mem_workaround_82546",
37788417SChenlu.Chen@Sun.COM 	    0, 1, DEFAULT_MEM_WORKAROUND_82546);
37799770SChangqing.Li@Sun.COM 
37809770SChangqing.Li@Sun.COM 	/*
37819770SChangqing.Li@Sun.COM 	 * Max number of multicast addresses
37829770SChangqing.Li@Sun.COM 	 */
37839770SChangqing.Li@Sun.COM 	Adapter->mcast_max_num =
37849770SChangqing.Li@Sun.COM 	    e1000g_get_prop(Adapter, "mcast_max_num",
37859770SChangqing.Li@Sun.COM 	    MIN_MCAST_NUM, MAX_MCAST_NUM, hw->mac.mta_reg_count * 32);
37863526Sxy150489 }
37873526Sxy150489 
37883526Sxy150489 /*
37894919Sxy150489  * e1000g_get_prop - routine to read properties
37904919Sxy150489  *
37914919Sxy150489  * Get a user-configure property value out of the configuration
37924919Sxy150489  * file e1000g.conf.
37934919Sxy150489  *
37944919Sxy150489  * Caller provides name of the property, a default value, a minimum
37954919Sxy150489  * value, and a maximum value.
37964919Sxy150489  *
37974919Sxy150489  * Return configured value of the property, with default, minimum and
37984919Sxy150489  * maximum properly applied.
37993526Sxy150489  */
38003526Sxy150489 static int
38014919Sxy150489 e1000g_get_prop(struct e1000g *Adapter,	/* point to per-adapter structure */
38023526Sxy150489     char *propname,		/* name of the property */
38033526Sxy150489     int minval,			/* minimum acceptable value */
38043526Sxy150489     int maxval,			/* maximim acceptable value */
38053526Sxy150489     int defval)			/* default value */
38063526Sxy150489 {
38073526Sxy150489 	int propval;		/* value returned for requested property */
38083526Sxy150489 	int *props;		/* point to array of properties returned */
38093526Sxy150489 	uint_t nprops;		/* number of property value returned */
38103526Sxy150489 
38113526Sxy150489 	/*
38123526Sxy150489 	 * get the array of properties from the config file
38133526Sxy150489 	 */
38143526Sxy150489 	if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, Adapter->dip,
38153526Sxy150489 	    DDI_PROP_DONTPASS, propname, &props, &nprops) == DDI_PROP_SUCCESS) {
38163526Sxy150489 		/* got some properties, test if we got enough */
38174919Sxy150489 		if (Adapter->instance < nprops) {
38184919Sxy150489 			propval = props[Adapter->instance];
38193526Sxy150489 		} else {
38203526Sxy150489 			/* not enough properties configured */
38213526Sxy150489 			propval = defval;
38224919Sxy150489 			E1000G_DEBUGLOG_2(Adapter, E1000G_INFO_LEVEL,
38233526Sxy150489 			    "Not Enough %s values found in e1000g.conf"
38243526Sxy150489 			    " - set to %d\n",
38253526Sxy150489 			    propname, propval);
38263526Sxy150489 		}
38273526Sxy150489 
38283526Sxy150489 		/* free memory allocated for properties */
38293526Sxy150489 		ddi_prop_free(props);
38303526Sxy150489 
38313526Sxy150489 	} else {
38323526Sxy150489 		propval = defval;
38333526Sxy150489 	}
38343526Sxy150489 
38353526Sxy150489 	/*
38363526Sxy150489 	 * enforce limits
38373526Sxy150489 	 */
38383526Sxy150489 	if (propval > maxval) {
38393526Sxy150489 		propval = maxval;
38404919Sxy150489 		E1000G_DEBUGLOG_2(Adapter, E1000G_INFO_LEVEL,
38413526Sxy150489 		    "Too High %s value in e1000g.conf - set to %d\n",
38423526Sxy150489 		    propname, propval);
38433526Sxy150489 	}
38443526Sxy150489 
38453526Sxy150489 	if (propval < minval) {
38463526Sxy150489 		propval = minval;
38474919Sxy150489 		E1000G_DEBUGLOG_2(Adapter, E1000G_INFO_LEVEL,
38483526Sxy150489 		    "Too Low %s value in e1000g.conf - set to %d\n",
38493526Sxy150489 		    propname, propval);
38503526Sxy150489 	}
38513526Sxy150489 
38523526Sxy150489 	return (propval);
38533526Sxy150489 }
38543526Sxy150489 
38553526Sxy150489 static boolean_t
38564061Sxy150489 e1000g_link_check(struct e1000g *Adapter)
38573526Sxy150489 {
38584061Sxy150489 	uint16_t speed, duplex, phydata;
38594061Sxy150489 	boolean_t link_changed = B_FALSE;
38603526Sxy150489 	struct e1000_hw *hw;
38613526Sxy150489 	uint32_t reg_tarc;
38623526Sxy150489 
38634919Sxy150489 	hw = &Adapter->shared;
38643526Sxy150489 
38653526Sxy150489 	if (e1000g_link_up(Adapter)) {
38663526Sxy150489 		/*
38673526Sxy150489 		 * The Link is up, check whether it was marked as down earlier
38683526Sxy150489 		 */
38694061Sxy150489 		if (Adapter->link_state != LINK_STATE_UP) {
38707426SChenliang.Xu@Sun.COM 			(void) e1000_get_speed_and_duplex(hw, &speed, &duplex);
38714061Sxy150489 			Adapter->link_speed = speed;
38724061Sxy150489 			Adapter->link_duplex = duplex;
38734061Sxy150489 			Adapter->link_state = LINK_STATE_UP;
38744061Sxy150489 			link_changed = B_TRUE;
38754061Sxy150489 
38768850SMin.Xu@Sun.COM 			if (Adapter->link_speed == SPEED_1000)
38778850SMin.Xu@Sun.COM 				Adapter->stall_threshold = TX_STALL_TIME_2S;
38788850SMin.Xu@Sun.COM 			else
38798850SMin.Xu@Sun.COM 				Adapter->stall_threshold = TX_STALL_TIME_8S;
38808850SMin.Xu@Sun.COM 
38814061Sxy150489 			Adapter->tx_link_down_timeout = 0;
38824061Sxy150489 
38834919Sxy150489 			if ((hw->mac.type == e1000_82571) ||
38844919Sxy150489 			    (hw->mac.type == e1000_82572)) {
38856735Scc210113 				reg_tarc = E1000_READ_REG(hw, E1000_TARC(0));
38864061Sxy150489 				if (speed == SPEED_1000)
38874061Sxy150489 					reg_tarc |= (1 << 21);
38884061Sxy150489 				else
38894061Sxy150489 					reg_tarc &= ~(1 << 21);
38906735Scc210113 				E1000_WRITE_REG(hw, E1000_TARC(0), reg_tarc);
38913526Sxy150489 			}
38923526Sxy150489 		}
38933526Sxy150489 		Adapter->smartspeed = 0;
38943526Sxy150489 	} else {
38954061Sxy150489 		if (Adapter->link_state != LINK_STATE_DOWN) {
38963526Sxy150489 			Adapter->link_speed = 0;
38973526Sxy150489 			Adapter->link_duplex = 0;
38984061Sxy150489 			Adapter->link_state = LINK_STATE_DOWN;
38994061Sxy150489 			link_changed = B_TRUE;
39004061Sxy150489 
39013526Sxy150489 			/*
39023526Sxy150489 			 * SmartSpeed workaround for Tabor/TanaX, When the
39033526Sxy150489 			 * driver loses link disable auto master/slave
39043526Sxy150489 			 * resolution.
39053526Sxy150489 			 */
39064919Sxy150489 			if (hw->phy.type == e1000_phy_igp) {
39077426SChenliang.Xu@Sun.COM 				(void) e1000_read_phy_reg(hw,
39083526Sxy150489 				    PHY_1000T_CTRL, &phydata);
39093526Sxy150489 				phydata |= CR_1000T_MS_ENABLE;
39107426SChenliang.Xu@Sun.COM 				(void) e1000_write_phy_reg(hw,
39113526Sxy150489 				    PHY_1000T_CTRL, phydata);
39123526Sxy150489 			}
39133526Sxy150489 		} else {
39143526Sxy150489 			e1000g_smartspeed(Adapter);
39153526Sxy150489 		}
39164061Sxy150489 
39178479SChenlu.Chen@Sun.COM 		if (Adapter->e1000g_state & E1000G_STARTED) {
39184061Sxy150489 			if (Adapter->tx_link_down_timeout <
39194061Sxy150489 			    MAX_TX_LINK_DOWN_TIMEOUT) {
39204061Sxy150489 				Adapter->tx_link_down_timeout++;
39214061Sxy150489 			} else if (Adapter->tx_link_down_timeout ==
39224061Sxy150489 			    MAX_TX_LINK_DOWN_TIMEOUT) {
39234919Sxy150489 				e1000g_tx_clean(Adapter);
39244061Sxy150489 				Adapter->tx_link_down_timeout++;
39254061Sxy150489 			}
39264061Sxy150489 		}
39273526Sxy150489 	}
39283526Sxy150489 
39295273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK)
39305273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
39315273Sgl147354 
39324061Sxy150489 	return (link_changed);
39334061Sxy150489 }
39344061Sxy150489 
39356394Scc210113 /*
39366394Scc210113  * e1000g_reset_link - Using the link properties to setup the link
39376394Scc210113  */
39386394Scc210113 int
39396394Scc210113 e1000g_reset_link(struct e1000g *Adapter)
39406394Scc210113 {
39416394Scc210113 	struct e1000_mac_info *mac;
39426394Scc210113 	struct e1000_phy_info *phy;
394310605SMin.Xu@Sun.COM 	struct e1000_hw *hw;
39446394Scc210113 	boolean_t invalid;
39456394Scc210113 
39466394Scc210113 	mac = &Adapter->shared.mac;
39476394Scc210113 	phy = &Adapter->shared.phy;
394810605SMin.Xu@Sun.COM 	hw = &Adapter->shared;
39496394Scc210113 	invalid = B_FALSE;
39506394Scc210113 
395110605SMin.Xu@Sun.COM 	if (hw->phy.media_type != e1000_media_type_copper)
395210605SMin.Xu@Sun.COM 		goto out;
395310605SMin.Xu@Sun.COM 
39546394Scc210113 	if (Adapter->param_adv_autoneg == 1) {
39556394Scc210113 		mac->autoneg = B_TRUE;
39566394Scc210113 		phy->autoneg_advertised = 0;
39576394Scc210113 
39586394Scc210113 		/*
39596394Scc210113 		 * 1000hdx is not supported for autonegotiation
39606394Scc210113 		 */
39616394Scc210113 		if (Adapter->param_adv_1000fdx == 1)
39626394Scc210113 			phy->autoneg_advertised |= ADVERTISE_1000_FULL;
39636394Scc210113 
39646394Scc210113 		if (Adapter->param_adv_100fdx == 1)
39656394Scc210113 			phy->autoneg_advertised |= ADVERTISE_100_FULL;
39666394Scc210113 
39676394Scc210113 		if (Adapter->param_adv_100hdx == 1)
39686394Scc210113 			phy->autoneg_advertised |= ADVERTISE_100_HALF;
39696394Scc210113 
39706394Scc210113 		if (Adapter->param_adv_10fdx == 1)
39716394Scc210113 			phy->autoneg_advertised |= ADVERTISE_10_FULL;
39726394Scc210113 
39736394Scc210113 		if (Adapter->param_adv_10hdx == 1)
39746394Scc210113 			phy->autoneg_advertised |= ADVERTISE_10_HALF;
39756394Scc210113 
39766394Scc210113 		if (phy->autoneg_advertised == 0)
39776394Scc210113 			invalid = B_TRUE;
39786394Scc210113 	} else {
39796394Scc210113 		mac->autoneg = B_FALSE;
39806394Scc210113 
39816394Scc210113 		/*
398210605SMin.Xu@Sun.COM 		 * For Intel copper cards, 1000fdx and 1000hdx are not
398310605SMin.Xu@Sun.COM 		 * supported for forced link
39846394Scc210113 		 */
39856394Scc210113 		if (Adapter->param_adv_100fdx == 1)
39866394Scc210113 			mac->forced_speed_duplex = ADVERTISE_100_FULL;
39876394Scc210113 		else if (Adapter->param_adv_100hdx == 1)
39886394Scc210113 			mac->forced_speed_duplex = ADVERTISE_100_HALF;
39896394Scc210113 		else if (Adapter->param_adv_10fdx == 1)
39906394Scc210113 			mac->forced_speed_duplex = ADVERTISE_10_FULL;
39916394Scc210113 		else if (Adapter->param_adv_10hdx == 1)
39926394Scc210113 			mac->forced_speed_duplex = ADVERTISE_10_HALF;
39936394Scc210113 		else
39946394Scc210113 			invalid = B_TRUE;
39956394Scc210113 
39966394Scc210113 	}
39976394Scc210113 
39986394Scc210113 	if (invalid) {
39996394Scc210113 		e1000g_log(Adapter, CE_WARN,
400010680SMin.Xu@Sun.COM 		    "Invalid link settings. Setup link to "
40016394Scc210113 		    "support autonegotiation with all link capabilities.");
40026394Scc210113 		mac->autoneg = B_TRUE;
400310680SMin.Xu@Sun.COM 		phy->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT;
40046394Scc210113 	}
40056394Scc210113 
400610605SMin.Xu@Sun.COM out:
40076394Scc210113 	return (e1000_setup_link(&Adapter->shared));
40086394Scc210113 }
40096394Scc210113 
40104061Sxy150489 static void
40118275SEric Cheng e1000g_timer_tx_resched(struct e1000g *Adapter)
40128275SEric Cheng {
40138275SEric Cheng 	e1000g_tx_ring_t *tx_ring = Adapter->tx_ring;
40148275SEric Cheng 
40158479SChenlu.Chen@Sun.COM 	rw_enter(&Adapter->chip_lock, RW_READER);
40168479SChenlu.Chen@Sun.COM 
40178275SEric Cheng 	if (tx_ring->resched_needed &&
40188275SEric Cheng 	    ((ddi_get_lbolt() - tx_ring->resched_timestamp) >
40198275SEric Cheng 	    drv_usectohz(1000000)) &&
40208479SChenlu.Chen@Sun.COM 	    (Adapter->e1000g_state & E1000G_STARTED) &&
40218275SEric Cheng 	    (tx_ring->tbd_avail >= DEFAULT_TX_NO_RESOURCE)) {
40228275SEric Cheng 		tx_ring->resched_needed = B_FALSE;
40238275SEric Cheng 		mac_tx_update(Adapter->mh);
40248275SEric Cheng 		E1000G_STAT(tx_ring->stat_reschedule);
40258275SEric Cheng 		E1000G_STAT(tx_ring->stat_timer_reschedule);
40268275SEric Cheng 	}
40278479SChenlu.Chen@Sun.COM 
40288479SChenlu.Chen@Sun.COM 	rw_exit(&Adapter->chip_lock);
40298275SEric Cheng }
40308275SEric Cheng 
40318275SEric Cheng static void
40324919Sxy150489 e1000g_local_timer(void *ws)
40334061Sxy150489 {
40344061Sxy150489 	struct e1000g *Adapter = (struct e1000g *)ws;
40354061Sxy150489 	struct e1000_hw *hw;
40364061Sxy150489 	e1000g_ether_addr_t ether_addr;
40374061Sxy150489 	boolean_t link_changed;
40384061Sxy150489 
40394919Sxy150489 	hw = &Adapter->shared;
40404919Sxy150489 
40418479SChenlu.Chen@Sun.COM 	if (Adapter->e1000g_state & E1000G_ERROR) {
40428479SChenlu.Chen@Sun.COM 		rw_enter(&Adapter->chip_lock, RW_WRITER);
40438479SChenlu.Chen@Sun.COM 		Adapter->e1000g_state &= ~E1000G_ERROR;
40448479SChenlu.Chen@Sun.COM 		rw_exit(&Adapter->chip_lock);
40458479SChenlu.Chen@Sun.COM 
40465273Sgl147354 		Adapter->reset_count++;
40478275SEric Cheng 		if (e1000g_global_reset(Adapter)) {
40485273Sgl147354 			ddi_fm_service_impact(Adapter->dip,
40495273Sgl147354 			    DDI_SERVICE_RESTORED);
40508275SEric Cheng 			e1000g_timer_tx_resched(Adapter);
40518275SEric Cheng 		} else
40525273Sgl147354 			ddi_fm_service_impact(Adapter->dip,
40535273Sgl147354 			    DDI_SERVICE_LOST);
40545273Sgl147354 		return;
40555273Sgl147354 	}
40565273Sgl147354 
40574061Sxy150489 	if (e1000g_stall_check(Adapter)) {
40584919Sxy150489 		E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL,
40594061Sxy150489 		    "Tx stall detected. Activate automatic recovery.\n");
40605273Sgl147354 		e1000g_fm_ereport(Adapter, DDI_FM_DEVICE_STALL);
40618479SChenlu.Chen@Sun.COM 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_LOST);
40624061Sxy150489 		Adapter->reset_count++;
40638275SEric Cheng 		if (e1000g_reset_adapter(Adapter)) {
40645273Sgl147354 			ddi_fm_service_impact(Adapter->dip,
40655273Sgl147354 			    DDI_SERVICE_RESTORED);
40668275SEric Cheng 			e1000g_timer_tx_resched(Adapter);
40678479SChenlu.Chen@Sun.COM 		}
40685273Sgl147354 		return;
40694061Sxy150489 	}
40704061Sxy150489 
40714061Sxy150489 	link_changed = B_FALSE;
40725082Syy150190 	rw_enter(&Adapter->chip_lock, RW_READER);
40734061Sxy150489 	if (Adapter->link_complete)
40744061Sxy150489 		link_changed = e1000g_link_check(Adapter);
40755082Syy150190 	rw_exit(&Adapter->chip_lock);
40764061Sxy150489 
40778850SMin.Xu@Sun.COM 	if (link_changed) {
40788850SMin.Xu@Sun.COM 		if (!Adapter->reset_flag)
40798850SMin.Xu@Sun.COM 			mac_link_update(Adapter->mh, Adapter->link_state);
40808850SMin.Xu@Sun.COM 		if (Adapter->link_state == LINK_STATE_UP)
40818850SMin.Xu@Sun.COM 			Adapter->reset_flag = B_FALSE;
40828850SMin.Xu@Sun.COM 	}
40837133Scc210113 	/*
40847133Scc210113 	 * Workaround for esb2. Data stuck in fifo on a link
40857133Scc210113 	 * down event. Reset the adapter to recover it.
40867133Scc210113 	 */
40877133Scc210113 	if (Adapter->esb2_workaround) {
40887133Scc210113 		Adapter->esb2_workaround = B_FALSE;
40897656SSherry.Moore@Sun.COM 		(void) e1000g_reset_adapter(Adapter);
40908479SChenlu.Chen@Sun.COM 		return;
40914139Sxy150489 	}
40924061Sxy150489 
40933526Sxy150489 	/*
40943526Sxy150489 	 * With 82571 controllers, any locally administered address will
40953526Sxy150489 	 * be overwritten when there is a reset on the other port.
40963526Sxy150489 	 * Detect this circumstance and correct it.
40973526Sxy150489 	 */
40984919Sxy150489 	if ((hw->mac.type == e1000_82571) &&
40994919Sxy150489 	    (e1000_get_laa_state_82571(hw) == B_TRUE)) {
41004919Sxy150489 		ether_addr.reg.low = E1000_READ_REG_ARRAY(hw, E1000_RA, 0);
41014919Sxy150489 		ether_addr.reg.high = E1000_READ_REG_ARRAY(hw, E1000_RA, 1);
41023526Sxy150489 
41033526Sxy150489 		ether_addr.reg.low = ntohl(ether_addr.reg.low);
41043526Sxy150489 		ether_addr.reg.high = ntohl(ether_addr.reg.high);
41053526Sxy150489 
41064919Sxy150489 		if ((ether_addr.mac.addr[5] != hw->mac.addr[0]) ||
41074919Sxy150489 		    (ether_addr.mac.addr[4] != hw->mac.addr[1]) ||
41084919Sxy150489 		    (ether_addr.mac.addr[3] != hw->mac.addr[2]) ||
41094919Sxy150489 		    (ether_addr.mac.addr[2] != hw->mac.addr[3]) ||
41104919Sxy150489 		    (ether_addr.mac.addr[1] != hw->mac.addr[4]) ||
41114919Sxy150489 		    (ether_addr.mac.addr[0] != hw->mac.addr[5])) {
41124919Sxy150489 			e1000_rar_set(hw, hw->mac.addr, 0);
41133526Sxy150489 		}
41143526Sxy150489 	}
41153526Sxy150489 
41163526Sxy150489 	/*
41174919Sxy150489 	 * Long TTL workaround for 82541/82547
41183526Sxy150489 	 */
41197426SChenliang.Xu@Sun.COM 	(void) e1000_igp_ttl_workaround_82547(hw);
41203526Sxy150489 
41213526Sxy150489 	/*
41223526Sxy150489 	 * Check for Adaptive IFS settings If there are lots of collisions
41233526Sxy150489 	 * change the value in steps...
41243526Sxy150489 	 * These properties should only be set for 10/100
41253526Sxy150489 	 */
41266735Scc210113 	if ((hw->phy.media_type == e1000_media_type_copper) &&
41274061Sxy150489 	    ((Adapter->link_speed == SPEED_100) ||
41284061Sxy150489 	    (Adapter->link_speed == SPEED_10))) {
41293526Sxy150489 		e1000_update_adaptive(hw);
41303526Sxy150489 	}
41313526Sxy150489 	/*
41323526Sxy150489 	 * Set Timer Interrupts
41333526Sxy150489 	 */
41344919Sxy150489 	E1000_WRITE_REG(hw, E1000_ICS, E1000_IMS_RXT0);
41354919Sxy150489 
41365273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK)
41375273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
41388275SEric Cheng 	else
41398275SEric Cheng 		e1000g_timer_tx_resched(Adapter);
41405273Sgl147354 
41414919Sxy150489 	restart_watchdog_timer(Adapter);
41423526Sxy150489 }
41433526Sxy150489 
41444061Sxy150489 /*
41454061Sxy150489  * The function e1000g_link_timer() is called when the timer for link setup
41464061Sxy150489  * is expired, which indicates the completion of the link setup. The link
41474061Sxy150489  * state will not be updated until the link setup is completed. And the
41484061Sxy150489  * link state will not be sent to the upper layer through mac_link_update()
41494061Sxy150489  * in this function. It will be updated in the local timer routine or the
41504061Sxy150489  * interrupt service routine after the interface is started (plumbed).
41514061Sxy150489  */
41523526Sxy150489 static void
41534061Sxy150489 e1000g_link_timer(void *arg)
41543526Sxy150489 {
41554061Sxy150489 	struct e1000g *Adapter = (struct e1000g *)arg;
41563526Sxy150489 
41574919Sxy150489 	mutex_enter(&Adapter->link_lock);
41584061Sxy150489 	Adapter->link_complete = B_TRUE;
41594061Sxy150489 	Adapter->link_tid = 0;
41604919Sxy150489 	mutex_exit(&Adapter->link_lock);
41613526Sxy150489 }
41623526Sxy150489 
41633526Sxy150489 /*
41644919Sxy150489  * e1000g_force_speed_duplex - read forced speed/duplex out of e1000g.conf
41654919Sxy150489  *
41664919Sxy150489  * This function read the forced speed and duplex for 10/100 Mbps speeds
41674919Sxy150489  * and also for 1000 Mbps speeds from the e1000g.conf file
41683526Sxy150489  */
41693526Sxy150489 static void
41703526Sxy150489 e1000g_force_speed_duplex(struct e1000g *Adapter)
41713526Sxy150489 {
41723526Sxy150489 	int forced;
41734919Sxy150489 	struct e1000_mac_info *mac = &Adapter->shared.mac;
41744919Sxy150489 	struct e1000_phy_info *phy = &Adapter->shared.phy;
41753526Sxy150489 
41763526Sxy150489 	/*
41773526Sxy150489 	 * get value out of config file
41783526Sxy150489 	 */
41794919Sxy150489 	forced = e1000g_get_prop(Adapter, "ForceSpeedDuplex",
41803526Sxy150489 	    GDIAG_10_HALF, GDIAG_ANY, GDIAG_ANY);
41813526Sxy150489 
41823526Sxy150489 	switch (forced) {
41833526Sxy150489 	case GDIAG_10_HALF:
41843526Sxy150489 		/*
41853526Sxy150489 		 * Disable Auto Negotiation
41863526Sxy150489 		 */
41874919Sxy150489 		mac->autoneg = B_FALSE;
41884919Sxy150489 		mac->forced_speed_duplex = ADVERTISE_10_HALF;
41893526Sxy150489 		break;
41903526Sxy150489 	case GDIAG_10_FULL:
41913526Sxy150489 		/*
41923526Sxy150489 		 * Disable Auto Negotiation
41933526Sxy150489 		 */
41944919Sxy150489 		mac->autoneg = B_FALSE;
41954919Sxy150489 		mac->forced_speed_duplex = ADVERTISE_10_FULL;
41963526Sxy150489 		break;
41973526Sxy150489 	case GDIAG_100_HALF:
41983526Sxy150489 		/*
41993526Sxy150489 		 * Disable Auto Negotiation
42003526Sxy150489 		 */
42014919Sxy150489 		mac->autoneg = B_FALSE;
42024919Sxy150489 		mac->forced_speed_duplex = ADVERTISE_100_HALF;
42033526Sxy150489 		break;
42043526Sxy150489 	case GDIAG_100_FULL:
42053526Sxy150489 		/*
42063526Sxy150489 		 * Disable Auto Negotiation
42073526Sxy150489 		 */
42084919Sxy150489 		mac->autoneg = B_FALSE;
42094919Sxy150489 		mac->forced_speed_duplex = ADVERTISE_100_FULL;
42103526Sxy150489 		break;
42113526Sxy150489 	case GDIAG_1000_FULL:
42123526Sxy150489 		/*
42133526Sxy150489 		 * The gigabit spec requires autonegotiation.  Therefore,
42143526Sxy150489 		 * when the user wants to force the speed to 1000Mbps, we
42153526Sxy150489 		 * enable AutoNeg, but only allow the harware to advertise
42163526Sxy150489 		 * 1000Mbps.  This is different from 10/100 operation, where
42173526Sxy150489 		 * we are allowed to link without any negotiation.
42183526Sxy150489 		 */
42194919Sxy150489 		mac->autoneg = B_TRUE;
42204919Sxy150489 		phy->autoneg_advertised = ADVERTISE_1000_FULL;
42213526Sxy150489 		break;
42223526Sxy150489 	default:	/* obey the setting of AutoNegAdvertised */
42234919Sxy150489 		mac->autoneg = B_TRUE;
42244919Sxy150489 		phy->autoneg_advertised =
42254919Sxy150489 		    (uint16_t)e1000g_get_prop(Adapter, "AutoNegAdvertised",
42264349Sxy150489 		    0, AUTONEG_ADVERTISE_SPEED_DEFAULT,
42274349Sxy150489 		    AUTONEG_ADVERTISE_SPEED_DEFAULT);
42283526Sxy150489 		break;
42293526Sxy150489 	}	/* switch */
42303526Sxy150489 }
42313526Sxy150489 
42323526Sxy150489 /*
42334919Sxy150489  * e1000g_get_max_frame_size - get jumbo frame setting from e1000g.conf
42344919Sxy150489  *
42354919Sxy150489  * This function reads MaxFrameSize from e1000g.conf
42363526Sxy150489  */
42373526Sxy150489 static void
42383526Sxy150489 e1000g_get_max_frame_size(struct e1000g *Adapter)
42393526Sxy150489 {
42403526Sxy150489 	int max_frame;
42413526Sxy150489 
42423526Sxy150489 	/*
42433526Sxy150489 	 * get value out of config file
42443526Sxy150489 	 */
42454919Sxy150489 	max_frame = e1000g_get_prop(Adapter, "MaxFrameSize", 0, 3, 0);
42463526Sxy150489 
42473526Sxy150489 	switch (max_frame) {
42483526Sxy150489 	case 0:
42496394Scc210113 		Adapter->default_mtu = ETHERMTU;
42503526Sxy150489 		break;
42516394Scc210113 	/*
42526394Scc210113 	 * To avoid excessive memory allocation for rx buffers,
42536394Scc210113 	 * the bytes of E1000G_IPALIGNPRESERVEROOM are reserved.
42546394Scc210113 	 */
42553526Sxy150489 	case 1:
42566394Scc210113 		Adapter->default_mtu = FRAME_SIZE_UPTO_4K -
42576394Scc210113 		    sizeof (struct ether_vlan_header) - ETHERFCSL -
42586394Scc210113 		    E1000G_IPALIGNPRESERVEROOM;
42593526Sxy150489 		break;
42603526Sxy150489 	case 2:
42616394Scc210113 		Adapter->default_mtu = FRAME_SIZE_UPTO_8K -
42626394Scc210113 		    sizeof (struct ether_vlan_header) - ETHERFCSL -
42636394Scc210113 		    E1000G_IPALIGNPRESERVEROOM;
42643526Sxy150489 		break;
42653526Sxy150489 	case 3:
426610680SMin.Xu@Sun.COM 		Adapter->default_mtu = FRAME_SIZE_UPTO_16K -
426710680SMin.Xu@Sun.COM 		    sizeof (struct ether_vlan_header) - ETHERFCSL -
426810680SMin.Xu@Sun.COM 		    E1000G_IPALIGNPRESERVEROOM;
42693526Sxy150489 		break;
42703526Sxy150489 	default:
42716394Scc210113 		Adapter->default_mtu = ETHERMTU;
42723526Sxy150489 		break;
42733526Sxy150489 	}	/* switch */
42743526Sxy150489 
427510680SMin.Xu@Sun.COM 	/*
427610680SMin.Xu@Sun.COM 	 * If the user configed MTU is larger than the deivce's maximum MTU,
427710680SMin.Xu@Sun.COM 	 * the MTU is set to the deivce's maximum value.
427810680SMin.Xu@Sun.COM 	 */
427910680SMin.Xu@Sun.COM 	if (Adapter->default_mtu > Adapter->max_mtu)
428010680SMin.Xu@Sun.COM 		Adapter->default_mtu = Adapter->max_mtu;
428110680SMin.Xu@Sun.COM 
428210680SMin.Xu@Sun.COM 	Adapter->max_frame_size = e1000g_mtu2maxframe(Adapter->default_mtu);
428310680SMin.Xu@Sun.COM }
428410680SMin.Xu@Sun.COM 
428510680SMin.Xu@Sun.COM /*
428610680SMin.Xu@Sun.COM  * e1000g_pch_limits - Apply limits of the PCH silicon type
428710680SMin.Xu@Sun.COM  *
428810680SMin.Xu@Sun.COM  * At any frame size larger than the ethernet default,
428910680SMin.Xu@Sun.COM  * prevent linking at 10/100 speeds.
429010680SMin.Xu@Sun.COM  */
429110680SMin.Xu@Sun.COM static void
429210680SMin.Xu@Sun.COM e1000g_pch_limits(struct e1000g *Adapter)
429310680SMin.Xu@Sun.COM {
429410680SMin.Xu@Sun.COM 	struct e1000_hw *hw = &Adapter->shared;
429510680SMin.Xu@Sun.COM 
429610680SMin.Xu@Sun.COM 	/* only applies to PCH silicon type */
429710680SMin.Xu@Sun.COM 	if (hw->mac.type != e1000_pchlan)
429810680SMin.Xu@Sun.COM 		return;
429910680SMin.Xu@Sun.COM 
430010680SMin.Xu@Sun.COM 	/* only applies to frames larger than ethernet default */
430110680SMin.Xu@Sun.COM 	if (Adapter->max_frame_size > DEFAULT_FRAME_SIZE) {
430210680SMin.Xu@Sun.COM 		hw->mac.autoneg = B_TRUE;
430310680SMin.Xu@Sun.COM 		hw->phy.autoneg_advertised = ADVERTISE_1000_FULL;
430410680SMin.Xu@Sun.COM 
430510680SMin.Xu@Sun.COM 		Adapter->param_adv_autoneg = 1;
430610680SMin.Xu@Sun.COM 		Adapter->param_adv_1000fdx = 1;
430710680SMin.Xu@Sun.COM 
430810680SMin.Xu@Sun.COM 		Adapter->param_adv_100fdx = 0;
430910680SMin.Xu@Sun.COM 		Adapter->param_adv_100hdx = 0;
431010680SMin.Xu@Sun.COM 		Adapter->param_adv_10fdx = 0;
431110680SMin.Xu@Sun.COM 		Adapter->param_adv_10hdx = 0;
431210680SMin.Xu@Sun.COM 
431310680SMin.Xu@Sun.COM 		e1000g_param_sync(Adapter);
431410680SMin.Xu@Sun.COM 	}
431510680SMin.Xu@Sun.COM }
431610680SMin.Xu@Sun.COM 
431710680SMin.Xu@Sun.COM /*
431810680SMin.Xu@Sun.COM  * e1000g_mtu2maxframe - convert given MTU to maximum frame size
431910680SMin.Xu@Sun.COM  */
432010680SMin.Xu@Sun.COM static uint32_t
432110680SMin.Xu@Sun.COM e1000g_mtu2maxframe(uint32_t mtu)
432210680SMin.Xu@Sun.COM {
432310680SMin.Xu@Sun.COM 	uint32_t maxframe;
432410680SMin.Xu@Sun.COM 
432510680SMin.Xu@Sun.COM 	maxframe = mtu + sizeof (struct ether_vlan_header) + ETHERFCSL;
432610680SMin.Xu@Sun.COM 
432710680SMin.Xu@Sun.COM 	return (maxframe);
43283526Sxy150489 }
43293526Sxy150489 
43303526Sxy150489 static void
43314919Sxy150489 arm_watchdog_timer(struct e1000g *Adapter)
43323526Sxy150489 {
43334919Sxy150489 	Adapter->watchdog_tid =
43344919Sxy150489 	    timeout(e1000g_local_timer,
43353526Sxy150489 	    (void *)Adapter, 1 * drv_usectohz(1000000));
43363526Sxy150489 }
43374919Sxy150489 #pragma inline(arm_watchdog_timer)
43384919Sxy150489 
43394919Sxy150489 static void
43404919Sxy150489 enable_watchdog_timer(struct e1000g *Adapter)
43414919Sxy150489 {
43424919Sxy150489 	mutex_enter(&Adapter->watchdog_lock);
43434919Sxy150489 
43444919Sxy150489 	if (!Adapter->watchdog_timer_enabled) {
43454919Sxy150489 		Adapter->watchdog_timer_enabled = B_TRUE;
43464919Sxy150489 		Adapter->watchdog_timer_started = B_TRUE;
43474919Sxy150489 		arm_watchdog_timer(Adapter);
43484919Sxy150489 	}
43494919Sxy150489 
43504919Sxy150489 	mutex_exit(&Adapter->watchdog_lock);
43514919Sxy150489 }
43523526Sxy150489 
43533526Sxy150489 static void
43544919Sxy150489 disable_watchdog_timer(struct e1000g *Adapter)
43553526Sxy150489 {
43563526Sxy150489 	timeout_id_t tid;
43573526Sxy150489 
43584919Sxy150489 	mutex_enter(&Adapter->watchdog_lock);
43594919Sxy150489 
43604919Sxy150489 	Adapter->watchdog_timer_enabled = B_FALSE;
43614919Sxy150489 	Adapter->watchdog_timer_started = B_FALSE;
43624919Sxy150489 	tid = Adapter->watchdog_tid;
43634919Sxy150489 	Adapter->watchdog_tid = 0;
43644919Sxy150489 
43654919Sxy150489 	mutex_exit(&Adapter->watchdog_lock);
43663526Sxy150489 
43673526Sxy150489 	if (tid != 0)
43683526Sxy150489 		(void) untimeout(tid);
43693526Sxy150489 }
43703526Sxy150489 
43713526Sxy150489 static void
43724919Sxy150489 start_watchdog_timer(struct e1000g *Adapter)
43733526Sxy150489 {
43744919Sxy150489 	mutex_enter(&Adapter->watchdog_lock);
43754919Sxy150489 
43764919Sxy150489 	if (Adapter->watchdog_timer_enabled) {
43774919Sxy150489 		if (!Adapter->watchdog_timer_started) {
43784919Sxy150489 			Adapter->watchdog_timer_started = B_TRUE;
43794919Sxy150489 			arm_watchdog_timer(Adapter);
43803526Sxy150489 		}
43813526Sxy150489 	}
43823526Sxy150489 
43834919Sxy150489 	mutex_exit(&Adapter->watchdog_lock);
43844919Sxy150489 }
43854919Sxy150489 
43864919Sxy150489 static void
43874919Sxy150489 restart_watchdog_timer(struct e1000g *Adapter)
43884919Sxy150489 {
43894919Sxy150489 	mutex_enter(&Adapter->watchdog_lock);
43904919Sxy150489 
43914919Sxy150489 	if (Adapter->watchdog_timer_started)
43924919Sxy150489 		arm_watchdog_timer(Adapter);
43934919Sxy150489 
43944919Sxy150489 	mutex_exit(&Adapter->watchdog_lock);
43953526Sxy150489 }
43963526Sxy150489 
43973526Sxy150489 static void
43984919Sxy150489 stop_watchdog_timer(struct e1000g *Adapter)
43993526Sxy150489 {
44004919Sxy150489 	timeout_id_t tid;
44014919Sxy150489 
44024919Sxy150489 	mutex_enter(&Adapter->watchdog_lock);
44034919Sxy150489 
44044919Sxy150489 	Adapter->watchdog_timer_started = B_FALSE;
44054919Sxy150489 	tid = Adapter->watchdog_tid;
44064919Sxy150489 	Adapter->watchdog_tid = 0;
44074919Sxy150489 
44084919Sxy150489 	mutex_exit(&Adapter->watchdog_lock);
44094919Sxy150489 
44104919Sxy150489 	if (tid != 0)
44114919Sxy150489 		(void) untimeout(tid);
44123526Sxy150489 }
44133526Sxy150489 
44143526Sxy150489 static void
44154919Sxy150489 stop_link_timer(struct e1000g *Adapter)
44163526Sxy150489 {
44173526Sxy150489 	timeout_id_t tid;
44183526Sxy150489 
44194919Sxy150489 	/* Disable the link timer */
44204919Sxy150489 	mutex_enter(&Adapter->link_lock);
44214919Sxy150489 
44224919Sxy150489 	tid = Adapter->link_tid;
44234919Sxy150489 	Adapter->link_tid = 0;
44244919Sxy150489 
44254919Sxy150489 	mutex_exit(&Adapter->link_lock);
44264919Sxy150489 
44274919Sxy150489 	if (tid != 0)
44284919Sxy150489 		(void) untimeout(tid);
44294919Sxy150489 }
44304919Sxy150489 
44314919Sxy150489 static void
44324919Sxy150489 stop_82547_timer(e1000g_tx_ring_t *tx_ring)
44334919Sxy150489 {
44344919Sxy150489 	timeout_id_t tid;
44354919Sxy150489 
44364919Sxy150489 	/* Disable the tx timer for 82547 chipset */
44374919Sxy150489 	mutex_enter(&tx_ring->tx_lock);
44384919Sxy150489 
44394919Sxy150489 	tx_ring->timer_enable_82547 = B_FALSE;
44404919Sxy150489 	tid = tx_ring->timer_id_82547;
44414919Sxy150489 	tx_ring->timer_id_82547 = 0;
44424919Sxy150489 
44434919Sxy150489 	mutex_exit(&tx_ring->tx_lock);
44443526Sxy150489 
44453526Sxy150489 	if (tid != 0)
44463526Sxy150489 		(void) untimeout(tid);
44473526Sxy150489 }
44483526Sxy150489 
44493526Sxy150489 void
44504919Sxy150489 e1000g_clear_interrupt(struct e1000g *Adapter)
44513526Sxy150489 {
44524919Sxy150489 	E1000_WRITE_REG(&Adapter->shared, E1000_IMC,
44534919Sxy150489 	    0xffffffff & ~E1000_IMS_RXSEQ);
44543526Sxy150489 }
44553526Sxy150489 
44563526Sxy150489 void
44574919Sxy150489 e1000g_mask_interrupt(struct e1000g *Adapter)
44583526Sxy150489 {
44594919Sxy150489 	E1000_WRITE_REG(&Adapter->shared, E1000_IMS,
44605882Syy150190 	    IMS_ENABLE_MASK & ~E1000_IMS_TXDW);
44615882Syy150190 
44625882Syy150190 	if (Adapter->tx_intr_enable)
44635882Syy150190 		e1000g_mask_tx_interrupt(Adapter);
44643526Sxy150489 }
44653526Sxy150489 
44667656SSherry.Moore@Sun.COM /*
44677656SSherry.Moore@Sun.COM  * This routine is called by e1000g_quiesce(), therefore must not block.
44687656SSherry.Moore@Sun.COM  */
44693526Sxy150489 void
44704919Sxy150489 e1000g_clear_all_interrupts(struct e1000g *Adapter)
44713526Sxy150489 {
44724919Sxy150489 	E1000_WRITE_REG(&Adapter->shared, E1000_IMC, 0xffffffff);
44733526Sxy150489 }
44743526Sxy150489 
44753526Sxy150489 void
44764919Sxy150489 e1000g_mask_tx_interrupt(struct e1000g *Adapter)
44773526Sxy150489 {
44785882Syy150190 	E1000_WRITE_REG(&Adapter->shared, E1000_IMS, E1000_IMS_TXDW);
44793526Sxy150489 }
44803526Sxy150489 
44813526Sxy150489 void
44824919Sxy150489 e1000g_clear_tx_interrupt(struct e1000g *Adapter)
44833526Sxy150489 {
44845882Syy150190 	E1000_WRITE_REG(&Adapter->shared, E1000_IMC, E1000_IMS_TXDW);
44853526Sxy150489 }
44863526Sxy150489 
44873526Sxy150489 static void
44884919Sxy150489 e1000g_smartspeed(struct e1000g *Adapter)
44893526Sxy150489 {
44904919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
44913526Sxy150489 	uint16_t phy_status;
44923526Sxy150489 	uint16_t phy_ctrl;
44933526Sxy150489 
44943526Sxy150489 	/*
44953526Sxy150489 	 * If we're not T-or-T, or we're not autoneg'ing, or we're not
44963526Sxy150489 	 * advertising 1000Full, we don't even use the workaround
44973526Sxy150489 	 */
44984919Sxy150489 	if ((hw->phy.type != e1000_phy_igp) ||
44994919Sxy150489 	    !hw->mac.autoneg ||
45004919Sxy150489 	    !(hw->phy.autoneg_advertised & ADVERTISE_1000_FULL))
45013526Sxy150489 		return;
45023526Sxy150489 
45033526Sxy150489 	/*
45043526Sxy150489 	 * True if this is the first call of this function or after every
45053526Sxy150489 	 * 30 seconds of not having link
45063526Sxy150489 	 */
45074919Sxy150489 	if (Adapter->smartspeed == 0) {
45083526Sxy150489 		/*
45093526Sxy150489 		 * If Master/Slave config fault is asserted twice, we
45103526Sxy150489 		 * assume back-to-back
45113526Sxy150489 		 */
45127426SChenliang.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
45133526Sxy150489 		if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
45143526Sxy150489 			return;
45153526Sxy150489 
45167426SChenliang.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
45173526Sxy150489 		if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
45183526Sxy150489 			return;
45193526Sxy150489 		/*
45203526Sxy150489 		 * We're assuming back-2-back because our status register
45213526Sxy150489 		 * insists! there's a fault in the master/slave
45223526Sxy150489 		 * relationship that was "negotiated"
45233526Sxy150489 		 */
45247426SChenliang.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
45253526Sxy150489 		/*
45263526Sxy150489 		 * Is the phy configured for manual configuration of
45273526Sxy150489 		 * master/slave?
45283526Sxy150489 		 */
45293526Sxy150489 		if (phy_ctrl & CR_1000T_MS_ENABLE) {
45303526Sxy150489 			/*
45313526Sxy150489 			 * Yes.  Then disable manual configuration (enable
45323526Sxy150489 			 * auto configuration) of master/slave
45333526Sxy150489 			 */
45343526Sxy150489 			phy_ctrl &= ~CR_1000T_MS_ENABLE;
45357426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw,
45363526Sxy150489 			    PHY_1000T_CTRL, phy_ctrl);
45373526Sxy150489 			/*
45383526Sxy150489 			 * Effectively starting the clock
45393526Sxy150489 			 */
45404919Sxy150489 			Adapter->smartspeed++;
45413526Sxy150489 			/*
45423526Sxy150489 			 * Restart autonegotiation
45433526Sxy150489 			 */
45444919Sxy150489 			if (!e1000_phy_setup_autoneg(hw) &&
45454919Sxy150489 			    !e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl)) {
45463526Sxy150489 				phy_ctrl |= (MII_CR_AUTO_NEG_EN |
45473526Sxy150489 				    MII_CR_RESTART_AUTO_NEG);
45487426SChenliang.Xu@Sun.COM 				(void) e1000_write_phy_reg(hw,
45494919Sxy150489 				    PHY_CONTROL, phy_ctrl);
45503526Sxy150489 			}
45513526Sxy150489 		}
45523526Sxy150489 		return;
45533526Sxy150489 		/*
45543526Sxy150489 		 * Has 6 seconds transpired still without link? Remember,
45553526Sxy150489 		 * you should reset the smartspeed counter once you obtain
45563526Sxy150489 		 * link
45573526Sxy150489 		 */
45584919Sxy150489 	} else if (Adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
45593526Sxy150489 		/*
45603526Sxy150489 		 * Yes.  Remember, we did at the start determine that
45613526Sxy150489 		 * there's a master/slave configuration fault, so we're
45623526Sxy150489 		 * still assuming there's someone on the other end, but we
45633526Sxy150489 		 * just haven't yet been able to talk to it. We then
45643526Sxy150489 		 * re-enable auto configuration of master/slave to see if
45653526Sxy150489 		 * we're running 2/3 pair cables.
45663526Sxy150489 		 */
45673526Sxy150489 		/*
45683526Sxy150489 		 * If still no link, perhaps using 2/3 pair cable
45693526Sxy150489 		 */
45707426SChenliang.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
45713526Sxy150489 		phy_ctrl |= CR_1000T_MS_ENABLE;
45727426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
45733526Sxy150489 		/*
45743526Sxy150489 		 * Restart autoneg with phy enabled for manual
45753526Sxy150489 		 * configuration of master/slave
45763526Sxy150489 		 */
45774919Sxy150489 		if (!e1000_phy_setup_autoneg(hw) &&
45784919Sxy150489 		    !e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl)) {
45793526Sxy150489 			phy_ctrl |=
45803526Sxy150489 			    (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);
45817426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl);
45823526Sxy150489 		}
45833526Sxy150489 		/*
45843526Sxy150489 		 * Hopefully, there are no more faults and we've obtained
45853526Sxy150489 		 * link as a result.
45863526Sxy150489 		 */
45873526Sxy150489 	}
45883526Sxy150489 	/*
45893526Sxy150489 	 * Restart process after E1000_SMARTSPEED_MAX iterations (30
45903526Sxy150489 	 * seconds)
45913526Sxy150489 	 */
45924919Sxy150489 	if (Adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
45934919Sxy150489 		Adapter->smartspeed = 0;
45943526Sxy150489 }
45953526Sxy150489 
45963526Sxy150489 static boolean_t
45973526Sxy150489 is_valid_mac_addr(uint8_t *mac_addr)
45983526Sxy150489 {
45993526Sxy150489 	const uint8_t addr_test1[6] = { 0, 0, 0, 0, 0, 0 };
46003526Sxy150489 	const uint8_t addr_test2[6] =
46013526Sxy150489 	    { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
46023526Sxy150489 
46033526Sxy150489 	if (!(bcmp(addr_test1, mac_addr, ETHERADDRL)) ||
46043526Sxy150489 	    !(bcmp(addr_test2, mac_addr, ETHERADDRL)))
46053526Sxy150489 		return (B_FALSE);
46063526Sxy150489 
46073526Sxy150489 	return (B_TRUE);
46083526Sxy150489 }
46093526Sxy150489 
46103526Sxy150489 /*
46114919Sxy150489  * e1000g_stall_check - check for tx stall
46124919Sxy150489  *
46134919Sxy150489  * This function checks if the adapter is stalled (in transmit).
46144919Sxy150489  *
46154919Sxy150489  * It is called each time the watchdog timeout is invoked.
46164919Sxy150489  * If the transmit descriptor reclaim continuously fails,
46174919Sxy150489  * the watchdog value will increment by 1. If the watchdog
46184919Sxy150489  * value exceeds the threshold, the adapter is assumed to
46194919Sxy150489  * have stalled and need to be reset.
46203526Sxy150489  */
46213526Sxy150489 static boolean_t
46223526Sxy150489 e1000g_stall_check(struct e1000g *Adapter)
46233526Sxy150489 {
46244919Sxy150489 	e1000g_tx_ring_t *tx_ring;
46254919Sxy150489 
46264919Sxy150489 	tx_ring = Adapter->tx_ring;
46274919Sxy150489 
46284061Sxy150489 	if (Adapter->link_state != LINK_STATE_UP)
46293526Sxy150489 		return (B_FALSE);
46303526Sxy150489 
46318850SMin.Xu@Sun.COM 	(void) e1000g_recycle(tx_ring);
46328850SMin.Xu@Sun.COM 
46338850SMin.Xu@Sun.COM 	if (Adapter->stall_flag) {
46348850SMin.Xu@Sun.COM 		Adapter->stall_flag = B_FALSE;
46358850SMin.Xu@Sun.COM 		Adapter->reset_flag = B_TRUE;
46368850SMin.Xu@Sun.COM 		return (B_TRUE);
46378850SMin.Xu@Sun.COM 	}
46388850SMin.Xu@Sun.COM 
46398850SMin.Xu@Sun.COM 	return (B_FALSE);
46403526Sxy150489 }
46413526Sxy150489 
46424919Sxy150489 #ifdef E1000G_DEBUG
46433526Sxy150489 static enum ioc_reply
46443526Sxy150489 e1000g_pp_ioctl(struct e1000g *e1000gp, struct iocblk *iocp, mblk_t *mp)
46453526Sxy150489 {
46463526Sxy150489 	void (*ppfn)(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd);
46473526Sxy150489 	e1000g_peekpoke_t *ppd;
46483526Sxy150489 	uint64_t mem_va;
46493526Sxy150489 	uint64_t maxoff;
46503526Sxy150489 	boolean_t peek;
46513526Sxy150489 
46523526Sxy150489 	switch (iocp->ioc_cmd) {
46533526Sxy150489 
46543526Sxy150489 	case E1000G_IOC_REG_PEEK:
46553526Sxy150489 		peek = B_TRUE;
46563526Sxy150489 		break;
46573526Sxy150489 
46583526Sxy150489 	case E1000G_IOC_REG_POKE:
46593526Sxy150489 		peek = B_FALSE;
46603526Sxy150489 		break;
46613526Sxy150489 
46623526Sxy150489 	deault:
46634919Sxy150489 		E1000G_DEBUGLOG_1(e1000gp, E1000G_INFO_LEVEL,
46644349Sxy150489 		    "e1000g_diag_ioctl: invalid ioctl command 0x%X\n",
46654349Sxy150489 		    iocp->ioc_cmd);
46663526Sxy150489 		return (IOC_INVAL);
46673526Sxy150489 	}
46683526Sxy150489 
46693526Sxy150489 	/*
46703526Sxy150489 	 * Validate format of ioctl
46713526Sxy150489 	 */
46723526Sxy150489 	if (iocp->ioc_count != sizeof (e1000g_peekpoke_t))
46733526Sxy150489 		return (IOC_INVAL);
46743526Sxy150489 	if (mp->b_cont == NULL)
46753526Sxy150489 		return (IOC_INVAL);
46763526Sxy150489 
46777426SChenliang.Xu@Sun.COM 	ppd = (e1000g_peekpoke_t *)(uintptr_t)mp->b_cont->b_rptr;
46783526Sxy150489 
46793526Sxy150489 	/*
46803526Sxy150489 	 * Validate request parameters
46813526Sxy150489 	 */
46823526Sxy150489 	switch (ppd->pp_acc_space) {
46833526Sxy150489 
46843526Sxy150489 	default:
46854919Sxy150489 		E1000G_DEBUGLOG_1(e1000gp, E1000G_INFO_LEVEL,
46864349Sxy150489 		    "e1000g_diag_ioctl: invalid access space 0x%X\n",
46874349Sxy150489 		    ppd->pp_acc_space);
46883526Sxy150489 		return (IOC_INVAL);
46893526Sxy150489 
46903526Sxy150489 	case E1000G_PP_SPACE_REG:
46913526Sxy150489 		/*
46923526Sxy150489 		 * Memory-mapped I/O space
46933526Sxy150489 		 */
46943526Sxy150489 		ASSERT(ppd->pp_acc_size == 4);
46953526Sxy150489 		if (ppd->pp_acc_size != 4)
46963526Sxy150489 			return (IOC_INVAL);
46973526Sxy150489 
46983526Sxy150489 		if ((ppd->pp_acc_offset % ppd->pp_acc_size) != 0)
46993526Sxy150489 			return (IOC_INVAL);
47003526Sxy150489 
47013526Sxy150489 		mem_va = 0;
47023526Sxy150489 		maxoff = 0x10000;
47033526Sxy150489 		ppfn = peek ? e1000g_ioc_peek_reg : e1000g_ioc_poke_reg;
47043526Sxy150489 		break;
47053526Sxy150489 
47063526Sxy150489 	case E1000G_PP_SPACE_E1000G:
47073526Sxy150489 		/*
47083526Sxy150489 		 * E1000g data structure!
47093526Sxy150489 		 */
47103526Sxy150489 		mem_va = (uintptr_t)e1000gp;
47113526Sxy150489 		maxoff = sizeof (struct e1000g);
47123526Sxy150489 		ppfn = peek ? e1000g_ioc_peek_mem : e1000g_ioc_poke_mem;
47133526Sxy150489 		break;
47143526Sxy150489 
47153526Sxy150489 	}
47163526Sxy150489 
47173526Sxy150489 	if (ppd->pp_acc_offset >= maxoff)
47183526Sxy150489 		return (IOC_INVAL);
47193526Sxy150489 
47203526Sxy150489 	if (ppd->pp_acc_offset + ppd->pp_acc_size > maxoff)
47213526Sxy150489 		return (IOC_INVAL);
47223526Sxy150489 
47233526Sxy150489 	/*
47243526Sxy150489 	 * All OK - go!
47253526Sxy150489 	 */
47263526Sxy150489 	ppd->pp_acc_offset += mem_va;
47273526Sxy150489 	(*ppfn)(e1000gp, ppd);
47283526Sxy150489 	return (peek ? IOC_REPLY : IOC_ACK);
47293526Sxy150489 }
47303526Sxy150489 
47313526Sxy150489 static void
47323526Sxy150489 e1000g_ioc_peek_reg(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd)
47333526Sxy150489 {
47343526Sxy150489 	ddi_acc_handle_t handle;
47353526Sxy150489 	uint32_t *regaddr;
47363526Sxy150489 
47374919Sxy150489 	handle = e1000gp->osdep.reg_handle;
47387426SChenliang.Xu@Sun.COM 	regaddr = (uint32_t *)((uintptr_t)e1000gp->shared.hw_addr +
47397426SChenliang.Xu@Sun.COM 	    (uintptr_t)ppd->pp_acc_offset);
47403526Sxy150489 
47413526Sxy150489 	ppd->pp_acc_data = ddi_get32(handle, regaddr);
47423526Sxy150489 }
47433526Sxy150489 
47443526Sxy150489 static void
47453526Sxy150489 e1000g_ioc_poke_reg(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd)
47463526Sxy150489 {
47473526Sxy150489 	ddi_acc_handle_t handle;
47483526Sxy150489 	uint32_t *regaddr;
47493526Sxy150489 	uint32_t value;
47503526Sxy150489 
47514919Sxy150489 	handle = e1000gp->osdep.reg_handle;
47527426SChenliang.Xu@Sun.COM 	regaddr = (uint32_t *)((uintptr_t)e1000gp->shared.hw_addr +
47537426SChenliang.Xu@Sun.COM 	    (uintptr_t)ppd->pp_acc_offset);
47543526Sxy150489 	value = (uint32_t)ppd->pp_acc_data;
47553526Sxy150489 
47563526Sxy150489 	ddi_put32(handle, regaddr, value);
47573526Sxy150489 }
47583526Sxy150489 
47593526Sxy150489 static void
47603526Sxy150489 e1000g_ioc_peek_mem(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd)
47613526Sxy150489 {
47623526Sxy150489 	uint64_t value;
47633526Sxy150489 	void *vaddr;
47643526Sxy150489 
47653526Sxy150489 	vaddr = (void *)(uintptr_t)ppd->pp_acc_offset;
47663526Sxy150489 
47673526Sxy150489 	switch (ppd->pp_acc_size) {
47683526Sxy150489 	case 1:
47693526Sxy150489 		value = *(uint8_t *)vaddr;
47703526Sxy150489 		break;
47713526Sxy150489 
47723526Sxy150489 	case 2:
47733526Sxy150489 		value = *(uint16_t *)vaddr;
47743526Sxy150489 		break;
47753526Sxy150489 
47763526Sxy150489 	case 4:
47773526Sxy150489 		value = *(uint32_t *)vaddr;
47783526Sxy150489 		break;
47793526Sxy150489 
47803526Sxy150489 	case 8:
47813526Sxy150489 		value = *(uint64_t *)vaddr;
47823526Sxy150489 		break;
47833526Sxy150489 	}
47843526Sxy150489 
47854919Sxy150489 	E1000G_DEBUGLOG_4(e1000gp, E1000G_INFO_LEVEL,
47864349Sxy150489 	    "e1000g_ioc_peek_mem($%p, $%p) peeked 0x%llx from $%p\n",
47874349Sxy150489 	    (void *)e1000gp, (void *)ppd, value, vaddr);
47883526Sxy150489 
47893526Sxy150489 	ppd->pp_acc_data = value;
47903526Sxy150489 }
47913526Sxy150489 
47923526Sxy150489 static void
47933526Sxy150489 e1000g_ioc_poke_mem(struct e1000g *e1000gp, e1000g_peekpoke_t *ppd)
47943526Sxy150489 {
47953526Sxy150489 	uint64_t value;
47963526Sxy150489 	void *vaddr;
47973526Sxy150489 
47983526Sxy150489 	vaddr = (void *)(uintptr_t)ppd->pp_acc_offset;
47993526Sxy150489 	value = ppd->pp_acc_data;
48003526Sxy150489 
48014919Sxy150489 	E1000G_DEBUGLOG_4(e1000gp, E1000G_INFO_LEVEL,
48024349Sxy150489 	    "e1000g_ioc_poke_mem($%p, $%p) poking 0x%llx at $%p\n",
48034349Sxy150489 	    (void *)e1000gp, (void *)ppd, value, vaddr);
48043526Sxy150489 
48053526Sxy150489 	switch (ppd->pp_acc_size) {
48063526Sxy150489 	case 1:
48073526Sxy150489 		*(uint8_t *)vaddr = (uint8_t)value;
48083526Sxy150489 		break;
48093526Sxy150489 
48103526Sxy150489 	case 2:
48113526Sxy150489 		*(uint16_t *)vaddr = (uint16_t)value;
48123526Sxy150489 		break;
48133526Sxy150489 
48143526Sxy150489 	case 4:
48153526Sxy150489 		*(uint32_t *)vaddr = (uint32_t)value;
48163526Sxy150489 		break;
48173526Sxy150489 
48183526Sxy150489 	case 8:
48193526Sxy150489 		*(uint64_t *)vaddr = (uint64_t)value;
48203526Sxy150489 		break;
48213526Sxy150489 	}
48223526Sxy150489 }
48234919Sxy150489 #endif
48243526Sxy150489 
48253526Sxy150489 /*
48263526Sxy150489  * Loopback Support
48273526Sxy150489  */
48283526Sxy150489 static lb_property_t lb_normal =
48293526Sxy150489 	{ normal,	"normal",	E1000G_LB_NONE		};
48303526Sxy150489 static lb_property_t lb_external1000 =
48313526Sxy150489 	{ external,	"1000Mbps",	E1000G_LB_EXTERNAL_1000	};
48323526Sxy150489 static lb_property_t lb_external100 =
48333526Sxy150489 	{ external,	"100Mbps",	E1000G_LB_EXTERNAL_100	};
48343526Sxy150489 static lb_property_t lb_external10 =
48353526Sxy150489 	{ external,	"10Mbps",	E1000G_LB_EXTERNAL_10	};
48363526Sxy150489 static lb_property_t lb_phy =
48373526Sxy150489 	{ internal,	"PHY",		E1000G_LB_INTERNAL_PHY	};
48383526Sxy150489 
48393526Sxy150489 static enum ioc_reply
48403526Sxy150489 e1000g_loopback_ioctl(struct e1000g *Adapter, struct iocblk *iocp, mblk_t *mp)
48413526Sxy150489 {
48423526Sxy150489 	lb_info_sz_t *lbsp;
48433526Sxy150489 	lb_property_t *lbpp;
48443526Sxy150489 	struct e1000_hw *hw;
48453526Sxy150489 	uint32_t *lbmp;
48463526Sxy150489 	uint32_t size;
48473526Sxy150489 	uint32_t value;
48483526Sxy150489 
48494919Sxy150489 	hw = &Adapter->shared;
48503526Sxy150489 
48513526Sxy150489 	if (mp->b_cont == NULL)
48523526Sxy150489 		return (IOC_INVAL);
48533526Sxy150489 
48547133Scc210113 	if (!e1000g_check_loopback_support(hw)) {
48557133Scc210113 		e1000g_log(NULL, CE_WARN,
48567133Scc210113 		    "Loopback is not supported on e1000g%d", Adapter->instance);
48577133Scc210113 		return (IOC_INVAL);
48587133Scc210113 	}
48597133Scc210113 
48603526Sxy150489 	switch (iocp->ioc_cmd) {
48613526Sxy150489 	default:
48623526Sxy150489 		return (IOC_INVAL);
48633526Sxy150489 
48643526Sxy150489 	case LB_GET_INFO_SIZE:
48653526Sxy150489 		size = sizeof (lb_info_sz_t);
48663526Sxy150489 		if (iocp->ioc_count != size)
48673526Sxy150489 			return (IOC_INVAL);
48683526Sxy150489 
48695082Syy150190 		rw_enter(&Adapter->chip_lock, RW_WRITER);
48705082Syy150190 		e1000g_get_phy_state(Adapter);
48715082Syy150190 
48725082Syy150190 		/*
48735082Syy150190 		 * Workaround for hardware faults. In order to get a stable
48745082Syy150190 		 * state of phy, we will wait for a specific interval and
48755082Syy150190 		 * try again. The time delay is an experiential value based
48765082Syy150190 		 * on our testing.
48775082Syy150190 		 */
48785082Syy150190 		msec_delay(100);
48795082Syy150190 		e1000g_get_phy_state(Adapter);
48805082Syy150190 		rw_exit(&Adapter->chip_lock);
48813526Sxy150489 
48823526Sxy150489 		value = sizeof (lb_normal);
48835082Syy150190 		if ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) ||
48845082Syy150190 		    (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS) ||
48856735Scc210113 		    (hw->phy.media_type == e1000_media_type_fiber) ||
48866735Scc210113 		    (hw->phy.media_type == e1000_media_type_internal_serdes)) {
48873526Sxy150489 			value += sizeof (lb_phy);
48884919Sxy150489 			switch (hw->mac.type) {
48893526Sxy150489 			case e1000_82571:
48903526Sxy150489 			case e1000_82572:
48917133Scc210113 			case e1000_80003es2lan:
48923526Sxy150489 				value += sizeof (lb_external1000);
48933526Sxy150489 				break;
48943526Sxy150489 			}
48953526Sxy150489 		}
48965082Syy150190 		if ((Adapter->phy_status & MII_SR_100X_FD_CAPS) ||
48975082Syy150190 		    (Adapter->phy_status & MII_SR_100T2_FD_CAPS))
48983526Sxy150489 			value += sizeof (lb_external100);
48995082Syy150190 		if (Adapter->phy_status & MII_SR_10T_FD_CAPS)
49003526Sxy150489 			value += sizeof (lb_external10);
49013526Sxy150489 
49027426SChenliang.Xu@Sun.COM 		lbsp = (lb_info_sz_t *)(uintptr_t)mp->b_cont->b_rptr;
49033526Sxy150489 		*lbsp = value;
49043526Sxy150489 		break;
49053526Sxy150489 
49063526Sxy150489 	case LB_GET_INFO:
49073526Sxy150489 		value = sizeof (lb_normal);
49085082Syy150190 		if ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) ||
49095082Syy150190 		    (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS) ||
49106735Scc210113 		    (hw->phy.media_type == e1000_media_type_fiber) ||
49116735Scc210113 		    (hw->phy.media_type == e1000_media_type_internal_serdes)) {
49123526Sxy150489 			value += sizeof (lb_phy);
49134919Sxy150489 			switch (hw->mac.type) {
49143526Sxy150489 			case e1000_82571:
49153526Sxy150489 			case e1000_82572:
49167133Scc210113 			case e1000_80003es2lan:
49173526Sxy150489 				value += sizeof (lb_external1000);
49183526Sxy150489 				break;
49193526Sxy150489 			}
49203526Sxy150489 		}
49215082Syy150190 		if ((Adapter->phy_status & MII_SR_100X_FD_CAPS) ||
49225082Syy150190 		    (Adapter->phy_status & MII_SR_100T2_FD_CAPS))
49233526Sxy150489 			value += sizeof (lb_external100);
49245082Syy150190 		if (Adapter->phy_status & MII_SR_10T_FD_CAPS)
49253526Sxy150489 			value += sizeof (lb_external10);
49263526Sxy150489 
49273526Sxy150489 		size = value;
49283526Sxy150489 		if (iocp->ioc_count != size)
49293526Sxy150489 			return (IOC_INVAL);
49303526Sxy150489 
49313526Sxy150489 		value = 0;
49327426SChenliang.Xu@Sun.COM 		lbpp = (lb_property_t *)(uintptr_t)mp->b_cont->b_rptr;
49333526Sxy150489 		lbpp[value++] = lb_normal;
49345082Syy150190 		if ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) ||
49355082Syy150190 		    (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS) ||
49366735Scc210113 		    (hw->phy.media_type == e1000_media_type_fiber) ||
49376735Scc210113 		    (hw->phy.media_type == e1000_media_type_internal_serdes)) {
49383526Sxy150489 			lbpp[value++] = lb_phy;
49394919Sxy150489 			switch (hw->mac.type) {
49403526Sxy150489 			case e1000_82571:
49413526Sxy150489 			case e1000_82572:
49427133Scc210113 			case e1000_80003es2lan:
49433526Sxy150489 				lbpp[value++] = lb_external1000;
49443526Sxy150489 				break;
49453526Sxy150489 			}
49463526Sxy150489 		}
49475082Syy150190 		if ((Adapter->phy_status & MII_SR_100X_FD_CAPS) ||
49485082Syy150190 		    (Adapter->phy_status & MII_SR_100T2_FD_CAPS))
49493526Sxy150489 			lbpp[value++] = lb_external100;
49505082Syy150190 		if (Adapter->phy_status & MII_SR_10T_FD_CAPS)
49513526Sxy150489 			lbpp[value++] = lb_external10;
49523526Sxy150489 		break;
49533526Sxy150489 
49543526Sxy150489 	case LB_GET_MODE:
49553526Sxy150489 		size = sizeof (uint32_t);
49563526Sxy150489 		if (iocp->ioc_count != size)
49573526Sxy150489 			return (IOC_INVAL);
49583526Sxy150489 
49597426SChenliang.Xu@Sun.COM 		lbmp = (uint32_t *)(uintptr_t)mp->b_cont->b_rptr;
49603526Sxy150489 		*lbmp = Adapter->loopback_mode;
49613526Sxy150489 		break;
49623526Sxy150489 
49633526Sxy150489 	case LB_SET_MODE:
49643526Sxy150489 		size = 0;
49653526Sxy150489 		if (iocp->ioc_count != sizeof (uint32_t))
49663526Sxy150489 			return (IOC_INVAL);
49673526Sxy150489 
49687426SChenliang.Xu@Sun.COM 		lbmp = (uint32_t *)(uintptr_t)mp->b_cont->b_rptr;
49693526Sxy150489 		if (!e1000g_set_loopback_mode(Adapter, *lbmp))
49703526Sxy150489 			return (IOC_INVAL);
49713526Sxy150489 		break;
49723526Sxy150489 	}
49733526Sxy150489 
49743526Sxy150489 	iocp->ioc_count = size;
49753526Sxy150489 	iocp->ioc_error = 0;
49763526Sxy150489 
49775273Sgl147354 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
49785273Sgl147354 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
49795273Sgl147354 		return (IOC_INVAL);
49805273Sgl147354 	}
49815273Sgl147354 
49823526Sxy150489 	return (IOC_REPLY);
49833526Sxy150489 }
49843526Sxy150489 
49853526Sxy150489 static boolean_t
49867133Scc210113 e1000g_check_loopback_support(struct e1000_hw *hw)
49877133Scc210113 {
49887133Scc210113 	switch (hw->mac.type) {
49897133Scc210113 	case e1000_82540:
49907133Scc210113 	case e1000_82545:
49917133Scc210113 	case e1000_82545_rev_3:
49927133Scc210113 	case e1000_82546:
49937133Scc210113 	case e1000_82546_rev_3:
49947133Scc210113 	case e1000_82541:
49957133Scc210113 	case e1000_82541_rev_2:
49967133Scc210113 	case e1000_82547:
49977133Scc210113 	case e1000_82547_rev_2:
49987133Scc210113 	case e1000_82571:
49997133Scc210113 	case e1000_82572:
50007133Scc210113 	case e1000_82573:
50018479SChenlu.Chen@Sun.COM 	case e1000_82574:
50027133Scc210113 	case e1000_80003es2lan:
50038479SChenlu.Chen@Sun.COM 	case e1000_ich9lan:
50048479SChenlu.Chen@Sun.COM 	case e1000_ich10lan:
50057133Scc210113 		return (B_TRUE);
50067133Scc210113 	}
50077133Scc210113 	return (B_FALSE);
50087133Scc210113 }
50097133Scc210113 
50107133Scc210113 static boolean_t
50113526Sxy150489 e1000g_set_loopback_mode(struct e1000g *Adapter, uint32_t mode)
50123526Sxy150489 {
50133526Sxy150489 	struct e1000_hw *hw;
50143526Sxy150489 	int i, times;
50155082Syy150190 	boolean_t link_up;
50163526Sxy150489 
50173526Sxy150489 	if (mode == Adapter->loopback_mode)
50183526Sxy150489 		return (B_TRUE);
50193526Sxy150489 
50204919Sxy150489 	hw = &Adapter->shared;
50213526Sxy150489 	times = 0;
50223526Sxy150489 
50235082Syy150190 	Adapter->loopback_mode = mode;
50245082Syy150190 
50255082Syy150190 	if (mode == E1000G_LB_NONE) {
50263526Sxy150489 		/* Reset the chip */
50276735Scc210113 		hw->phy.autoneg_wait_to_complete = B_TRUE;
50287656SSherry.Moore@Sun.COM 		(void) e1000g_reset_adapter(Adapter);
50296735Scc210113 		hw->phy.autoneg_wait_to_complete = B_FALSE;
50305082Syy150190 		return (B_TRUE);
50315082Syy150190 	}
50325082Syy150190 
50335082Syy150190 again:
50345082Syy150190 
50355082Syy150190 	rw_enter(&Adapter->chip_lock, RW_WRITER);
50365082Syy150190 
50375082Syy150190 	switch (mode) {
50385082Syy150190 	default:
50395082Syy150190 		rw_exit(&Adapter->chip_lock);
50405082Syy150190 		return (B_FALSE);
50413526Sxy150489 
50423526Sxy150489 	case E1000G_LB_EXTERNAL_1000:
50433526Sxy150489 		e1000g_set_external_loopback_1000(Adapter);
50443526Sxy150489 		break;
50453526Sxy150489 
50463526Sxy150489 	case E1000G_LB_EXTERNAL_100:
50473526Sxy150489 		e1000g_set_external_loopback_100(Adapter);
50483526Sxy150489 		break;
50493526Sxy150489 
50503526Sxy150489 	case E1000G_LB_EXTERNAL_10:
50513526Sxy150489 		e1000g_set_external_loopback_10(Adapter);
50523526Sxy150489 		break;
50533526Sxy150489 
50543526Sxy150489 	case E1000G_LB_INTERNAL_PHY:
50553526Sxy150489 		e1000g_set_internal_loopback(Adapter);
50563526Sxy150489 		break;
50573526Sxy150489 	}
50583526Sxy150489 
50593526Sxy150489 	times++;
50603526Sxy150489 
50615858Scc210113 	rw_exit(&Adapter->chip_lock);
50625858Scc210113 
50635082Syy150190 	/* Wait for link up */
50645082Syy150190 	for (i = (PHY_FORCE_LIMIT * 2); i > 0; i--)
50655082Syy150190 		msec_delay(100);
50665082Syy150190 
50675858Scc210113 	rw_enter(&Adapter->chip_lock, RW_WRITER);
50685858Scc210113 
50695082Syy150190 	link_up = e1000g_link_up(Adapter);
50705082Syy150190 
50715082Syy150190 	rw_exit(&Adapter->chip_lock);
50725082Syy150190 
50735082Syy150190 	if (!link_up) {
50745082Syy150190 		E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL,
50755082Syy150190 		    "Failed to get the link up");
50765082Syy150190 		if (times < 2) {
50775082Syy150190 			/* Reset the link */
50784919Sxy150489 			E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL,
50795082Syy150190 			    "Reset the link ...");
50807656SSherry.Moore@Sun.COM 			(void) e1000g_reset_adapter(Adapter);
50815082Syy150190 			goto again;
50823526Sxy150489 		}
50833526Sxy150489 	}
50843526Sxy150489 
50853526Sxy150489 	return (B_TRUE);
50863526Sxy150489 }
50873526Sxy150489 
50883526Sxy150489 /*
50893526Sxy150489  * The following loopback settings are from Intel's technical
50903526Sxy150489  * document - "How To Loopback". All the register settings and
50913526Sxy150489  * time delay values are directly inherited from the document
50923526Sxy150489  * without more explanations available.
50933526Sxy150489  */
50943526Sxy150489 static void
50953526Sxy150489 e1000g_set_internal_loopback(struct e1000g *Adapter)
50963526Sxy150489 {
50973526Sxy150489 	struct e1000_hw *hw;
50983526Sxy150489 	uint32_t ctrl;
50993526Sxy150489 	uint32_t status;
51003526Sxy150489 	uint16_t phy_ctrl;
51018479SChenlu.Chen@Sun.COM 	uint16_t phy_reg;
51025082Syy150190 	uint32_t txcw;
51033526Sxy150489 
51044919Sxy150489 	hw = &Adapter->shared;
51053526Sxy150489 
51063526Sxy150489 	/* Disable Smart Power Down */
51073526Sxy150489 	phy_spd_state(hw, B_FALSE);
51083526Sxy150489 
51097426SChenliang.Xu@Sun.COM 	(void) e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl);
51103526Sxy150489 	phy_ctrl &= ~(MII_CR_AUTO_NEG_EN | MII_CR_SPEED_100 | MII_CR_SPEED_10);
51113526Sxy150489 	phy_ctrl |= MII_CR_FULL_DUPLEX | MII_CR_SPEED_1000;
51123526Sxy150489 
51134919Sxy150489 	switch (hw->mac.type) {
51143526Sxy150489 	case e1000_82540:
51153526Sxy150489 	case e1000_82545:
51163526Sxy150489 	case e1000_82545_rev_3:
51173526Sxy150489 	case e1000_82546:
51183526Sxy150489 	case e1000_82546_rev_3:
51193526Sxy150489 	case e1000_82573:
51203526Sxy150489 		/* Auto-MDI/MDIX off */
51217426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
51223526Sxy150489 		/* Reset PHY to update Auto-MDI/MDIX */
51237426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_CONTROL,
51244349Sxy150489 		    phy_ctrl | MII_CR_RESET | MII_CR_AUTO_NEG_EN);
51253526Sxy150489 		/* Reset PHY to auto-neg off and force 1000 */
51267426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_CONTROL,
51274349Sxy150489 		    phy_ctrl | MII_CR_RESET);
51285082Syy150190 		/*
51295082Syy150190 		 * Disable PHY receiver for 82540/545/546 and 82573 Family.
51305082Syy150190 		 * See comments above e1000g_set_internal_loopback() for the
51315082Syy150190 		 * background.
51325082Syy150190 		 */
51337426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, 29, 0x001F);
51347426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, 30, 0x8FFC);
51357426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, 29, 0x001A);
51367426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, 30, 0x8FF0);
51373526Sxy150489 		break;
51387133Scc210113 	case e1000_80003es2lan:
51397133Scc210113 		/* Force Link Up */
51407426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
51417426SChenliang.Xu@Sun.COM 		    0x1CC);
51427133Scc210113 		/* Sets PCS loopback at 1Gbs */
51437426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
51447426SChenliang.Xu@Sun.COM 		    0x1046);
51457133Scc210113 		break;
51463526Sxy150489 	}
51473526Sxy150489 
51488479SChenlu.Chen@Sun.COM 	/*
51498479SChenlu.Chen@Sun.COM 	 * The following registers should be set for e1000_phy_bm phy type.
51508479SChenlu.Chen@Sun.COM 	 * e1000_82574, e1000_ich10lan and some e1000_ich9lan use this phy.
51518479SChenlu.Chen@Sun.COM 	 * For others, we do not need to set these registers.
51528479SChenlu.Chen@Sun.COM 	 */
51538479SChenlu.Chen@Sun.COM 	if (hw->phy.type == e1000_phy_bm) {
51548479SChenlu.Chen@Sun.COM 		/* Set Default MAC Interface speed to 1GB */
51558850SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_REG(2, 21), &phy_reg);
51568479SChenlu.Chen@Sun.COM 		phy_reg &= ~0x0007;
51578479SChenlu.Chen@Sun.COM 		phy_reg |= 0x006;
51588850SMin.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_REG(2, 21), phy_reg);
51598479SChenlu.Chen@Sun.COM 		/* Assert SW reset for above settings to take effect */
51608850SMin.Xu@Sun.COM 		(void) e1000_phy_commit(hw);
51618479SChenlu.Chen@Sun.COM 		msec_delay(1);
51628479SChenlu.Chen@Sun.COM 		/* Force Full Duplex */
51638850SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_REG(769, 16), &phy_reg);
51648850SMin.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_REG(769, 16),
51658850SMin.Xu@Sun.COM 		    phy_reg | 0x000C);
51668479SChenlu.Chen@Sun.COM 		/* Set Link Up (in force link) */
51678850SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_REG(776, 16), &phy_reg);
51688850SMin.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_REG(776, 16),
51698850SMin.Xu@Sun.COM 		    phy_reg | 0x0040);
51708479SChenlu.Chen@Sun.COM 		/* Force Link */
51718850SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_REG(769, 16), &phy_reg);
51728850SMin.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_REG(769, 16),
51738850SMin.Xu@Sun.COM 		    phy_reg | 0x0040);
51748479SChenlu.Chen@Sun.COM 		/* Set Early Link Enable */
51758850SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_REG(769, 20), &phy_reg);
51768850SMin.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, PHY_REG(769, 20),
51778850SMin.Xu@Sun.COM 		    phy_reg | 0x0400);
51788479SChenlu.Chen@Sun.COM 	}
51798479SChenlu.Chen@Sun.COM 
51803526Sxy150489 	/* Set loopback */
51817426SChenliang.Xu@Sun.COM 	(void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl | MII_CR_LOOPBACK);
51823526Sxy150489 
51833526Sxy150489 	msec_delay(250);
51843526Sxy150489 
51853526Sxy150489 	/* Now set up the MAC to the same speed/duplex as the PHY. */
51864919Sxy150489 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
51873526Sxy150489 	ctrl &= ~E1000_CTRL_SPD_SEL;	/* Clear the speed sel bits */
51883526Sxy150489 	ctrl |= (E1000_CTRL_FRCSPD |	/* Set the Force Speed Bit */
51894349Sxy150489 	    E1000_CTRL_FRCDPX |		/* Set the Force Duplex Bit */
51904349Sxy150489 	    E1000_CTRL_SPD_1000 |	/* Force Speed to 1000 */
51914349Sxy150489 	    E1000_CTRL_FD);		/* Force Duplex to FULL */
51923526Sxy150489 
51934919Sxy150489 	switch (hw->mac.type) {
51943526Sxy150489 	case e1000_82540:
51953526Sxy150489 	case e1000_82545:
51963526Sxy150489 	case e1000_82545_rev_3:
51973526Sxy150489 	case e1000_82546:
51983526Sxy150489 	case e1000_82546_rev_3:
51993526Sxy150489 		/*
52003526Sxy150489 		 * For some serdes we'll need to commit the writes now
52013526Sxy150489 		 * so that the status is updated on link
52023526Sxy150489 		 */
52036735Scc210113 		if (hw->phy.media_type == e1000_media_type_internal_serdes) {
52044919Sxy150489 			E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
52053526Sxy150489 			msec_delay(100);
52064919Sxy150489 			ctrl = E1000_READ_REG(hw, E1000_CTRL);
52073526Sxy150489 		}
52083526Sxy150489 
52096735Scc210113 		if (hw->phy.media_type == e1000_media_type_copper) {
52103526Sxy150489 			/* Invert Loss of Signal */
52113526Sxy150489 			ctrl |= E1000_CTRL_ILOS;
52123526Sxy150489 		} else {
52133526Sxy150489 			/* Set ILOS on fiber nic if half duplex is detected */
52144919Sxy150489 			status = E1000_READ_REG(hw, E1000_STATUS);
52153526Sxy150489 			if ((status & E1000_STATUS_FD) == 0)
52163526Sxy150489 				ctrl |= E1000_CTRL_ILOS | E1000_CTRL_SLU;
52173526Sxy150489 		}
52183526Sxy150489 		break;
52193526Sxy150489 
52203526Sxy150489 	case e1000_82571:
52213526Sxy150489 	case e1000_82572:
52225082Syy150190 		/*
52235082Syy150190 		 * The fiber/SerDes versions of this adapter do not contain an
52245082Syy150190 		 * accessible PHY. Therefore, loopback beyond MAC must be done
52255082Syy150190 		 * using SerDes analog loopback.
52265082Syy150190 		 */
52276735Scc210113 		if (hw->phy.media_type != e1000_media_type_copper) {
52285082Syy150190 			/* Disable autoneg by setting bit 31 of TXCW to zero */
52295082Syy150190 			txcw = E1000_READ_REG(hw, E1000_TXCW);
52305082Syy150190 			txcw &= ~((uint32_t)1 << 31);
52315082Syy150190 			E1000_WRITE_REG(hw, E1000_TXCW, txcw);
52325082Syy150190 
52335082Syy150190 			/*
52345082Syy150190 			 * Write 0x410 to Serdes Control register
52355082Syy150190 			 * to enable Serdes analog loopback
52365082Syy150190 			 */
52375082Syy150190 			E1000_WRITE_REG(hw, E1000_SCTL, 0x0410);
52385082Syy150190 			msec_delay(10);
52393526Sxy150489 		}
52408479SChenlu.Chen@Sun.COM 
52418479SChenlu.Chen@Sun.COM 		status = E1000_READ_REG(hw, E1000_STATUS);
52428479SChenlu.Chen@Sun.COM 		/* Set ILOS on fiber nic if half duplex is detected */
52438479SChenlu.Chen@Sun.COM 		if ((hw->phy.media_type == e1000_media_type_fiber) &&
52448479SChenlu.Chen@Sun.COM 		    ((status & E1000_STATUS_FD) == 0 ||
52458479SChenlu.Chen@Sun.COM 		    (status & E1000_STATUS_LU) == 0))
52468479SChenlu.Chen@Sun.COM 			ctrl |= E1000_CTRL_ILOS | E1000_CTRL_SLU;
52478479SChenlu.Chen@Sun.COM 		else if (hw->phy.media_type == e1000_media_type_internal_serdes)
52488479SChenlu.Chen@Sun.COM 			ctrl |= E1000_CTRL_SLU;
52493526Sxy150489 		break;
52503526Sxy150489 
52513526Sxy150489 	case e1000_82573:
52523526Sxy150489 		ctrl |= E1000_CTRL_ILOS;
52538479SChenlu.Chen@Sun.COM 		break;
52548479SChenlu.Chen@Sun.COM 	case e1000_ich9lan:
52558479SChenlu.Chen@Sun.COM 	case e1000_ich10lan:
52568479SChenlu.Chen@Sun.COM 		ctrl |= E1000_CTRL_SLU;
52573526Sxy150489 		break;
52583526Sxy150489 	}
52598479SChenlu.Chen@Sun.COM 	if (hw->phy.type == e1000_phy_bm)
52608479SChenlu.Chen@Sun.COM 		ctrl |= E1000_CTRL_SLU | E1000_CTRL_ILOS;
52618479SChenlu.Chen@Sun.COM 
52628479SChenlu.Chen@Sun.COM 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
52633526Sxy150489 }
52643526Sxy150489 
52653526Sxy150489 static void
52663526Sxy150489 e1000g_set_external_loopback_1000(struct e1000g *Adapter)
52673526Sxy150489 {
52683526Sxy150489 	struct e1000_hw *hw;
52693526Sxy150489 	uint32_t rctl;
52703526Sxy150489 	uint32_t ctrl_ext;
52713526Sxy150489 	uint32_t ctrl;
52723526Sxy150489 	uint32_t status;
52733526Sxy150489 	uint32_t txcw;
52747133Scc210113 	uint16_t phydata;
52753526Sxy150489 
52764919Sxy150489 	hw = &Adapter->shared;
52773526Sxy150489 
52783526Sxy150489 	/* Disable Smart Power Down */
52793526Sxy150489 	phy_spd_state(hw, B_FALSE);
52803526Sxy150489 
52817133Scc210113 	switch (hw->mac.type) {
52827133Scc210113 	case e1000_82571:
52837133Scc210113 	case e1000_82572:
52847133Scc210113 		switch (hw->phy.media_type) {
52857133Scc210113 		case e1000_media_type_copper:
52867133Scc210113 			/* Force link up (Must be done before the PHY writes) */
52877133Scc210113 			ctrl = E1000_READ_REG(hw, E1000_CTRL);
52887133Scc210113 			ctrl |= E1000_CTRL_SLU;	/* Force Link Up */
52897133Scc210113 			E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
52907133Scc210113 
52917133Scc210113 			rctl = E1000_READ_REG(hw, E1000_RCTL);
52927133Scc210113 			rctl |= (E1000_RCTL_EN |
52937133Scc210113 			    E1000_RCTL_SBP |
52947133Scc210113 			    E1000_RCTL_UPE |
52957133Scc210113 			    E1000_RCTL_MPE |
52967133Scc210113 			    E1000_RCTL_LPE |
52977133Scc210113 			    E1000_RCTL_BAM);		/* 0x803E */
52987133Scc210113 			E1000_WRITE_REG(hw, E1000_RCTL, rctl);
52997133Scc210113 
53007133Scc210113 			ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
53017133Scc210113 			ctrl_ext |= (E1000_CTRL_EXT_SDP4_DATA |
53027133Scc210113 			    E1000_CTRL_EXT_SDP6_DATA |
530310680SMin.Xu@Sun.COM 			    E1000_CTRL_EXT_SDP3_DATA |
53047133Scc210113 			    E1000_CTRL_EXT_SDP4_DIR |
53057133Scc210113 			    E1000_CTRL_EXT_SDP6_DIR |
530610680SMin.Xu@Sun.COM 			    E1000_CTRL_EXT_SDP3_DIR);	/* 0x0DD0 */
53077133Scc210113 			E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
53087133Scc210113 
53097133Scc210113 			/*
53107133Scc210113 			 * This sequence tunes the PHY's SDP and no customer
53117133Scc210113 			 * settable values. For background, see comments above
53127133Scc210113 			 * e1000g_set_internal_loopback().
53137133Scc210113 			 */
53147426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x0, 0x140);
53157133Scc210113 			msec_delay(10);
53167426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x9, 0x1A00);
53177426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x12, 0xC10);
53187426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x12, 0x1C10);
53197426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1F37, 0x76);
53207426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1F33, 0x1);
53217426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1F33, 0x0);
53227426SChenliang.Xu@Sun.COM 
53237426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1F35, 0x65);
53247426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1837, 0x3F7C);
53257426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1437, 0x3FDC);
53267426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1237, 0x3F7C);
53277426SChenliang.Xu@Sun.COM 			(void) e1000_write_phy_reg(hw, 0x1137, 0x3FDC);
53287133Scc210113 
53297133Scc210113 			msec_delay(50);
53307133Scc210113 			break;
53317133Scc210113 		case e1000_media_type_fiber:
53327133Scc210113 		case e1000_media_type_internal_serdes:
53337133Scc210113 			status = E1000_READ_REG(hw, E1000_STATUS);
53347133Scc210113 			if (((status & E1000_STATUS_LU) == 0) ||
53357133Scc210113 			    (hw->phy.media_type ==
53367133Scc210113 			    e1000_media_type_internal_serdes)) {
53377133Scc210113 				ctrl = E1000_READ_REG(hw, E1000_CTRL);
53387133Scc210113 				ctrl |= E1000_CTRL_ILOS | E1000_CTRL_SLU;
53397133Scc210113 				E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
53407133Scc210113 			}
53417133Scc210113 
53427133Scc210113 			/* Disable autoneg by setting bit 31 of TXCW to zero */
53437133Scc210113 			txcw = E1000_READ_REG(hw, E1000_TXCW);
53447133Scc210113 			txcw &= ~((uint32_t)1 << 31);
53457133Scc210113 			E1000_WRITE_REG(hw, E1000_TXCW, txcw);
53467133Scc210113 
53477133Scc210113 			/*
53487133Scc210113 			 * Write 0x410 to Serdes Control register
53497133Scc210113 			 * to enable Serdes analog loopback
53507133Scc210113 			 */
53517133Scc210113 			E1000_WRITE_REG(hw, E1000_SCTL, 0x0410);
53527133Scc210113 			msec_delay(10);
53537133Scc210113 			break;
53547133Scc210113 		default:
53557133Scc210113 			break;
53567133Scc210113 		}
53573526Sxy150489 		break;
53588479SChenlu.Chen@Sun.COM 	case e1000_82574:
53597133Scc210113 	case e1000_80003es2lan:
53608479SChenlu.Chen@Sun.COM 	case e1000_ich9lan:
53618479SChenlu.Chen@Sun.COM 	case e1000_ich10lan:
53627426SChenliang.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, GG82563_REG(6, 16), &phydata);
53637426SChenliang.Xu@Sun.COM 		(void) e1000_write_phy_reg(hw, GG82563_REG(6, 16),
53647426SChenliang.Xu@Sun.COM 		    phydata | (1 << 5));
53657133Scc210113 		Adapter->param_adv_autoneg = 1;
53667133Scc210113 		Adapter->param_adv_1000fdx = 1;
53677426SChenliang.Xu@Sun.COM 		(void) e1000g_reset_link(Adapter);
53683526Sxy150489 		break;
53693526Sxy150489 	}
53703526Sxy150489 }
53713526Sxy150489 
53723526Sxy150489 static void
53733526Sxy150489 e1000g_set_external_loopback_100(struct e1000g *Adapter)
53743526Sxy150489 {
53753526Sxy150489 	struct e1000_hw *hw;
53763526Sxy150489 	uint32_t ctrl;
53773526Sxy150489 	uint16_t phy_ctrl;
53783526Sxy150489 
53794919Sxy150489 	hw = &Adapter->shared;
53803526Sxy150489 
53813526Sxy150489 	/* Disable Smart Power Down */
53823526Sxy150489 	phy_spd_state(hw, B_FALSE);
53833526Sxy150489 
53843526Sxy150489 	phy_ctrl = (MII_CR_FULL_DUPLEX |
53854349Sxy150489 	    MII_CR_SPEED_100);
53863526Sxy150489 
53873526Sxy150489 	/* Force 100/FD, reset PHY */
53887426SChenliang.Xu@Sun.COM 	(void) e1000_write_phy_reg(hw, PHY_CONTROL,
53894349Sxy150489 	    phy_ctrl | MII_CR_RESET);	/* 0xA100 */
53903526Sxy150489 	msec_delay(10);
53913526Sxy150489 
53923526Sxy150489 	/* Force 100/FD */
53937426SChenliang.Xu@Sun.COM 	(void) e1000_write_phy_reg(hw, PHY_CONTROL,
53944349Sxy150489 	    phy_ctrl);			/* 0x2100 */
53953526Sxy150489 	msec_delay(10);
53963526Sxy150489 
53973526Sxy150489 	/* Now setup the MAC to the same speed/duplex as the PHY. */
53984919Sxy150489 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
53993526Sxy150489 	ctrl &= ~E1000_CTRL_SPD_SEL;	/* Clear the speed sel bits */
54003526Sxy150489 	ctrl |= (E1000_CTRL_SLU |	/* Force Link Up */
54014349Sxy150489 	    E1000_CTRL_FRCSPD |		/* Set the Force Speed Bit */
54024349Sxy150489 	    E1000_CTRL_FRCDPX |		/* Set the Force Duplex Bit */
54034349Sxy150489 	    E1000_CTRL_SPD_100 |	/* Force Speed to 100 */
54044349Sxy150489 	    E1000_CTRL_FD);		/* Force Duplex to FULL */
54053526Sxy150489 
54064919Sxy150489 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
54073526Sxy150489 }
54083526Sxy150489 
54093526Sxy150489 static void
54103526Sxy150489 e1000g_set_external_loopback_10(struct e1000g *Adapter)
54113526Sxy150489 {
54123526Sxy150489 	struct e1000_hw *hw;
54133526Sxy150489 	uint32_t ctrl;
54143526Sxy150489 	uint16_t phy_ctrl;
54153526Sxy150489 
54164919Sxy150489 	hw = &Adapter->shared;
54173526Sxy150489 
54183526Sxy150489 	/* Disable Smart Power Down */
54193526Sxy150489 	phy_spd_state(hw, B_FALSE);
54203526Sxy150489 
54213526Sxy150489 	phy_ctrl = (MII_CR_FULL_DUPLEX |
54224349Sxy150489 	    MII_CR_SPEED_10);
54233526Sxy150489 
54243526Sxy150489 	/* Force 10/FD, reset PHY */
54257426SChenliang.Xu@Sun.COM 	(void) e1000_write_phy_reg(hw, PHY_CONTROL,
54264349Sxy150489 	    phy_ctrl | MII_CR_RESET);	/* 0x8100 */
54273526Sxy150489 	msec_delay(10);
54283526Sxy150489 
54293526Sxy150489 	/* Force 10/FD */
54307426SChenliang.Xu@Sun.COM 	(void) e1000_write_phy_reg(hw, PHY_CONTROL,
54314349Sxy150489 	    phy_ctrl);			/* 0x0100 */
54323526Sxy150489 	msec_delay(10);
54333526Sxy150489 
54343526Sxy150489 	/* Now setup the MAC to the same speed/duplex as the PHY. */
54354919Sxy150489 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
54363526Sxy150489 	ctrl &= ~E1000_CTRL_SPD_SEL;	/* Clear the speed sel bits */
54373526Sxy150489 	ctrl |= (E1000_CTRL_SLU |	/* Force Link Up */
54384349Sxy150489 	    E1000_CTRL_FRCSPD |		/* Set the Force Speed Bit */
54394349Sxy150489 	    E1000_CTRL_FRCDPX |		/* Set the Force Duplex Bit */
54404349Sxy150489 	    E1000_CTRL_SPD_10 |		/* Force Speed to 10 */
54414349Sxy150489 	    E1000_CTRL_FD);		/* Force Duplex to FULL */
54423526Sxy150489 
54434919Sxy150489 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
54443526Sxy150489 }
54453526Sxy150489 
54463526Sxy150489 #ifdef __sparc
54473526Sxy150489 static boolean_t
54483526Sxy150489 e1000g_find_mac_address(struct e1000g *Adapter)
54493526Sxy150489 {
54504919Sxy150489 	struct e1000_hw *hw = &Adapter->shared;
54513526Sxy150489 	uchar_t *bytes;
54523526Sxy150489 	struct ether_addr sysaddr;
54533526Sxy150489 	uint_t nelts;
54543526Sxy150489 	int err;
54553526Sxy150489 	boolean_t found = B_FALSE;
54563526Sxy150489 
54573526Sxy150489 	/*
54583526Sxy150489 	 * The "vendor's factory-set address" may already have
54593526Sxy150489 	 * been extracted from the chip, but if the property
54603526Sxy150489 	 * "local-mac-address" is set we use that instead.
54613526Sxy150489 	 *
54623526Sxy150489 	 * We check whether it looks like an array of 6
54633526Sxy150489 	 * bytes (which it should, if OBP set it).  If we can't
54643526Sxy150489 	 * make sense of it this way, we'll ignore it.
54653526Sxy150489 	 */
54663526Sxy150489 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, Adapter->dip,
54673526Sxy150489 	    DDI_PROP_DONTPASS, "local-mac-address", &bytes, &nelts);
54683526Sxy150489 	if (err == DDI_PROP_SUCCESS) {
54693526Sxy150489 		if (nelts == ETHERADDRL) {
54703526Sxy150489 			while (nelts--)
54714919Sxy150489 				hw->mac.addr[nelts] = bytes[nelts];
54723526Sxy150489 			found = B_TRUE;
54733526Sxy150489 		}
54743526Sxy150489 		ddi_prop_free(bytes);
54753526Sxy150489 	}
54763526Sxy150489 
54773526Sxy150489 	/*
54783526Sxy150489 	 * Look up the OBP property "local-mac-address?". If the user has set
54793526Sxy150489 	 * 'local-mac-address? = false', use "the system address" instead.
54803526Sxy150489 	 */
54813526Sxy150489 	if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, Adapter->dip, 0,
54823526Sxy150489 	    "local-mac-address?", &bytes, &nelts) == DDI_PROP_SUCCESS) {
54833526Sxy150489 		if (strncmp("false", (caddr_t)bytes, (size_t)nelts) == 0) {
54843526Sxy150489 			if (localetheraddr(NULL, &sysaddr) != 0) {
54854919Sxy150489 				bcopy(&sysaddr, hw->mac.addr, ETHERADDRL);
54863526Sxy150489 				found = B_TRUE;
54873526Sxy150489 			}
54883526Sxy150489 		}
54893526Sxy150489 		ddi_prop_free(bytes);
54903526Sxy150489 	}
54913526Sxy150489 
54923526Sxy150489 	/*
54933526Sxy150489 	 * Finally(!), if there's a valid "mac-address" property (created
54943526Sxy150489 	 * if we netbooted from this interface), we must use this instead
54953526Sxy150489 	 * of any of the above to ensure that the NFS/install server doesn't
54963526Sxy150489 	 * get confused by the address changing as Solaris takes over!
54973526Sxy150489 	 */
54983526Sxy150489 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, Adapter->dip,
54993526Sxy150489 	    DDI_PROP_DONTPASS, "mac-address", &bytes, &nelts);
55003526Sxy150489 	if (err == DDI_PROP_SUCCESS) {
55013526Sxy150489 		if (nelts == ETHERADDRL) {
55023526Sxy150489 			while (nelts--)
55034919Sxy150489 				hw->mac.addr[nelts] = bytes[nelts];
55043526Sxy150489 			found = B_TRUE;
55053526Sxy150489 		}
55063526Sxy150489 		ddi_prop_free(bytes);
55073526Sxy150489 	}
55083526Sxy150489 
55093526Sxy150489 	if (found) {
55104919Sxy150489 		bcopy(hw->mac.addr, hw->mac.perm_addr,
55113526Sxy150489 		    ETHERADDRL);
55123526Sxy150489 	}
55133526Sxy150489 
55143526Sxy150489 	return (found);
55153526Sxy150489 }
55163526Sxy150489 #endif
55173526Sxy150489 
55183526Sxy150489 static int
55193526Sxy150489 e1000g_add_intrs(struct e1000g *Adapter)
55203526Sxy150489 {
55213526Sxy150489 	dev_info_t *devinfo;
55223526Sxy150489 	int intr_types;
55233526Sxy150489 	int rc;
55243526Sxy150489 
55253526Sxy150489 	devinfo = Adapter->dip;
55263526Sxy150489 
55273526Sxy150489 	/* Get supported interrupt types */
55283526Sxy150489 	rc = ddi_intr_get_supported_types(devinfo, &intr_types);
55293526Sxy150489 
55303526Sxy150489 	if (rc != DDI_SUCCESS) {
55314919Sxy150489 		E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
55323526Sxy150489 		    "Get supported interrupt types failed: %d\n", rc);
55333526Sxy150489 		return (DDI_FAILURE);
55343526Sxy150489 	}
55353526Sxy150489 
55363526Sxy150489 	/*
55373526Sxy150489 	 * Based on Intel Technical Advisory document (TA-160), there are some
55383526Sxy150489 	 * cases where some older Intel PCI-X NICs may "advertise" to the OS
55393526Sxy150489 	 * that it supports MSI, but in fact has problems.
55403526Sxy150489 	 * So we should only enable MSI for PCI-E NICs and disable MSI for old
55413526Sxy150489 	 * PCI/PCI-X NICs.
55423526Sxy150489 	 */
55434919Sxy150489 	if (Adapter->shared.mac.type < e1000_82571)
55446986Smx205022 		Adapter->msi_enable = B_FALSE;
55456986Smx205022 
55466986Smx205022 	if ((intr_types & DDI_INTR_TYPE_MSI) && Adapter->msi_enable) {
55473526Sxy150489 		rc = e1000g_intr_add(Adapter, DDI_INTR_TYPE_MSI);
55483526Sxy150489 
55493526Sxy150489 		if (rc != DDI_SUCCESS) {
555011143SGuoqing.Zhu@Sun.COM 			/* EMPTY */
55514919Sxy150489 			E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
55523526Sxy150489 			    "Add MSI failed, trying Legacy interrupts\n");
55533526Sxy150489 		} else {
55543526Sxy150489 			Adapter->intr_type = DDI_INTR_TYPE_MSI;
55553526Sxy150489 		}
55563526Sxy150489 	}
55573526Sxy150489 
55583526Sxy150489 	if ((Adapter->intr_type == 0) &&
55593526Sxy150489 	    (intr_types & DDI_INTR_TYPE_FIXED)) {
55603526Sxy150489 		rc = e1000g_intr_add(Adapter, DDI_INTR_TYPE_FIXED);
55613526Sxy150489 
55623526Sxy150489 		if (rc != DDI_SUCCESS) {
55634919Sxy150489 			E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
55643526Sxy150489 			    "Add Legacy interrupts failed\n");
55653526Sxy150489 			return (DDI_FAILURE);
55663526Sxy150489 		}
55673526Sxy150489 
55683526Sxy150489 		Adapter->intr_type = DDI_INTR_TYPE_FIXED;
55693526Sxy150489 	}
55703526Sxy150489 
55713526Sxy150489 	if (Adapter->intr_type == 0) {
55724919Sxy150489 		E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
55733526Sxy150489 		    "No interrupts registered\n");
55743526Sxy150489 		return (DDI_FAILURE);
55753526Sxy150489 	}
55763526Sxy150489 
55773526Sxy150489 	return (DDI_SUCCESS);
55783526Sxy150489 }
55793526Sxy150489 
55803526Sxy150489 /*
55813526Sxy150489  * e1000g_intr_add() handles MSI/Legacy interrupts
55823526Sxy150489  */
55833526Sxy150489 static int
55843526Sxy150489 e1000g_intr_add(struct e1000g *Adapter, int intr_type)
55853526Sxy150489 {
55863526Sxy150489 	dev_info_t *devinfo;
55873526Sxy150489 	int count, avail, actual;
55883526Sxy150489 	int x, y, rc, inum = 0;
55893526Sxy150489 	int flag;
55903526Sxy150489 	ddi_intr_handler_t *intr_handler;
55913526Sxy150489 
55923526Sxy150489 	devinfo = Adapter->dip;
55933526Sxy150489 
55943526Sxy150489 	/* get number of interrupts */
55953526Sxy150489 	rc = ddi_intr_get_nintrs(devinfo, intr_type, &count);
55963526Sxy150489 	if ((rc != DDI_SUCCESS) || (count == 0)) {
55974919Sxy150489 		E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL,
55983526Sxy150489 		    "Get interrupt number failed. Return: %d, count: %d\n",
55993526Sxy150489 		    rc, count);
56003526Sxy150489 		return (DDI_FAILURE);
56013526Sxy150489 	}
56023526Sxy150489 
56033526Sxy150489 	/* get number of available interrupts */
56043526Sxy150489 	rc = ddi_intr_get_navail(devinfo, intr_type, &avail);
56053526Sxy150489 	if ((rc != DDI_SUCCESS) || (avail == 0)) {
56064919Sxy150489 		E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL,
56073526Sxy150489 		    "Get interrupt available number failed. "
56083526Sxy150489 		    "Return: %d, available: %d\n", rc, avail);
56093526Sxy150489 		return (DDI_FAILURE);
56103526Sxy150489 	}
56113526Sxy150489 
56123526Sxy150489 	if (avail < count) {
561311143SGuoqing.Zhu@Sun.COM 		/* EMPTY */
56144919Sxy150489 		E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL,
56153526Sxy150489 		    "Interrupts count: %d, available: %d\n",
56163526Sxy150489 		    count, avail);
56173526Sxy150489 	}
56183526Sxy150489 
56193526Sxy150489 	/* Allocate an array of interrupt handles */
56203526Sxy150489 	Adapter->intr_size = count * sizeof (ddi_intr_handle_t);
56213526Sxy150489 	Adapter->htable = kmem_alloc(Adapter->intr_size, KM_SLEEP);
56223526Sxy150489 
56233526Sxy150489 	/* Set NORMAL behavior for both MSI and FIXED interrupt */
56243526Sxy150489 	flag = DDI_INTR_ALLOC_NORMAL;
56253526Sxy150489 
56263526Sxy150489 	/* call ddi_intr_alloc() */
56273526Sxy150489 	rc = ddi_intr_alloc(devinfo, Adapter->htable, intr_type, inum,
56283526Sxy150489 	    count, &actual, flag);
56293526Sxy150489 
56303526Sxy150489 	if ((rc != DDI_SUCCESS) || (actual == 0)) {
56314919Sxy150489 		E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
56323526Sxy150489 		    "Allocate interrupts failed: %d\n", rc);
56333526Sxy150489 
56343526Sxy150489 		kmem_free(Adapter->htable, Adapter->intr_size);
56353526Sxy150489 		return (DDI_FAILURE);
56363526Sxy150489 	}
56373526Sxy150489 
56383526Sxy150489 	if (actual < count) {
563911143SGuoqing.Zhu@Sun.COM 		/* EMPTY */
56404919Sxy150489 		E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL,
56413526Sxy150489 		    "Interrupts requested: %d, received: %d\n",
56423526Sxy150489 		    count, actual);
56433526Sxy150489 	}
56443526Sxy150489 
56453526Sxy150489 	Adapter->intr_cnt = actual;
56463526Sxy150489 
56473526Sxy150489 	/* Get priority for first msi, assume remaining are all the same */
56483526Sxy150489 	rc = ddi_intr_get_pri(Adapter->htable[0], &Adapter->intr_pri);
56493526Sxy150489 
56503526Sxy150489 	if (rc != DDI_SUCCESS) {
56514919Sxy150489 		E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
56523526Sxy150489 		    "Get interrupt priority failed: %d\n", rc);
56533526Sxy150489 
56543526Sxy150489 		/* Free already allocated intr */
56553526Sxy150489 		for (y = 0; y < actual; y++)
56563526Sxy150489 			(void) ddi_intr_free(Adapter->htable[y]);
56573526Sxy150489 
56583526Sxy150489 		kmem_free(Adapter->htable, Adapter->intr_size);
56593526Sxy150489 		return (DDI_FAILURE);
56603526Sxy150489 	}
56613526Sxy150489 
56623526Sxy150489 	/*
56633526Sxy150489 	 * In Legacy Interrupt mode, for PCI-Express adapters, we should
56643526Sxy150489 	 * use the interrupt service routine e1000g_intr_pciexpress()
56653526Sxy150489 	 * to avoid interrupt stealing when sharing interrupt with other
56663526Sxy150489 	 * devices.
56673526Sxy150489 	 */
56684919Sxy150489 	if (Adapter->shared.mac.type < e1000_82571)
56693526Sxy150489 		intr_handler = (ddi_intr_handler_t *)e1000g_intr;
56703526Sxy150489 	else
56713526Sxy150489 		intr_handler = (ddi_intr_handler_t *)e1000g_intr_pciexpress;
56723526Sxy150489 
56733526Sxy150489 	/* Call ddi_intr_add_handler() */
56743526Sxy150489 	for (x = 0; x < actual; x++) {
56753526Sxy150489 		rc = ddi_intr_add_handler(Adapter->htable[x],
56763526Sxy150489 		    intr_handler, (caddr_t)Adapter, NULL);
56773526Sxy150489 
56783526Sxy150489 		if (rc != DDI_SUCCESS) {
56794919Sxy150489 			E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
56803526Sxy150489 			    "Add interrupt handler failed: %d\n", rc);
56813526Sxy150489 
56823526Sxy150489 			/* Remove already added handler */
56833526Sxy150489 			for (y = 0; y < x; y++)
56843526Sxy150489 				(void) ddi_intr_remove_handler(
56853526Sxy150489 				    Adapter->htable[y]);
56863526Sxy150489 
56873526Sxy150489 			/* Free already allocated intr */
56883526Sxy150489 			for (y = 0; y < actual; y++)
56893526Sxy150489 				(void) ddi_intr_free(Adapter->htable[y]);
56903526Sxy150489 
56913526Sxy150489 			kmem_free(Adapter->htable, Adapter->intr_size);
56923526Sxy150489 			return (DDI_FAILURE);
56933526Sxy150489 		}
56943526Sxy150489 	}
56953526Sxy150489 
56963526Sxy150489 	rc = ddi_intr_get_cap(Adapter->htable[0], &Adapter->intr_cap);
56973526Sxy150489 
56983526Sxy150489 	if (rc != DDI_SUCCESS) {
56994919Sxy150489 		E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
57003526Sxy150489 		    "Get interrupt cap failed: %d\n", rc);
57013526Sxy150489 
57023526Sxy150489 		/* Free already allocated intr */
57033526Sxy150489 		for (y = 0; y < actual; y++) {
57043526Sxy150489 			(void) ddi_intr_remove_handler(Adapter->htable[y]);
57053526Sxy150489 			(void) ddi_intr_free(Adapter->htable[y]);
57063526Sxy150489 		}
57073526Sxy150489 
57083526Sxy150489 		kmem_free(Adapter->htable, Adapter->intr_size);
57093526Sxy150489 		return (DDI_FAILURE);
57103526Sxy150489 	}
57113526Sxy150489 
57123526Sxy150489 	return (DDI_SUCCESS);
57133526Sxy150489 }
57143526Sxy150489 
57153526Sxy150489 static int
57163526Sxy150489 e1000g_rem_intrs(struct e1000g *Adapter)
57173526Sxy150489 {
57183526Sxy150489 	int x;
57193526Sxy150489 	int rc;
57203526Sxy150489 
57213526Sxy150489 	for (x = 0; x < Adapter->intr_cnt; x++) {
57223526Sxy150489 		rc = ddi_intr_remove_handler(Adapter->htable[x]);
57233526Sxy150489 		if (rc != DDI_SUCCESS) {
57244919Sxy150489 			E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
57253526Sxy150489 			    "Remove intr handler failed: %d\n", rc);
57263526Sxy150489 			return (DDI_FAILURE);
57273526Sxy150489 		}
57283526Sxy150489 
57293526Sxy150489 		rc = ddi_intr_free(Adapter->htable[x]);
57303526Sxy150489 		if (rc != DDI_SUCCESS) {
57314919Sxy150489 			E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
57323526Sxy150489 			    "Free intr failed: %d\n", rc);
57333526Sxy150489 			return (DDI_FAILURE);
57343526Sxy150489 		}
57353526Sxy150489 	}
57363526Sxy150489 
57373526Sxy150489 	kmem_free(Adapter->htable, Adapter->intr_size);
57383526Sxy150489 
57393526Sxy150489 	return (DDI_SUCCESS);
57403526Sxy150489 }
57413526Sxy150489 
57423526Sxy150489 static int
57433526Sxy150489 e1000g_enable_intrs(struct e1000g *Adapter)
57443526Sxy150489 {
57453526Sxy150489 	int x;
57463526Sxy150489 	int rc;
57473526Sxy150489 
57483526Sxy150489 	/* Enable interrupts */
57493526Sxy150489 	if (Adapter->intr_cap & DDI_INTR_FLAG_BLOCK) {
57503526Sxy150489 		/* Call ddi_intr_block_enable() for MSI */
57513526Sxy150489 		rc = ddi_intr_block_enable(Adapter->htable,
57523526Sxy150489 		    Adapter->intr_cnt);
57533526Sxy150489 		if (rc != DDI_SUCCESS) {
57544919Sxy150489 			E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
57553526Sxy150489 			    "Enable block intr failed: %d\n", rc);
57563526Sxy150489 			return (DDI_FAILURE);
57573526Sxy150489 		}
57583526Sxy150489 	} else {
57593526Sxy150489 		/* Call ddi_intr_enable() for Legacy/MSI non block enable */
57603526Sxy150489 		for (x = 0; x < Adapter->intr_cnt; x++) {
57613526Sxy150489 			rc = ddi_intr_enable(Adapter->htable[x]);
57623526Sxy150489 			if (rc != DDI_SUCCESS) {
57634919Sxy150489 				E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
57643526Sxy150489 				    "Enable intr failed: %d\n", rc);
57653526Sxy150489 				return (DDI_FAILURE);
57663526Sxy150489 			}
57673526Sxy150489 		}
57683526Sxy150489 	}
57693526Sxy150489 
57703526Sxy150489 	return (DDI_SUCCESS);
57713526Sxy150489 }
57723526Sxy150489 
57733526Sxy150489 static int
57743526Sxy150489 e1000g_disable_intrs(struct e1000g *Adapter)
57753526Sxy150489 {
57763526Sxy150489 	int x;
57773526Sxy150489 	int rc;
57783526Sxy150489 
57793526Sxy150489 	/* Disable all interrupts */
57803526Sxy150489 	if (Adapter->intr_cap & DDI_INTR_FLAG_BLOCK) {
57813526Sxy150489 		rc = ddi_intr_block_disable(Adapter->htable,
57823526Sxy150489 		    Adapter->intr_cnt);
57833526Sxy150489 		if (rc != DDI_SUCCESS) {
57844919Sxy150489 			E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
57853526Sxy150489 			    "Disable block intr failed: %d\n", rc);
57863526Sxy150489 			return (DDI_FAILURE);
57873526Sxy150489 		}
57883526Sxy150489 	} else {
57893526Sxy150489 		for (x = 0; x < Adapter->intr_cnt; x++) {
57903526Sxy150489 			rc = ddi_intr_disable(Adapter->htable[x]);
57913526Sxy150489 			if (rc != DDI_SUCCESS) {
57924919Sxy150489 				E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
57933526Sxy150489 				    "Disable intr failed: %d\n", rc);
57943526Sxy150489 				return (DDI_FAILURE);
57953526Sxy150489 			}
57963526Sxy150489 		}
57973526Sxy150489 	}
57983526Sxy150489 
57993526Sxy150489 	return (DDI_SUCCESS);
58003526Sxy150489 }
58015082Syy150190 
58025082Syy150190 /*
58035082Syy150190  * e1000g_get_phy_state - get the state of PHY registers, save in the adapter
58045082Syy150190  */
58055082Syy150190 static void
58065082Syy150190 e1000g_get_phy_state(struct e1000g *Adapter)
58075082Syy150190 {
58085082Syy150190 	struct e1000_hw *hw = &Adapter->shared;
58095082Syy150190 
581010605SMin.Xu@Sun.COM 	if (hw->phy.media_type == e1000_media_type_copper) {
581110605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_CONTROL, &Adapter->phy_ctrl);
581210605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_STATUS, &Adapter->phy_status);
581310605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_AUTONEG_ADV,
581410605SMin.Xu@Sun.COM 		    &Adapter->phy_an_adv);
581510605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_AUTONEG_EXP,
581610605SMin.Xu@Sun.COM 		    &Adapter->phy_an_exp);
581710605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_EXT_STATUS,
581810605SMin.Xu@Sun.COM 		    &Adapter->phy_ext_status);
581910605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_1000T_CTRL,
582010605SMin.Xu@Sun.COM 		    &Adapter->phy_1000t_ctrl);
582110605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_1000T_STATUS,
582210605SMin.Xu@Sun.COM 		    &Adapter->phy_1000t_status);
582310605SMin.Xu@Sun.COM 		(void) e1000_read_phy_reg(hw, PHY_LP_ABILITY,
582410605SMin.Xu@Sun.COM 		    &Adapter->phy_lp_able);
582510605SMin.Xu@Sun.COM 
582610605SMin.Xu@Sun.COM 		Adapter->param_autoneg_cap =
582710605SMin.Xu@Sun.COM 		    (Adapter->phy_status & MII_SR_AUTONEG_CAPS) ? 1 : 0;
582810605SMin.Xu@Sun.COM 		Adapter->param_pause_cap =
582910605SMin.Xu@Sun.COM 		    (Adapter->phy_an_adv & NWAY_AR_PAUSE) ? 1 : 0;
583010605SMin.Xu@Sun.COM 		Adapter->param_asym_pause_cap =
583110605SMin.Xu@Sun.COM 		    (Adapter->phy_an_adv & NWAY_AR_ASM_DIR) ? 1 : 0;
583210605SMin.Xu@Sun.COM 		Adapter->param_1000fdx_cap =
583310605SMin.Xu@Sun.COM 		    ((Adapter->phy_ext_status & IEEE_ESR_1000T_FD_CAPS) ||
583410605SMin.Xu@Sun.COM 		    (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS)) ? 1 : 0;
583510605SMin.Xu@Sun.COM 		Adapter->param_1000hdx_cap =
583610605SMin.Xu@Sun.COM 		    ((Adapter->phy_ext_status & IEEE_ESR_1000T_HD_CAPS) ||
583710605SMin.Xu@Sun.COM 		    (Adapter->phy_ext_status & IEEE_ESR_1000X_HD_CAPS)) ? 1 : 0;
583810605SMin.Xu@Sun.COM 		Adapter->param_100t4_cap =
583910605SMin.Xu@Sun.COM 		    (Adapter->phy_status & MII_SR_100T4_CAPS) ? 1 : 0;
584010605SMin.Xu@Sun.COM 		Adapter->param_100fdx_cap =
584110605SMin.Xu@Sun.COM 		    ((Adapter->phy_status & MII_SR_100X_FD_CAPS) ||
584210605SMin.Xu@Sun.COM 		    (Adapter->phy_status & MII_SR_100T2_FD_CAPS)) ? 1 : 0;
584310605SMin.Xu@Sun.COM 		Adapter->param_100hdx_cap =
584410605SMin.Xu@Sun.COM 		    ((Adapter->phy_status & MII_SR_100X_HD_CAPS) ||
584510605SMin.Xu@Sun.COM 		    (Adapter->phy_status & MII_SR_100T2_HD_CAPS)) ? 1 : 0;
584610605SMin.Xu@Sun.COM 		Adapter->param_10fdx_cap =
584710605SMin.Xu@Sun.COM 		    (Adapter->phy_status & MII_SR_10T_FD_CAPS) ? 1 : 0;
584810605SMin.Xu@Sun.COM 		Adapter->param_10hdx_cap =
584910605SMin.Xu@Sun.COM 		    (Adapter->phy_status & MII_SR_10T_HD_CAPS) ? 1 : 0;
585010605SMin.Xu@Sun.COM 
585110605SMin.Xu@Sun.COM 		Adapter->param_adv_autoneg = hw->mac.autoneg;
585210605SMin.Xu@Sun.COM 		Adapter->param_adv_pause =
585310605SMin.Xu@Sun.COM 		    (Adapter->phy_an_adv & NWAY_AR_PAUSE) ? 1 : 0;
585410605SMin.Xu@Sun.COM 		Adapter->param_adv_asym_pause =
585510605SMin.Xu@Sun.COM 		    (Adapter->phy_an_adv & NWAY_AR_ASM_DIR) ? 1 : 0;
585610605SMin.Xu@Sun.COM 		Adapter->param_adv_1000hdx =
585710605SMin.Xu@Sun.COM 		    (Adapter->phy_1000t_ctrl & CR_1000T_HD_CAPS) ? 1 : 0;
585810605SMin.Xu@Sun.COM 		Adapter->param_adv_100t4 =
585910605SMin.Xu@Sun.COM 		    (Adapter->phy_an_adv & NWAY_AR_100T4_CAPS) ? 1 : 0;
586010605SMin.Xu@Sun.COM 		if (Adapter->param_adv_autoneg == 1) {
586110605SMin.Xu@Sun.COM 			Adapter->param_adv_1000fdx =
586210605SMin.Xu@Sun.COM 			    (Adapter->phy_1000t_ctrl & CR_1000T_FD_CAPS)
586310605SMin.Xu@Sun.COM 			    ? 1 : 0;
586410605SMin.Xu@Sun.COM 			Adapter->param_adv_100fdx =
586510605SMin.Xu@Sun.COM 			    (Adapter->phy_an_adv & NWAY_AR_100TX_FD_CAPS)
586610605SMin.Xu@Sun.COM 			    ? 1 : 0;
586710605SMin.Xu@Sun.COM 			Adapter->param_adv_100hdx =
586810605SMin.Xu@Sun.COM 			    (Adapter->phy_an_adv & NWAY_AR_100TX_HD_CAPS)
586910605SMin.Xu@Sun.COM 			    ? 1 : 0;
587010605SMin.Xu@Sun.COM 			Adapter->param_adv_10fdx =
587110605SMin.Xu@Sun.COM 			    (Adapter->phy_an_adv & NWAY_AR_10T_FD_CAPS) ? 1 : 0;
587210605SMin.Xu@Sun.COM 			Adapter->param_adv_10hdx =
587310605SMin.Xu@Sun.COM 			    (Adapter->phy_an_adv & NWAY_AR_10T_HD_CAPS) ? 1 : 0;
587410605SMin.Xu@Sun.COM 		}
587510605SMin.Xu@Sun.COM 
587610605SMin.Xu@Sun.COM 		Adapter->param_lp_autoneg =
587710605SMin.Xu@Sun.COM 		    (Adapter->phy_an_exp & NWAY_ER_LP_NWAY_CAPS) ? 1 : 0;
587810605SMin.Xu@Sun.COM 		Adapter->param_lp_pause =
587910605SMin.Xu@Sun.COM 		    (Adapter->phy_lp_able & NWAY_LPAR_PAUSE) ? 1 : 0;
588010605SMin.Xu@Sun.COM 		Adapter->param_lp_asym_pause =
588110605SMin.Xu@Sun.COM 		    (Adapter->phy_lp_able & NWAY_LPAR_ASM_DIR) ? 1 : 0;
588210605SMin.Xu@Sun.COM 		Adapter->param_lp_1000fdx =
588310605SMin.Xu@Sun.COM 		    (Adapter->phy_1000t_status & SR_1000T_LP_FD_CAPS) ? 1 : 0;
588410605SMin.Xu@Sun.COM 		Adapter->param_lp_1000hdx =
588510605SMin.Xu@Sun.COM 		    (Adapter->phy_1000t_status & SR_1000T_LP_HD_CAPS) ? 1 : 0;
588610605SMin.Xu@Sun.COM 		Adapter->param_lp_100t4 =
588710605SMin.Xu@Sun.COM 		    (Adapter->phy_lp_able & NWAY_LPAR_100T4_CAPS) ? 1 : 0;
588810605SMin.Xu@Sun.COM 		Adapter->param_lp_100fdx =
588910605SMin.Xu@Sun.COM 		    (Adapter->phy_lp_able & NWAY_LPAR_100TX_FD_CAPS) ? 1 : 0;
589010605SMin.Xu@Sun.COM 		Adapter->param_lp_100hdx =
589110605SMin.Xu@Sun.COM 		    (Adapter->phy_lp_able & NWAY_LPAR_100TX_HD_CAPS) ? 1 : 0;
589210605SMin.Xu@Sun.COM 		Adapter->param_lp_10fdx =
589310605SMin.Xu@Sun.COM 		    (Adapter->phy_lp_able & NWAY_LPAR_10T_FD_CAPS) ? 1 : 0;
589410605SMin.Xu@Sun.COM 		Adapter->param_lp_10hdx =
589510605SMin.Xu@Sun.COM 		    (Adapter->phy_lp_able & NWAY_LPAR_10T_HD_CAPS) ? 1 : 0;
589610605SMin.Xu@Sun.COM 	} else {
589710605SMin.Xu@Sun.COM 		/*
589810605SMin.Xu@Sun.COM 		 * 1Gig Fiber adapter only offers 1Gig Full Duplex. Meaning,
589910605SMin.Xu@Sun.COM 		 * it can only work with 1Gig Full Duplex Link Partner.
590010605SMin.Xu@Sun.COM 		 */
590110605SMin.Xu@Sun.COM 		Adapter->param_autoneg_cap = 0;
590210605SMin.Xu@Sun.COM 		Adapter->param_pause_cap = 1;
590310605SMin.Xu@Sun.COM 		Adapter->param_asym_pause_cap = 1;
590410605SMin.Xu@Sun.COM 		Adapter->param_1000fdx_cap = 1;
590510605SMin.Xu@Sun.COM 		Adapter->param_1000hdx_cap = 0;
590610605SMin.Xu@Sun.COM 		Adapter->param_100t4_cap = 0;
590710605SMin.Xu@Sun.COM 		Adapter->param_100fdx_cap = 0;
590810605SMin.Xu@Sun.COM 		Adapter->param_100hdx_cap = 0;
590910605SMin.Xu@Sun.COM 		Adapter->param_10fdx_cap = 0;
591010605SMin.Xu@Sun.COM 		Adapter->param_10hdx_cap = 0;
591110605SMin.Xu@Sun.COM 
591210605SMin.Xu@Sun.COM 		Adapter->param_adv_autoneg = 0;
591310605SMin.Xu@Sun.COM 		Adapter->param_adv_pause = 1;
591410605SMin.Xu@Sun.COM 		Adapter->param_adv_asym_pause = 1;
591510605SMin.Xu@Sun.COM 		Adapter->param_adv_1000fdx = 1;
591610605SMin.Xu@Sun.COM 		Adapter->param_adv_1000hdx = 0;
591710605SMin.Xu@Sun.COM 		Adapter->param_adv_100t4 = 0;
591810605SMin.Xu@Sun.COM 		Adapter->param_adv_100fdx = 0;
591910605SMin.Xu@Sun.COM 		Adapter->param_adv_100hdx = 0;
592010605SMin.Xu@Sun.COM 		Adapter->param_adv_10fdx = 0;
592110605SMin.Xu@Sun.COM 		Adapter->param_adv_10hdx = 0;
592210605SMin.Xu@Sun.COM 
592310605SMin.Xu@Sun.COM 		Adapter->param_lp_autoneg = 0;
592410605SMin.Xu@Sun.COM 		Adapter->param_lp_pause = 0;
592510605SMin.Xu@Sun.COM 		Adapter->param_lp_asym_pause = 0;
592610605SMin.Xu@Sun.COM 		Adapter->param_lp_1000fdx = 0;
592710605SMin.Xu@Sun.COM 		Adapter->param_lp_1000hdx = 0;
592810605SMin.Xu@Sun.COM 		Adapter->param_lp_100t4 = 0;
592910605SMin.Xu@Sun.COM 		Adapter->param_lp_100fdx = 0;
593010605SMin.Xu@Sun.COM 		Adapter->param_lp_100hdx = 0;
593110605SMin.Xu@Sun.COM 		Adapter->param_lp_10fdx = 0;
593210605SMin.Xu@Sun.COM 		Adapter->param_lp_10hdx = 0;
593310605SMin.Xu@Sun.COM 	}
59345082Syy150190 }
59355273Sgl147354 
59365273Sgl147354 /*
59375273Sgl147354  * FMA support
59385273Sgl147354  */
59395273Sgl147354 
59405273Sgl147354 int
59415273Sgl147354 e1000g_check_acc_handle(ddi_acc_handle_t handle)
59425273Sgl147354 {
59435273Sgl147354 	ddi_fm_error_t de;
59445273Sgl147354 
59455273Sgl147354 	ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
59465273Sgl147354 	ddi_fm_acc_err_clear(handle, DDI_FME_VERSION);
59475273Sgl147354 	return (de.fme_status);
59485273Sgl147354 }
59495273Sgl147354 
59505273Sgl147354 int
59515273Sgl147354 e1000g_check_dma_handle(ddi_dma_handle_t handle)
59525273Sgl147354 {
59535273Sgl147354 	ddi_fm_error_t de;
59545273Sgl147354 
59555273Sgl147354 	ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
59565273Sgl147354 	return (de.fme_status);
59575273Sgl147354 }
59585273Sgl147354 
59595273Sgl147354 /*
59605273Sgl147354  * The IO fault service error handling callback function
59615273Sgl147354  */
59627426SChenliang.Xu@Sun.COM /* ARGSUSED2 */
59635273Sgl147354 static int
59645273Sgl147354 e1000g_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
59655273Sgl147354 {
59665273Sgl147354 	/*
59675273Sgl147354 	 * as the driver can always deal with an error in any dma or
59685273Sgl147354 	 * access handle, we can just return the fme_status value.
59695273Sgl147354 	 */
59705273Sgl147354 	pci_ereport_post(dip, err, NULL);
59715273Sgl147354 	return (err->fme_status);
59725273Sgl147354 }
59735273Sgl147354 
59745273Sgl147354 static void
59755273Sgl147354 e1000g_fm_init(struct e1000g *Adapter)
59765273Sgl147354 {
59775273Sgl147354 	ddi_iblock_cookie_t iblk;
5978*11236SStephen.Hanson@Sun.COM 	int fma_dma_flag;
59795273Sgl147354 
59805273Sgl147354 	/* Only register with IO Fault Services if we have some capability */
59815273Sgl147354 	if (Adapter->fm_capabilities & DDI_FM_ACCCHK_CAPABLE) {
59825273Sgl147354 		e1000g_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC;
59835273Sgl147354 	} else {
59845273Sgl147354 		e1000g_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC;
59855273Sgl147354 	}
59865273Sgl147354 
59875273Sgl147354 	if (Adapter->fm_capabilities & DDI_FM_DMACHK_CAPABLE) {
59885273Sgl147354 		fma_dma_flag = 1;
59895273Sgl147354 	} else {
59905273Sgl147354 		fma_dma_flag = 0;
59915273Sgl147354 	}
59925273Sgl147354 
5993*11236SStephen.Hanson@Sun.COM 	(void) e1000g_set_fma_flags(fma_dma_flag);
59945273Sgl147354 
59955273Sgl147354 	if (Adapter->fm_capabilities) {
59965273Sgl147354 
59975273Sgl147354 		/* Register capabilities with IO Fault Services */
59985273Sgl147354 		ddi_fm_init(Adapter->dip, &Adapter->fm_capabilities, &iblk);
59995273Sgl147354 
60005273Sgl147354 		/*
60015273Sgl147354 		 * Initialize pci ereport capabilities if ereport capable
60025273Sgl147354 		 */
60035273Sgl147354 		if (DDI_FM_EREPORT_CAP(Adapter->fm_capabilities) ||
60045273Sgl147354 		    DDI_FM_ERRCB_CAP(Adapter->fm_capabilities))
60055273Sgl147354 			pci_ereport_setup(Adapter->dip);
60065273Sgl147354 
60075273Sgl147354 		/*
60085273Sgl147354 		 * Register error callback if error callback capable
60095273Sgl147354 		 */
60105273Sgl147354 		if (DDI_FM_ERRCB_CAP(Adapter->fm_capabilities))
60115273Sgl147354 			ddi_fm_handler_register(Adapter->dip,
60125273Sgl147354 			    e1000g_fm_error_cb, (void*) Adapter);
60135273Sgl147354 	}
60145273Sgl147354 }
60155273Sgl147354 
60165273Sgl147354 static void
60175273Sgl147354 e1000g_fm_fini(struct e1000g *Adapter)
60185273Sgl147354 {
60195273Sgl147354 	/* Only unregister FMA capabilities if we registered some */
60205273Sgl147354 	if (Adapter->fm_capabilities) {
60215273Sgl147354 
60225273Sgl147354 		/*
60235273Sgl147354 		 * Release any resources allocated by pci_ereport_setup()
60245273Sgl147354 		 */
60255273Sgl147354 		if (DDI_FM_EREPORT_CAP(Adapter->fm_capabilities) ||
60265273Sgl147354 		    DDI_FM_ERRCB_CAP(Adapter->fm_capabilities))
60275273Sgl147354 			pci_ereport_teardown(Adapter->dip);
60285273Sgl147354 
60295273Sgl147354 		/*
60305273Sgl147354 		 * Un-register error callback if error callback capable
60315273Sgl147354 		 */
60325273Sgl147354 		if (DDI_FM_ERRCB_CAP(Adapter->fm_capabilities))
60335273Sgl147354 			ddi_fm_handler_unregister(Adapter->dip);
60345273Sgl147354 
60355273Sgl147354 		/* Unregister from IO Fault Services */
60368949SChangqing.Li@Sun.COM 		mutex_enter(&e1000g_rx_detach_lock);
60375273Sgl147354 		ddi_fm_fini(Adapter->dip);
60388949SChangqing.Li@Sun.COM 		if (Adapter->priv_dip != NULL) {
60398949SChangqing.Li@Sun.COM 			DEVI(Adapter->priv_dip)->devi_fmhdl = NULL;
60408949SChangqing.Li@Sun.COM 		}
60418949SChangqing.Li@Sun.COM 		mutex_exit(&e1000g_rx_detach_lock);
60425273Sgl147354 	}
60435273Sgl147354 }
60445273Sgl147354 
60455273Sgl147354 void
60465273Sgl147354 e1000g_fm_ereport(struct e1000g *Adapter, char *detail)
60475273Sgl147354 {
60485273Sgl147354 	uint64_t ena;
60495273Sgl147354 	char buf[FM_MAX_CLASS];
60505273Sgl147354 
60515273Sgl147354 	(void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
60525273Sgl147354 	ena = fm_ena_generate(0, FM_ENA_FMT1);
60535273Sgl147354 	if (DDI_FM_EREPORT_CAP(Adapter->fm_capabilities)) {
60545273Sgl147354 		ddi_fm_ereport_post(Adapter->dip, buf, ena, DDI_NOSLEEP,
60555273Sgl147354 		    FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERS0, NULL);
60565273Sgl147354 	}
60575273Sgl147354 }
60586512Ssowmini 
60597656SSherry.Moore@Sun.COM /*
60607656SSherry.Moore@Sun.COM  * quiesce(9E) entry point.
60617656SSherry.Moore@Sun.COM  *
60627656SSherry.Moore@Sun.COM  * This function is called when the system is single-threaded at high
60637656SSherry.Moore@Sun.COM  * PIL with preemption disabled. Therefore, this function must not be
60647656SSherry.Moore@Sun.COM  * blocked.
60657656SSherry.Moore@Sun.COM  *
60667656SSherry.Moore@Sun.COM  * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
60677656SSherry.Moore@Sun.COM  * DDI_FAILURE indicates an error condition and should almost never happen.
60687656SSherry.Moore@Sun.COM  */
60697656SSherry.Moore@Sun.COM static int
60707656SSherry.Moore@Sun.COM e1000g_quiesce(dev_info_t *devinfo)
60717656SSherry.Moore@Sun.COM {
60727656SSherry.Moore@Sun.COM 	struct e1000g *Adapter;
60737656SSherry.Moore@Sun.COM 
60747656SSherry.Moore@Sun.COM 	Adapter = (struct e1000g *)ddi_get_driver_private(devinfo);
60757656SSherry.Moore@Sun.COM 
60767656SSherry.Moore@Sun.COM 	if (Adapter == NULL)
60777656SSherry.Moore@Sun.COM 		return (DDI_FAILURE);
60787656SSherry.Moore@Sun.COM 
60797656SSherry.Moore@Sun.COM 	e1000g_clear_all_interrupts(Adapter);
60807656SSherry.Moore@Sun.COM 
60817656SSherry.Moore@Sun.COM 	(void) e1000_reset_hw(&Adapter->shared);
60827656SSherry.Moore@Sun.COM 
60837656SSherry.Moore@Sun.COM 	/* Setup our HW Tx Head & Tail descriptor pointers */
60847656SSherry.Moore@Sun.COM 	E1000_WRITE_REG(&Adapter->shared, E1000_TDH(0), 0);
60857656SSherry.Moore@Sun.COM 	E1000_WRITE_REG(&Adapter->shared, E1000_TDT(0), 0);
60867656SSherry.Moore@Sun.COM 
60877656SSherry.Moore@Sun.COM 	/* Setup our HW Rx Head & Tail descriptor pointers */
60887656SSherry.Moore@Sun.COM 	E1000_WRITE_REG(&Adapter->shared, E1000_RDH(0), 0);
60897656SSherry.Moore@Sun.COM 	E1000_WRITE_REG(&Adapter->shared, E1000_RDT(0), 0);
60907656SSherry.Moore@Sun.COM 
60917656SSherry.Moore@Sun.COM 	return (DDI_SUCCESS);
60927656SSherry.Moore@Sun.COM }
60937656SSherry.Moore@Sun.COM 
60946512Ssowmini static int
60956512Ssowmini e1000g_get_def_val(struct e1000g *Adapter, mac_prop_id_t pr_num,
60966512Ssowmini     uint_t pr_valsize, void *pr_val)
60976512Ssowmini {
60986512Ssowmini 	link_flowctrl_t fl;
609910605SMin.Xu@Sun.COM 	struct e1000_hw *hw = &Adapter->shared;
61006512Ssowmini 	int err = 0;
61016512Ssowmini 
61026512Ssowmini 	ASSERT(pr_valsize > 0);
61036512Ssowmini 	switch (pr_num) {
61046789Sam223141 	case MAC_PROP_AUTONEG:
610510605SMin.Xu@Sun.COM 		if (hw->phy.media_type != e1000_media_type_copper)
610610605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val = 0;
610710605SMin.Xu@Sun.COM 		else
610810605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val =
610910605SMin.Xu@Sun.COM 			    ((Adapter->phy_status & MII_SR_AUTONEG_CAPS)
611010605SMin.Xu@Sun.COM 			    ? 1 : 0);
61116512Ssowmini 		break;
61126789Sam223141 	case MAC_PROP_FLOWCTRL:
61136512Ssowmini 		if (pr_valsize < sizeof (link_flowctrl_t))
61146512Ssowmini 			return (EINVAL);
61156512Ssowmini 		fl = LINK_FLOWCTRL_BI;
61166512Ssowmini 		bcopy(&fl, pr_val, sizeof (fl));
61176512Ssowmini 		break;
61186789Sam223141 	case MAC_PROP_ADV_1000FDX_CAP:
61196789Sam223141 	case MAC_PROP_EN_1000FDX_CAP:
612010605SMin.Xu@Sun.COM 		if (hw->phy.media_type != e1000_media_type_copper)
612110605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val = 1;
612210605SMin.Xu@Sun.COM 		else
612310605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val =
612410605SMin.Xu@Sun.COM 			    ((Adapter->phy_ext_status &
612510605SMin.Xu@Sun.COM 			    IEEE_ESR_1000T_FD_CAPS) ||
612610605SMin.Xu@Sun.COM 			    (Adapter->phy_ext_status & IEEE_ESR_1000X_FD_CAPS))
612710605SMin.Xu@Sun.COM 			    ? 1 : 0;
61286512Ssowmini 		break;
61296789Sam223141 	case MAC_PROP_ADV_1000HDX_CAP:
61306789Sam223141 	case MAC_PROP_EN_1000HDX_CAP:
613110605SMin.Xu@Sun.COM 		*(uint8_t *)pr_val = 0;
61326512Ssowmini 		break;
61336789Sam223141 	case MAC_PROP_ADV_100FDX_CAP:
61346789Sam223141 	case MAC_PROP_EN_100FDX_CAP:
613510605SMin.Xu@Sun.COM 		if (hw->phy.media_type != e1000_media_type_copper)
613610605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val = 0;
613710605SMin.Xu@Sun.COM 		else
613810605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val =
613910605SMin.Xu@Sun.COM 			    ((Adapter->phy_status & MII_SR_100X_FD_CAPS) ||
614010605SMin.Xu@Sun.COM 			    (Adapter->phy_status & MII_SR_100T2_FD_CAPS))
614110605SMin.Xu@Sun.COM 			    ? 1 : 0;
61427426SChenliang.Xu@Sun.COM 		break;
61436789Sam223141 	case MAC_PROP_ADV_100HDX_CAP:
61446789Sam223141 	case MAC_PROP_EN_100HDX_CAP:
614510605SMin.Xu@Sun.COM 		if (hw->phy.media_type != e1000_media_type_copper)
614610605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val = 0;
614710605SMin.Xu@Sun.COM 		else
614810605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val =
614910605SMin.Xu@Sun.COM 			    ((Adapter->phy_status & MII_SR_100X_HD_CAPS) ||
615010605SMin.Xu@Sun.COM 			    (Adapter->phy_status & MII_SR_100T2_HD_CAPS))
615110605SMin.Xu@Sun.COM 			    ? 1 : 0;
61526512Ssowmini 		break;
61536789Sam223141 	case MAC_PROP_ADV_10FDX_CAP:
61546789Sam223141 	case MAC_PROP_EN_10FDX_CAP:
615510605SMin.Xu@Sun.COM 		if (hw->phy.media_type != e1000_media_type_copper)
615610605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val = 0;
615710605SMin.Xu@Sun.COM 		else
615810605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val =
615910605SMin.Xu@Sun.COM 			    (Adapter->phy_status & MII_SR_10T_FD_CAPS) ? 1 : 0;
61606512Ssowmini 		break;
61616789Sam223141 	case MAC_PROP_ADV_10HDX_CAP:
61626789Sam223141 	case MAC_PROP_EN_10HDX_CAP:
616310605SMin.Xu@Sun.COM 		if (hw->phy.media_type != e1000_media_type_copper)
616410605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val = 0;
616510605SMin.Xu@Sun.COM 		else
616610605SMin.Xu@Sun.COM 			*(uint8_t *)pr_val =
616710605SMin.Xu@Sun.COM 			    (Adapter->phy_status & MII_SR_10T_HD_CAPS) ? 1 : 0;
61686512Ssowmini 		break;
61696512Ssowmini 	default:
61706512Ssowmini 		err = ENOTSUP;
61716512Ssowmini 		break;
61726512Ssowmini 	}
61736512Ssowmini 	return (err);
61746512Ssowmini }
61756512Ssowmini 
61766512Ssowmini /*
61776512Ssowmini  * synchronize the adv* and en* parameters.
61786512Ssowmini  *
61796512Ssowmini  * See comments in <sys/dld.h> for details of the *_en_*
61806512Ssowmini  * parameters. The usage of ndd for setting adv parameters will
61816512Ssowmini  * synchronize all the en parameters with the e1000g parameters,
61827607STed.You@Sun.COM  * implicitly disabling any settings made via dladm.
61836512Ssowmini  */
61846512Ssowmini static void
61856512Ssowmini e1000g_param_sync(struct e1000g *Adapter)
61866512Ssowmini {
61876512Ssowmini 	Adapter->param_en_1000fdx = Adapter->param_adv_1000fdx;
61886512Ssowmini 	Adapter->param_en_1000hdx = Adapter->param_adv_1000hdx;
61896512Ssowmini 	Adapter->param_en_100fdx = Adapter->param_adv_100fdx;
61906512Ssowmini 	Adapter->param_en_100hdx = Adapter->param_adv_100hdx;
61916512Ssowmini 	Adapter->param_en_10fdx = Adapter->param_adv_10fdx;
61926512Ssowmini 	Adapter->param_en_10hdx = Adapter->param_adv_10hdx;
61936512Ssowmini }
61947607STed.You@Sun.COM 
61957607STed.You@Sun.COM /*
61967607STed.You@Sun.COM  * e1000g_get_driver_control - tell manageability firmware that the driver
61977607STed.You@Sun.COM  * has control.
61987607STed.You@Sun.COM  */
61997607STed.You@Sun.COM static void
62007607STed.You@Sun.COM e1000g_get_driver_control(struct e1000_hw *hw)
62017607STed.You@Sun.COM {
62027607STed.You@Sun.COM 	uint32_t ctrl_ext;
62037607STed.You@Sun.COM 	uint32_t swsm;
62047607STed.You@Sun.COM 
62057607STed.You@Sun.COM 	/* tell manageability firmware the driver has taken over */
62067607STed.You@Sun.COM 	switch (hw->mac.type) {
62077607STed.You@Sun.COM 	case e1000_82573:
62087607STed.You@Sun.COM 		swsm = E1000_READ_REG(hw, E1000_SWSM);
62097607STed.You@Sun.COM 		E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_DRV_LOAD);
62107607STed.You@Sun.COM 		break;
62117607STed.You@Sun.COM 	case e1000_82571:
62127607STed.You@Sun.COM 	case e1000_82572:
62137607STed.You@Sun.COM 	case e1000_82574:
62147607STed.You@Sun.COM 	case e1000_80003es2lan:
62157607STed.You@Sun.COM 	case e1000_ich8lan:
62167607STed.You@Sun.COM 	case e1000_ich9lan:
62177607STed.You@Sun.COM 	case e1000_ich10lan:
621810680SMin.Xu@Sun.COM 	case e1000_pchlan:
62197607STed.You@Sun.COM 		ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
62207607STed.You@Sun.COM 		E1000_WRITE_REG(hw, E1000_CTRL_EXT,
62217607STed.You@Sun.COM 		    ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
62227607STed.You@Sun.COM 		break;
62237607STed.You@Sun.COM 	default:
62247607STed.You@Sun.COM 		/* no manageability firmware: do nothing */
62257607STed.You@Sun.COM 		break;
62267607STed.You@Sun.COM 	}
62277607STed.You@Sun.COM }
62287607STed.You@Sun.COM 
62297607STed.You@Sun.COM /*
62307607STed.You@Sun.COM  * e1000g_release_driver_control - tell manageability firmware that the driver
62317607STed.You@Sun.COM  * has released control.
62327607STed.You@Sun.COM  */
62337607STed.You@Sun.COM static void
62347607STed.You@Sun.COM e1000g_release_driver_control(struct e1000_hw *hw)
62357607STed.You@Sun.COM {
62367607STed.You@Sun.COM 	uint32_t ctrl_ext;
62377607STed.You@Sun.COM 	uint32_t swsm;
62387607STed.You@Sun.COM 
62397607STed.You@Sun.COM 	/* tell manageability firmware the driver has released control */
62407607STed.You@Sun.COM 	switch (hw->mac.type) {
62417607STed.You@Sun.COM 	case e1000_82573:
62427607STed.You@Sun.COM 		swsm = E1000_READ_REG(hw, E1000_SWSM);
62437607STed.You@Sun.COM 		E1000_WRITE_REG(hw, E1000_SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
62447607STed.You@Sun.COM 		break;
62457607STed.You@Sun.COM 	case e1000_82571:
62467607STed.You@Sun.COM 	case e1000_82572:
62477607STed.You@Sun.COM 	case e1000_82574:
62487607STed.You@Sun.COM 	case e1000_80003es2lan:
62497607STed.You@Sun.COM 	case e1000_ich8lan:
62507607STed.You@Sun.COM 	case e1000_ich9lan:
62517607STed.You@Sun.COM 	case e1000_ich10lan:
625210680SMin.Xu@Sun.COM 	case e1000_pchlan:
62537607STed.You@Sun.COM 		ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
62547607STed.You@Sun.COM 		E1000_WRITE_REG(hw, E1000_CTRL_EXT,
62557607STed.You@Sun.COM 		    ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
62567607STed.You@Sun.COM 		break;
62577607STed.You@Sun.COM 	default:
62587607STed.You@Sun.COM 		/* no manageability firmware: do nothing */
62597607STed.You@Sun.COM 		break;
62607607STed.You@Sun.COM 	}
62617607STed.You@Sun.COM }
62627722SShuguo.Yang@Sun.COM 
62637722SShuguo.Yang@Sun.COM /*
62647722SShuguo.Yang@Sun.COM  * Restore e1000g promiscuous mode.
62657722SShuguo.Yang@Sun.COM  */
62667722SShuguo.Yang@Sun.COM static void
62677722SShuguo.Yang@Sun.COM e1000g_restore_promisc(struct e1000g *Adapter)
62687722SShuguo.Yang@Sun.COM {
62697722SShuguo.Yang@Sun.COM 	if (Adapter->e1000g_promisc) {
62707722SShuguo.Yang@Sun.COM 		uint32_t rctl;
62717722SShuguo.Yang@Sun.COM 
62727722SShuguo.Yang@Sun.COM 		rctl = E1000_READ_REG(&Adapter->shared, E1000_RCTL);
62737722SShuguo.Yang@Sun.COM 		rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_BAM);
62747722SShuguo.Yang@Sun.COM 		E1000_WRITE_REG(&Adapter->shared, E1000_RCTL, rctl);
62757722SShuguo.Yang@Sun.COM 	}
62767722SShuguo.Yang@Sun.COM }
6277